Texas Instruments TL054MJB, TL054MFKB, TL054MJ, TL054IN, TL054IDR Datasheet

...
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
1
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
D
D
Faster Slew Rate (20 V/µs Typ) Without Increased Power Consumption
D
On-Chip Offset Voltage Trimming for Improved DC Performance and Precision Grades Are Available (1.5 mV, TL051A)
D
Available in TSSOP for Small Form-Factor Designs
description
The TL05x series of JFET-input operational amplifiers of fers improved dc and ac characteristics over the TL07x and TL08x families of BiFET operational amplifiers. On-chip zener trimming of offset voltage yields precision grades as low as 1.5 mV (TL051A) for greater accuracy in dc-coupled applications. T exas Instruments improved BiFET process and optimized designs also yield improved bandwidth and slew rate without increased power consumption. The TL05x devices are pin-compatible with the TL07x and TL08x and can be used to upgrade existing circuits or for optimal performance in new designs.
BiFET operational amplifiers offer the inherently higher input impedance of the JFET -input transistors, without sacrificing the output drive associated with bipolar amplifiers. This makes them better suited for interfacing with high-impedance sensors or very low-level ac signals. They also feature inherently better ac response than bipolar or CMOS devices having comparable power consumption.
The TL05x family was designed to offer higher precision and better ac response than the TL08x with the low noise floor of the TL07x. Designers requiring significantly faster ac response or ensured lower noise should consider the Excalibur TLE208x and TLE207x families of BiFET operational amplifiers.
AVAILABLE OPTIONS
PACKAGED DEVICES
T
A
VIOmax AT 25°C
SMALL
OUTLINE
(D)
CHIP
CARRIER
(FK)
CERAMIC
DIP
(J)
CERAMIC
DIP
(JG)
PLASTIC
DIP
(N)
PLASTIC
DIP
(P)
CHIP
FORM
(Y)
800 µV
TL051ACD TL052ACD
TL051ACP TL052ACP
0°C to 70°C
1.5 mV
TL051CD TL052CD TL054ACD
TL054ACN
TL051CP TL052CP
TL051Y TL052Y
TL054Y 4 mV TL054CD TL054CN — 800 µV
TL051AID TL052AID
TL051AIP TL052AIP
–40°C to 85°C
1.5 mV
TL051ID TL052ID TL054AID
TL054AIN
TL051IP TL052IP
4 mV TL054ID TL054IN — 800 µV
TL051AMD TL052AMD
TL051AMFK TL052AMFK
TL051AMJG TL052AMJG
TL051AMP TL052AMP
–55°C to 125°C
1.5 mV
TL051MD TL052MD TL054AMD
TL051MFK TL052MFK TL054AMFK
TL054AMJ
TL051MJG TL052MJG
TL054AMN
TL051MP TL052MP
4 mV TL054MD TL054MFK TL054MJ TL054MN
The D packages are available taped and reeled. Add R suffix to device type (e.g., TL054CDR).
Chip forms are tested at 25°C.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
Copyright 1997, Texas Instruments Incorporated
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
2
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
description (continued)
Because BiFET operational amplifiers are designed for use with dual power supplies, care must be taken to observe common-mode input voltage limits and output swing when operating from a single supply . DC biasing of the input signal is required and loads should be terminated to a virtual-ground node at midsupply. Texas Instruments TLE2426 integrated virtual ground generator is useful when operating BiFET amplifiers from single supplies.
The TL05x are fully specified at ±15 V and ±5 V. For operation in low-voltage and/or single-supply systems, Texas Instruments LinCMOS families of operational amplifiers (TLC-prefix) are recommended. When moving from BiFET to CMOS amplifiers, particular attention should be paid to the slew rate and bandwidth requirements, and also the output loading.
3212019
910111213
4 5 6 7 8
18 17 16 15 14
4IN+ NC V
CC–
NC 3IN+
1IN+
NC
V
CC+
NC
2IN+
1IN –
1OUT
NC
3OUT
3IN –
4IN –
2IN –
NC
4OUT
2OUT
1 2 3 4 5 6 7
14 13 12 11 10
9 8
1OUT
1IN– 1IN+
V
CC+
2IN+ 2IN–
2OUT
4OUT 4IN– 4IN+ V
CC–
3IN+ 3IN– 3OUT
1 2 3 4
8 7 6 5
OFFSET N1
IN–
IN+
V
CC–
NC V
CC+
OUT OFFSET N2
3 2 1 20 19
910111213
4 5 6 7 8
18 17 16 15 14
NC V
CC+
NC OUT NC
NC
IN–
NC
IN+
NC
TL051
FK PACKAGE
(TOP VIEW)
NC
OFFSET N1
NC
OFFSET N2
NC
NC
NC
NC
NC – No internal connection
CC –
V
NC
1 2 3 4
8 7 6 5
1OUT
1IN– 1IN+
V
CC –
V
CC+
2OUT 2IN– 2IN+
3212019
910111213
4 5 6 7 8
18 17 16 15 14
NC 2OUT NC 2IN – NC
NC
1IN –
NC
1IN+
NC
TL052
FK PACKAGE
(TOP VIEW)
NC
1OUT
NC
2IN +
NC
NC
NC
NC
CC +
V
CC –
V
TL054
D, J, OR N PACKAGE
(TOP VIEW)
TL054
FK PACKAGE
(TOP VIEW)
TL051
D, JG, OR P PACKAGE
(TOP VIEW)
TL052
D, JG, OR P PACKAGE
(TOP VIEW)
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
3
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
symbol (each amplifier)
+
IN–
IN+
OUT
equivalent schematic (each amplifier)
R9
OFFSET N2
OFFSET N1
IN–
IN+
Q2
Q3
Q7
V
CC+
Q14
Q6
R4
Q8
Q10
R7
Q11
R6
C1
Q9
Q5
Q4
R5
R1
Q1
JF1 JF2
Q13
Q16
R8
JF3
Q15
Q17
OUT
V
CC–
R2 R3
Q12
R10 D2
D1
See Note A
NOTE A: OFFSET N1 and OFFSET N2 are only available on the TL051x.
ACTUAL DEVICE COMPONENT COUNT
COMPONENT TL051 TL052 TL054
Transistors 20 34 62 Resistors 10 19 37 Diodes 2 3 5 Capacitors 1 2 4
These figures include all four amplifiers and all ESD, bias, and trim circuitry.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL051Y chip information
This chip, when properly assembled, displays characteristics similar to the TL051. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
+
OUT
IN+
IN–
V
CC+
(7)
(3)
(2)
(6)
(1)
(4)
(5)
V
CC–
OFFSET N1 OFFSET N2
63
43
(1)
(2)
(3)
(4)
(5)
(6)(7)
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL052Y chip information
This chip, when properly assembled, displays characteristics similar to the TL052. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. Chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (4) IS INTERNALLY CONNECTED
TO BACKSIDE OF CHIP.
+
1OUT
1IN+
1IN–
V
CC+
(8)
(6)
(3)
(2)
(5)
(1)
+
(7)
2IN+
2IN–
2OUT
(4)
V
CC–
(1)
(2)
(3)
(4)
(5)
(6)
(7)
(8)
66
72
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
6
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL054 chip information
This chip, when properly assembled, displays characteristics similar to the TL054C. Thermal compression or ultrasonic bonding may be used on the doped-aluminum bonding pads. These chips may be mounted with conductive epoxy or a gold-silicon preform.
BONDING PAD ASSIGNMENTS
+
1OUT
1IN+
1IN–
V
CC+
(4)
(6)
(3)
(2)
(5)
(1)
+
(7)
2IN+
2IN–
2OUT
(11)
V
CC–
+
3OUT
3IN+
3IN–
(13)
(10)
(9)
(12)
(8)
+
(14)
4OUT
4IN+
4IN–
(6)
(7)
(8)
(9)
71
122
CHIP THICKNESS: 15 MILS TYPICAL BONDING PADS: 4 × 4 MILS MINIMUM TJmax = 150°C TOLERANCES ARE ±10%. ALL DIMENSIONS ARE IN MILS. PIN (11) IS INTERNALLY CONNECTED
TO BACKSIDE OF THE CHIP.
(1)
(2)
(3)
(4)
(5)
(6)
(7) (8)
(9)
(10)
(11)
(12)
(13)
(14)
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
CC+
(see Note 1) 18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Supply voltage, V
CC–
(see Note 1) –18 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Differential input voltage (see Note 2) ±30 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, V
I
(any input, see Notes 1 and 3) ±15 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input current, II (each input) ±1 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output current, I
O
(each output) ±80 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total current into V
CC+
160 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Total current out of V
CC–
160 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Duration of short-circuit current at (or below) 25°C (see Note 4) unlimited. . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
A
: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
M suffix –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Case temperature for 60 seconds: FK package 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16inch) from case for 10 seconds: D, N, or P package 260°C. . . . . . . . . . . . . .
Lead temperature 1,6 mm (1/16inch) from case for 60 seconds: J or JG package 300°C. . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. All voltage values, except differential voltages, are with respect to the midpoint between V
CC+
and V
CC–.
2. Differential voltages are at IN+ with respect to IN–.
3. The magnitude of the input voltage must never exceed the magnitude of the supply voltage or 15 V, whichever is less.
4. The output may be shorted to either supply. Temperature and/or supply voltages must be limited to ensure that the maximum dissipation rating is not exceeded.
DISSIPATION RATING TABLE
PACKAGE
TA 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
TA = 125°C
POWER RATING
D–8 725 mW 5.8 mW/°C 464 mW 377 mW 145 mW
D–14 950 mW 7.6 mW/°C 608 mW 494 mW 190 mW
FK 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
J 1375 mW 11.0 mW/°C 880 mW 715 mW 275 mW
JG 1050 mW 8.4 mW/°C 672 mW 546 mW 210 mW
N 1575 mW 12.6 mW/°C 1008 mW 819 mW 315 mW P 1000 mW 8.0 mW/°C 640 mW 520 mW 200 mW
recommended operating conditions
C SUFFIX I SUFFIX M SUFFIX MIN MAX MIN MAX MIN MAX
UNIT
Supply voltage, V
CC±
±5 ±15 ±5 ±15 ±5 ±15 V
V
CC±
= ±5 V –1 4 –1 4 –1 4
C
ommon-mode input voltage,
V
IC
V
CC±
= ±15 V
–11
11
–11
11
–11
11
V
Operating free-air temperature, T
A
0 70
–40
85 –55 125 °C
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL051C and TL051AC electrical characteristics at specified free-air temperature
TL051C, TL051AC
PARAMETER TEST CONDITIONS
T
A
VCC ± = ± 5 V VCC ± = ± 15 V
UNIT
MIN TYP MAX MIN TYP MAX
25°C 0.75 3.5 0.59 1.5
p
TL051C
Full range 4.5 2.5
VIOInput offset voltage
25°C 0.55 2.8 0.35 0.8
mV
TL051AC
Full range 3.8 1.8
T emperature coef ficient
V
O
= 0, VIC = 0, R
= 50
TL051C
25°C to
70°C
8 8
°
α
VIO
of input offset voltage
R
S
= 50
TL051AC
25°C to
70°C
8 8 25
µ
V/°C
Input offset voltage long-term drift
§
25°C 0.04 0.04 µV/mo
p
VO = 0, VIC = 0,
25°C 4 100 5 100 pA
IIOInput offset current
OIC
See Figure 5
70°C 0.02 1 0.025 1 nA
p
VO = 0, VIC = 0,
25°C 20 200 30 200 pA
IIBInput bias current
OIC
See Figure 5
70°C 0.15 4 0.2 4 nA
Common-mode input
25°C
–1
to
4
–2.3
to
5.6
–11
to
11
–12.3
to
15.6
V
ICR
voltage range
Full range
–1
to
4
–11
to
11
V
25°C 3 4.2 13 13.9
Maximum positive peak
R
L
= 10
k
Full range 3 13
V
OM +
output voltage swing
25°C 2.5 3.8 11.5 12.7
V
R
L
=
2 k
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Maximum negative peak
R
L
= 10
k
Full range –2.5 –12
V
OM –
g
output voltage swing
25°C –2.3 –3.2 –11 –12
V
R
L
= 2
k
Full range –2.3 –11
25°C 25 59 50 105
A
VD
L
arge-signal
diff
erentia
l
p
RL = 2 k
0°C 30 65 60 129
V/mV
voltage am lification
70°C 20 46 30 85
r
i
Input resistance 25°C 10
12
10
12
c
i
Input capacitance 25°C 10 12 pF
25°C 65 85 75 93
CMRR
C
ommon-mode
V
IC
=
V
ICR
min,
0°C 65 84 75 92
dB
rejection ratio
V
O
= 0,
R
S
= 50
70°C 65 84 75 91 25°C 75 99 75 99
k
SVR
S
upply-voltage rejection
VO = 0, RS = 50
0°C 75 98 75 98
dB
ratio (V
CC±
/VIO)
70°C 75 97 75 97 25°C 2.6 3.2 2.7 3.2
I
CC
Supply current VO = 0, No load
0°C 2.7 3.2 2.8 3.2
mA
CCyO
70°C 2.6 3.2 2.7 3.2
Full range is 0°C to 70°C.
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
§
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
For V
CC±
= ±5 V, VO = ±2.3 V, or for V
CC±
= ±15 V, VO = ±10 V.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
9
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL051C and TL051AC operating characteristics at specified free-air temperature
TL051C, TL051AC
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
MIN TYP MAX MIN TYP MAX
25°C 16 13 20
SR+
Positi
ve slew rate
at unity gain
R
= 2 kΩ,C
= 100 pF,
Full
range
16.4 11 22.6
L
,
L
,
See Figure 1
25°C 15 13 18
V/µs
SR–
N
egative slew rate
at unity gain
Full
range
16 11 19.3
25°C 55 56
t
r
Rise time
0°C 54 55
70°C 63 63
V
I(PP)
= ±10 mV ,
25°C 55 57
ns
t
f
Fall time
RL = 2 kΩ,
p
0°C 54 56
C
L
=
100 F
,
See Figures 1 and 2
70°C 62 64
g
25°C 24% 19%
Overshoot factor
0°C 24% 19%
70°C 24% 19%
Equivalent input noise
f = 10 Hz 25°C 75 75
V
n
q
voltage
§
RS = 20 Ω,
f = 1 kHz 25°C 18 18 30
n
V/H
z
V
N(PP)
Peak-to-peak equivalent input noise voltage
See Figure 3
f = 10 Hz to
10 kHz
25°C 4 4 µV
I
n
Equivalent input noise current
f = 1 kHz 25°C 0.01 0.01
pA/Hz
THD
Total harmonic distortion
RS = 1 kΩ, f = 1 kHz
RL = 2 kΩ,
25°C 0.003% 0.003% 25°C 3 3.1
B
1
Unity-gain bandwidth
VI = 10 mV, RL = 2 kΩ,
p
0°C 3.2 3.3
MHz
C
L
= 25 F,
See Figure 4
70°C 2.7 2.8 25°C 59° 62°
φ
m
Phase margin at unity
VI = 10 mV, RL = 2 kΩ,
p
0°C 58° 62°
gain
C
L
= 25 F,
See Figure 4
70°C 59° 62°
Full range is 0°C to 70°C.
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
§
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
CC±
= ±5 V, VOrms = 1 V; for V
CC±
= ±15 V, VOrms = 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
10
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL051I and TL051AI electrical characteristics at specified free-air temperature
TL051I, TL051AI
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
A
MIN TYP MAX MIN TYP MAX
25°C 0.75 3.5 0.59 1.5
p
TL051I
Full range 5.3 3.3
VIOInput offset voltage
25°C 0.55 2.8 0.35 0.8
mV
TL051AI
Full range 4.6 2.6
T emperature coef ficient of
V
O
=
0
, VIC = 0, R
= 50
TL051I
25°C to
85°C
7 8
°
α
VIO
input offset voltage
R
S
= 50
TL051AI
25°C to
85°C
8 8 25
µ
V/°C
Input offset voltage long-term drift
§
25°C 0.04 0.04 µV/mo
p
VO = 0, VIC = 0,
25°C 4 100 5 100 pA
IIOInput offset current
OIC
See Figure 5
85°C 0.06 10 0.07 10 nA
p
VO = 0, VIC = 0,
25°C 20 200 30 200 pA
IIBInput bias current
OIC
See Figure 5
85°C 0.6 20 0.7 20 nA
Common-mode input
25°C
–1
to
4
–2.3
to
5.6
–11
to
11
–12.3
to
15.6
V
ICR
voltage range
Full range
–1
to
4
–11
to
11
V
25°C 3 4.2 13 13.9
Maximum positive peak
R
L
= 10
k
Full range 3 13
V
OM +
output voltage swing
25°C 2.5 3.8 11.5 12.7
V
R
L
= 2
k
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Maximum negative peak
R
L
= 10
k
Full range –2.5 –12
V
OM –
g
output voltage swing
25°C –2.3 –3.2 –11 –12
V
R
L
= 2
k
Full range –2.3 –11
25°C 25 59 50 105
A
VD
L
arge-signal
diff
erentia
l
p
RL = 2 k –40°C 30 74 60 145 V/mV
voltage am lification
85°C 20 43 30 76
r
i
Input resistance 25°C
10
12
10
12
c
i
Input capacitance 25°C 10 12 pF
V
= V
min
,
25°C 65 85 75 93
CMRR
C
ommon-mode
V
IC
V
ICR
min,
VO = 0,
–40°C 65 83 75 90 dB
rejection ratio
RS = 50
85°C 65 84 75 93 25°C 75 99 75 99
k
SVR
S
upply-voltage rejection
V
O
= 0,
–40°C 75 98 75 98 dB
ratio (V
CC±
/VIO)
R
S
= 50
85°C 75 99 75 99 25°C 2.6 3.2 2.7 3.2
I
CC
Supply current VO = 0, No load –40°C 2.4 3.2 2.6 3.2 mA
85°C 2.5 3.2 2.6 3.2
Full range is –40°C to 85°C
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
§
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
For V
CC±
= ±5 V, VO = ±2.3 V, or for V
CC±
= ±15 V, VO = ±10 V.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
11
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL051I and TL051AI operating characteristics at specified free-air temperature
TL051I, TL051AI
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
MIN TYP MAX MIN TYP MAX
25°C 16 13 20
SR+
Positi
ve slew rate
at unity gain
R
= 2 kΩ,C
= 100 pF,
Full
range
11
L
,
L
,
See Figure 1
25°C 15 13 18
V/µs
SR–
N
egative slew rate
at unity gain
Full
range
11
25°C 55 56
t
r
Rise time
–40°C 52 53
85°C 64 65
V
I(PP)
= ±10 mV ,
25°C 55 57
ns
t
f
Fall time
()
RL = 2 kΩ,
p
–40°C 51 53
C
L
=
100 F
,
See Fi
g
ures 1 and 2
85°C 64 65
g
25°C 24% 19%
Overshoot factor
–40°C 24% 19%
85°C 24% 19%
Equivalent input noise
f = 10 Hz 25°C 75 75
V
n
q
voltage
§
RS = 20 Ω,
f = 1 kHz 25°C 18 18 30
n
V/H
z
V
N(PP)
Peak-to-peak equivalent input noise voltage
See Figure 3
f = 10 Hz to
10 kHz
25°C 4 4 µV
I
n
Equivalent input noise current
f = 1 kHz 25°C 0.01 0.01 pA/√Hz
THD Total harmonic distortion
RS = 1 kΩ, f = 1 kHz
RL = 2 kΩ,
25°C 0.003% 0.003% 25°C 3 3.1
B
1
Unity-gain bandwidth
VI = 10 mV, RL = 2 kΩ,
p
–40°C 3.5 3.6
MHz
C
L
= 25 F,
See Figure 4
85°C 2.6 2.7 25°C 59° 62°
φ
m
Phase margin at unity
VI = 10 mV, RL = 2 kΩ,
p
–40°C 58° 61°
gain
C
L
= 25 F,
See Figure 4
85°C 59° 62°
Full range is –40°C to 85°C.
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
§
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
CC±
= ±5 V, VOrms = 1 V; for V
CC±
= ±15 V, VOrms = 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
12
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL051M and TL051AM electrical characteristics at specified free-air temperature
TL051M, TL051AM
PARAMETER TEST CONDITIONS
T
A
VCC ± = ± 5 V VCC ± = ± 15 V
UNIT
A
MIN TYP MAX MIN TYP MAX
25C 0.75 3.5 0.59 1.5
p
TL051M
Full range 6.5 4.5
VIOInput offset voltage
25°C 0.55 2.8 0.35 0.8
mV
TL051AM
Full range 5.8 3.8
T emperature coef ficient of
V
O
=
0
, VIC = 0, R
= 50
TL051M
25°C to
125°C
8 8
°
α
VIO
input offset voltage
R
S
= 50
TL051AM
25°C to
125°C
8 8
µ
V/°C
Input offset voltage long-term drift
25°C 0.04 0.04 µV/mo
p
VO = 0, VIC = 0,
25°C 4 100 5 100 pA
IIOInput offset current
OIC
See Figure 5
125°C 1 20 2 20 nA
p
VO = 0, VIC = 0,
25°C 20 200 30 200 pA
IIBInput bias current
OIC
See Figure 5
125°C 10 50 20 50 nA
Common-mode input
25°C
–1
to
4
–2.3
to
5.6
–11
to
11
–12.3
to
15.6
V
ICR
voltage range
Full range
–1
to
4
–11
to
11
V
25°C 3 4.2 13 13.9
Maximum positive peak
R
L
= 10
k
Full range 3 13
V
OM+
output voltage swing
25°C 2.5 3.8 11.5 12.7
V
R
L
= 2
k
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Maximum negative peak
R
L
= 10
k
Full range –2.5 –12
V
OM–
g
output voltage swing
25°C –2.3 –3.2 –11 –12
V
R
L
= 2
k
Full range –2.3 –11
25°C 25 59 50 105
A
VD
L
arge-signal
diff
erentia
l
p
§
RL = 2 k
–55°C 30 76 60 149
V/mV
voltage am lification
§
125°C 10 32 15 49
r
i
Input resistance 25°C 10
12
10
12
c
i
Input capacitance 25°C 10 12 pF
V
= V
min
,
25°C 65 85 75 93
CMRR
C
ommon-mode
V
IC
V
ICR
min,
VO = 0,
–55°C 65 83 75 92
dB
rejection ratio
RS = 50
125°C 65 84 75 94
25°C 75 99 75 99
k
SVR
S
upply-voltage rejection
VO = 0, RS = 50
–55°C 75 98 75 98
dB
ratio (V
CC±
/VIO)
125°C 75 100 75 100
25°C 2.6 3.2 2.7 3.2
I
CC
Supply current VO = 0, No load
–55°C 2.3 3.2 2.4 3.2
mA
CCyO
125°C 2.4 3.2 2.5 3.2
Full range is –55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
CC±
= ± 5 V, VO = ± 2.3 V, or for V
CC±
=
±15 V, V
O
= ±10 V.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
13
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL051M and TL051AM operating characteristics at specified free-air temperature
TL051M, TL051AM
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
A
MIN TYP MAX MIN TYP MAX
Positive slew rate
°
SR
+
at unity gain
R
= 2 kΩ,C
= 100 pF,
25°C1613
20
Negative slew rate
L
,
L
,
See Figure 1
°
V/µs
SR
g
at unity gain
25°C1513
25°C 55 56
t
r
Rise time
–55°C 51 52
125°C 68 68
V
I(PP)
= ±10 mV,
25°C 55 57
ns
t
f
Fall time
()
RL = 2 kΩ,
p
–55°C 51 52
C
L
=
100 F
,
See Fi
g
ures 1 and 2
125°C 68 69
g
25°C 24% 19%
Overshoot factor
–55°C 25% 19%
125°C 25% 19%
Equivalent input noise
f = 10 Hz 25°C 75 75
V
n
q
voltage
RS = 20 Ω,
f = 1 kHz 25°C 18 19
n
V/H
z
V
N(PP)
Peak-to-peak equivalent input noise voltage
See Figure 3
f = 10 Hz to
10 kHz
25°C 4 4 µV
I
n
Equivalent input noise current
f = 1 kHz 25°C 0.01 0.01 pA/√Hz
THD
Total harmonic distortion
§
RS = 1 kΩ, f = 1 kHz
RL = 2kΩ,
25°C 0.003% 0.003% 25°C 3 3.1
B
1
Unity-gain bandwidth
VI = 10 mV,
p
RL = 2 kΩ,
–55°C 3.6 3.7
MHz
C
L
= 25 F,
See Figure 4
125°C 2.3 2.4
25°C 59° 62°
φ
m
Phase margin at unity
VI = 10 mV,pRL = 2 kΩ,
–55°C 57° 61°
gain
C
L
= 25 F,
See Figure 4
125°C 59° 62°
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
§
For V
CC±
= ±5 V, VOrms = 1 V; for V
CC±
= ±15 V, VOrms = 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
14
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL051Y electrical characteristics, TA = 25°C
TL051Y
PARAMETER TEST CONDITIONS
VCC ± = ± 5 V VCC ± = ± 15 V
UNIT
MIN TYP MAX MIN TYP MAX
p
V
= 0, V
= 0,
VIOInput offset voltage
O
,
RS = 50
IC
,
0.75
0.59
mV
p
V
= 0, V
= 0,
p
IIOInput offset current
O
,
IC
,
See Figure 5
45pA
p
V
= 0, V
= 0,
p
IIBInput bias current
O
,
IC
,
See Figure 5
2030pA
V
ICR
Common-mode input voltage range
–2.3
to
5.6
–12.3
to
15.6
V
Maximum positive peak output voltage
RL = 10 k 4.2 13.9
V
OM+
g
swing
RL = 2 k
3.8 12.7
V
Maximum negative peak output voltage
RL = 10 k –3.5 –13.2
V
OM –
gg
swing
RL = 2 k
–3.2 –12
V
A
VD
Large-signal differential voltage amplification
RL = 2 k 59 105 V/mV
r
i
Input resistance 10
12
10
12
c
i
Input capacitance 10 12 pF
CMRR Common-mode rejection ratio
VIC = V
ICR
min,
VO = 0, RS = 50
85 93 dB
k
SVR
Supply-voltage rejection ratio (V
CC±
/VIO)
VO = 0, RS = 50 99 99 dB
I
CC
Supply current VO = 0, No load 2.6 2.7 mA
For V
CC±
= ±5 V, VO = ±2.3 V, or for V
CC±
= ± 15 V, V
O
= ±10 V.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
15
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL051Y operating characteristics, T
A
= 25°C
TL051Y
PARAMETER TEST CONDITIONS
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
MIN TYP MAX MIN TYP MAX
SR+
Positive slew rate at unity gain
R
= 2 kΩ,C
= 100 pF,
16 20
SR–
Negative slew rate at unity gain
L
,
L
,
See Figure 1
15 18
V/µs
t
r
Rise time
V
I(PP)
= ±10 mV ,
55 56
t
f
Fall time
()
RL = 2 kΩ,
=
p
55 57
ns
Overshoot factor
C
L
=
100 F
,
See Figures 1 and 2
24% 19%
f = 10 Hz 75 75
V
n
Equival
ent input noise voltage
RS = 20 Ω,
f = 1 kHz 18 18
n
V/H
z
V
N(PP)
Peak-to-peak equivalent input noise voltage
See Figure 3
f = 10 Hz to
10 kHz
4 4 µV
I
n
Equivalent input noise current f = 1 kHz 0.01 0.01 pA/√Hz
THD Total harmonic distortion
§
RS = 1 kΩ,RL = 2 kΩ, f = 1 kHz
0.003% 0.003%
B
1
Unity-gain bandwidth
VI = 10 mV, RL = 2 kΩ, CL = 25 pF, See Figure 4
3 3.1 MHz
φ
m
Phase margin at unity gain
VI = 10 mV, RL = 2 kΩ, CL = 25 pF, See Figure 4
59° 62°
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
This parameter is tested on a sample basis for the TL051A. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
§
For V
CC±
= ±5 V, VOrms = 1 V; for V
CC±
= ±15 V, VOrms = 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
16
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL052C and TL052AC electrical characteristics at specified free-air temperature
TL052C, TL052AC
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
A
MIN TYP MAX MIN TYP MAX
25°C 0.73 3.5 0.65 1.5
p
TL052C
Full range 4.5 2.5
VIOInput offset voltage
25°C 0.51 2.8 0.4 0.8
mV
VO = 0,
TL052AC
Full range 3.8 1.8
V
IC
= 0,
R
= 50
25°C to
T emperature coef ficient
R
S
50
TL052C
70°C
8
8
°
α
VIO
of input offset voltage
25°C to
µ
V/°C
TL052AC
70°C
8625
Input offset voltage long­term drift
§
VO = 0, RS = 50
VIC = 0, 25°C 0.04 0.04 µV/mo
p
V
= 0,
25°C 4 100 5 100 pA
IIOInput offset current
O
,
See Figure 5
V
IC
=
0
,
70°C
0.02 1 0.025 1 nA
p
V
= 0,
25°C 20 200 30 200 pA
IIBInput bias current
O
,
See Figure 5
V
IC
=
0
,
70°C
0.15 4 0.2 4 nA
Common-mode input
25°C
–1
to
4
–2.3
to
5.6
–11
to
11
–12.3
to
15.6
V
ICR
voltage range
Full range
–1
to
4
–11
to
11
V
25°C 3 4.2 13 13.9
Maximum positive peak
R
L
= 10
k
Full range 3 13
V
OM+
output voltage swing
25°C 2.5 3.8 11.5 12.7
V
R
L
= 2
k
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Maximum negative peak
R
L
=
10 k
Full range –2.5 –12
V
OM–
g
output voltage swing
25°C –2.3 –3.2 –11 –12
V
R
L
= 2
k
Full range –2.3 –11
25°C 25 59 50 105
A
VD
Large-signal differential
p
RL = 2 k
0°C 30 65 60 129
V/mV
voltage am lification
70°C 20 46 30 85
r
i
Input resistance 25°C
10
12
10
12
c
i
Input capacitance 25°C 10 12 pF
25°C 65 85 75 93
CMRR
C
ommon-mode
V
IC
=
V
ICR
min,
=
RS = 50
0°C
65 84 75 92
dB
rejection ratio
V
O
= 0,
70°C 65 84 75 91
Full range is 0°C to 70°C.
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
§
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
For V
CC±
= ±5 V, VO = ±2.3 V; at V
CC±
= ±15 V, VO = ±10 V.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
17
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL052C and TL052AC electrical characteristics at specified free-air temperature (continued)
TL052C, TL052AC
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
A
MIN TYP MAX MIN TYP MAX
25°C 75 99 75 99
k
SVR
Supply-voltage rejection
VO = 0, RS = 50
0°C
75 98 75 98
dB
ratio (V
CC ±
/VIO)
70°C 75 97 75 97 25°C 4.6 5.6 4.8 5.6
I
CC
Supply current
p
VO = 0, No load
0°C
4.7 6.4 4.8 6.4
mA
(two am lifiers)
70°C 4.4 6.4 4.6 6.4
VO1/V
O2
Crosstalk attenuation AVD = 100 25°C 120 120 dB
TL052C and TL052AC operating characteristics at specified free-air temperature
TL052C, TL052AC
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ± 5 V V
CC±
= ± 15 V
UNIT
A
MIN TYP MAX MIN TYP MAX
25°C 17.8 9 20.7
SR +Slew rate at unity gain
RL = 2 kΩ, CL = 100 pF,
Full range
8
Negative slew rate
See Figure 1
25°C 15.4 9 17.8
V/µs
SR
g
at unity gain
Full range 8
25°C 55 56
t
r
Rise time
0°C 54 55
70°C 63 63
V
I(PP)
= ±10 mV,
25°C 55 57
ns
t
f
Fall time
()
RL = 2 kΩ,
p
0°C 54 56
C
L
=
100 F
,
See Fi
g
ures 1 and 2
70°C 62 64
g
25°C 24% 19%
Overshoot factor
0°C 24% 19%
70°C 24% 19%
Equivalent input noise
f = 10 Hz 25°C 71 71
V
n
q
voltage
§
RS = 20 Ω,
f = 1 kHz 25°C 19 19 30
n
V/H
z
V
N(PP)
Peak-to-peak equivalent input noise current
See Figure 3
f =
10 Hz t 10 kHz
25°C 4 4 µV
I
n
Equivalent input noise current
f = 1 kHz 25°C 0.01 0.01 pA/√Hz
THD T otal harmonic distortion
RS = 1 kΩ, f = 1 kHz
RL = 2 kΩ,
25°C 0.003% 0.003% 25°C 3 3
B
1
Unity-gain bandwidth
VI = 10 mV,
p
RL = 2 kΩ,
0°C 3.2 3.2
MHz
C
L
= 25 F,
See Figure 4
70°C 2.6 2.7 25°C 60° 63°
φ
m
Ph
ase margin at unity
V
I
= 10 mV,
=
p
R
L
= 2 k,
0°C 59° 63°
gain
C
L
= 25 F,
See Figure 4
70°C 60° 63°
Full range is 0°C to 70°C.
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
CC±
= ±5 V, V
O(RMS)
= 1 V; for V
CC±
= ±15 V, V
O(RMS)
= 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
18
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL052I and TL052AI electrical characteristics at specified free-air temperature
TL052I, TL052AI
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
A
MIN TYP MAX MIN TYP MAX
25°C 0.73 3.5 0.65 1.5
p
TL052I
Full range 5.3 3.3
VIOInput offset voltage
25°C 0.51 2.8 0.4 0.8
mV
V
O
= 0,
=
TL052AI
Full range 4.6 2.6
V
IC
= 0,
RS = 50
TL052I
25°C to
85°C
7 6
°
α
VIO
T
emperature coe
ffici
ent
TL052AI
25°C to
85°C
6 6 25
µ
V/°C
Input offset voltage long­term drift
§
VO = 0, RS = 50
VIC = 0, 25°C 0.04 0.04 µV/mo
p
V
= 0, V
= 0,
25°C 4 100 5 100 pA
IIOInput offset current
O
,
See Figure 5
IC
,
85°C 0.06 10 0.07 10 nA
p
V
= 0, V
= 0,
25°C 20 200 30 200 pA
IIBInput bias current
O
,
See Figure 5
IC
,
85°C 0.6 20 0.7 20 nA
Common-mode input
25°C
–1
to
4
–2.3
to
5.6
–11
to
11
–12.3
to
15.6
V
ICR
voltage range
Full range
–1
to
4
–11
to
11
V
25°C 3 4.2 13 13.9
Maximum positive peak
R
L
= 10
k
Full range 3 13
V
OM+
output voltage swing
25°C 2.5 3.8 11.5 12.7
V
R
L
=
2 k
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Maximum negative peak
R
L
= 10
k
Full range –2.5 –12
V
OM–
g
output voltage swing
25°C –2.3 –3.2 –11 –12
V
R
L
= 2
k
Full range –2.3 –11
25°C 25 59 50 105
A
VD
Large-signal differential
p
RL = 2 k
–40°C 30 74 60 145
V/mV
voltage am lification
85°C 20 43 30 76
r
i
Input resistance 25°C 10
12
10
12
c
i
Input capacitance 25°C 10 12 pF
25°C 65 85 75 93
CMRR
C
ommon-mode
V
IC
=
V
ICR
min,
=
RS = 50
–40°C
65 83 75 90
dB
rejection ratio
V
O
= 0,
85°C 65 84 75 93
Full range is –40°C to 85°C.
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters
§
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV.
At V
CC±
= ± 5 V, VO = ± 2.3 V; at V
CC±
= ±15 V, VO = ±10 V.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
19
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL052I and TL052AI electrical characteristics at specified free-air temperature (continued)
TL052I, TL052AI
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
A
MIN TYP MAX MIN TYP MAX
25°C 75 99 75 99
k
SVR
Supply-voltage rejection
VO = 0, RS = 50
–40°C
75 98 75 98
dB
ratio (V
CC±
/VIO)
85°C 75 99 75 99 25°C 4.6 5.6 4.8 5.6
I
CC
Supply current
p
VO = 0, No load
–40°C
4.5 6.4 4.7 6.4
mA
(two am lifiers)
85°C 4.4 6.4 4.6 6.4
VO1/V
O2
Crosstalk attenuation AVD = 100 25°C 120 120 dB
TL052I and TL052AI operating characteristics at specified free-air temperature
TL052I, TL052AI
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ± 5 V V
CC±
= ± 15 V
UNIT
A
MIN TYP MAX MIN TYP MAX
25°C 17.8 9 20.7
SR
+
Sl
ew rate at unity gain
R
= 2 kΩ, C
= 100 pF,
Full range 8
Negative slew rate at
L
,
L
,
See Figure 1
25°C 15.4 9 17.8
V/µs
SR
g
unity gain
Full range 8
25°C 55 56
t
r
Rise time
–40°C 52 53
85°C 64 65
=
25°C 55 57
ns
t
f
Fall time
V
I(PP)
=
±10 mV
,
RL = 2 kΩ, CL = 100 pF,
–40°C 51 53
See Figures 1 and 2
85°C 64 65 25°C 24% 19%
Overshoot factor
–40°C 24% 19%
85°C 24% 19%
Equivalent input noise
f = 10 Hz 25°C 71 71
V
n
q
voltage
§
RS = 20 Ω,
f = 1 kHz 25°C 19 19 30
V
N(PP)
Peak-to-peak equivalent input noise current
See Figure 3
f =
10 Hz to 10 kHz
25°C 4 4 µV
I
n
Equivalent input noise current
f = 1 kHz 25°C 0.01 0.01 pA/√Hz
THD T otal harmonic distortion
RS = 1 kΩ, f = 1 kHz
RL = 2 kΩ,
25°C 0.003% 0.003% 25°C 3 3
B
1
Unity-gain bandwidth
VI = 10 mV,
p
RL = 2 kΩ,
–40°C 3.5 3.6
MHz
C
L
= 25 F,
See Figure 4
85°C 2.5 2.6 25°C 60° 63°
φ
m
Ph
ase margin at unity
V
I
= 10 mV,
=
p
R
L
= 2 k,
–40°C 58° 61°
gain
C
L
= 25 F,
See Figure 4
85°C 60° 63°
Full range is –40°C to 85°C.
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
CC±
= ±5 V, V
O(RMS)
= 1 V; for V
CC±
= ±15 V, V
O(RMS)
= 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
20
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL052M and TL052AM electrical characteristics at specified free-air temperature
TL052M, TL052AM
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ± 5 V V
CC±
= ± 15 V
UNIT
A
MIN TYP MAX MIN TYP MAX
25°C 0.73 3.5 0.65 1.5
p
TL052M
Full range 6.5 4.5
VIOInput offset voltage
25°C 0.51 2.8 0.4 0.8
mV
V
O
= 0,
TL052AM
Full range 5.8 3.8
V
IC
= 0,
R
= 50
25°C to
T emperature coef ficient
R
S
50
TL052M
125°C
10
9
°
α
VIO
of input offset voltage
TL052AM
25°C to
125°C
9 8
µV/°C
Input offset voltage long­term drift
VO = 0, RS = 50
VIC = 0,
25°C 0.04 0.04 µV/mo
p
VO = 0, VIC = 0,
25°C 4 100 5 100 pA
IIOInput offset current
O
See Figure 5
IC
125°C 1 20 2 20 nA
p
VO = 0,
VIC = 0,
25°C 20 200 30 200 pA
IIBInput bias current
O
See Figure 5
125°C 10 50 20 50 nA
Common-mode input
25°C
–1
to
4
–2.3
to
5.6
–11
to
11
–12.3
to
15.6
V
ICR
voltage range
Full range
–1
to
4
–11
to
11
V
25°C 3 4.2 13 13.9
Maximum positive peak
R
L
= 10
k
Full range 3 13
V
OM+
output voltage swing
25°C 2.5 3.8 11.5 12.7
V
R
L
= 2
k
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Maximum negative peak
R
L
= 10
k
Full range –2.5 –12
V
OM–
g
output voltage swing
25°C –2.3 –3.2 –11 –12
V
R
L
= 2
k
Full range –2.3 –11
25°C 25 59 50 105
A
VD
L
arge-signal
diff
erentia
l
p
§
RL = 2 k
–55°C 30 76 60 149
V/mV
voltage am lification
§
125°C 10 32 15 49
r
i
Input resistance 25°C
10
12
10
12
c
i
Input capacitance 25°C 10 12 pF
V
= V
min
,
25°C 65 85 75 93
CMRR
C
ommon-mode
V
IC
V
ICR
min,
VO = 0,
–55°C 65 83 75 92
dB
rejection ratio
RS = 50
125°C 65 84 75 94
25°C 75 99 75 99
k
SVR
S
upply-voltage rejection
VO = 0, RS = 50
–55°C
75 98 75 98
dB
ratio (V
CC±
/VIO)
125°C 75 100 75 100
25°C 4.6 5.6 4.8 5.6
I
CC
S
upply curren
t
p
VO = 0, No load
–55°C
4.4 6.4 4.5 6.4
mA
(two am lifiers)
125°C 4.2 6.4 4.4 6.4
VO1/V
O2
Crosstalk attenuation AVD = 100 25°C 120 120 dB
Full range is – 55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
CC±
= ± 5 V, VO = ± 2.3 V; at V
CC±
= ±15 V, VO = ±10 V.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
21
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL052M and TL052AM operating characteristics at specified free-air temperature
TL052M, TL052AM
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ± 5 V V
CC±
= ± 15 V
UNIT
A
MIN TYP MAX MIN TYP MAX
Positive slew rate
25°C 17.8 9 20.7
SR
+
at unity gain
RL = 2 kΩ,
p
Full range 8
Negative slew rate
C
L
=
100 pF
,
See
Figure 1
25°C 15.4 9 17.8
V/µs
SR
g
at unity gain
See Figure 1
Full range 8
25°C 55 56
t
r
Rise time
–55°C 51 52
125°C 68 68
V
I(PP)
= ± 10 mV,
25°C 55 57
ns
t
f
Fall time
()
RL = 2 kΩ,
p
–55°C 51 52
C
L
=
100 F
,
See Fi
g
ures 1 and 2
125°C 68 69
g
25°C 24% 19%
Overshoot factor
–55°C 25% 19%
125°C 25% 19%
Equivalent input noise
f = 10 Hz 25°C 71 71
V
n
q
voltage
§
f = 1 kHz 25°C 19 19
n
V/H
z
V
N(PP)
Peak-to-peak equivalent input noise current
R
S
= 20 Ω,
See Figure 3
f =
10 Hz
to
10 kHz
25°C 4 4 µV
I
n
Equivalent input noise current
f = 1 kHz 25°C 0.01 0.01 pA/√Hz
THD
Total harmonic distortion
RS = 1 kΩ, f = 1 kHz
RL = 2 kΩ,
25°C 0.003% 0.003% 25°C 3 3
B
1
Unity-gain bandwidth
VI = 10 mV,
p
RL = 2 kΩ,
–55°C 3.6 3.7
MHz
C
L
= 25 F,
See Figure 4
125°C 2.3 2.4
25°C 60° 63°
φ
m
Phase margin at unity
VI = 10 mV,pRL = 2 kΩ,
–55°C 57° 61°
gain
C
L
= 25 F,
See Figure 4
125°C 60° 63°
Full range is – 55°C to 125°C.
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
CC±
= ±5 V, V
O(RMS)
= 1 V; for V
CC±
= ±15 V, V
O(RMS)
= 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
22
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL052Y electrical characteristics, TA = 25°C
TL052Y
PARAMETER TEST CONDITIONS
V
CC±
= ± 5 V V
CC±
= ± 15 V
UNIT
MIN TYP MAX MIN TYP MAX
V
IO
Input offset voltage
0.73 0.65 mV
Input offset voltage long-term drift
V
O
= 0,
RS = 50
VIC = 0,
0.04 0.04 µV/mo
I
IO
Input offset current
VO = 0, See Figure 5
VIC = 0,
4 5 pA
I
IB
Input bias current
VO = 0, See Figure 5
VIC = 0,
20 30 pA
V
ICR
Common-mode input voltage range
–2.3
to
5.6
–12.3
to
15.6
V
Maximum positive peak
RL = 10 k 4.2 13.9
V
OM+
output voltage swing
RL = 2 k
3.8 12.7
Maximum negative peak output
RL = 10 k –3.5 –13.2
V
V
OM–
g
voltage swing
RL = 2 k
–3.2 –12
A
VD
Large-signal differential voltage amplification
RL = 2 k 59 105 V/mV
r
i
Input resistance
10
12
10
12
c
i
Input capacitance 10 12 pF
CMRR Common-mode rejection ratio
VIC = V
ICR
min,
VO = 0,
RS = 50
85 93 dB
k
SVR
Supply-voltage rejection ratio (V
CC±
/VIO)
VO = 0, RS = 50 99 99 dB
I
CC
Supply current (two amplifiers) VO = 0, No load 4.6 4.8 mA
VO1/V
O2
Crosstalk attenuation AVD = 100 120 120 dB
For V
CC±
= ±5 V, VO = ±2.3 V; at V
CC±
= ±15 V, VO = ±10 V.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
23
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL052Y operating characteristics, TA = 25°C
TL052Y
PARAMETER TEST CONDITIONS
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
MIN TYP MAX MIN TYP MAX
SR +
Positive slew rate at unity gain
R
= 2 kΩ, C
= 100 pF,
17.8 20.7
SR –
Negative slew rate at unity gain
L
,
L
,
See Figure 1
15.4 17.8
V/µs
t
r
Rise time
=
55 56
t
f
Fall time
V
I(PP)
=
±10 mV
,
RL = 2 kΩ, CL = 100 pF,
55 57
ns
Overshoot factor
See Figures 1 and 2
24% 19%
Equivalent input noise
f = 10 Hz 71 71
V
n
q
voltage
RS = 20 Ω,
f = 1 kHz 19 19
n
V/H
z
V
N(PP)
Peak-to-peak equivalent input noise current
See Figure 3
f = 10 Hz to 10 kHz 4 4 µV
I
n
Equivalent input noise current
f = 1 kHz 0.01 0.01 pA/√Hz
THD
Total harmonic distortion
§
RS = 1 kΩ, f = 1 kHz
RL = 2 kΩ,
0.003% 0.003%
B
1
Unity-gain bandwidth
VI = 10 mV, CL = 25 pF,
RL = 2 kΩ, See Figure 4
3 3
MHz
φ
m
Phase margin at unity gain
VI = 10 mV, CL = 25 pF,
RL = 2 kΩ, See Figure 4
60° 63°
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
§
For V
CC±
= ±5 V, V
O(RMS)
= 1 V; for V
CC±
= ±15 V, V
O(RMS)
= 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
24
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL054C and TL054AC electrical characteristics at specified free-air temperature
TL054C, TL054AC
PARAMETER TEST CONDITIONS
T
A
VCC ± = ± 5 V VCC ± = ± 15 V
UNIT
MIN TYP MAX MIN TYP MAX
25°C 0.64 5.5 0.56 4
p
TL054C
Full range 7.7 6.2
VIOInput offset voltage
25°C 0.57 3.5 0.5 1.5
mV
TL054AC
Full range 5.7 3.7
T emperature coef ficient
V
O
= 0, VIC = 0, R
= 50
TL054C
25°C to
70°C
25 23
°
α
VIO
of input offset voltage
R
S
50
TL054AC
25°C to
70°C
24 23
µ
V/°C
Input offset voltage long-term drift
25°C 0.04 0.04 µV/mo
p
VO = 0, VIC = 0,
25°C 4 100 5 100 pA
IIOInput offset current
OIC
See Figure 5
70°C 0.02 1 0.025 1 nA
p
VO = 0, VIC = 0,
25°C 20 200 30 200 pA
IIBInput bias current
OIC
See Figure 5
70°C 0.15 4 0.2 4 nA
Common-mode input
25°C
–1
to
4
–2.3
to
5.6
–11
to
11
–12.3
to
15.6
V
ICR
voltage range
Full range
–1
to
4
–11
to
11
V
25°C 3 4.2 13 13.9
Maximum positive peak
R
L
=
10 k
Full range 3 13
V
OM +
output voltage swing
25°C 2.5 3.8 11.5 12.7
V
R
L
= 2
k
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Maximum negative peak
R
L
= 10
k
Full range –2.5 –12
V
OM –
g
output voltage swing
25°C –2.3 –3.2 –11 –12
V
R
L
=
2 k
Full range –2.3 –11
25°C 25 72 50 133
A
VD
L
arge-signal
diff
erentia
l
p
RL = 2 k 0°C 30 88 60 173 V/mV
voltage am lification
§
70°C 20 57 30 85
r
i
Input resistance 25°C
10
12
10
12
c
i
Input capacitance 25°C 10 12 pF
25°C 65 84 75 92
CMRR
C
ommon-mode
V
IC
=
V
ICR
min,
0°C 65 84 75 92 dB
rejection ratio
V
O
= 0,
R
S
= 50
70°C 65 84 75 93 25°C 75 99 75 99
k
SVR
S
upply-voltage rejection
V
CC±
= ±5 V to ±15 V,
0°C 75 99 75 99 dB
ratio (V
CC±
/VIO)
V
O
= 0,
R
S
= 50
70°C 75 99 75 99 25°C 8.1 11.2 8.4 11.2
I
CC
S
upply curren
t
p
VO = 0, No load 0°C 8.2 12.8 8.5 12.8 mA
(four am lifiers)
70°C 7.9 11.2 8.2 11.2
VO1/VO2Crosstalk attenuation AVD = 100 25°C 120 120 dB
Full range is 0°C to 70°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
CC±
= ±5 V, VO = ±2.3 V, at V
CC±
= ±15 V, VO = ±10 V.B
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
25
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL054C and TL054AC operating characteristics at specified free-air temperature
TL054C, TL054C
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
MIN TYP MAX MIN TYP MAX
Positive slew rate
25°C 15.4 10 17.8
SR
+
at unity gain
0°C 15.7 8 17.9
RL = 2 kΩ,CL = 100 pF,
70°C 14.4 8 17.5
Negative slew rate at
L L
See Figure 1 and Note 7
25°C 13.9 10 15.9
V/µs
SR
g
unity gain
0°C 14.3 8 16.1
70°C 13.3 8 15.5
25°C 55 56
t
r
Rise time 0°C 54 55
70°C 63 63
V
I(PP)
= ±10 mV ,
25°C 55 57
ns
t
f
Fall time
R
L
= 2 k,
p
0°C 54 56
C
L
=
100 F
,
See Fi
g
ures 1 and 2
70°C 62 64
See Figures 1 and 2
25°C 24% 19%
Overshoot factor 0°C 24% 19%
70°C 24% 19%
Equivalent input noise
f = 10 Hz 25°C 75 75
V
n
q
voltage
§
RS = 20 Ω,
f = 1 kHz 25°C 21 21 45
nV/Hz
V
N(PP)
Peak-to-peak equivalent input noise voltage
See Figure 3
f = 10 Hz to
10 kHz
25°C 4 4 µV
I
n
Equivalent input noise current
f = 1 kHz 25°C 0.01 0.01
pA/Hz
THD
Total harmonic distortion
RS = 1 kΩ, f = 1 kHz
RL = 2 kΩ,
25°C 0.003% 0.003% 25°C 2.7 2.7
B
1
Unity-gain bandwidth
V
I
= 10 mV,
R
L
= 2 k,
p
0°C 3 3 MHz
C
L
= 25 F,
See Figure 4
70°C 2.4 2.4 25°C 61° 64°
φ
m
Phase margin at
V
I
= 10 mV,
R
L
= 2 k,
=
p
0°C 60° 64°
unity gain
C
L
= 25 F,
See Figure 4
70°C 61° 63°
Full range is 0°C to 70°C.
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
CC±
= ±5 V, V
o(rms
) = 1 V; for V
CC±
= ±15 V, V
o(rms)
= 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
26
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL054I and TL054AI electrical characteristics at specified free-air temperature
TL054I, TL054AI
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V UNIT
A
MIN TYP MAX MIN TYP MAX
25°C
0.64 5.5 0.56 4
p
TL054I
Full range 8.8 7.3
VIOIn ut offset voltage
25°C 0.57 3.5 0.5 1.5
mV
TL054AI
Full range 6.8 4.8
T emperature coef ficient of
V
O
= 0, VIC = 0, R
= 50
TL054I
25°C to
85°C
25 24
°
α
VIO
input offset voltage
R
S
50
TL054AI
25°C to
85°C
25 23
µ
V/°C
Input offset voltage long-term drift
25°C 0.04 0.04 µV/mo
p
VO = 0, VIC = 0,
25°C 4 100 5 100 pA
IIOInput offset current
OIC
See Figure 5
85°C 0.06 10 0.07 10 nA
p
VO = 0, VIC = 0,
25°C 20 200 30 200 pA
IIBInput bias current
OIC
See Figure 5
85°C 0.6 20 0.7 20 nA
Common-mode input
25°C
–1
to
4
–2.3
to
5.6
–11
to
11
–12.3
to
15.6
V
ICR
voltage range
Full range
–1
to
4
–11
to
11
V
25°C 3 4.2 13 13.9
Maximum positive peak
R
L
=
10 k
Full range 3 13
V
OM +
output voltage swing
25°C 2.5 3.8 11.5 12.7
V
R
L
= 2
k
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Maximum negative peak
R
L
= 10
k
Full range –2.5 –12
V
OM –
g
output voltage swing
25°C –2.3 –3.2 –11 –12
V
R
L
=
2 k
Full range –2.3 –11
25°C 25 72 50 133
A
VD
L
arge-signal
diff
erentia
l
p
RL = 2 k –40°C 30 101 60 212 V/mV
voltage am lification
§
85°C 20 50 30 70
r
i
Input resistance 25°C
10
12
10
12
c
i
Input capacitance 25°C 10 12 pF
25°C 65 84 75 92
CMRR
C
ommon-mode
V
IC
=
V
ICR
min,
–40°C 65 83 75 92 dB
rejection ratio
V
O
= 0,
R
S
= 50
85°C 65 84 75 93 25°C 75 99 75 99
k
SVR
S
upply-voltage rejection
V
CC±
= ±
5 V t
o ±15 V,
–40°C 75 98 75 99 dB
ratio (V
CC±
/VIO)
V
O
= 0,
R
S
= 50
85°C 75 99 75 99 25°C 8.1 11.2 8.4 11.2
I
CC
S
upply curren
t
p
VO = 0, No load –40°C 7.9 12.8 8.2 12.8 mA
(four am lifiers)
85°C 7.6 11.2 7.9 11.2
VO1/VO2Crosstalk attenuation AVD = 100 25°C 120 120 dB
Full range is –40°C to 85°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
CC±
= ±5 V, VO = ±2.3 V, at V
CC±
= ±15 V, VO = ±10 V.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL054I and TL054AI operating characteristics at specified free-air temperature
TL054I, TL054AI
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V UNIT
A
MIN TYP MAX MIN TYP MAX
Positive slew rate
25°C 15.4 10 17.8
SR
+
at unity gain
–40°C 16.4 8 18
RL = 2 kΩ,CL = 100 pF,
85°C 14 8 17.3
Negative slew rate at
L L
See Figure 1
25°C 13.9 10 15.9
V/µs
SR
g
unity gain
–40°C 14.7 8 16.1
85°C 13 8 15.3 25°C 55 56
t
r
Rise time –40°C 52 53
85°C 64 65
V
= ±10 mV, R
= 2 k
,
25°C 55 57
ns
t
f
Fall time
V
I(PP)
±10 mV, R
L
2
k,
CL = 100 pF,
–40°C 51 53
See Figures 1 and 2
85°C 64 65 25°C 24% 19%
Overshoot factor –40°C 24% 19%
85°C 24% 19%
Equivalent input noise
f = 10 Hz 25°C 75 75
V
n
q
voltage
§
RS = 20 Ω,
f = 1 kHz 25°C 21 21 45
nV/Hz
V
N(PP)
Peak-to-peak equivalent input noise voltage
See Figure 3
f = 10 Hz to
10 kHz
25°C 4 4 µV
I
n
Equivalent input noise current
f = 1 kHz 25°C 0.01 0.01 pA/√Hz
THD
Total harmonic distortion
RS = 1 kΩ, f = 1 kHz
RL = 2 kΩ,
25°C 0.003% 0.003% 25°C 2.7 2.7
B
1
Unity-gain bandwidth
V
I
= 10 mV,
R
L
= 2 k,
p
–40°C 3.3 3.3 MHz
C
L
= 25 F,
See Figure 4
85°C 2.3 2.4 25°C 61° 64°
φ
m
Phase margin at
V
I
=
10 mV,R
L
=
2 k
,
=
p
–40°C 59° 62°
unity gain
C
L
= 25 F,
See Figure 4
85°C 61° 64°
Full range is –40°C to 85°C.
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
CC±
= ±5 V, V
o(rms
) = 1 V; for V
CC±
= ±15 V, V
o(rms)
= 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL054M and TL054AM electrical characteristics at specified free-air temperature
TL054M, TL054AM
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V UNIT
A
MIN TYP MAX MIN TYP MAX
25°C 0.64 5.5 0.56 4
p
TL054M
Full range 10.5 9
VIOInput offset voltage
25°C 0.57 3.5 0.5 1.5
mV
TL054AM
Full range 8.5 6.5
T emperature coef ficient of
V
O
= 0, VIC = 0, R
= 50
TL054M
25°C to
85°C
21 20
°
α
VIO
input offset voltage
R
S
50
TL054AM
25°C to
85°C
21 20
µ
V/°C
Input offset voltage long-term drift
25°C 0.04 0.04 µV/mo
p
VO = 0, VIC = 0,
25°C 4 100 5 100 pA
IIOInput offset current
OIC
See Figure 5
125°C 1 20 2 20 nA
p
VO = 0, VIC = 0,
25°C 20 200 30 200 pA
IIBInput bias current
OIC
See Figure 5
125°C 10 50 20 50 nA
Common-mode input
25°C
–1
to
4
–2.3
to
5.6
–11
to
11
–12.3
to
15.6
V
ICR
voltage range
Full range
–1
to
4
–11
to
11
V
25°C 3 4.2 13 13.9
Maximum positive peak
R
L
= 10
k
Full range 3 13
V
OM +
output voltage swing
25°C 2.5 3.8 11.5 12.7
V
R
L
= 2
k
Full range 2.5 11.5
25°C –2.5 –3.5 –12 –13.2
Maximum negative peak
R
L
= 10
k
Full range –2.5 –12
V
OM –
g
output voltage swing
25°C –2.3 –3.2 –11 –12
V
R
L
= 2
k
Full range –2.3 –11
25°C 25 72 50 133
A
VD
L
arge-signal
diff
erentia
l
p
RL = 2 k –55°C 30 99 60 209 V/mV
voltage am lification
§
125°C 10 35 15 35
r
i
Input resistance 25°C
10
12
10
12
c
i
Input capacitance 25°C 10 12 pF
V
= V
min,
25°C 65 84 75 92
CMRR
C
ommon-mode
IC ICR
,
VO = 0,
–55°C 65 83 75 92 dB
rejection ratio
RS = 50
125°C 65 84 75 93
V
= ±5 V to ±15 V,
25°C 75 99 75 99
k
SVR
S
upply-voltage rejection
CC±
,
VO = 0,
–40°C 75 98 75 98 dB
ratio (V
CC±
/VIO)
RS = 50
85°C 75 100 75 100 25°C 8.1 11.2 8.4 11.2
I
CC
S
upply curren
t
p
VO = 0, No load –55°C 7.8 12.8 8.1 12.8 mA
(four am lifiers)
125°C 7.1 11.2 7.5 11.2
VO1/VO2Crosstalk attenuation AVD = 100 25°C 120 120 dB
Full range is –55°C to 125°C.
Typical values are based on the input offset voltage shift observed through 168 hours of operating life test at TA = 150°C extrapolated to TA = 25°C using the Arrhenius equation and assuming an activation energy of 0.96 eV .
§
For V
CC±
= ±5 V, VO = ±2.3 V, at V
CC±
= ±15 V, VO = ±10 V.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
29
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL054M and TL054AM operating characteristics at specified free-air temperature
TL054M, TL054AM
PARAMETER TEST CONDITIONS
T
A
V
CC±
= ±5 V V
CC±
= ±15 V UNIT
A
MIN TYP MAX MIN TYP MAX
Positive slew rate
25°C 15.4 10 17.8
SR
+
at unity gain
–55°C 16.7 18.3
RL = 2 kΩ,CL = 100 pF,
125°C 12.9 16.7
Negative slew rate at
L L
See Figure 1
25°C 13.9 10 15.9
V/µs
SR
unity gain
–55°C 14.7 16.3
125°C 12.2 14.5
25°C 55 56
t
r
Rise time –55°C 51 52
125°C 68 68
V
I(PP)
= ±10 mV ,
25°C 55 57
ns
t
f
Fall time
R
L
=
2 k
,
p
–55°C 51 52
C
L
=
100 F
,
See Fi
g
ures 1 and 2
125°C 68 69
See Figures 1 and 2
25°C 24% 19%
Overshoot factor –55°C 25% 19%
125°C 25% 19%
Equivalent input noise
f = 10 Hz 25°C 75 75
V
n
q
voltage
§
RS = 20 Ω,
f = 1 kHz 25°C 21 21 45
nV/Hz
V
N(PP)
Peak-to-peak equivalent input noise voltage
See Figure 3
f = 10 Hz to
10 kHz
25°C 4 4 µV
I
n
Equivalent input noise current
f = 1 kHz 25°C 0.01 0.01 pA/√Hz
THD Total harmonic distortion
RS = 1 kΩ, f = 1 kHz
RL = 2 kΩ,
25°C 0.003% 0.003% 25°C 2.7 2.7
B
1
Unity-gain bandwidth
V
I
= 10 mV,
R
L
= 2 k,
p
–55°C 3.4 3.4 MHz
C
L
= 25 F,
See Figure 4
125°C 2.1 2.1
25°C 61° 64°
φ
m
Phase margin at
V
I
=
10 mV,R
L
=
2 k
,
=
p
–55°C 58° 62°
unity gain
C
L
= 25 F,
See Figure 4
125°C 60° 64°
Full range is –55°C to 125°C.
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
§
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
For V
CC±
= ±5 V, Vorms = 1 V; for V
CC±
= ±15 V, Vorms = 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL054Y electrical characteristics, TA = 25°C
TL054Y
PARAMETER TEST CONDITIONS
VCC ± = ± 5 V VCC ± = ± 15 V
UNIT
MIN TYP MAX MIN TYP MAX
V
IO
Input offset voltage
VO = 0, RS = 50
VIC = 0,
0.64 0.56 mV
I
IO
Input offset current
VO = 0, VIC = 0, See Figure 5
4 5 pA
I
IB
Input bias current
VO = 0, VIC = 0, See Figure 5
20 30 pA
V
ICR
Common-mode input voltage range
–2.3
to
5.6
–12.3
to
15.6
V
Maximum positive peak
RL = 10 k 4.2 13.9
V
OM +
output voltage swing
RL = 2 k
3.8 12.7
V
Maximum negative peak
RL = 10 k –3.5 –13.2
V
OM –
g
output voltage swing
RL = 2 k
–3.2 –12
V
A
VD
Large-signal differential voltage amplification
RL = 2 kΩ, 72 133 V/mV
r
i
Input resistance
10
12
10
12
c
i
Input capacitance 10 12 pF
CMRR
Common-mode rejection ratio
VIC = V
ICR
min,
VO = 0, RS = 50
84 92 dB
k
SVR
Supply-voltage rejection ratio (∆V
CC±
/VIO)
V
CC±
= ±5 V to ±15 V,
VO = 0, RS = 50
99 99 dB
I
CC
Supply current (four amplifiers)
VO = 0, No load 8.1 8.4 mA
VO1/VO2Crosstalk attenuation AVD = 100 120 120 dB
For V
CC±
= ±5 V, VO = ±2.3 V, at V
CC±
= ±15 V, VO = ±10 V.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TL054Y operating characteristics, TA = 25°C
TL054Y
PARAMETER TEST CONDITIONS
V
CC±
= ±5 V V
CC±
= ±15 V
UNIT
MIN TYP MAX MIN TYP MAX
SR+
Positive slew rate at unity gain
RL = 2 kΩ,CL = 100 pF,
15.4 17.8
SR–
Negative slew rate at unity gain
L L
See Figure 1
13.9 15.9
V/µs
t
r
Rise time V
I(PP)
= ±10 mV ,
55 56
t
f
Fall time
()
RL = 2 kΩ,
p
55 57
ns
Overshoot factor
C
L
=
100 F
,
See Figures 1 and 2
24% 19%
Equivalent input noise
f = 10 Hz 75 75
V
n
q
voltage
RS = 20 Ω,
f = 1 kHz 21 21
nV/√Hz
V
N(PP)
Peak-to-peak equivalent input noise voltage
See Figure 3
f = 10 Hz to 10 kHz 4 4 µV
I
n
Equivalent input noise current
f = 1 kHz 0.01 0.01
pA/√Hz
THD
Total harmonic distortion
§
RS = 1 kΩ, f = 1 kHz
RL = 2 kΩ,
0.003% 0.003%
B
1
Unity-gain bandwidth
VI = 10 mV, RL = 2 kΩ, CL = 25 pF, See Figure 4
2.7 2.7 MHz
φ
m
Phase margin at unity gain
VI = 10 mV, RL = 2 kΩ, CL = 25 pF, See Figure 4
61° 64°
For V
CC±
= ±5 V, V
I(PP)
= ±1 V; for V
CC±
= ±15 V, V
I(PP)
= ±5 V.
This parameter is tested on a sample basis. For other test requirements, please contact the factory. This statement has no bearing on testing or nontesting of other parameters.
§
For V
CC±
= ±5 V, V
o(rms
) = 1 V; for V
CC±
= ±15 V, V
o(rms)
= 6 V.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
PARAMETER MEASUREMENT INFORMATION
+
V
CC+
V
CC–
V
I
V
O
R
L
NOTE A: CL includes fixture capacitance.
C
L
(see Note A)
and Overshoot Test Circuit
. Slew Rate, Rise/Fall Time,Figure 1
Overshoot
10%
90%
t
r
Waveform
. Rise Time and OvershootFigure 2
V
CC–
V
CC+
+
V
O
R
S
R
S
2 k
. Noise-Voltage Test CircuitFigure 3
Figure 4
V
O
V
CC–
V
CC+
+
R
L
C
L
(see Note A)
V
I
10 k
100
NOTE A: CL includes fixture capacitance.
Phase-Margin Test Circuit
. Unity-Gain Bandwidth and
typical values
Typical values as presented in this data sheet represent the median (50% point) of device parametric performance.
input bias and offset current
At the picoamp-bias-current level typical of the TL05x and TL05xA, accurate measurement of the bias current becomes difficult. Not only does this measurement require a picoammeter, but test socket leakages can easily exceed the actualdevice bias currents. T o accurately measure these small currents, Texas Instruments uses a two-step process. The socket leakage is measured using picoammeters with bias voltages applied but with no device in the socket. The device is then inserted in the socket, and a second test that measures both the socket leakage and the device input bias current is performed. The two measurements are then subtracted algebraically to determine the bias current of the device.
noise
Because of the increasing emphasis on low noise levels in many of today’s applications, the input noise voltage density is sample tested at f = 1 kHz. Texas Instruments also has additional noise testing capability to meet specific application requirements. Please contact the factory for details.
Figure 5. Input-Bias and Offset-Current Test Circuit
+
V
CC+
V
CC–
Ground Shield
pA pA
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Table of Graphs
FIGURE
V
IO
Input offset voltage Distribution 6 – 11
α
VIO
Temperature coefficient of input offset voltage Distribution 12, 13, 14
I
IB
Input bias current
vs Common-mode input voltage vs Free-air temperature
15 16
I
IO
Input offset current vs Free-air temperature 16
V
IC
Common-mode input voltage range limits
vs Supply voltage vs Free-air temperature
17 18
V
O
Output voltage vs Differential input voltage 19, 20
V
OM
Maximum peak output voltage
vs Supply voltage vs Output current vs Free-air temperature
21 25, 26 27, 28
V
O(PP)
Maximum peak-to-peak output voltage vs Frequency 22, 23, 24
A
VD
Large-signal differential voltage amplification
vs Load resistance vs Frequency vs Free-air temperature
29
30
31, 32, 33
CMRR Common-mode rejection ratio
vs Frequency vs Free-air temperature
34, 35
36
z
o
Output impedance vs Frequency 37
k
SVR
Supply-voltage rejection ratio vs Free-air temperature 38
I
OS
Short-circuit output current
vs Supply voltage vs Time vs Free-air temperature
39
40
41
I
CC
Supply current
vs Supply voltage vs Free-air temperature
42, 43, 44 45, 46, 47
SR Slew rate
vs Load resistance vs Free-air temperature
48 – 53
54 –59
Overshoot factor vs Load capacitance 60
V
n
Equivalent input noise voltage vs Frequency 61, 62
THD Total harmonic distortion vs Frequency 63 B
1
Unity-gain bandwidth
vs Supply voltage vs Free-air temperature
64, 65, 66 67, 68, 69
φ
m
Phase margin
vs Supply voltage vs Load capacitance vs Free-air temperature
70, 71, 72 73, 74, 75
76, 77, 78 Phase shift vs Frequency 30 Voltage-follower small-signal pulse response vs Time 79 Voltage-follower large-signal pulse response vs Time 80
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
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TYPICAL CHARACTERISTICS
Figure 6
DISTRIBUTION OF TL051
INPUT OFFSET VOLTAGE
8
–1.5
0
Percentage of Units – %
VIO – Input Offset Voltage – mV
4
12
16
–0.9 –0.3 0 0.3 0.9 1.5
433 Units Tested From 1 Wafer Lot V
CC±
= ±15 V
TA = 25°C P Package
–1.1 –0.6 0.6 1.1
Figure 7
DISTRIBUTION OF TL051A
INPUT OFFSET VOLTAGE
20
16
12
8
4
9006003000–300–600
VIO – Input Offset Voltage – µV
Percentage of Units – %
0
–900
393 Units Tested From 1 Wafer Lot V
CC±
= ±15 V
TA = 25°C P Package
Figure 8
–1.5
0
P
ercen
t
age o
f
A
mp
lifi
ers –
%
VIO – Input Offset Voltage – mV
–0.9 –0.3 0 0.3 0.9 1.5
3
6
9
12
15
DISTRIBUTION OF TL052 INPUT OFFSET VOLTAGE
476 Amplifiers Tested From 1 Wafer Lot
V
CC±
= ±15 V
TA = 25°C P Package
–1.2 –0.6 0.6 1.2
Figure 9
0
–900 –600 –300 0 300 600 900
5
10
15
20
VIO – Input Offset Voltage – µV
Percentage of Amplifiers – %
TA = 25°C
DISTRIBUTION OF TL052A
INPUT OFFSET VOLTAGE
403 Amplifiers Tested From 1 Wafer Lot V
CC±
= ±15 V
P Package
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 10
DISTRIBUTION OF TL054
INPUT OFFSET VOLTAGE
15
–4
0
Percentage of Amplifiers – %
VIO – Input Offset Voltage – mV
5
25
30
–2 0 1 3–3 –1 2 4
V
CC±
= ±15 V
TA = 25°C N Package
20
10
1140 Amplifiers Tested From 3 Wafer Lots
Figure 11
DISTRIBUTION OF TL054A
INPUT OFFSET VOLTAGE
15
12
9
6
3
1.81.20.60– 0.6–1.2
VIO – Input Offset Voltage – mV
Percentage of Amplifiers – %
0
–1.8
1048 Amplifiers Tested From 3 Wafer Lots V
CC±
= ±15 V
TA = 25°C N Package
Figure 12
DISTRIBUTION OF TL051
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
–25
0
Percentage of Units – %
α
VIO
– Temperature Coefficient – µV/°C
4
8
12
16
20
–20 –15 –10 –5 0 5 10 15 20 25
120 Units Tested From 2 Wafer Lots V
CC±
= ±15 V
TA = 25°C to 125°C P Package
0
Percentage of Amplifiers – %
α
VIO
– Temperature Coefficient – µV/°C
20
30
5
10
15
20100–10–20–30
DISTRIBUTION OF TL052 INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
172 Amplifiers Tested From 2 Wafer Lots V
CC±
= ±15 V
TA = 25°C to 125°C P Package
Outlier: One Unit at –34.6 µV/°C
Figure 13
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 14
DISTRIBUTION OF TL054
INPUT OFFSET VOLTAGE
TEMPERATURE COEFFICIENT
–60
0
α
VIO
– Temperature Coefficient – µV/°C
30
40
50
–40 –20 0 20 40 60
324 Amplifiers Tested From 3 Wafer Lots
V
CC±
= ±15 V
TA = 25°C to 125°C N Package
20
10
Percentage of Amplifiers – %
Figure 15
–15
–10
– Input Bias Current – nA
VIC – Common-Mode Input Voltage – V
–5
0
5
10
–10 –5 0 5 10 15
TA = 25°C
V
CC±
= ±15 V
INPUT BIAS CURRENT
vs
COMMON-MODE INPUT VOLTAGE
I
IB
Figure 16
INPUT BIAS CURRENT AND
INPUT OFFSET CURRENT
vs
FREE-AIR TEMPERATURE
I
IO
I
IB
TA – Free-Air Temperature – °C
– Input Bias and Offset Currents – nA
0.001 25
0.01
0.1
1
10
100
45 65 85 105 125
V
CC±
= ±15 V
VO = 0 VIC = 0
I
IB
and
I
IO
Figure 17
0
–16
– Common-Mode Input Voltage – V
|V
CC±
| – Supply Voltage – V
–12
–8
–4
0
4
8
12
16
2 4 6 8 10 12 14 16
TA = 25°C
COMMON-MODE
INPUT VOLTAGE RANGE LIMITS
vs
SUPPLY VOLTAGE
V
IC
Negative Limit
Positive Limit
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 18
–75
–20
TA – Free-Air Temperature – °C
–15
–10
–5
0
5
10
15
20
–50 –25 0 25 50 75 100 125
COMMON-MODE
INPUT VOLTAGE RANGE LIMITS
vs
FREE-AIR TEMPERATURE
– Common-Mode Input Voltage – V
V
IC
V
CC±
= ±15 V
Positive Limit
Negative Limit
Figure 19
– 200
–5
– Output Voltage – V
–4
–3
–2
–1
0
1
2
3
4
5
– 100 0 100 200
TA = 25°C
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
VID – Differential Input Voltage – µV
V
O
ÎÎÎÎ
RL = 600
ÎÎÎ
RL = 1 k
RL = 10 k
RL = 2 k
V
CC±
= ±5 V
Figure 20
– 400
–15
VID – Differential Input Voltage – µV
–10
–5
0
5
10
15
– 200 0 200 400
OUTPUT VOLTAGE
vs
DIFFERENTIAL INPUT VOLTAGE
– Output Voltage – V V
O
RL = 600 RL = 1 k RL = 2 k RL = 10 k
V
CC±
= ±15 V
TA = 25°C
Figure 21
0
–8
– Maximum Peak Output Voltage – V
|V
CC±
|– Supply V oltage – V
–4
0
4
8
12
16
2 4 6 8 10 12 14 16
TA = 25°C
V
OM+
RL = 10 k
RL = 2 k
V
OM–
RL = 2 k
RL = 10 k
MAXIMUM PEAK OUTPUT VOLTAGE
vs
SUPPLY VOLTAGE
–12
–16
V
OM
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
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38
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 22
0
10 k
f – Frequency – Hz
5
10
15
20
25
30
100 k 1 M 10 M
– Maximum Peak-to-Peak Output Voltage – V
RL = 2 k
TA = 125°C
V
CC±
= ±5 V
TA = –55°C
V
CC±
= ±15 V
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
V
O(PP)
Figure 23
– Maximum Peak-to-Peak Output Voltage – V
0
10 k
f – Frequency – Hz
5
10
15
20
25
30
100 k 1 M 10 M
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
V
O(PP)
TA = 25°C
RL = 2 k
V
CC±
= ±5 V
V
CC±
= ±15 V
Figure 24
20
25
30
15
10
5
0
10 k 100 k
f – Frequency – Hz
1 M 10 M
MAXIMUM PEAK-TO-PEAK OUTPUT VOLTAGE
vs
FREQUENCY
– Maximum Peak-to-Peak Output Voltage – V
V
O(PP)
RL = 10 k
TA = 25°C
БББББ
V
CC±
= ±15 V
V
CC±
= ±5 V
Figure 25
0
0
– Maximum Peak Output Voltage – V
|IO| – Output Current – mA
1
2
3
4
5
41216208
MAXIMUM PEAK OUTPUT VOLTAGE
vs
OUTPUT CURRENT
|V
OM
|
V
OM–
V
OM+
V
CC±
= ±5 V
RL = 10 k TA = 25°C
2 6 10 14
18
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
39
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 26
0
0
2
4
6
8
10
12
14
16
10 20 30 40
50
|IO| – Output Current – mA
MAXIMUM PEAK OUTPUT VOLTAGE
vs
OUTPUT CURRENT
– Maximum Peak Output Voltage – V
|V
OM
|
V
CC±
= ±15 V
RL = 10 k TA = 25°C
V
OM–
V
OM+
515253550
Figure 27
–75
–5
TA – Free-Air Temperature – °C
–4
–3
–2
–1
0
1
2
3
4
5
–50 –25 0 25 50 75 100 125
RL = 2 k
RL = 10 k
RL = 10 k
RL = 2 k
V
OM+
V
CC±
= ±5 V
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
– Maximum Peak Output Voltage – V
V
OM
V
OM–
Figure 28
–75
–16
–50 –25 0 25 50 75 100
125
–12
–8
–4
0
4
8
12
16
TA – Free-Air Temperature – °C
RL = 10 k
RL = 10 k
RL = 2 k
RL = 2 k
V
CC±
= ±15 V
MAXIMUM PEAK OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
– Maximum Peak Output Voltage – V
V
OM
V
OM+
V
OM–
Figure 29
– Differential Voltage Amplification – V/mV
0.4
0
RL – Load Resistance – k
50
100
150
200
250
1 4 10 40 100
VO = ±1 V TA = 25°C
V
CC±
= ±15 V
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION
vs
LOAD RESISTANCE
V
CC±
= ±5 V
A
VD
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
40
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
10
f – Frequency – Hz
10 M100 1 k 10 k 100 k 1 M
0.1
1
10
1
10
4
10
2
10
3
V
CC±
= ±15 V
RL = 2 k
CL = 25 pF
TA = 25°C
A
VD
Phase Shift
0°
30°
60°
90°
120°
150°
180°
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION AND PHASE SHIFT
vs
FREQUENCY
10
6
10
5
– Differential Voltage Amplification – V/mVA
VD
mφ – Phase Shift
Figure 30
–75
10
TA – Free-Air Temperature – °C
125
1000
–50 –25 0 25 50 75 100
40
100
400
RL = 2 k
RL = 10 k
V
CC±
= ±5 V
VO = ±2.3 V
– Differential Voltage Amplification – V/mVA
VD
Figure 31
TL051 AND TL052
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
Figure 32
–75
10
TA – Free-Air Temperature – °C
125
1000
–50 –25 0 25 50 75 100
40
100
400
RL = 2 k
RL = 10 k
V
CC±
= ±5 V
VO = ±2.3 V
– Differential Voltage Amplification – V/mVA
VD
TL054
LARGE-SIGNAL DIFFERENTIAL
VOLTAGE AMPLIFICATION
vs
FREE-AIR TEMPERATURE
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
41
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 33
–75
10
125
1000
–50 –25 0 25 50 75 100
40
100
400
RL = 10 k
RL = 2 k
TA – Free-Air Temperature – °C
LARGE-SIGNAL DIFFERENTIAL VOLTAGE
AMPLIFICATION
vs
FREE-AIR TEMPERATURE
V
CC±
= ±15 V
VO = 10 V
– Differential Voltage Amplification – V/mVA
VD
Figure 34
10
0
CMRR – Common-Mode Rejection Ratio – dB
f – Frequency – Hz
10 M
100
100 1 k 10 k 100 k 1 M
10
20
30
40
50
60
70
80
90
V
CC±
= ±5 V
TA = 25°C
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
Figure 35
90
80
70
60
50
40
30
20
10
100
0
1 M100 k10 k1 k100
10 M
f – Frequency – Hz
10
V
CC±
= ±15 V
TA = 25°C
COMMON-MODE REJECTION RATIO
vs
FREQUENCY
CMRR – Common-Mode Rejection Ratio – dB
Figure 36
–75
70
TA – Free-Air Temperature –°C
125
100
75
80
85
90
95
–50 –25 0 25 50 75 100
VIC = V
ICR
Min
V
CC±
= ±5 V
V
CC±
= ±15 V
COMMON-MODE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
CMRR – Common-Mode Rejection Ratio – dB
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
42
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 37
1 k
0.1
– Output Impedance –
1 M
100
10 k 100 k
1
10
f – Frequency – Hz
AVD = 100
AVD = 10
AVD = 1
VCC± = ±15 V TA = 25°C ro (open loop) 250
OUTPUT IMPEDANCE
vs
FREQUENCY
z
o
0.4
4
40
Figure 38
–75
90
kSVR – Supply-Voltage Rejection Ratio – dB
TA – Free-Air Temperature – °C
125
–50 –25 02550 75 100
94
98
V
CC±
= ±5 V to ±15 V
SUPPLY-VOLTAGE REJECTION RATIO
vs
FREE-AIR TEMPERATURE
110
106
102
k
SVR
Figure 39
0
IOS – Short-Circuit Output Current – mA
|V
CC±
| – Supply Voltage – V
16
60
246 8 10 12 14
0
20
40
VO = 0
TA = 25°C
VID = 100 mV
VID = –100 mV
SHORT-CIRCUIT OUTPUT CURRENT
vs
SUPPLY VOLTAGE
–20
–40
–60
I
OS
Figure 40
0
t – Time – s
40
20
–20
–40
60
–60
5040302010 600
TA = 25°C
V
CC±
= ±15 V
VID = 100 mV
VID = –100 mV
SHORT-CIRCUIT OUTPUT CURRENT
vs
TIME
IOS – Short-Circuit Output Current – mA
I
OS
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
43
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 41
VO = 0
0
TA – Free-Air Temperature – °C
40
20
–20
–40
60
–60
1007550250–25– 50 125–75
V
CC±
= ±15 V
V
CC±
= ±5 V
V
CC±
= ±5 V
V
CC±
= ±15 V
SHORT-CIRCUIT OUTPUT CURRENT
vs
FREE-AIR TEMPERATURE
IOS – Short-Circuit Output Current – mA
I
OS
VID = 100 m V
VID = –100 m V
Figure 42
0
0
|V
CC±
| – Supply Voltage – V
16
3
2 4 6 8 10 12 14
0.5
1
1.5
2
2.5 TA = 25°C
TA = –55°C TA = 125°C
VO = 0 No Load
ICC – Supply Current – mA
I
CC
TL051
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
0
0
5
2 4 6 8 10 12 14
1
2
3
4
TA = 25°C
TA = –55°C
TA = 125°C
VO = 0 No Load
16
ICC – Supply Current – mA
I
CC
|V
CC±
| – Supply Voltage – V
Figure 43
TL052
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
Figure 44
0
0
|V
CC±
| – Supply Voltage – V
16
10
246 8 10 12 14
2
4
6
8
TA = 25°C
TA = –55°C
TA = 125°C
VO = 0 No Load
ICC – Supply Current – mA
I
CC
TL054
SUPPLY CURRENT
vs
SUPPLY VOLTAGE
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
44
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 45
–75
0
125
3
–50 –25 0 25 50 75 100
0.5
1
1.5
2
2.5
TA – Free-Air Temperature – °C
V
CC±
= ±5 V
V
CC±
= ±15 V
VO = 0 No Load
ICC – Supply Current – mA
I
CC
TL051
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
Figure 46
–75
0
125
5
–50 –25 0 25 50 75 100
1
2
3
4
V
CC±
= ±15 V
V
CC±
= ±5 V
ICC – Supply Current – mA
I
CC
TA – Free-Air Temperature – °C
VO = 0 No Load
TL052
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
Figure 47
–75
0
125
10
–50 –25 0 25 50 75 100
2
4
6
8
TA – Free-Air Temperature – °C
ICC – Supply Current – mA
I
CC
V
CC±
= ±5 V
V
CC±
= ±15 V
VO = 0 No Load
TL054
SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
Figure 48
25
20
15
10
SR – Slew Rate – V/
5
0
100401041
RL – Load Resistance – k
0.4
SR +
SR –
CL = 100 pF TA = 25°C See Figure 1
V
CC±
= ±5 V
µs
TL051
SLEW RATE
vs
LOAD RESISTANCE
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
45
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
10410.4
0
RL – Load Resistance – k
25
5
10
15
20
SR–
SR+
40
100
CL = 100 pF TA = 25°C See Figure 1
V
CC±
= ±5 V
SR – Slew Rate – V/µs
Figure 49
TL052
SLEW RATE
vs
LOAD RESISTANCE
Figure 50
25
20
15
10
SR – Slew Rate – V/
5
0
100401041
RL – Load Resistance – k
0.4
SR +
SR –
CL = 100 pF TA = 25°C See Figure 1
V
CC±
= ±5 V
µs
TL054
SLEW RATE
vs
LOAD RESISTANCE
Figure 51
25
0
0.4 RL – Load Resistance – k
5
10
15
20
30
1 4 10 40 100
SR +
SR –
SR – Slew Rate – V/µs
CL = 100 pF TA = 25°C See Figure 1
V
CC±
= ±15 V
TL051
SLEW RATE
vs
LOAD RESISTANCE
1 4 10 40 1000.4
RL – Load Resistance – k
SR+
SR–
CL = 100 pF TA = 25°C
See Figure 1
V
CC±
= ±15 V
SR – Slew Rate – V/µs
0
25
5
10
15
20
Figure 52
TL052
SLEW RATE
vs
LOAD RESISTANCE
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
46
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 53
20
0
0.4 RL – Load Resistance – k
5
10
15
25
1 4 10 40 100
SR +
SR –
SR – Slew Rate – V/µs
CL = 100 pF TA = 25°C See Figure 1
V
CC±
= ±5 V
TL054
SLEW RATE
vs
LOAD RESISTANCE
Figure 54
–75
0
TA – Free-Air Temperature – °C
125
30
–50 –25 0 25 50 75 100
5
10
15
20
25
V
CC±
= ±5 V
RL = 2 k
SR +
SR –
SR – Slew Rate – V/µs
TL051
SLEW RATE
vs
FREE-AIR TEMPERATURE
Figure 55
SR+
SR–
–75
0
TA – Free-Air Temperature – °C
125–50 –25 0 25 50 75 100
5
10
15
20
25
V
CC±
= ±5 V
RL = 2 k CL = 100 pF See Figure 1
SR – Slew Rate – V/µs
TL052
SLEW RATE
vs
FREE-AIR TEMPERATURE
Figure 56
SR+
SR–
–75
0
TA – Free-Air Temperature – °C
125–50 –25 0 25 50 75 100
5
10
15
20
V
CC±
= ±5 V
RL = 2 k CL = 100 pF See Figure 1
SR – Slew Rate – V/µs
TL054
SLEW RATE
vs
FREE-AIR TEMPERATURE
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
47
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 57
–75
0
TA – Free-Air Temperature – °C
125
30
–50 –25 0 25 50 75 100
5
10
15
20
25
V
CC±
= ±15 V
RL = 2 k CL = 100 pF
See Figure 1
SR –
SR +
SR
Slew
Rate
V/µs
TL051
SLEW RATE
vs
FREE-AIR TEMPERATURE
SR–
SR+
–75
0
TA – Free-Air Temperature – °C
125–50 –25 0 25 50 75 100
5
10
15
20
25
V
CC±
= ±15 V
RL = 2 k CL = 100 pF See Figure 1
SR – Slew Rate – V/µs
Figure 58
TL052
SLEW RATE
vs
FREE-AIR TEMPERATURE
Figure 59
SR–
SR+
–75
0
TA – Free-Air Temperature – °C
125–50 –25 0 25 50 75 100
5
10
15
20
V
CC±
= ±15 V
RL = 2 k CL = 100 pF See Figure 1
SR – Slew Rate – V/µs
TL054
SLEW RATE
vs
FREE-AIR TEMPERATURE
Figure 60
See Figure 1
TA = 25°C
RL = 2 k
V
I(PP)
= ±10 mV
0
0
Overshoot Factor – %
CL – Load Capacitance – pF
300
50
50 100 150 200 250
10
20
30
40
OVERSHOOT FACTOR
vs
LOAD CAPACITANCE
V
CC±
= ±15 V
V
CC±
= ±5 V
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
48
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 61
f – Frequency – Hz
10
Vn – Equivalent Input Noise Voltage –
10
20
30
40
50
70
100
100 1 k 10 k
100 k
V
CC±
= ±15 V
RS = 20 TA = 25°C See Figure 3
nV/ Hz
TL051
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
f – Frequency – Hz
10
Vn – Equivalent Input Noise Voltage –
10
20
30
40
50
70
100
100 1 k 10 k
100 k
nV/ Hz
V
CC±
= ±15 V
RS = 20 TA = 25°C See Figure 3
Figure 62
TL052 AND TL054
EQUIVALENT INPUT NOISE VOLTAGE
vs
FREQUENCY
V
O(RMS)
= 6 V
0.001 100
f – Frequency – Hz
THD – Total Harmonic Distortion – %
0.01
0.1
1
1 k 10 k 100 k
V
CC±
= ±15 V
AVD = 1
TA = 25°C
TOTAL HARMONIC DISTORTION
vs
FREQUENCY
0.004
0.04
0.4
Figure 63
Figure 64
0
2.7
U
n
it
y-
G
a
i
n
B
an
d
w
idth
MH
z
|V
CC±
| – Supply Voltage – V
16
3.2
2 4 6 8 10 12 14
2.8
2.9
3
3.1
VI = 10 mV RL = 2 k CL = 25 pF TA = 25°C See Figure 4
B
1
TL051
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
49
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 65
VI = 10 mV RL = 2 k CL = 25 pF
See Figure 4
TA = 25°C
2.7
U
n
it
y-
G
a
i
n
B
an
d
w
idth
MH
z
|V
CC±
|– Supply Voltage – V
16
3.2
4 6 8 10 12 14
2.8
2.9
3
3.1
B
1
TL052
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
Figure 66
2.4
U
n
it
y-
G
a
i
n
B
an
d
w
idth
MH
z
|V
CC±
|– Supply Voltage – V
16
2.9
0 2 6 8 10 14
2.5
2.6
2.7
2.8
B
1
VI = 10 mV RL = 2 k CL = 25 pF
See Figure 4
ООООО
TA = 25°C
412
TL054
UNITY-GAIN BANDWIDTH
vs
SUPPLY VOLTAGE
Figure 67
–75
0
TA – Free-Air Temperature – °C
125
4
–50 –25 0 25 50 75 100
1
2
3
See Figure 4
VI = 10 mV RL = 2 k CL = 25 pF
V
CC±
= ±15 V
V
CC±
= ±5 V
– Unity-Gain Bandwidth – MHzB
1
TL051
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
Figure 68
See Figure 4
V
CC±
= ±5 V to ±15 V
RL = 2 k CL = 25 pF TA = 25°C
VI = 10 mV
–75
0
TA – Free-Air Temperature – °C
125
4
–50 –25 0 25 50 75 100
1
2
3
– Unity-Gain Bandwidth – MHzB
1
TL052
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
50
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 69
See Figure 4
V
CC±
= ±5 V to ±15 V
RL = 2 k CL = 25 pF TA = 25°C
VI = 10 mV
–75
0
TA – Free-Air Temperature – °C
125
4
–50 –25 0 25 50 75 100
1
2
3
– Unity-Gain Bandwidth – MHzB
1
TL054
UNITY-GAIN BANDWIDTH
vs
FREE-AIR TEMPERATURE
Figure 70
0
55°
m
16
65°
2 4 6 8 10 12 14
57°
59°
61°
63°
|V
CC±
| –Supply Voltage – V
See Figure 4
TA = 25°C
CL = 25 pF
RL = 2 k
VI = 10 mV
φ – Phase Margin
TL051
PHASE MARGIN
vs
SUPPLY VOLTAGE
Figure 71
55°
m
16
65°
46 8101214
57°
59°
61°
63°
|V
CC±
| –Supply Voltage – V
φ – Phase Margin
See Figure 4
TA = 25°C
CL = 25 pF
RL = 2 k
VI = 10 mV
TL052
PHASE MARGIN
vs
SUPPLY VOLTAGE
Figure 72
55°
m
16
65°
048101214
57°
59°
61°
63°
|V
CC±
| –Supply Voltage – V
φ – Phase Margin
62
See Figure 4
TA = 25°C
CL = 25 pF
RL = 2 k
VI = 10 mV
TL054
PHASE MARGIN
vs
SUPPLY VOLTAGE
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
51
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 73
0
40°
CL – Load Capacitance – pF
100
70°
10 20 30 40 50 60 70 80 90
45°
50°
55°
60°
65°
VI = 10 mV RL = 2 k TA = 25°C
See Figure 4
V
CC±
= ±15 V
See Note A
V
CC±
= ±5 V
m
φ – Phase Margin
TL051
PHASE MARGIN
vs
LOAD CAPACITANCE
Figure 74
0
CL – Load Capacitance – pF
70°
10 20 30 40 50 60 70 80 90
45°
50°
55°
60°
65°
VI = 10 mV RL = 2 k TA = 25°C
See Figure 4
V
CC±
= ±15 V
See Note A
V
CC±
= ±5 V
m
φ – Phase Margin
TL052
PHASE MARGIN
vs
LOAD CAPACITANCE
0
CL – Load Capacitance – pF
100
70°
10 20 30 40 50 60 70 80 90
45°
50°
55°
60°
65°
VI = 10 mV RL = 2 k TA = 25°C See Figure 4
V
CC±
= ±15 V
See Note A
V
CC±
= ±5 V
m
φ – Phase Margin
TL054
PHASE MARGIN
vs
LOAD CAPACITANCE
Figure 75
Values of phase margin below a load capacitance of 25 pF were estimated.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
Figure 76
–75
55°
TA – Free-Air Temperature –°C
125
65°
–50 –25 0 25 50 75 100
57°
59°
61°
63°
V
CC±
= ±15 V
V
CC±
= ±5 V
CL = 25 pF
VI = 10 mV RL = 2 k
See Figure 4
m
φ – Phase Margin
TL051
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
Figure 77
–75
55°
TA – Free-Air Temperature – °C
125
65°
–50 –25 0 25 50 75 100
57°
59°
61°
63°
V
CC±
= ±15 V
V
CC±
= ±5 V
CL = 25 pF
VI = 10 mV RL = 2 k
See Figure 4
m
φ – Phase Margin
TL052
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
–75
55°
TA – Free-Air Temperature – °C
125
65°
–50 –25 0 25 50 75 100
57°
59°
61°
63°
V
CC±
= ±15 V
V
CC±
= ±5 V
CL = 25 pF
VI = 10 mV RL = 2 k
See Figure 4
m
φ – Phase Margin
TL054
PHASE MARGIN
vs
FREE-AIR TEMPERATURE
Figure 78
Data at high and low temperatures are applicable only within the rated operating free-air temperature ranges of the various devices.
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
TYPICAL CHARACTERISTICS
–16
– Output Voltage – mV
t – Time – µs
1.2
16
0 0.2 0.4 0.6 0.8 1.0
–12
–8
–4
0
4
8
12
VOLTAGE-FOLLOWER
SMALL-SIGNAL
PULSE RESPONSE
V
O
V
CC±
= ±15 V
RL = 2 k CL = 100 pF TA = 25°C See Figure 1
Figure 79
–8
t – Time – µs
6
8
0 1 2 3 4 5
–6
–4
–2
0
2
4
6
VOLTAGE-FOLLOWER
LARGE-SIGNAL
PULSE RESPONSE
– Output Voltage – VV
O
V
CC±
= ±15 V
RL = 2 k CL = 100 pF TA = 25°C See Figure 1
Figure 80
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
output characteristics
All operating characteristics (except bandwidth and phase margin) are specified with 100-pF load capacitance. The TL05x and TL05xA drive higher capacitive loads; however, as the load capacitance increases, the resulting response pole occurs at lower frequencies, thereby causing ringing, peaking, or even oscillation. The value of the load capacitance at which oscillation occurs varies with production lots. If an application appears to be sensitive to oscillation due to load capacitance, adding a small resistance in series with the load should alleviate the problem. Capacitive loads of 1000 pF and larger may be driven if enough resistance is added in series with the output (see Figure 81 and Figure 82).
(a) CL = 100 pF, R = 0 (b) CL = 300 pF, R = 0 (c) CL = 350 pF, R = 0
(d) CL = 1000 pF, R = 0
(e) CL 1000 pF, R = 50
(f) CL = 1000 pF, R = 2 k
Figure 81. Effect of Capacitive Loads
+
5 V
– 5 V
15 V
– 15 V
C
L
(see Note A)
2 k
V
O
R
NOTE A: CL includes fixture capacitance.
Figure 82. Test Circuit for Output Characteristics
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
input characteristics
The TL05x and TL05xA are specified with a minimum and a maximum input voltage that, if exceeded at either input, could cause the device to malfunction.
Because of the extremely high input impedance and resulting low bias current requirements, the TL05x and TL05xA are well suited for low-level signal processing; however, leakage currents on printed-circuit boards and sockets can easily exceed bias current requirements and cause degradation in system performance. It is good practice to include guard rings around inputs (see Figure 83). These guards should be driven from a low-impedance source at the same voltage level as the common-mode input.
Unused amplifiers should be connected as grounded unity-gain followers to avoid possible oscillation.
+ –
+
+
V
O
V
O
V
O
V
I
V
I
(a) NONINVERTING AMPLIFIER (b) INVERTING AMPLIFIER (c) UNITY-GAIN AMPLIFIER
V
I
Figure 83. Use of Guard Rings
noise performance
The noise specifications in operational amplifier circuits are greatly dependent on the current in the first-stage differential amplifier. The low input bias current requirements of the TL05x and TL05xA result in a very low current noise. This feature makes the devices especially favorable over bipolar devices when using values of circuit impedance greater than 50 kΩ.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
phase meter
The phase meter in Figure 84 produces an output voltage of 10 mV per degree of phase delay between the two input signals VA and VB. The reference signal VA must be the same frequency as VB. The TLC3702 comparators (U1) convert these two input sine waves into ±5-V square waves. Then R1 and R4 provide level shifting prior to the SN74HC109 dual J-K flip flops.
Flip-flop U2B is connected as a toggle flip-flop and generates a square wave at half the frequency of V
B
. Flip-flop U2A also produces a square wave at half the input frequency . The pulse duration of U2A varies from zero to half the period, where zero corresponds to zero phase delay between V
A
and VB and half the period
corresponds to VB lagging VA by 360 degrees. The output pulse from U2A causes the TLC4066 (U3) switch to charge the TL05x (U4) integrator capacitors C1
and C2. As the phase delay approaches 360 degrees, the output of U4A approximates a square wave and U2A has an output of almost 2.5 V. U4B acts as a noninverting amplifier with a gain of 1.44 in order to scale the 0- to 2.5-V integrator output to a 0- to 3.6-V output range.
R8 and R10 provide output gain and zero-level calibration. This circuit operates over a 100-Hz to 10-kHz frequency range.
+
+
+ 5 V
R2
100 k
R1
100 k
U1A
V
A
S
1J
C1
U2A
1K
R
NC
U2B
2K
R3
V
B
U1B
R6
10 k
R7
10 k
+ 5 V
S
2J
C1
R
NC
100 k
R4
100 k
U3
R5
C1
10 k
0.016 µF
C2
0.016 µF
U4A
U4B V
O
R9
20 k
R8
Gain
50 k
+ 5 V
R10 10 k
Zero
– 5 V
NOTE A: U1 = TLC3702; V
CC±
= ±5 V U2 = SN74HC109 U3 = TLC4066 U4, U5 = TL05x; V
CC±
= ±5 V
Figure 84. Phase Meter
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
precision constant-current source over temperature
A precision current source (see Figure 85) benefits from the high input impedance and stability of Texas Instruments enhanced-JFET process. A low-current shunt regulator maintains 2.5 V between the inverting input and the output of the TL05x. The negative feedback then forces 2.5 V across the current setting resistor R; therefore, the current to the load is simply 2.5 V divided by R.
Possible choices for the shunt regulator include the LT1004, LT1009, and LM385. If the regulator’s cathode connects to the operational amplifier output, this circuit sources load current. Similarly , if the cathode connects to the inverting input, the circuit sinks current from the load. T o minimize output current change with temperature, R should be a metal film resistor with a low temperature coefficient. Also, this circuit must be operated with split-voltage supplies.
+
+
150 pF
U2
+ 15 V
U1
– 15 V
R
100 k
I
O
Load
V = 0 to 10 V
(a) SOURCE CURRENT LOAD (b) SINK CURRENT LOAD
V = 0 to –10 V
Load
I
I
R
– 15 V
U1
+ 15 V
150 pF
U2
100 k
NOTE B: U1 = 1/2 TL05x
U2 = LM385, LT1004, or LT1009 voltage reference
I =
2.5 V R
, R = Low temperature coefficient metal film resistor
Figure 85. Precision Constant-Current Source
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
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APPLICATION INFORMATION
instrumentation amplifier with adjustable gain/null
The instrumentation amplifier in Figure 86 benefits greatly from the high input impedance and stable input offset voltage of the TL05xA. Amplifiers U1A, U1B, and U2A form the actual instrumentation amplifier, while U2B provides offset null. Potentiometer R1 provides gain adjust. With R1 = 2 kΩ, the circuit gain equals 100, while with R1 = 200 kΩ, the circuit gain equals two. The following equation shows the instrumentation amplifier gain as a function of R1:
A
V
+1)
ǒ
R2
)
R3
R1
Ǔ
Readjusting the offset null is necessary whenever the circuit gain is changed. If U2B is needed for another application, R7 can be terminated at ground. The low input offset voltage of the TL05xA minimizes the dc error of the circuit. For best matching, all resistors should be one percent tolerance. The matching between R4, R5, R6, and R7 controls the CMRR of this application.
The following equation shows the output voltages when the input voltage equals zero. This dc error can be nulled by adjusting the offset null potentiometer; however , any change in offset voltage over time or temperature also creates an error. To calculate the error from changes in offset, consider the three offset components in the equation as delta offsets rather than initial offsets. The improved stability of T exas Instruments enhanced JFETs minimizes the error resulting from change in input offset voltage with time. Assuming V
I
equals zero, VO can
be shown as a function of the offset voltage:
–V
IO1
ƪ
R3 R1
ǒ
R7
R5
)
R7
Ǔ
ǒ
1
)
R6 R4
Ǔ
)
R6 R4
ǒ
1
)
R2 R1
Ǔ
ƫ
)
V
IO3
ǒ
1
)
R6 R4
Ǔ
VO+
V
IO2
ƪ
ǒ
1
)
R3 R1
Ǔ
ǒ
R7
R5
)
R7
Ǔ
ǒ
1
)
R6 R4
Ǔ
)
R2 R1
ǒ
R6 R4
Ǔ
ƫ
NOTE A: U1 and U2 = TL05xA; V
CC±
= ± 15 V.
100 k
U2A
+
+
+
+
V
I–
U1A
R4
10 k
R6
10 k
200 k
R2
10 M
100 k
10 turn
AV = 2 to 100
2 k
R1
U1B
V
I+
R5
R7
U2B
0.1 µF
Offset Null
V
CC–
82 k
82 k
V
CC+
R3
V
O
10 k
10 k
10 M
1 k
Figure 86. Instrumentation Amplifier
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
high input impedance log amplifier
The low input offset voltage and high input impedance of the TL05xA creates a precision log amplifier (see Figure 87). IC1 is a 2.5-V, low-current precision, shunt regulator. Transistors Q1 and Q2 must be a closely matched NPN pair. For best performance over temperature, R4 should be a metal film resistor with a low temperature coefficient.
In this circuit, U1A serves as a high-impedance unity-gain buffer. Amplifier U1B converts the input voltage to a current through R1 and Q1. Amplifier U1C, IC1, and R4 form a 1-µA temperature-stable current source that sets the base-emitter voltage of Q2. U1D amplifies the difference between the base-emitter voltage of Q1 and Q2 (see Figure 88). The output voltage is given by the following equation:
VO+
ƪ
1
)
R6 R5
ƫ
kT
q
ȧ
ȱ Ȳ
In
V
I
ǒ
R1 1 10
–6
Ǔ
ȧ
ȳ ȴ
where k+1.38 10
–23
,q+1.602 10
–19
,
and T is in degrees kelvin.
_
+
U1A
_
+
_
+ U1B
_
+
U1C
U1D
V
I
R1
10 k
Q1 Q2
2N2484
R2
15 V
10 k
2.5 M
R4
150 pF
C1
IC1
270 k
R3
–15V
R5
10 k
R6
10 k
V
O
(see equation above)
NOTE A: U1A through U1D = TL05xA. IC1 = LM385, LT1004, or LT1009 voltage reference.
Figure 87. Log Amplifier
0123456
– Differential Voltage Amplification – dB
f – Frequency – Hz
78910
–0.4
–0.35
–0.3
–0.25
–0.2
–0.15
–0.1
A
VD
Figure 88. Output Voltage vs Input Voltage for Log Amplifier
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
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60
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
analog thermometer
By combining a current source that does not vary over temperature with an instrumentation amplifier, a precise analog thermometer can be built (see Figure 89). Amplifier U1A and IC1 establish a constant current through the temperature-sensing diode D1. For this section of the circuit to operate correctly , the TL05x must use split supplies and R3 must be a metal-film resistor with a low temperature coefficient.
The temperature-sensitive voltage from the diode is compared to a temperature-stable voltage reference set by IC2. R4 should be adjusted to provide the correct output voltage when the diode is at a known temperature. Although this potentiometer resistance varies with temperature, the divider ratio of the potentiometer remains constant.
Amplifiers U1B, U2A, and U2B form the instrumentation amplifier that converts the difference between the diode and reference voltage to a voltage proportional to the temperature. With switch S1 closed, the amplifier gain equals 5 and the output voltage is proportional to temperature in degrees Celsius. With S1 open, the amplifier gain is 9 and the output is proportional to temperature in degrees Fahrenheit. Every time that S1 is changed, R4 must be recalibrated. By setting S1 correctly, the output voltage equals 10 mV per degree (C or F).
+
+
+
IC1
C1
150 pF
R1
100 k
U1A
R3
10 k (see Note B)
D1
(see Note A)
+15 V
R2
100 k
IC2
R4 50 k
U1B
R6
10 k
R5
5 k
R7 5 k
S1 (see Note C)
R8
10 k
U2A
R10
10 k
R11
R9 R12
10 k 10 k
+15 V
+
–15 V
10 k
V
O
(see Note D)
U2B
NOTES: A. T emperature-sensing diode (–2 mV/°C)
B. Metal-film resistor (low temperature coefficient) C. Switch open for °F and closed for °C D. VO α temperature; 10 mV/°C or 10 mV/°F
E. U1, U2 = TL05x. IC1, IC2 = LM385, LT1004, or LT1009 voltage reference
Figure 89. Analog Thermometer
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
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APPLICATION INFORMATION
voltage-ratio-to-dB converter
The application in Figure 90 measures the amplitude ratio of two signals and then converts the ratio to decibels (see Figure 91). The output voltage provides a resolution of 100 mV/dB. The two inputs can be either dc or sinusoidal ac signals. When using ac signals, both signals should be the same frequency or output glitches will occur. For measuring two input signals of different frequencies, extra filtering should be added after the rectifiers.
The circuit contains three low-offset TL05xA devices. Two of these devices provide the rectification and logarithmic conversion of the inputs. The third TL05xA forms an instrumentation amplifier. The stage performing the logarithmic conversion also requires two well-matched npn transistors.
The input signal first passes through a high impedance unity-gain buffer U1A (U2A). Then U1B (U2B) rectifies the input signal at a gain of 0.5, and U1C (U2C) provides a noninverting gain of 2 so that the system gain is still one. U1D (U2D), R6 (R13), and Q1 (Q2) perform the logarithmic conversion of the rectified input signal. The instrumentation amplifier formed by U3A, U3B, U3D scales the difference of the two logarithmic voltages by a gain of 33.6. As a result, the output voltage equals 100 mV/dB. The 1-k potentiometer on the input of U3C calibrates the zero dB reference level. The following equations are used to derive the relationship between the input voltage ratio expressed in decibels and the output voltage.
XdB+20 log
ƪ
V
A
V
B
ƫ
+
20
ȧ
ȱ Ȳ
InǒV
A
Ǔǒ
V
B
Ǔ
In (10)
ȧ
ȳ ȴ
XdB+8.686ƪInǒV
A
Ǔ
–InǒV
B
Ǔ
ƫ
V
BE(Q1)
+
kT
q
In
ƪ
V
A
R I
S
ƫ
V
BE(Q2)
+
kT
q
In
ƪ
V
B
R I
S
ƫ
D
VBE+
V
BE(Q1)–VBE(Q2)
+
kT
q
ƪ
InǒV
A
Ǔ
–InǒV
B
Ǔ
ƫ
XdB
+
8.686 kTńq
ƪ
V
BE(Q1)–VBE(Q2)
ƫ
+
336ƪV
BE(Q1)–VBE(Q2)
ƫ
at 25°C
where
k+1.38 10
–23
,q+1.602 10
–19
, and T is in kelvins.
This would give a resolution of 1 V/dB. Therefore, the gain of the instrumentation amplifier is set at 33.6 to obtain 100 mV/dB.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
SLOS178 – FEBRUARY 1997
62
POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
_
+
_
+
_
+
_
+
_
+
_
+
_
+
_
+
_
+
_
+
_
+
_
+
U1A
U3A
U3B
U3C
U3D
U1B
U1C
U1D
U2A
U2B
U2C
U2D
V
A
V
B
V
O
R1
20 k
R8
20 k
R2
10 k
R9
10 k
D1
D2
R3
30 k
R10
30 k
R4 10 k
R5
10 k
R6
10 k
R7
10 k
2N2484
Q1
Q2
R16
16.3 k
R18
10 k
R20
10 k
R11 10 k
R12
10 k
R13
10 k
2N2484
R14
10 k
R76
16.3 k
R19
10 k
R21 10 k
C1
15 V
–15 V
82 k
1 k
82 k
NOTE A: U1A through U3D = TL05xA, V
CC±
= ±15 V. D1 and D2 = 1N914.
Figure 90. Voltage-Ratio-to-dB Converter
0123456
– Output Voltage – V
78910
–2
–1
0
1
2
Ratio – VA/V
B
V
O
Figure 91. Output Voltage vs the Ratio of the Input Voltages for Voltage-to-dB Converter
TL05x, TL05xA, TL05xY
ENHANCED-JFET LOW-OFFSET
OPERATIONAL AMPLIFIERS
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POST OFFICE BOX 655303 DALLAS, TEXAS 75265
APPLICATION INFORMATION
macromodel information
Macromodel information provided was derived using Microsim
Parts
, the model generation software used
with Microsim
PSpice
. The Boyle macromodel (see Note 5) and subcircuit Figure 92 are generated using the TL05x typical electrical and operating characteristics at TA = 25°C. Using this information, output simulations of the following key parameters can be generated to a tolerance of 20% (in most cases):
D
Maximum positive output voltage swing
D
Maximum negative output voltage swing
D
Slew rate
D
Quiescent power dissipation
D
Input bias current
D
Open-loop voltage amplification
D
Unity-gain frequency
D
Common-mode rejection ratio
D
Phase margin
D
DC output resistance
D
AC output resistance
D
Short-circuit output current limit
NOTE 5: G. R. Boyle, B. M. Cohn, D. O. Pederson, and J. E. Solomon, “Macromodeling of Intergrated Circuit Operational Amplifiers”,
IEEE
Journal of Solid-State Circuits,
SC-9, 353 (1974).
OUT
+
+
+
+
+ –
+
+
+
+
.SUBCKT TL05x 1 2 3 4 5
C1 11 12 3.988E–12 C2 6 7 15.00E–12 DC 5 53 DX DE 54 5 DX DLP 90 91 DX DLN 92 90 DX DP 43DX EGND 99 0 POLY (2) (3,0) (4,0) 0 .5 .5 FB 7 99 POLY (5) VB VC VE VLP + VLN 0 2.875E6 –3E6 3E6 3E6 –3E6 GA 6 0 11 12 292.2E–6 GCM 0 6 10 99 6.542E–9 ISS 3 10 DC 300.0E–6 HLIM 90 0 VLIM 1K J1 11 2 10 JX J2 12 1 10 JX R2 6 9 100.0E3
RD1 4 11 3.422E3 RD2 4 12 3.422E3 R01 8 5 125 R02 7 99 125 RP 3 4 11.11E3 RSS 10 99 666.7E6 VB 9 0 DC 0 VC 3 53 DC 3 VE 54 4 DC 3.7 VLIM 7 8 DC 0 VLP 91 0 DC 28 VLN 0 92 DC 28 .MODEL DX D (IS=800.0E–18) .MODEL JX PJF (IS=15.00E–12 BETA=185.2E–6 + VTO=–.1) .ENDS
V
CC+
RP
IN –
2
IN+
3
V
CC–
VAD
RD1
11
J1 J2
10
RSS ISS
3
12
RD2
60
VE
54
DE
DP
VC
DC
4
C1
53
R2
6
9
EGND
VB
FB
C2
GCM
GA
VLIM
8
5
RO1
RO2
HLIM
90
DLP
91
DLN
92
VLNVLP
99
7
Figure 92. Boyle Macromodel and Subcircuit
PSpice
and
Parts
are trademarks of MicroSim Corporation.
Macromodels, simulation models, or other models provided by TI, directly or indirectly, are not warranted by TI as fully representing all of the specification and operating characteristics of the semiconductor product to which the model relates.
TL05x, TL05xA, TL05xY ENHANCED-JFET LOW-OFFSET OPERATIONAL AMPLIFIERS
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IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty. Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICATIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICA TIONS IS UNDERSTOOD T O BE FULLY AT THE CUSTOMER’S RISK.
In order to minimize risks associated with the customer’s applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards.
TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1999, Texas Instruments Incorporated
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