Texas Instruments TCM320AC36CPT, TCM320AC36CN, TCM320AC36CDW, TCM320AC36CDWR, TCM320AC37IDW Datasheet

...

Single 5-V Operation

Low Power Consumption: – Operating Mode...40 mW Typ – Standby Mode... 5 mW Typ – Power-Down Mode...3 mW Typ

Combined A/D, D/A, and Filters

Extended Variable-Frequency Operation – Sample Rates up to 16 kHz – Pass-Band up to 7.2 kHz

Electret Microphone Bias Reference Voltage Available

Drive a Piezo Speaker Directly

Compatible With All Digital Signal Processors (DSPs)

TCM320AC36, TCM320AC37

VOICE-BAND AUDIO PROCESSORS (VBAP)

SLWS003C – MAY 1992 – REVISED APRIL – 1998

Selectable Between 8-Bit Companded and 13-Bit (Dynamic Range) Linear Conversion: – TCM320AC36 . . . µ-Law and Linear

Modes

– TCM320AC37...A-Law and Linear

Modes

Programmable Volume Control in Linear Mode

300 Hz – 3.6 kHz Passband with Specified Master Clock

Designed for Standard 2.048-MHz Master Clock for U.S. Analog, U.S. Digital, CT2, DECT, GSM, and PCS Standards for Hand-Held Battery-Powered Telephones

DW OR N PACKAGE

PDN EARA EARB

EARGS

MICMUTE

DCLKR

DIN

FSR

EARMUTE

(TOP VIEW)

MICBIAS MICGS MICIN VMID GND LINSEL TSX/DCLKX DOUT FSX CLK

NCNCEARGS

47 46 45 44 4348 42

NC NC NC NC

4 5 6 7 8 9 10 11 12

14 15

MICMUTE

DCLKR

NC – No internal connection

PT PACKAGE

(TOP VIEW)

EARB

EARA

17 18 19 20

DIN

FSR

EARMUTE

PDN

MICBIAS

CLK

MICGS

MICINNCNC

40 39 3841

22 23 24

FSX

DOUT

36 35 34 33 32 31 30 29 28 27 26 25

TSX/DCLKX

VMID NC AGND NC NC NC NC NC NC DGND LINSEL NC

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

VBAP is a trademark of Texas Instruments Incorporated.

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

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TCM320AC36, TCM320AC37 VOICE-BAND AUDIO PROCESSORS (VBAP)

SLWS003C – MAY 1992 – REVISED APRIL – 1998

description

The TCM320AC36 and TCM320AC37 voice-band audio processor (VBAP) integrated circuits are designed to perform the transmit encoding (A/D conversion) and receive decoding (D/A conversion) together with transmit and receive filtering for voice-band communications systems. Cellular telephone systems are targeted in particular; however, these integrated circuits can function in other systems including digital audio, telecommunications, and data acquisition.

These devices are pin-selectable for either of two modes, companded and linear, providing data in two formats. In the companded mode, data is transmitted and received in 8-bit words. In the linear mode, 13 bits of data, and either three bits of gain-setting control data, or three zero bits of padding to create a 16-bit word, are sent and received.

The transmit section is designed to interface directly with an electret microphone element. The microphone input signal (MICIN) is buffered and amplified, with provision for setting the amplifier gain to accommodate a range of signal input levels. The amplified signal is passed through antialiasing and band-pass filters. The filtered signal is then applied to the input of a compressing analog-to-digital converter (COADC) when companded mode is selected. Otherwise, the analog-to-digital converter performs a linear conversion. The resulting data is then clocked out of DOUT as a serial data stream.

The receive section takes a frame of serial data on DIN and converts it to analog through an expanding digital-to-analog converter (EXDAC) when the companded mode is selected; otherwise, a linear conversion is performed. The analog signal then passes through switched capacitor filters, which provide out-of-band rejection, (sin x)/x correction functions, and smoothing. The filtered signal is sent to the earphone amplifier. The earphone amplifier has a differential output with adjustable gain and is designed to minimize static power dissipation.

A single on-chip high-precision band-gap circuit generates all voltage references, eliminating the need for external reference voltages. An internal reference voltage equal to V virtual ground for all the amplifier circuits and the microphone bias circuit. Another reference voltage, MICBIAS, can supply bias current for the microphone.

The TCM320AC3xC devices are characterized for operation from 0°C to 70°C. The TCM320AC3xI devices are characterized for operation from –40°C to 85°C.

/2, VMID, is used to develop the midlevel

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functional block diagram

VMID

6 18

17 20

Input

Buffer

VMID

Generator

MICMUTE

MICIN

MICGS

MICBIAS

Transmit

Third-Order

Antialias

Band-Gap

Voltage

Reference

VOICE-BAND AUDIO PROCESSORS (VBAP)

Transmit

Sixth-Order

Low Pass

256 kHz 8 kHz

A/D

Converter

Voltage

Reference

D/A

Converter

Voltage

Reference

Transmit

First-Order

High Pass

256 kHz

8 kHz

TCM320AC36, TCM320AC37

SLWS003C – MAY 1992 – REVISED APRIL – 1998

LINSEL

Output

Logic

Clock

Generator

ADC

Autozero

Control

14 11

TSX

/DCLKX

CLK DCLKR

DOUT

FSX

EARA EARB

EARGS

EARMUTE

Terminal numbers shown are for the DW and N packages.

2 3

4 10

Earphone

Amplifier

Receive

Buffer

GND

256 kHz

Receive

Filter

PDN

DAC

LINSEL

Input

Logic

FSR

DIN

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TCM320AC36, TCM320AC37

NAME

VOICE-BAND AUDIO PROCESSORS (VBAP)

SLWS003C – MAY 1992 – REVISED APRIL – 1998

Terminal Functions

TERMINAL

NO.

DW, N PT

AGND — 34 Ground return for all internal analog circuits AV

CLK 11 19 I Clock input. In the fixed-data-rate mode, CLK is the master clock input as well as the transmit and

DCLKR 7 14 I Selection of fixed- or variable-data-rate operation. When DCLKR is connected to VCC, the device

DGND — 27 Ground return for all internal digital circuits DIN 8 15 I Receive data input. Input data is clocked in on consecutive negative transitions of the receive data

DOUT 13 21 O Transmit data output. Transmit data is clocked out on consecutive positive transitions of the transmit

EARA 2 44 O Earphone output. EARA forms a differential drive when used with the EARB signal (analog). EARB 3 45 O Earphone output. EARB forms a differential drive when used with the EARA signal (analog). EARGS 4 46 I Earphone gain set input of feedback signal for the earphone output. The ratio of an external potential

EARMUTE 10 17 I Earphone output mute control signal. When EARMUTE is low, the output amplifier is disabled and no

FSR 9 16 I Frame-synchronization clock input for the receive channel. In the variable-data-rate mode, this signal

FSX 12 20 I Frame synchronization clock input for the transmit channel. FSX operates independently of FSR, but

GND 16 — Ground return for all internal circuits LINSEL 15 26 I Linear selection input. When low, LINSEL selects linear coding/decoding. When high, LINSEL selects

MICBIAS 20 42 O Microphone bias. MICBIAS voltage for the electret microphone is equal to VMID. MICGS 19 41 O Output of the internal microphone amplifier. MICGS is used as the feedback to set the microphone

MICIN 18 40 I Microphone input. Electret microphone input to the internal microphone amplifier (analog) MICMUTE 6 11 I Microphone input mute control signal. When MICMUTE is active (low), zero code is transmitted (dig.). PDN 1 43 I Power-down input. When PDN is low, the device powers down to reduce power consumption (digital). TSX/DCLKX 14 22 I/O Transmit time slot strobe (active-low output) or data clock (input) for the transmit channel. In the

VMID 17 36 O VCC/2 bias voltage reference. A pair of external, low-leakage, high-frequency capacitors (1 µF and

— 4 5-V supply voltage for all internal analog circuits

— 9 5-V supply voltage for all internal digital circuits

5 — 5-V supply voltage for all internal circuits

I/O DESCRIPTION

receive data clock input . In the variable-data-rate mode, CLK is the master clock input only (digital).

operates in the fixed-data-rate mode. When DCLKR is not connected to VCC, the device operates in the variable-data-rate mode, and DCLKR becomes the receive data clock (digital).

clock, which is CLK for a fixed data rate and DCLKR for a variable data rate (digital).

data clock, which is CLK for a fixed data rate and DCLKX for a variable data rate (digital).

divider network connected across EARA and EARB adjusts the power amplifier gain. Maximum gain occurs when EARGS is connected to EARB. Minimum gain occurs when EARGS is connected to EARA. Earphone frequency response correction is performed using an RC approach (analog).

audio is sent to the earphone (digital).

must remain high for the duration of the time slot. The receive channel enters the standby condition when FSR is TTL-low for five frames or longer. The device enters a production test-mode condition when either FSR or FSX is held high for five frames or longer (digital).

also in an analogous manner to FSR. The transmit channel enters the standby condition when FSX is low for five frames or longer. The device enters a production test-mode condition when either FSX or FSR is held high for five frames or longer (digital).

companded coding/decoding. Companding code on the ’AC36 is µ-law , and companding code on the ’AC37 is A-law (digital).

amplifier gain. If sidetone is required, it is accomplished by connecting a series network between MICGS and EARGS (analog).

fixed-data-rate mode, TSX enable signal for a 3-state buffer. In the variable-data-rate mode, DCLKX becomes the transmit data clock input (digital).

470 pF) should be connected between VMID and ground for filtering.

/DCLKX is an open-drain output that pulls to ground and is used as an

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Operating free-air temperature, T

°C

TCM320AC36, TCM320AC37

VOICE-BAND AUDIO PROCESSORS (VBAP)

SLWS003C – MAY 1992 – REVISED APRIL – 1998

absolute maximum ratings over operating free-air temperature range (unless otherwise noted)

Supply voltage range, V Output voltage range at DOUT, V Input voltage range at DIN, V

(see Note 1) –0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

–0.3 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Continuous total power dissipation See Dissipation Rating Table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Operating free-air temperature range: C suffix 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

I suffix –40°C to 85°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Storage temperature range, T

–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

stg

Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

†

Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

NOTE 1: Voltage value is with respect to GND.

DISSIPATION RATING TABLE

PACKAGE

DW 1025 mW 8.2 mW/° C 656 mW 533 mW

N 1150 mW 9.2 mW/°C 736 mW 598 mW

PT 1075 mW 7.1 mW/°C 756 mW 649 mW

TA ≤ 25°C

POWER RATING

DERATING FACTOR

ABOVE TA = 25°C

TA = 70°C

POWER RATING

TA = 85°C

POWER RATING

recommended operating conditions (see Note 2)

MIN MAX UNIT

Supply voltage, VCC (see Note 3) 4.5 5.5 V High-level input voltage, V Low-level input voltage, V Load resistance between EARA and EARB, RL (see Note 4) 600 Ω Load capacitance between EARA and EARB, CL (see Note 4) 113 nF

NOTES: 2. T o avoid possible damage to these CMOS devices and resulting reliability problems, the power-up sequence detailed in the system

reliability features paragraph should be followed.

3. Voltages at analog inputs, outputs, and VCC are with respect to GND.

4. RL and CL should not be applied simultaneously.

TCM320AC36C, TCM320AC37C 0 70 TCM320AC36I, TCM320AC37I –40 85

2.2 V

0.8 V

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TCM320AC36, TCM320AC37

DOUT

VOICE-BAND AUDIO PROCESSORS (VBAP)

SLWS003C – MAY 1992 – REVISED APRIL – 1998

electrical characteristics over recommended ranges of supply voltage and free-air temperature (unless otherwise noted)

supply current, f

Supply current from V

DCLKR

PARAMETER TEST CONDITIONS MIN MAX UNIT

or f

DCLKX

CC Standby – both PDN is high with FSX and FSR held low 2

= 2.048 MHz, outputs not loaded, VCC = 5 V, TA = 25°C

Operating PDN is high with CLK signal present 9.9 Power down PDN is low for 500 µs 0.85

Standby – one

PDN is high with either FSX or FSR pulsing with the other held low

digital interface

PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT

†

All typical values are at VCC = 5 V, TA = 25°C.

High-level output voltage Low-level output voltage High-level input current, any digital input VI = 2.2 V to V Low-level input current, any digital input VI = 0 to 0.8 V 10 µA Input capacitance 5 pF Output capacitance 5 pF

IOH = –3.2 mA, VCC = 5 V 2.4 4.6 V IOL = 3.2 mA, VCC = 5 V 0.2 0.4 V

10 µA

microphone interface

PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT

IOmax Maximum output current

†

All typical values are at VCC = 5 V, TA = 25°C.

Input offset voltage at MICIN VI = 0 to 5 V ±5 mV Input bias current at MICIN ±200 nA Unity-gain bandwidth, open loop at MICIN 1 MHz Input capacitance at MICIN 5 pF Large-signal voltage amplification at MICGS 10000 V/V

VMID 1 µA MICBIAS

(source only)

1 mA

speaker interface

PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT

O(PP)

I(lkg)

IOmax Maximum output current RL = 600 Ω ±5 mA r

†

All typical values are at VCC = 5 V, TA = 25°C.

AC output voltage 3 Vpp Output offset voltage at EARA, EARB (single-ended) Relative to GND 80 mVpk Input leakage current at EARGS VI = 0.5 V to (VCC – 0.5) V ±200 nA

Output resistance at EARA, EARB 1 Ω Gain change EARMUTE low, max level when muted –80 dB

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Gain error with input level relative to gain at

dBm0

Gai

In ut am lifier set for unity gain,

1.02 kHz

TCM320AC36, TCM320AC37

VOICE-BAND AUDIO PROCESSORS (VBAP)

SLWS003C – MAY 1992 – REVISED APRIL – 1998

transmit gain and dynamic range, companded mode (µ-law or A-law) or linear mode selected, VCC = 5 V, T

= 25°C (unless otherwise noted) (see Notes 5 and 6)

PARAMETER TEST CONDITIONS MIN MAX UNIT

Companded mode selected, µ-law (’AC36) 0.982

Transmit reference-signal level (0 dB) (see Note 7)

Overload-signal level (MICIN at unity gain)

Absolute gain error 0-dB input signal ±1 dB

Gain variation VCC ±10%, TA = 0°C to 70°C ±0.5 dB

NOTES: 5. Unless otherwise noted, the analog input is 0 dB, 1020-Hz sine wave, where 0 dB is defined as the zero-reference point of the channel

under test.

6. The input amplifier is set for inverting unity gain.

7. The reference-signal level, which is input to the transmit channel, is defined as a value 3 dB below the full-scale value of 2 V.

–10

Companded mode selected, A-law (’AC37) 0.985 Linear mode selected (’AC36 and ’AC37) 1.001 Companded mode selected, µ-law (’AC36) 4 Companded mode selected, A-law (’AC37) 4 Linear mode selected (’AC36 and ’AC37) 4

MICIN to DOUT at 3 dBm0 to –36 dBm0 ±0.5 MICIN to DOUT at –37 dBm0 to –40 dBm0 ±1 MICIN to DOUT at –41 dBm0 to –50 dBm0 ±1.5 dB MICIN to DOUT at –51 dBm0 to –55 dBm0 ±2 dB

Vrms

Vpp

transmit filter transfer, companded mode (µ-law or A-law) or linear mode selected, over recommended ranges of supply voltage and free-air temperature, CLK = 2.048 MHz, FSX = 8 kHz (see Note 6)

PARAMETER TEST CONDITIONS MIN MAX UNIT

= 50 Hz –10 0

MICIN

= 200 Hz –1.8 0

MICIN

= 300 Hz to 3 kHz ±0.15

n relative to input signal gain a

NOTE 6. The input amplifier is set for inverting unity gain.

Input amplifier set for unity gain noninverting maximum gain output signal at MICIN is 0 dB

MICIN

= 3.3 kHz –0.35 0.04

MICIN

= 3.4 kHz –1 –0.1

MICIN

= 4 kHz –14

MICIN

≥4.6 kHz –32

MICIN

transmit idle channel noise and distortion, companded mode with µ-law or A-law selected, over recommended ranges of supply voltage and operating free-air temperature (see Note 8)

PARAMETER TEST CONDITIONS MIN MAX UNIT

Transmit noise, psophometrically weighted MICIN connected to MICGS through a 10-kΩ resistor –71 dB0p Transmit noise, C-message weighted MICIN connected to MICGS through a 10-kΩ resistor 10 dBrnC0

MICIN to DOUT at 0 dBm0 to –17 dBm0 36 MICIN to DOUT at –18 dBm0 to –23 dBm0 34

Transmit signal-to-distortion ratio with sine-wave input

Intermodulation distortion, 2-tone CCITT method, composite power level –13 dBm0

NOTE 8: T ransmit noise, linear mode: 200 µVrms is equivalent to –74 dB (referenced to device 0-dB level).

MICIN to DOUT at –24 dBm0 to –29 dBm0 30 MICIN to DOUT at –30 dBm0 to –35 dBm0 24 MICIN to DOUT at –36 dBm0 to –45 dBm0 16 CCITT G.712 (7.1), R2 49 CCITT G.712 (7.2), R3 51

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