SN74ALS641A, SN74ALS642A, SN74AS641
OCTAL BUS TRANSCEIVERS
WITH OPEN-COLLECTOR OUTPUTS
SDAS300 – MARCH 1995
Copyright 1995, Texas Instruments Incorporated
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
• Bidirectional Bus Transceivers in
High-Density 20-Pin Packages
• Choice of True or Inverting Logic
• Package Options Include Plastic
Small-Outline (DW) Packages and
Standard Plastic (N) 300-mil DIPs
DEVICE
LOGIC
SN74ALS641A, SN74AS641 True
SN74ALS642A Inverting
description
These octal bus transceivers are designed for
asynchronous two-way communication between
data buses. These devices transmit data from the A bus to the B bus or from the B bus to the A bus, depending
upon the level at the direction-control (DIR) input. The output-enable (OE
) input disables the device so that the
buses are effectively isolated.
The -1 versions of the SN74ALS641A and SN74ALS642A are identical to the standard versions, except that
the recommended maximum I
OL
is increased to 48 mA in the -1 versions.
The SN74ALS641A, SN74ALS642A, and SN74AS641 are characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
OPERATION
OE DIR
SN74ALS641A
SN74AS641
SN74ALS642A
L L B data to A bus B data to A bus
L H A data to B bus A data to B bus
H X Isolation Isolation
logic symbols
†
B2
17
B3
16
B4
15
A5
6
A6
7
A7
8
A8
9
A2
3
A3
4
A4
5
OE
A1
2
G3
19
3 EN2 [AB]
B5
14
B6
13
B7
12
B8
11
B1
18
3 EN1 [BA]
1
DIR
1
2
SN74ALS641A, SN74AS641
B2
17
B3
16
B4
15
A5
6
A6
7
A7
8
A8
9
A2
3
A3
4
A4
5
OE
A1
2
G3
19
3 EN2 [AB]
B5
14
B6
13
B7
12
B8
11
B1
18
3 EN1 [BA]
1
DIR
1
2
SN74ALS642A
†
These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
1
2
3
4
5
6
7
8
9
10
20
19
18
17
16
15
14
13
12
11
DIR
A1
A2
A3
A4
A5
A6
A7
A8
GND
V
CC
OE
B1
B2
B3
B4
B5
B6
B7
B8
DW OR N PACKAGE
(TOP VIEW)
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.