Texas Instruments SN74ABT2827DW, SN74ABT2827DWR, SN74ABT2827NT Datasheet
SN54ABT2827, SN74ABT2827
10-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS648A – DECEMBER 1995 – REVISED JANUARY 1997
1
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
D
Output Ports Have Equivalent 25-Ω Series
Resistors, So No External Resistors Are
Required
D
State-of-the-Art
EPIC-ΙΙB
BiCMOS Design
Significantly Reduces Power Dissipation
D
Flow-Through Architecture Optimizes
PCB Layout
D
Latch-Up Performance Exceeds 500 mA
Per JEDEC Standard JESD-17
D
T ypical V
OLP
(Output Ground Bounce) < 1 V
at VCC = 5 V, TA = 25°C
D
Package Options Include Plastic
Small-Outline (DW) Package, Ceramic
Chip Carriers (FK), and Plastic (NT) and
Ceramic (JT) DIPs
description
These 10-bit buffers or bus drivers provide a
high-performance bus interface for wide data
paths or buses carrying parity.
The 3-state control gate is a 2-input AND gate with
active-low inputs so that if either output-enable
(OE1 or OE2) input is high, all ten outputs are in
the high-impedance state. The ’ABT2827 provide
true data at their outputs.
T o ensure the high-impedance state during power
up or power down, OE should be tied to V
CC
through a pullup resistor; the minimum value of
the resistor is determined by the current-sinking
capability of the driver.
The outputs, which are designed to source or sink
up to 12 mA, include equivalent 25-Ω series
resistors to reduce overshoot and undershoot.
The SN54ABT2827 is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT2827 is characterized for operation from –40°C to 85°C.
UNLESS OTHERWISE NOTED this document contains PRODUCTION
DATA information current as of publication date. Products conform to
specifications per the terms of Texas Instruments standard warranty.
Production processing does not necessarily include testing of all
parameters.
Copyright 1997, Texas Instruments Incorporated
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
SN54ABT2827 . . . JT PACKAGE
SN74ABT2827 . . . DW OR NT PACKAGE
(TOP VIEW)
SN54ABT2827 . . . FK PACKAGE
(TOP VIEW)
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
OE1
A1
A2
A3
A4
A5
A6
A7
A8
A9
A10
GND
V
CC
Y1
Y2
Y3
Y4
Y5
Y6
Y7
Y8
Y9
Y10
OE2
3212827
12 13
5
6
7
8
9
10
11
25
24
23
22
21
20
19
Y3
Y4
Y5
NC
Y6
Y7
Y8
A3
A4
A5
NC
A6
A7
A8
426
14 15 16 1718
A9
A10
GND
NC
OE2
Y10
Y9
A2A1OE1NCY1
Y2
V
CC
NC – No internal connection
SN54ABT2827, SN74ABT2827
10-BIT BUFFERS/DRIVERS
WITH 3-STATE OUTPUTS
SCBS648A – DECEMBER 1995 – REVISED JANUARY 1997
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
FUNCTION TABLE
INPUTS
OUTPUT
OE1 OE2 A
Y
L L L L
L LH H
H XX Z
X H X Z
logic symbol
†
1
2
A1
3
A2
4
A3
5
A4
Y1
23
Y2
22
Y3
21
Y4
20
6
A5
7
A6
8
A7
9
A8
Y5
19
Y6
18
Y7
17
Y8
16
1
13
OE1
OE2
&
EN
10
A9 Y9
15
11
A10 Y10
14
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
Pin numbers shown are for the DW, JT, and NT packages.
logic diagram (positive logic)
13
2
1
23
OE1
OE2
A1
Y1
To Nine Other Channels
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
‡
Supply voltage range, V
CC
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high or power-off state, VO –0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . .
Current into any output in the low state, IO: SN54ABT2827 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ABT2827 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
IK
(VI < 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Output clamp current, IOK (VO < 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Package thermal impedance, θJA (see Note 2): DW package 81°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NT package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
stg
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.
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