SN54ABT245A, SN74ABT245B
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS081H – JANUARY 1991 – REVISED MA Y 1997
D
State-of-the-Art
EPIC-ΙΙB
BiCMOS Design
Significantly Reduces Power Dissipation
D
ESD Protection Exceeds 2000 V Per
MIL-STD-883, Method 3015; Exceeds 200 V
Using Machine Model (C = 200 pF, R = 0)
D
Latch-Up Performance Exceeds 500 mA Per
JEDEC Standard JESD-17
D
T ypical V
(Output Ground Bounce) < 1 V
OLP
at VCC = 5 V, TA = 25°C
D
High-Impedance State During Power Up
and Power Down
D
High-Drive Outputs (–32-mA IOH, 64-mA IOL)
D
Package Options Include Plastic
Small-Outline (DW), Shrink Small-Outline
(DB), Thin Shrink Small-Outline (PW), and
Thin Very Small-Outline (DGV) Packages,
Ceramic Chip Carriers (FK), Ceramic Flat
(W) Package, and Plastic (N) and
Ceramic (J) DIPs
description
These octal bus transceivers are designed for
asynchronous communication between data
buses. The devices transmit data from the A bus
to the B bus or from the B bus to the A bus,
depending on the logic level at the
direction-control (DIR) input. The output-enable
(OE
) input can be used to disable the device so
the buses are effectively isolated.
SN74ABT245B . . . DB, DGV, DW, N, OR PW PACKAGE
SN54ABT245A ...J OR W PACKAGE
(TOP VIEW)
1
20
B8
19
18
17
16
15
14
13
12
11
V
CC
B7
V
OE
B1
B2
B3
B4
B5
B6
B7
B8
18
17
16
15
14
B6 OE
CC
B1
B2
B3
B4
B5
DIR
2
A1
3
A2
4
A3
5
A4
6
A5
7
A6
8
A7
9
A8
GND
SN54ABT245B . . . FK PACKAGE
A3
A4
A5
A6
A7
10
(TOP VIEW)
A2A1DIR
3212019
4
5
6
7
8
10 11 12 13
9
A8
GND
When VCC is between 0 and 2.1 V , the device is in the high-impedance state during power up or power down.
However, to ensure the high-impedance state above 2.1 V, OE
should be tied to VCC through a pullup resistor;
the minimum value of the resistor is determined by the current-sinking capability of the driver.
The SN54ABT245A is characterized for operation over the full military temperature range of –55°C to 125°C.
The SN74ABT245B is characterized for operation from –40°C to 85°C.
FUNCTION TABLE
INPUTS
OE DIR
L L B data to A bus
L H A data to B bus
H X Isolation
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
EPIC-ΙΙB is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
Copyright 1997, Texas Instruments Incorporated
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54ABT245A, SN74ABT245B
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS081H – JANUARY 1991 – REVISED MA Y 1997
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
OE
DIR
A1
A2
A3
A4
A5
A6
A7
A8
19
1
2
3
4
5
6
7
8
9
G3
3 EN1 [BA]
3 EN2 [AB]
1
2
logic diagram (positive logic)
1
DIR
18
17
16
15
14
13
12
11
B1
B2
B3
B4
B5
B6
B7
B8
A1
19
OE
2
18
B1
To Seven Other Channels
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ABT245A, SN74ABT245B
OCTAL BUS TRANSCEIVERS
WITH 3-STATE OUTPUTS
SCBS081H – JANUARY 1991 – REVISED MA Y 1997
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
CC
Input voltage range, VI (except I/O ports) (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to any output in the high or power-off state, V
O
Current into any output in the low state, IO: SN54ABT245A 96 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
SN74ABT245B 128 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Output clamp current, I
(V
< 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
(V
OK
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
O
Package thermal impedance, θJA (see Note 2): DB package 115°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DGV package 146°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
DW package 97°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
N package 67°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
PW package 128°C/W. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The package thermal impedance is calculated in accordance with EIA/JEDEC Std JESD51, except for through-hole packages,
which use a trace length of zero.
stg
–0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
–0.5 V to 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
recommended operating conditions (see Note 3)
SN54ABT245A SN74ABT245B
MIN MAX MIN MAX
V
CC
V
IH
V
IL
V
I
I
OH
I
OL
∆t/∆v Input transition rise or fall rate 5 5 ns/V
∆t/∆V
T
A
NOTE 3: Unused pins (input or I/O) must be held high or low to prevent them from floating.
Supply voltage 4.5 5.5 4.5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.8 0.8 V
Input voltage 0 V
High-level output current –24 –32 mA
Low-level output current 48 64 mA
Power-up ramp rate 200 µs/V
CC
Operating free-air temperature –55 125 –40 85 °C
CC
0 V
CC
V
†
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3