Improved Signal Quality on the SN65HVD230
and SN65HVD231
DUnpowered Node Does Not Disturb the Bus
DCompatible With the Requirements of the
ISO 11898 Standard
DLow-Current SN65HVD230 Standby Mode
370 µA Typical
DLow-Current SN65HVD231 Sleep Mode
40 nA Typical
DDesigned for Signaling Rates
†
up to
1 Megabit/Second (Mbps)
DThermal Shutdown Protection
DOpen-Circuit Fail-Safe Design
DGlitch-Free Power-Up and Power-Down
Protection for Hot-Plugging Applications
LOGIC DIAGRAM (POSITIVE LOGIC)
APPLICATIONS
Motor Control
D
DIndustrial Automation
DBasestation Control and Status
DRobotics
DAutomotive
DUPS Control
SN65HVD230D (Marked as VP230)
SN65HVD231D (Marked as VP231)
(TOP VIEW)
D
GND
V
CC
R
SN65HVD232D (Marked as VP232)
D
GND
V
CC
R
NC – No internal connection
1
2
3
4
(TOP VIEW)
1
2
3
4
8
7
6
5
8
7
6
5
R
S
CANH
CANL
V
ref
NC
CANH
CANL
NC
SN65HVD230, SN65HVD231
Logic Diagram (Positive Logic)
3
V
CC
1
D
8
R
S
4
R
†
The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
Please be aware that an important notice concerning availability , standard warranty , and use in critical applications of T exas Instruments
semiconductor products and disclaimers thereto appears at the end of this data sheet.
TMS320Lx240x is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
5
7
6
V
ref
CANH
CANL
www.ti.com
Logic Diagram (Positive Logic)
D
R
SN65HVD232
1
7
4
Copyright 2002, Texas Instruments Incorporated
CANH
6
CANL
1
SN65HVD230
40 C to 85 C
SN65HVD231
SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
DESCRIPTION
The SN65HVD230, SN65HVD231, and SN65HVD232 controller area network (CAN) transceivers are designed
for use with the Texas Instruments TMS320Lx240x 3.3-V DSPs with CAN controllers, or with equivalent
devices. They are intended for use in applications employing the CAN serial communication physical layer in
accordance with the ISO 11898 standard. Each CAN transceiver is designed to provide differential transmit
capability to the bus and differential receive capability to a CAN controller at speeds up to 1 Mbps.
Designed for operation in especially-harsh environments, these devices feature cross-wire protection,
loss-of-ground and overvoltage protection, overtemperature protection, as well as wide common-mode range.
The transceiver interfaces the single-ended CAN controller with the differential CAN bus found in industrial,
building automation, and automotive applications. It operates over a –2-V to 7-V common-mode range on the
bus, and it can withstand common-mode transients of ±25 V.
On the SN65HVD230 and SN65HVD231, pin 8 provides three different modes of operation: high-speed, slope
control, and low-power modes. The high-speed mode of operation is selected by connecting pin 8 to ground,
allowing the transmitter output transistors to switch on and off as fast as possible with no limitation on the rise
and fall slopes. The rise and fall slopes can be adjusted by connecting a resistor to ground at pin 8, since the
slope is proportional to the pin’s output current. This slope control is implemented with external resistor values
of 10 kΩ, to achieve a 15-V/µs slew rate, to 100 kΩ, to achieve a 2-V/µs slew rate. See the ApplicationInformation section of this data sheet.
The circuit of the SN65HVD230 enters a low-current standby mode during which the driver is switched off and
the receiver remains active if a high logic level is applied to pin 8. The DSP controller reverses this low-current
standby mode when a dominant state (bus differential voltage > 900 mV typical) occurs on the bus.
The unique difference between the SN65HVD230 and the SN65HVD231 is that both the driver and the receiver
are switched off in the SN65HVD231 when a high logic level is applied to pin 8 and remain in this sleep mode
until the circuit is reactivated by a low logic level on pin 8.
The V
pin 5 on the SN65HVD230 and SN65HVD231 is available as a VCC/2 voltage reference.
ref
The SN65HVD232 is a basic CAN transceiver with no added options; pins 5 and 8 are NC, no connection.
AVAILABLE OPTIONS
PART NUMBER
SN65HVD230Standby modeYesYesVP230
SN65HVD231Sleep modeYesYes
SN65HVD232No standby or sleep modeNoNo
LOW
POWER MODE
INTEGRATED SLOPE
CONTROL
V
PINT
ref
A
–40°C to 85°C
MARKED AS:
VP231
VP232
2
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(Rs)
V
(Rs)
1.2 V
SN65HVD230
SN65HVD231
SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
Function Tables
DRIVER (SN65HVD230, SN65HVD231)
INPUT DR
L
H
OpenXZZRecessive
XV
H = high level; L = low level; X = irrelevant; ? = indeterminate; Z = high impedance
INPUT D
LHLDominant
HZZRecessive
OpenZZRecessive
H = high level; L = low level; Z = high impedance
DIFFERENTIAL INPUTS
VID ≥ 0.9 VXL
0.5 V < VID < 0.9 VX?
VID ≤ 0.5 VXH
OpenXH
H = high level; L = low level; X = irrelevant; ? = indeterminate
S
V
< 1.2 V
(Rs)
> 0.75 V
(Rs)
DRIVER (SN65HVD232)
RECEIVER (SN65HVD230)
CC
OUTPUTS
CANHCANL
OUTPUTS
CANHCANL
HLDominant
ZZRecessive
ZZRecessive
R
S
BUS STATE
BUS STATE
OUTPUT R
RECEIVER (SN65HVD231)
DIFFERENTIAL INPUTS
VID ≥ 0.9 VL
0.5 V < VID < 0.9 V
VID ≤ 0.5 V
XV
X1.2 V < V
OpenXH
H = high level; L = low level; X = irrelevant; ? = indeterminate
RECEIVER (SN65HVD232)
DIFFERENTIAL INPUTS
VID ≥ 0.9 VL
0.5 V < VID < 0.9 V?
VID ≤ 0.5 VH
OpenH
H = high level; L = low level; X = irrelevant;
? = indeterminate
V
(Rs)
R
S
< 1.2 V
<
> 0.75 V
< 0.75 V
(Rs)
CC
CC
OUTPUT R
OUTPUT R
?
H
H
?
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3
SN65HVD230
SN65HVD231
SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
TRANSCEIVER MODES (SN65HVD230, SN65HVD231)
V
(Rs)
10 kΩ to 100 kΩ to groundSlope control
SN65HVD230, SN65HVD231
TERMINAL
NAMENO.
CANL6Low bus output
CANH7High bus output
D1Driver input
GND2Ground
R4Receiver output
R
S
V
CC
V
ref
Function Tables (Continued)
V
(Rs)
> 0.75 V
V
(Rs)
CC
< 1 VHigh speed (no slope control)
OPERATING MODE
Standby
Terminal Functions
DESCRIPTION
8Standby/slope control
3Supply voltage
5Reference output
SN65HVD232
TERMINAL
NAMENO.
CANL6Low bus output
CANH7High bus output
D1Driver input
GND2Ground
NC5, 8No connection
R4Receiver output
V
CC
3Supply voltage
DESCRIPTION
4
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equivalent input and output schematic diagrams
SN65HVD230
SN65HVD231
SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
Input
16 V
20 V
CANH and CANL Inputs
110 kΩ
45 kΩ
CANH and CANL Outputs
V
CC
9 kΩ
9 kΩ
16 V
D Input
V
CC
V
CC
100 kΩ
Input
V
CC
1 kΩ
9 V
R Output
20 V
Output
5 Ω
Output
9 V
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5
SN65HVD230
SN65HVD231
SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
absolute maximum ratings over operating free-air temperature (see Note 1) (unless otherwise
noted)
Supply voltage range, V
Voltage range at any bus terminal (CANH or CANL)–4 V to 16 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage input range, transient pulse, CANH and CANL, through 100 Ω (see Figure 7)–25 V to 25 V. . . . . . . . . . . .
Input voltage range, V
Electrostatic discharge: Human body model (see Note 2)CANH, CANL and GND16 kV. . . . . . . . . . . . . . . . . .
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. Tested in accordance with JEDEC Standard 22, Test Method A114-A.
3. Tested in accordance with JEDEC Standard 22, Test Method C101.
DISSIPATION RATING TABLE
PACKAGE
D725 mW5.8 mW/°C464 mW377 mW
‡
This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
Supply voltage, V
Voltage at any bus terminal (common mode) V
Voltage at any bus terminal (separately) V
High-level input voltage, V
Low-level input voltage, V
Differential input voltage, VID (see Figure 5)–66V
Input voltage, V
Input voltage for standby or sleep, V
Wave-shaping resistance, Rs0100kΩ
High-level output current, I
Low-level output current, I
Operating free-air temperature, T
§
The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
CC
(Rs)
IH
IL
OL
OH
IC
I
D, R2V
D, R0.8V
(Rs)
Driver–40
Receiver–8
Driver48
Receiver8
A
33.6V
§
–2
–2.57.5V
0V
0.75 V
CC
–4085°C
CC
V
CC
7V
V
V
mA
mA
6
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,
V
I
,
V
I
Differential out ut
t
PLH
Pro agation delay time, low to high level out ut
ns
t
PHL
Pro agation delay time, high to low level out ut
ns
(p)
t
sk( )
Pulse skew (|t
PHL
t
PLH
|)
S
4
ns
SN65HVD230
SN65HVD231
SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
driver electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETERTEST CONDITIONSMINTYP†MAXUNIT
V
OH
Bus output voltage
V
OL
V
OD(D)
V
OD(R)
I
IH
I
IL
I
OS
C
o
I
CC
†
All typical values are at 25°C and with a 3.3-V supply.
See Figure 1 and Figure 3
VI = 0 V,See Figure 11.523
VI = 0 V,See Figure 21.223
VI = 3 V,See Figure 1–120012mV
VI = 3 V,No load–0.5–0.20.05V
V
= –2 V–250250
CANH
V
= 7 V
CANL
= V
(Rs)
(Rs)
CC
= VCC, D at V
CC
CANH2.45V
CANL0.51.25
CANH2.3
CANL2.3
–250250
370600
0.041
CC
V
V
mA
µA
mA
driver switching characteristics over recommended operating conditions(unless otherwise noted)
SN65HVD230 and SN65HVD231
TEST
CONDITIONS
CL = 50 pF,
ee Figure
MINTYPMAXUNIT
70125
130180
60
370
2550100ns
405580ns
80120160ns
80125150ns
6008001200ns
6008251000ns
ns
ns
ns
t
PLH
t
PHL
t
sk
t
r
t
f
t
r
t
f
t
r
t
f
PARAMETER
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Pulse skew (|t
Differential output signal rise time
Differential output signal fall time
Differential output signal rise time
Differential output signal fall time
Differential output signal rise time
Differential output signal fall time
PHL
– t
PLH
|)
V
= 0 V3585
(Rs)
RS with 10 kΩ to ground
RS with 100 kΩ to ground500870
V
= 0 V70120
(Rs)
RS with 10 kΩ to ground
RS with 100 kΩ to ground8701200
V
= 0 V35
(Rs)
RS with 10 kΩ to ground
RS with 100 kΩ to ground
V
= 0 V
(Rs)
RS with 10 kΩ to ground
RS with 100 kΩ to ground
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7
SN65HVD230
C
L
See Figure 4
Other in ut at 0 V
See Figure 6
SN65HVD231
SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
driver switching characteristics over recommended operating conditions(unless otherwise noted)
SN65HVD232
PARAMETERTEST CONDITIONSMINTYPMAXUNIT
t
PLH
t
PHL
t
sk(p)
t
r
t
f
receiver electrical characteristics over recommended operating conditions (unless otherwise
noted)
V
V
V
V
V
I
I
C
C
R
R
I
CC
†
All typical values are at 25°C and with a 3.3-V supply.
Propagation delay time, low-to-high-level output3585ns
Propagation delay time, high-to-low-level output70120ns
Pulse skew (|t
Differential output signal rise time
Differential output signal fall time405580ns
PARAMETERTEST CONDITIONSMIN TYP†MAXUNIT
Positive-going input threshold voltage
IT+
Negative-going input threshold voltage
IT–
Hysteresis voltage (V
hys
High-level output voltage–6 V ≤ VID ≤ 500 mV, IO = –8 mA, See Figure 52.4
OH
Low-level output voltage900 mV ≤ VID ≤ 6 V, IO = 8 mA, See Figure 50.4
receiver switching characteristics over recommended operating conditions (unless otherwise
noted)
t
PLH
t
PHL
t
sk(p)
t
r
t
f
8
PARAMETER
Propagation delay time, low-to-high-level output3550ns
Propagation delay time, high-to-low-level output
Pulse skew (|t
Output signal rise time
Output signal fall time
P(HL)
– t
P(LH)
|)
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TEST
CONDITIONS
See Figure 6
See Figure 6
MINTYPMAXUNIT
3550ns
10ns
1.5ns
1.5ns
(
)
t
(LOOP1)
t
ns
(
)
t
(LOOP2)
ns
SN65HVD230
SN65HVD231
SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
device switching characteristics over recommended operating conditions (unless otherwise
noted)
PARAMETER
V
= 0 V,See Figure 970115
(Rs)
RS with 10 kΩ to ground,See Figure 9105175
RS with 100 kΩ to ground, See Figure 9535920
V
= 0 V,See Figure 9100135
(Rs)
RS with 10 kΩ to ground,See Figure 9155185
RS with 100 kΩ to ground, See Figure 9830990
t
LOOP1
t
LOOP2
Total loop delay, driver input to receiver
p
output, recessive to dominan
Total loop delay, driver input to receiver
output, dominant to recessive
p
device control-pin characteristics over recommended operating conditions (unless otherwise
noted)
PARAMETERTEST CONDITIONSMINTYP
t
(WAKE)
V
ref
I
(Rs)
†
All typical values are at 25°C and with a 3.3-V supply.
SN65HVD230 wake-up time from standby mode with R
SN65HVD231 wake-up time from sleep mode with R
Reference output voltage
Input current for high-speedV
S
S
TEST
CONDITIONS
See Figure 8
–5 µA < I
–50 µA < I
(Rs)
< 5 µA0.45 V
(Vref)
< 50 µA
(Vref)
< 1 V–4500µA
0.4 V
MINTYPMAXUNIT
†
MAXUNIT
0.551.5µS
35µS
CC
CC
0.55 V
0.6 V
CC
CC
ns
ns
V
PARAMETER MEASUREMENT INFORMATION
V
CC
I
I
D
V
I
0 V
I
O
V
I
O
OD
0 V or 3 V
Figure 1. Driver Voltage and Current Definitions
167 Ω
V
OD
Figure 2. Driver V
60 Ω
167 Ω
OD
±
–2 V ≤ V
60 Ω
TEST
CANH
CANL
≤ 7 V
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