TEXAS INSTRUMENTS SN65HVD230, SN65HVD231, SN65HVD232 Technical data

3.3-V CAN TRANSCEIVERS
SN65HVD230 SN65HVD231 SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002

FEATURES

D Operates With a 3.3-V Supply D Low Power Replacement for the PCA82C250
D Bus/Pin ESD Protection Exceeds 16 kV HBM D High Input Impedance Allows for 120 Nodes
on a Bus
D Controlled Driver Output Transition Times for
Improved Signal Quality on the SN65HVD230 and SN65HVD231
D Unpowered Node Does Not Disturb the Bus D Compatible With the Requirements of the
ISO 11898 Standard
D Low-Current SN65HVD230 Standby Mode
370 µA Typical
D Low-Current SN65HVD231 Sleep Mode
40 nA Typical
D Designed for Signaling Rates
up to
1 Megabit/Second (Mbps)
D Thermal Shutdown Protection D Open-Circuit Fail-Safe Design D Glitch-Free Power-Up and Power-Down
Protection for Hot-Plugging Applications
LOGIC DIAGRAM (POSITIVE LOGIC)

APPLICATIONS

Motor Control
D
D Industrial Automation D Basestation Control and Status D Robotics D Automotive D UPS Control
SN65HVD230D (Marked as VP230) SN65HVD231D (Marked as VP231)
(TOP VIEW)
D
GND
V
CC
R
SN65HVD232D (Marked as VP232)
D
GND
V
CC
R
NC – No internal connection
1 2 3 4
(TOP VIEW)
1 2 3 4
8 7 6 5
8 7 6 5
R
S
CANH CANL V
ref
NC CANH CANL NC
SN65HVD230, SN65HVD231
Logic Diagram (Positive Logic)
3
V
CC
1
D
8
R
S
4
R
The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).
Please be aware that an important notice concerning availability , standard warranty , and use in critical applications of T exas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TMS320Lx240x is a trademark of Texas Instruments.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.
5
7 6
V
ref
CANH CANL
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Logic Diagram (Positive Logic)
D
R
SN65HVD232
1
7
4
Copyright 2002, Texas Instruments Incorporated
CANH
6
CANL
1
SN65HVD230
40 C to 85 C
SN65HVD231 SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002

DESCRIPTION

The SN65HVD230, SN65HVD231, and SN65HVD232 controller area network (CAN) transceivers are designed for use with the Texas Instruments TMS320Lx240x 3.3-V DSPs with CAN controllers, or with equivalent devices. They are intended for use in applications employing the CAN serial communication physical layer in accordance with the ISO 11898 standard. Each CAN transceiver is designed to provide differential transmit capability to the bus and differential receive capability to a CAN controller at speeds up to 1 Mbps.
Designed for operation in especially-harsh environments, these devices feature cross-wire protection, loss-of-ground and overvoltage protection, overtemperature protection, as well as wide common-mode range.
The transceiver interfaces the single-ended CAN controller with the differential CAN bus found in industrial, building automation, and automotive applications. It operates over a –2-V to 7-V common-mode range on the bus, and it can withstand common-mode transients of ±25 V.
On the SN65HVD230 and SN65HVD231, pin 8 provides three different modes of operation: high-speed, slope control, and low-power modes. The high-speed mode of operation is selected by connecting pin 8 to ground, allowing the transmitter output transistors to switch on and off as fast as possible with no limitation on the rise and fall slopes. The rise and fall slopes can be adjusted by connecting a resistor to ground at pin 8, since the slope is proportional to the pin’s output current. This slope control is implemented with external resistor values of 10 kΩ, to achieve a 15-V/µs slew rate, to 100 kΩ, to achieve a 2-V/µs slew rate. See the Application Information section of this data sheet.
The circuit of the SN65HVD230 enters a low-current standby mode during which the driver is switched off and the receiver remains active if a high logic level is applied to pin 8. The DSP controller reverses this low-current standby mode when a dominant state (bus differential voltage > 900 mV typical) occurs on the bus.
The unique difference between the SN65HVD230 and the SN65HVD231 is that both the driver and the receiver are switched off in the SN65HVD231 when a high logic level is applied to pin 8 and remain in this sleep mode until the circuit is reactivated by a low logic level on pin 8.
The V
pin 5 on the SN65HVD230 and SN65HVD231 is available as a VCC/2 voltage reference.
ref
The SN65HVD232 is a basic CAN transceiver with no added options; pins 5 and 8 are NC, no connection.
AVAILABLE OPTIONS
PART NUMBER
SN65HVD230 Standby mode Yes Yes VP230 SN65HVD231 Sleep mode Yes Yes SN65HVD232 No standby or sleep mode No No
LOW
POWER MODE
INTEGRATED SLOPE
CONTROL
V
PIN T
ref
A
40°C to 85°C
MARKED AS:
VP231 VP232
2
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(Rs)
V
(Rs)
1.2 V
SN65HVD230 SN65HVD231 SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002

Function Tables

DRIVER (SN65HVD230, SN65HVD231)
INPUT D R
L
H
Open X Z Z Recessive
X V
H = high level; L = low level; X = irrelevant; ? = indeterminate; Z = high impedance
INPUT D
L H L Dominant
H Z Z Recessive
Open Z Z Recessive
H = high level; L = low level; Z = high impedance
DIFFERENTIAL INPUTS
VID 0.9 V X L
0.5 V < VID < 0.9 V X ? VID 0.5 V X H
Open X H
H = high level; L = low level; X = irrelevant; ? = indeterminate
S
V
< 1.2 V
(Rs)
> 0.75 V
(Rs)
DRIVER (SN65HVD232)
RECEIVER (SN65HVD230)
CC
OUTPUTS
CANH CANL
OUTPUTS
CANH CANL
H L Dominant Z Z Recessive
Z Z Recessive
R
S
BUS STATE
BUS STATE
OUTPUT R
RECEIVER (SN65HVD231)
DIFFERENTIAL INPUTS
VID 0.9 V L
0.5 V < VID < 0.9 V VID 0.5 V
X V X 1.2 V < V
Open X H
H = high level; L = low level; X = irrelevant; ? = indeterminate
RECEIVER (SN65HVD232)
DIFFERENTIAL INPUTS
VID 0.9 V L
0.5 V < VID < 0.9 V ? VID 0.5 V H
Open H
H = high level; L = low level; X = irrelevant; ? = indeterminate
V
(Rs)
R
S
< 1.2 V
<
> 0.75 V
< 0.75 V
(Rs)
CC
CC
OUTPUT R
OUTPUT R
? H H
?
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3
SN65HVD230 SN65HVD231 SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
TRANSCEIVER MODES (SN65HVD230, SN65HVD231)
V
(Rs)
10 k to 100 k to ground Slope control

SN65HVD230, SN65HVD231

TERMINAL
NAME NO.
CANL 6 Low bus output CANH 7 High bus output D 1 Driver input GND 2 Ground R 4 Receiver output R
S
V
CC
V
ref
Function Tables (Continued)
V
(Rs)
> 0.75 V
V
(Rs)
CC
< 1 V High speed (no slope control)
OPERATING MODE
Standby

Terminal Functions

DESCRIPTION
8 Standby/slope control 3 Supply voltage 5 Reference output

SN65HVD232

TERMINAL
NAME NO.
CANL 6 Low bus output CANH 7 High bus output D 1 Driver input GND 2 Ground NC 5, 8 No connection R 4 Receiver output V
CC
3 Supply voltage
DESCRIPTION
4
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equivalent input and output schematic diagrams

SN65HVD230 SN65HVD231 SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
Input
16 V
20 V
CANH and CANL Inputs
110 k
45 k
CANH and CANL Outputs
V
CC
9 k
9 k
16 V
D Input
V
CC
V
CC
100 k
Input
V
CC
1 k
9 V
R Output
20 V
Output
5
Output
9 V
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5
SN65HVD230 SN65HVD231 SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
absolute maximum ratings over operating free-air temperature (see Note 1) (unless otherwise noted)
Supply voltage range, V
Voltage range at any bus terminal (CANH or CANL) –4 V to 16 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage input range, transient pulse, CANH and CANL, through 100 Ω (see Figure 7) –25 V to 25 V. . . . . . . . . . . .
Input voltage range, V
Electrostatic discharge: Human body model (see Note 2) CANH, CANL and GND 16 kV. . . . . . . . . . . . . . . . . .
Continuous total power dissipation See Dissipation Rating table. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Storage temperature range, T
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds 260°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
NOTES: 1. All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
CC
(D or R) –0.5 V to VCC + 0.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
–0.3 V to 6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
All Pins 4 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Charged-device model (see Note 3) All pins 1 kV. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
2. Tested in accordance with JEDEC Standard 22, Test Method A114-A.
3. Tested in accordance with JEDEC Standard 22, Test Method C101.
DISSIPATION RATING TABLE
PACKAGE
D 725 mW 5.8 mW/°C 464 mW 377 mW
This is the inverse of the junction-to-ambient thermal resistance when board-mounted and with no air flow.
TA 25°C
POWER RATING
DERATING FACTOR
ABOVE TA = 25°C
TA = 70°C
POWER RATING
TA = 85°C
POWER RATING
65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

recommended operating conditions

PARAMETER MIN NOM MAX UNIT
Supply voltage, V Voltage at any bus terminal (common mode) V Voltage at any bus terminal (separately) V High-level input voltage, V Low-level input voltage, V Differential input voltage, VID (see Figure 5) –6 6 V Input voltage, V Input voltage for standby or sleep, V Wave-shaping resistance, Rs 0 100 k
High-level output current, I
Low-level output current, I Operating free-air temperature, T
§
The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.
CC
(Rs)
IH
IL
OL
OH
IC
I
D, R 2 V D, R 0.8 V
(Rs)
Driver –40 Receiver –8 Driver 48 Receiver 8
A
3 3.6 V
§
2
2.5 7.5 V
0 V
0.75 V
CC
–40 85 °C
CC
V
CC
7 V
V V
mA
mA
6
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,
V
I
,
V
I
Differential out ut
t
PLH
Pro agation delay time, low to high level out ut
ns
t
PHL
Pro agation delay time, high to low level out ut
ns (p)
t
sk( )
Pulse skew (|t
PHL
t
PLH
|)
S
4
ns
SN65HVD230 SN65HVD231 SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
driver electrical characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
V
OH
Bus output voltage
V
OL
V
OD(D)
V
OD(R)
I
IH
I
IL
I
OS
C
o
I
CC
All typical values are at 25°C and with a 3.3-V supply.
Differential output voltage
High-level input current VI = 2 V –30 µA Low-level input current VI = 0.8 V –30 µA
Short-circuit output current Output capacitance See receiver
pp
Supply current
Dominant
Recessive
Dominant
Recessive
Standby SN65HVD230 V Sleep SN65HVD231 V
All devices
Dominant VI = 0 V, No load Dominant 10 17 Recessive VI = VCC, No load Recessive 10 17
V
= 0 V
= 0 V,
See Figure 1 and Figure 3 V
= 3 V
= 3 V,
See Figure 1 and Figure 3 VI = 0 V, See Figure 1 1.5 2 3
VI = 0 V, See Figure 2 1.2 2 3 VI = 3 V, See Figure 1 –120 0 12 mV VI = 3 V, No load –0.5 –0.2 0.05 V
V
= –2 V –250 250
CANH
V
= 7 V
CANL
= V
(Rs) (Rs)
CC
= VCC, D at V
CC
CANH 2.45 V CANL 0.5 1.25 CANH 2.3 CANL 2.3
–250 250
370 600
0.04 1
CC
V
V
mA
µA
mA
driver switching characteristics over recommended operating conditions(unless otherwise noted)

SN65HVD230 and SN65HVD231

TEST
CONDITIONS
CL = 50 pF,
ee Figure
MIN TYP MAX UNIT
70 125
130 180
60
370 25 50 100 ns 40 55 80 ns 80 120 160 ns 80 125 150 ns
600 800 1200 ns 600 825 1000 ns
ns
ns
ns
t
PLH
t
PHL
t
sk
t
r
t
f
t
r
t
f
t
r
t
f
PARAMETER
Propagation delay time, low-to-high-level output
Propagation delay time, high-to-low-level output
Pulse skew (|t
Differential output signal rise time Differential output signal fall time Differential output signal rise time Differential output signal fall time Differential output signal rise time Differential output signal fall time
PHL
– t
PLH
|)
V
= 0 V 35 85
(Rs)
RS with 10 kΩ to ground RS with 100 k to ground 500 870 V
= 0 V 70 120
(Rs)
RS with 10 kΩ to ground RS with 100 k to ground 870 1200 V
= 0 V 35
(Rs)
RS with 10 kΩ to ground RS with 100 k to ground
V
= 0 V
(Rs)
RS with 10 kΩ to ground
RS with 100 k to ground
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7
SN65HVD230
C
L
See Figure 4
Other in ut at 0 V
See Figure 6
SN65HVD231 SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
driver switching characteristics over recommended operating conditions(unless otherwise noted)

SN65HVD232

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
t
PLH
t
PHL
t
sk(p)
t
r
t
f
receiver electrical characteristics over recommended operating conditions (unless otherwise noted)
V V V V V
I
I
C
C R
R I
CC
All typical values are at 25°C and with a 3.3-V supply.
Propagation delay time, low-to-high-level output 35 85 ns Propagation delay time, high-to-low-level output 70 120 ns Pulse skew (|t Differential output signal rise time Differential output signal fall time 40 55 80 ns
PARAMETER TEST CONDITIONS MIN TYP†MAX UNIT
Positive-going input threshold voltage
IT+
Negative-going input threshold voltage
IT–
Hysteresis voltage (V
hys
High-level output voltage –6 V ≤ VID 500 mV, IO = –8 mA, See Figure 5 2.4
OH
Low-level output voltage 900 mV ≤ VID 6 V, IO = 8 mA, See Figure 5 0.4
OL
Bus input current
CANH, CANL input capacitance
i
Differential input capacitance
diff
Differential input resistance Pin-to-pin, V
diff I
CANH, CANL input resistance Supply current
P(HL)
– t
P(LH)
IT+ – VIT–
|)
See Table 1
) 100
VIH = 7 V 100 250 VIH = 7 V, VCC = 0 V VIH = –2 V VIH = –2 V, VCC = 0 V –100 –20 Pin-to-ground,
VI = 0.4 sin(4E6πt) + 0.5 V Pin-to-pin,
VI = 0.4 sin(4E6πt) + 0.5 V
= 3 V 40 70 100 k
(D)
See driver
CL = 50 pF, See Figure 4
50 F,
Other input at 0 V , D = 3 V
V
= 3 V,
(D)
V
= 3 V,
(D)
25 50 100 ns
500 650
100 350
,
–200 –30
20 35 50 k
35 ns
750 900 mV
32 pF
16 pF
mV
V
µA
µA
receiver switching characteristics over recommended operating conditions (unless otherwise noted)
t
PLH
t
PHL
t
sk(p)
t
r
t
f
8
PARAMETER
Propagation delay time, low-to-high-level output 35 50 ns Propagation delay time, high-to-low-level output Pulse skew (|t Output signal rise time Output signal fall time
P(HL)
– t
P(LH)
|)
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TEST
CONDITIONS
See Figure 6
See Figure 6
MIN TYP MAX UNIT
35 50 ns
10 ns
1.5 ns
1.5 ns
(
)
t
(LOOP1)
t
ns
(
)
t
(LOOP2)
ns
SN65HVD230 SN65HVD231 SN65HVD232
SLOS346G – MARCH 2001 – REVISED JUNE 2002
device switching characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER
V
= 0 V, See Figure 9 70 115
(Rs)
RS with 10 kΩ to ground, See Figure 9 105 175 RS with 100 k to ground, See Figure 9 535 920 V
= 0 V, See Figure 9 100 135
(Rs)
RS with 10 kΩ to ground, See Figure 9 155 185 RS with 100 k to ground, See Figure 9 830 990
t
LOOP1
t
LOOP2
Total loop delay, driver input to receiver
p
output, recessive to dominan
Total loop delay, driver input to receiver output, dominant to recessive
p
device control-pin characteristics over recommended operating conditions (unless otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP
t
(WAKE)
V
ref
I
(Rs)
All typical values are at 25°C and with a 3.3-V supply.
SN65HVD230 wake-up time from standby mode with R SN65HVD231 wake-up time from sleep mode with R
Reference output voltage Input current for high-speed V
S
S
TEST
CONDITIONS
See Figure 8
5 µA < I50 µA < I
(Rs)
< 5 µA 0.45 V
(Vref)
< 50 µA
(Vref)
< 1 V –450 0 µA
0.4 V
MIN TYP MAX UNIT
MAX UNIT
0.55 1.5 µS 3 5 µS
CC
CC
0.55 V
0.6 V
CC
CC
ns
ns
V

PARAMETER MEASUREMENT INFORMATION

V
CC
I
I
D
V
I
0 V
I
O
V
I
O
OD
0 V or 3 V
Figure 1. Driver Voltage and Current Definitions
167
V
OD
Figure 2. Driver V
60
167
OD
±
–2 V V
60
TEST
CANH
CANL
7 V
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