TEXAS INSTRUMENTS SN65HVD1040 Technical data

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3

V

CC

CANH

7

6

CANL

4

RXD

WAKEUP

FILTER

BUSMONITOR

MUX

OVER

TEMPERATURE

SENSOR

DRIVER

TIME -OUT

DOMINANT

1

TXD

30 Am

STB

8

10 Am

SLEEP MODE

5

SPLIT

/ 2

2

OUTPUT

LOGIC

INPUT
LOGIC

V

CC

V

CC

V

CC

SN65HVD1040

SLLS631B – MARCH 2007 – REVISED APRIL 2007

LOW-POWER CAN TRANSCEIVER WITH BUS WAKE-UP

FEATURES APPLICATIONS

• Improved Drop-in Replacement for the

TJA1040

• ± 12 kV ESD Protection

• Low-Current Standby Mode with Bus
Wake-up: 5 µ A Typical

• Bus-Fault Protection of –27 V to 40 V

• Rugged Split-Pin Bus Stability

• Dominant Time-Out Function

• Power-Up/Down Glitch-Free Bus Inputs and

Outputs
– High Input Impedance with Low V

CC

– Monotonic Outputs During Power Cycling

• DeviceNet Vendor ID # 806

DESCRIPTION

The SN65HVD1040 meets or exceeds the specifications of the ISO 11898 standard for use in applications
employing a Controller Area Network (CAN). As CAN transceivers, these devices provide differential transmit
and receive capability for a CAN controller at signaling rates of up to 1 megabit per second (Mbps).

Designed for operation in especially harsh environments, the device features ± 12 kV ESD protection on the bus
and split pins, cross-wire, overvoltage and loss of ground protection from –27 to 40 V, overtemperature
shutdown, a –12 V to 12 V common-mode range, and will withstand voltage transients from –200 V to 200 V
according to ISO 7637.

• Battery Operated Applications

• Hand-Held Diagnostics

• Medical Scanning and Imaging

• HVAC

• Security Systems

• Telecom Base Station Status and Control

• SAE J1939 Standard Data Bus Interface

• NMEA 2000 Standard Data Bus Interface

• ISO 11783 Standard Data Bus Interface

• Industrial Automation

– DeviceNet™ Data Buses

(1)

(1) The signaling rate of a line is the number of voltage transitions that are made per second expressed in the units bps (bits per second).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

DeviceNet is a trademark of Texas Instruments.

PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.

Copyright © 2007, Texas Instruments Incorporated

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1

2

3

4

8

7

6

5

TXD

GND

V

CC

RXD

STB
CANH
CANL
SPLIT

SN65HVD1040

SN65HVD1040

SLLS631B – MARCH 2007 – REVISED APRIL 2007

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.

DESCRIPTION (Continued)

The STB input (pin 8) selects between two different modes of operation; high-speed or low-power mode. The
high-speed mode of operation is selected by connecting STB to ground.

If a high logic level is applied to the STB pin of the SN65HVD1040, the device enters a low-power bus-monitor
standby mode. While the SN65HVD1040 is in the low-power bus-monitor standby mode, a dominant bit greater
than 5 µ s on the bus is passed by the bus-monitor circuit to the receiver output. The local protocol controller
may then reactivate the device when it needs to transmit to the bus.

A dominant-time-out circuit in the SN65HVD1040 prevents the driver from blocking network communication
during a hardware or software failure. The time-out circuit is triggered by a falling edge on TXD (pin 1). If no
rising edge is seen before the time-out constant of the circuit expires, the driver is disabled. The circuit is then
reset by the next rising edge on TXD.

The SPLIT output (pin 5) is available on the SN65HVD1040 as a V
split-termination network.

The SN65HVD1040 is characterized for operation from –40 ° C to 125 ° C.

/2 common-mode bus voltage bias for a

CC

ORDERING INFORMATION

PART NUMBER PACKAGE

SN65HVD1040 YES YES SOIC-8 VP1040

(1) For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI

website at www.ti.com .

DOMINANT LOW-POWER MARKED

TIME-OUT BUS MONITOR AS

(1)

ORDERING NUMBER

SN65HVD1040D (rail)

SN65HVD1040DR (reel)

2

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SN65HVD1040

SLLS631B – MARCH 2007 – REVISED APRIL 2007

ABSOLUTE MAXIMUM RATINGS

V

CC

V

I(bus)

I

O(OUT)

Supply voltage
Voltage range at any bus terminal (CANH, CANL, SPLIT) –27 V to 40 V
Receiver output current -20 mA to 20 mA
Voltage input, transient pulse
Human Body Model Bus terminals and GND ± 12 kV

ESD

Human body model
Charged-device-model
Machine model ± 200 V

V

I

T

J

Voltage input range (TXD, STB) –0.5 V to 6 V
Junction temperature –55 ° C to 170 ° C

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
(2) All voltage values, except differential I/O bus voltages, are with respect to network ground terminal.
(3) Tested in accordance with ISO 7637, test pulses 1, 2, 3a, 3b, 5, 6 & 7.
(4) Tested in accordance JEDEC Standard 22, Test Method A114-A.
(5) Tested in accordance JEDEC Standard 22, Test Method C101.

(2)

(4)

RECOMMENDED OPERATING CONDITIONS

V

CC

VIor V
V

IH

V

IL

V

ID

I

OH

I

OL

t

SS

T

J

(1) The algebraic convention, in which the least positive (most negative) limit is designated as minimum is used in this data sheet.

Supply voltage 4.75 5.25 V
Voltage at any bus terminal (separately or common mode) –12

IC

High-level input voltage 2 5.25 V
Low-level input voltage 0 0.8 V
Differential input voltage –6 6 V

High-level output current mA

Low-level output current mA

Maximum pulse width to remain in standby 0.7 µ s
Junction temperature –40 150  C

(1)

VALUE

–0.3 V to 7 V

(3)

, (CANH, CANL, SPLIT) –200 V to 200 V

All pins ± 4 kV

(5)

All pins ± 1 kV

MIN NOM MAX UNIT

(1)

TXD, STB

Driver –70
Receiver –2
Driver 70
Receiver 2

12 V

SUPPLY CURRRENT

over operating free-air temperature range (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

Dominant VI= 0 V, 60 Ω Load, STB at 0 V 50 70

I

CC

Supply current, V

CC

Recessive VI= VCC, STB at 0 V 6 10
Standby STB at VCC, VI = VCC 5 12 µ A

DEVICE SWITCHING CHARACTERISTICS

over recommended operating conditiions (unless otherwise noted)

PARAMETER

t

Total loop delay, driver input to receiver output, Recessive to Dominant 90 230

loop1

t

Total loop delay, driver input to receiver output, Dominant to Recessive 90 230

loop2

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TEST MIN TYP MAX UNIT

CONDITIONS

STB at 0 V,
See Figure 9

mA

ns

3

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SN65HVD1040

SLLS631B – MARCH 2007 – REVISED APRIL 2007

DRIVER ELECTRICAL CHARACTERISTICS

over recommended operating conditiions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP

V

O(D)

V

O(R)

V

O

V

OD(D)

V

SYM

V

OD(R)

V

OC(D)

V

OC(pp)

I

IH

I

IL

I

O(off)

I

OS(ss)

C

O

Bus output voltage VI= 0 V, STB at 0 V, RL= 60 Ω , See Figure 1 and
(Dominant) Figure 2

Bus output voltage (Recessive) VI= 3 V, STB at 0 V, See Figure 1 and Figure 2 2 2.5 3 V
Bus output voltage (Standby) RL= 60 Ω , STB at VCC, See Figure 1 and Figure 2 –0.1 0.1 V

Differential output voltage (Dominant) V

Output symmetry (Dominant or
Recessive) [ V

+ V

O(CANH)

Differential output voltage (Recessive) V

Common-mode output voltage
(Dominant)

Peak-to-peak common-mode output
voltage

High-level input current, TXD input VIat V
Low-level input current, TXD input VIat 0 V –50 –10 µ A
Power-off TXD Leakage current V

Short-circuit steady-state output
current

Output capacitance

(1) All typical values are at 25  C with a 5-V supply.

CANH 2.9 3.4 4.5
CANL 0.8 1.75

VI= 0 V, RL= 60 Ω , STB at 0 V, See Figure 1 and

Figure 2 , and Figure 3

VI= 0 V, RL= 45 Ω , STB at 0 V, See Figure 1 and

Figure 2

STB at 0 V, See Figure 2 and Figure 13 0.9 × V

)

O(CANL)

VI= 3 V, RL= 60 Ω , STB at 0 V, See Figure 1 and

Figure 2

VI= 3 V, STB at 0 V, No Load –0.5 0.05

STB at 0 V, See Figure 8 V

at 0 V, TXD at 5 V 1 µ A

CC

V

CANH

V

CANH

V

CANL

V

CANL

See Input capacitance to ground in RECEIVER

ELECTRICAL CHARACTERISTICS .

(1)

1.5 3

1.4 3

V

CC

1.1 × V

CC

–0.012 0.012

2 2.3 3

0.3

CC

–2 2 µ A

= –12 V, CANL Open, See Figure 12 –120 –72

= 12 V, CANL Open, See Figure 12 0.36 1
= –12 V, CANH Open, See Figure 12 –1 –0.5
= 12 V, CANH Open, See Figure 12 71 120

MAX UNIT

V

V

CC

mA

DRIVER SWITCHING CHARACTERISTICS

over recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

t

PLH

t

PHL

t

sk(p)

t

r

t

f

t

en

t

dom

4

Propagation delay time, low-to-high-level output 25 65 120
Propagation delay time, high-to-low-level output 25 45 120
Pulse skew (|t

– t

PHL

|) STB at 0 V, See Figure 4 25 ns

PLH

Differential output signal rise time 25
Differential output signal fall time 50
Enable time from silent mode to dominant See Figure 7 10 µ s
Dominant time-out See Figure 10 300 450 700 µ s

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RECEIVER ELECTRICAL CHARACTERISTICS

over recommended operating conditions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP

Positive-going input threshold

V

IT+

voltage
Negative-going input threshold

V

IT–

voltage

V

Hysteresis voltage (V

hys

V

Input threshold voltage Standby mode STB at V

IT

V

High-level output voltage IO= –2 mA, See Figure 6 4 4.6 V

OH

V

Low-level output voltage IO= 2 mA, See Figure 6 0.2 0.4 V

OL

I

Power-off bus input current 5 µ A

I(off)

I

Power-off RXD leakage current V

O(off)

C

Input capacitance to ground, (CANH or CANL) TXD at 3 V, VI= 0.4 sin (4E6 π t) + 2.5 V 20 pF

I

C

Differential input capacitance TXD at 3 V, VI= 0.4 sin (4E6 π t) 10 pF

ID

R

Differential input resistance TXD at 3 V, STD at 0 V 30 80

ID

R

Input resistance, (CANH or CANL) TXD at 3 V, STD at 0 V 15 30 40

IN

Input resistance matching

R

I(m)

[1 – (R

IN (CANH)

/ R

– V

IT+

)] x 100%

IN (CANL)

(1) All typical values are at 25  C with a 5-V supply.

High-speed
mode 500 650

) STB at V

IT–

SN65HVD1040

SLLS631B – MARCH 2007 – REVISED APRIL 2007

(1)

800 900

STB at 0 V, See Table 1

CC
CC

CANH or CANL = 5 V, V
TXD at 0 V

at 0 V, RXD at 5 V 20 µ A

CC

V

= V

CANH

CANL

at 0 V,

CC

100 125
500 1150

–3% 0% 3%

MAX UNIT

mV

k Ω

RECEIVER SWITCHING CHARACTERISTICS

over recommended operating conditiions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

t

Propagation delay time, low-to-high-level output 60 100 130

pLH

t

Propagation delay time, high-to-low-level output 45 70 130

pHL

t

Output signal rise time 8

r

t

Output signal fall time 8

f

t

Dominant time required on bus for wake-up from

BUS

(1)

standby

(1) The device under test shall not signal a wake-up condition with dominant pulses shorter than t

condition with dominant pulses longer than t
wake-up.

(max). Dominant pulses with a length between t

BUS

STB at 0 V, TXD at 3 V, See

Figure 6

STB at V

Figure 11 0.7 5 µ s

CC

(min) and shall signal a wake-up

BUS

(min) and t

BUS

BUS

SPLIT-PIN CHARACTERISTICS

over recommended operating conditiions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

V

O

I

O(stb)

Output voltage –500 µ A < IO< 500 µ A 0.3 × V

0.5 × V

CC

CC

Standby mode leakage current STB at 2 V, –12 V ≤ VO≤ 12 V –5 5 µ A

STB-PIN CHARACTERISTICS

over recommended operating conditiions (unless otherwise noted)

PARAMETER TEST CONDITIONS MIN TYP MAX UNIT

I

High level input current STB at 2 V –10 0 µ A

IH

I

Low level input current STB at 0 V –10 0 µ A

IL

ns

(max) may lead to a

0.7 × V

V

CC

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2.5 V

3.5

V

1.5 V

Recessive

Dominant

O

(CANH)

V

O

(CANL)

V

TXD

STB

I

I

V

I

V

OD

R

L

2

I

O(CANH)

V

O(CANH)

V

OC

I

O(CANL)

V

O(CANL)

V

O(CANH)

+ V

O(CANL)

0 V

V

OD

+

_

CANH

CANL

TXD

STB

60  +1%

330  +1%

330  +1%

−2 V 3 V

TEST

3 7 V

RL = 60 W
+1‘%

V

O

STB

CANH

CANH

V

I

TXD

(see Note A)

t

f

t

r

10%

90%

0.9 V

0 V

V

O(D)

V

I

V

O

V

O(R)

CL = 100 pF +20%
(see Note B)

V

CC

2

V

CC

2

t

PLH

t

PHL

0.5 V

V

CC

V

O

CANH

CANL

RXD

V

I

(CANH)

V

I

(CANL)

I

O

V

ID

V

I(CANH)

+ V

I(CANL)

2

VIC =

SN65HVD1040

SLLS631B – MARCH 2007 – REVISED APRIL 2007

Figure 1. Driver Voltage, Current, and Test Definition Figure 2. Bus Logic State Voltage Definitions

PARAMETER MEASUREMENT INFORMATION

Figure 3. Driver V

Figure 4. Driver Test Circuit and Voltage Waveforms

Figure 5. Receiver Voltage and Current Definitions

Test Circuit

OD

6

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CANH

CANL

RXD

V

I

STB

V

O

I

O

2V

2.4V

3.5V

V

OH

t

f

t

r

1.5V

V

OL

90%

10%

V

I

V

O

1.5V

(seeNote A)

CL=15pF 20%
(seeNoteB)

t

PLH

t

PLH

0.7V

CC

0.3V

CC

50%

50%

CANH

CANL

C

L

TXD

STB

RXD

+

V

O

−

15 pF 20%

DUT

60 W 1%

V

I

V

O

t

en

V

CC

0 V
V

OH

V

OL

NOTE: CL = 100 pF
Includes Instrumentation
and Fixture Capacitance
Within ±20%

CANH

CANL

V

I

TXD

STB

27 W +1%

27 W +1%

47 nF
+20%

VOC =

V

O (CANH)

+ V

O (CANL)

2

V

OC

V

OC(PP)

SN65HVD1040

SLLS631B – MARCH 2007 – REVISED APRIL 2007

PARAMETER MEASUREMENT INFORMATION (continued)

A. The input pulse is supplied by a generator having the following characteristics: PRR ≤ 125 kHz, 50% duty cycle, tr≤

6 ns, tf≤ 6ns, ZO= 50 Ω .

B. CLincludes instrumentation and fixture capacitance within  20%.

Figure 6. Receiver Test Circuit and Voltage Waveforms

Table 1. Differential Input Voltage Threshold Test

INPUT OUTPUT

V

CANH

–11.1 V –12 V 900 mV L V

12 V 11.1 V 900 mV L
–6 V –12 V 6 V L
12 V 6 V 6 V L

–11.5 V –12 V 500 mV H V

12 V 11.5 V 500 mV H

–12 V –6 V 6 V H

6 V 12 V 6 V H

Open Open X H

V

CANL

|V

| R

ID

OL

OH

Figure 7. tenTest Circuit and Voltage Waveforms

A. All VIinput pulses are from 0 V to V

Pulse Repetition Rate (PRR) = 125 kHz, 50% duty cycle.

Figure 8. Peak-to-Peak Common Mode Output Voltage Test and Waveform

and supplied by a generator having the following characteristics: tror tf≤ 6 ns.

CC

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7