Texas Instruments SN54ALS873BJT, SN54AS873AJT, SN74ALS873BDW, SN74ALS873BDWR, SN74ALS873BNT Datasheet
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SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A
DUAL 4-BIT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SDAS036D – APRIL 1982 – REVISED AUGUST 1995
• 3-State Buffer-Type Outputs Drive Bus
Lines Directly
• Bus-Structured Pinout
• Package Options Include Plastic
Small-Outline (DW) Packages, Ceramic
Chip Carriers (FK), and Plastic (NT) and
Ceramic (JT) DIPs
description
These dual 4-bit D-type latches feature 3-state
outputs designed specifically for bus driving.
These devices are particularly suitable for
implementing buffer registers, I/O ports,
bidirectional bus drivers, and working registers.
The dual 4-bit latches are transparent D-type
latches. While the latch-enable (LE) input is high,
the Q outputs follow the data (D) inputs in true
form, according to the function table. When LE is
low, the outputs are latched. When the clear (CLR
input goes low, the Q outputs go low
independently of LE. The outputs are in the
high-impedance state when the output-enable
(OE
) input is at a high logic level.
The SN54ALS873B and SN54AS873A are
characterized for operation over the full military
temperature range of –55°C to 125°C. The
SN74ALS873B and SN74AS873A are
characterized for operation from 0°C to 70°C.
SN54ALS873B, SN54AS873A . . . JT PACKAGE
SN74ALS873B, SN74AS873A . . . DW OR NT PACKAGE
SN54ALS873B, SN54AS873A . . . FK PACKAGE
1CLR
1OE
1D1
1D2
1D3
1D4
2D1
2D2
2D3
2D4
2OE
GND
(TOP VIEW)
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10
15
11
14
12
13
(TOP VIEW)
V
CC
1LE
1Q1
1Q2
1Q3
1Q4
2Q1
2Q2
2Q3
2Q4
2LE
2CLR
)
CC
V
1CLRNC1LE
1Q1
25
24
23
22
21
20
19
1Q2
1Q3
1Q4
NC
2Q1
2Q2
2Q3
1D2
1D3
1D4
NC
2D1
2D2
2D3
1D1
1OE
3212827
426
5
6
7
8
9
10
11
12 13
14 15 16 17 18
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
NC – No internal connection
FUNCTION TABLE
(each latch)
INPUTS
OE
CLR
L L X X L
L HHH H
LHHL L
LHLX Q
HXXX Z
LE D
OUTPUT
Q
0
NC
2D4
2OE
GND
Copyright 1995, Texas Instruments Incorporated
2LE
2CLR
2Q4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
1
SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A
UNIT
DUAL 4-BIT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SDAS036D – APRIL 1982 – REVISED AUGUST 1995
logic symbol
2
1OE
23
1LE
1CLR
2CLR
†
Pin numbers shown are for the DW, JT, and NT packages.
1
3
1D1
4
1D2
5
1D3
6
1D4
11
2OE
14
2LE
13
7
2D1
8
2D2
9
2D3
10
2D4
This symbol is in accordance with ANSI/IEEE Std 91-1984 and
IEC Publication 617-12.
†
EN
C1
C
1D
EN
C1
C
1D
22
21
20
19
18
17
16
15
1Q1
1Q2
1Q3
1Q4
2Q1
2Q2
2Q3
2Q4
logic diagram (each quad latch, positive logic)
OE
LE
CLR
R
D1
D2
D3
D4
C1
1D
R
C1
1D
R
C1
1D
R
C1
1D
Q1
Q2
Q3
Q4
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage, V
Input voltage, V
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range, T
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
‡
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
: SN54ALS873B –55°C to 125°C. . . . . . . . . . . . . . . . . . . . . . . . . . .
A
SN74ALS873B 0°C to 70°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
recommended operating conditions
SN54ALS873B SN74ALS873B
MIN NOM MAX MIN NOM MAX
V
V
V
I
I
T
CC
IH
IL
OH
OL
A
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
High-level input voltage 2 2 V
Low-level input voltage 0.7 0.8 V
High-level output current –1 –2.6 mA
Low-level output current 12 24 mA
Operating free-air temperature –55 125 0 70 °C
‡
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS873B, SN54AS873A, SN74ALS873B, SN74AS873A
PARAMETER
TEST CONDITIONS
UNIT
V
V
V
V
V
V
UNIT
twPulse duration
ns
DUAL 4-BIT D-TYPE LATCHES
WITH 3-STATE OUTPUTS
SDAS036D – APRIL 1982 – REVISED AUGUST 1995
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
SN54ALS873B SN74ALS873B
MIN TYP†MAX MIN TYP†MAX
V
IK
V
OH
OL
I
OZH
I
OZL
I
I
I
IH
I
IL
‡
I
O
I
CC
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V
VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC–2 VCC–2
= 4.5
CC
= 4.5
CC
VCC = 5.5 V, VO = 2.7 V 20 20 µA
VCC = 5.5 V, VO = 0.4 V –20 –20 µA
VCC = 5.5 V, VI = 7 V 0.1 0.1 mA
VCC = 5.5 V, VI = 2.7 V 20 20 µA
VCC = 5.5 V, VI = 0.4 V – 0.2 – 0.2 mA
VCC = 5.5 V, VO = 2.25 V –20 –112 –30 –112 mA
VCC = 5.5 V
IOH = –1 mA 2.4 3.3
IOH = –2.6 mA 2.4 3.2
IOL = 12 mA 0.25 0.4 0.25 0.4
IOL = 24 mA 0.35 0.5
Outputs high 11 21 11 21
Outputs low 16 29 16 29
Outputs disabled 20 31 20 31
V
mA
timing requirements over recommended ranges of supply voltage and operating free-air
temperature (unless otherwise noted) (see Figure 1)
SN54ALS873B SN74ALS873B
MIN MAX MIN MAX
CLR low 15 15
LE high 10 10
t
su
t
h
Setup time, data before LE↓
Hold time, data after LE↓ 7 7 ns
10 10 ns
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
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