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SN54ALS841
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TEXAS INSTRUMENTS SN54ALS841 Technical data

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SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 SN74ALS841, SN74AS841, SN74ALS842, SN74AS842
10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B – D2910, DECEMBER 1983 – REVISED MAY 1986
• 3-State Buffer-Type Outputs Drive
• Bus-Structured Pinout
• Provide Extra Bus Driving Latches
Necessary for Wider Address/Data Paths or Buses with Parity
• Buffered Control Inputs to Reduce DC
Loading
• Power-Up High-Impedance State
• Package Options Include Plastic Small
Outline Packages, Both Plastic and Ceramic Chip Carriers, and Standard Plastic and Ceramic 300-mil DIPs
• Dependable Texas Instruments Quality and
Reliability
description
These 10-bit latches feature 3-state outputs designed specifically for driving highly-capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.
The ten latches are transparent D-type. The ’ALS841 and ’AS841 have noninverting data (D) inputs. The ’ALS842 and ’AS842 have inverting D
SN54ALS841, SN54AS841 . . . JT PACKAGE
SN74ALS841, SN74AS841 . . . DW OR NT PACKAGE
(TOP VIEW)
OC
1
24
1D
2
23
2D
3
22
3D
4
21
4D
5
20
5D
6
19
6D
7
18
7D
8
17
8D
9
16
9D
10
15
10D
11
14
GND
SN54ALS842, SN54AS842 . . . JT PACKAGE
SN74ALS842, SN74AS842 . . . DW OR NT PACKAGE
12
13
(TOP VIEW)
V
CC
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q 10Q C
inputs.
SN54ALS841, SN54AS841 . . . FK PACKAGE SN74ALS841, SN74AS841 . . . FN PACKAGE
(TOP VIEW)
CC
V
1Q
2D1DOC
4
5
3D
6
4D
7
5D
8
NC
9
6D
10
7D
11
8D
12
13 14
9D
SN54ALS842, SN54AS842 . . . FK PACKAGE SN74ALS842, SN74AS842 . . . FN PACKAGE
NC
321
10D
(TOP VIEW)
28 27 26
15 16 17 18
NC
GND
2Q
25
3Q 4Q
24
5Q
23
NC
22
6Q
21
7Q
20
8Q
19
C
9Q
10Q
OC
1
24
1D
2
23
2D
3
22
3D
4
21
4D
5
20
5D
6
19
6D
7
18
7D
8
17
8D
9
16
9D
10
15
10D
11
14
GND
PRODUCTION DATA information is current as of publication date.
PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of Texas Instruments
Products conform to specifications per the terms of Texas Instruments standard warranty. Production processing does not necessarily include
standard warranty. Production processing does not necessarily include testing of all parameters.
testing of all parameters.
12
13
V
CC
1Q 2Q 3Q 4Q 5Q 6Q 7Q 8Q 9Q 10Q C
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3D 4D 5D
NC
6D 7D 8D
CC
1Q
2D1DOC
4
5 6 7 8 9
10
11
13 14
12
9D
Copyright 1986, Texas Instruments Incorporated
321
15 16 17 18
10D
GND
NC
28 27 26
NC
2Q
V
25
3Q 4Q
24
5Q
23
NC
22
6Q
21
7Q
20
8Q
19
C
9Q
10Q
5BASIC
1
SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B – D2910, DECEMBER 1983 – REVISED MAY 1986
description (continued)
A buffered output control (OC) input can be used to place the ten outputs in either a normal logic state (high or low levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive the bus lines in a bus-organized system without need for interface or pullup components.
The output control does not affect the internal operation of the latches. Old data can be retained or new data can be entered while the outputs are off.
The -1 versions of the SN74ALS841 and SN74ALS842 parts are identical to the standard versions except that the recommended maximum I SN54ALS842.
The SN54ALS841, SN54AS841, SN54ALS842, and SN54AS842 are characterized for operation over the full military temperature range of –55°C to 125°C. The SN74ALS841, SN74AS841, SN74ALS842, and SN74AS842 are characterized for operation from 0°C to 70°C.
’ALS841, ’AS841 ’ALS842, ’AS842
OC CD Q
LHH H LHL L LLX Q HXX Z
is increased to 48 mA. There are no -1 versions of the SN54ALS841 and
OL
Function Tables
INPUTS OUTPUTINPUTS OUTPUT
OC CD Q
LHH L LHL H
0
LLX Q
HXX Z
0
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS841, SN54AS841, SN74ALS841, SN74AS841
10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B – D2910, DECEMBER 1983 – REVISED MAY 1986
23 22 21
20 19
18 17 16 15 14
†
1Q 2Q 3Q
4Q 5Q
6Q 7Q 8Q 9Q 10Q
’ALS841, ’AS841 logic symbol
1
OC
C
1D 2D 3D
4D 5D
6D 7D 8D 9D
10D
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and EC Publication 617-12.
13
2 3 4
5 6
7 8 9 10 11
EN C1
1D
’ALS841, ’AS841 logic diagram (positive logic)
1
OC
13
C
2
1D
3
2D
4
3D
5
4D
6
5D
7
6D
C1 1D
C1 1D
C1 1D
C1 1D
C1 1D
C1 1D
23
22
21
20
19
18
1Q
2Q
3Q
4Q
5Q
6Q
Pin numbers shown are for DW, JT, and NT packages.
7D
8D
9D
10D
8
9
10
11
C1 1D
C1 1D
C1 1D
C1 1D
17
16
15
14
7Q
8Q
9Q
10Q
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B – D2910, DECEMBER 1983 – REVISED MAY 1986
23 22 21
20 19
18 17 16 15
†
1Q 2Q 3Q
4Q 5Q
6Q 7Q 8Q 9Q 10Q
’ALS842, ’AS842 logic symbol
1
OC
C
1D 2D 3D
4D 5D
6D 7D 8D 9D
10D
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
EN
13
C1
2
1D
3 4
5 6
7 8 9 10 11 14
’ALS842, ’AS842 logic diagram (positive logic)
1
OC
13
C
2
1D
3
2D
4
3D
5
4D
6
5D
7
6D
C1 1D
C1 1D
C1 1D
C1 1D
C1 1D
C1 1D
23
22
21
20
19
18
1Q
2Q
3Q
4Q
5Q
6Q
Pin numbers shown are for DW, JT, and NT packages.
7D
8D
9D
10D
8
9
10
11
C1 1D
C1 1D
C1 1D
C1 1D
17
16
15
14
7Q
8Q
9Q
10Q
absolute maximum ratings over operating free-air temperature range unless otherwise noted
Supply voltage, VCC 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input voltage 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage applied to a disabled 3-state output 5.5 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating free-air temperature range:
SN54ALS841, SN54AS841, SN54ALS842, SN54AS842 –55°C to 125°C. . . . . .
SN74ALS841, SN74AS841, SN74ALS842, SN74AS842 0°C to 70°C. . . . . . . . . .
Storage temperature range –65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS841, SN74ALS841
UNIT
IOLLow-level output current
mA
PARAMETER
TEST CONDITIONS
UNIT
10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B – D2910, DECEMBER 1983 – REVISED MAY 1986
recommended operating conditions
SN54ALS841 SN74ALS841
MIN NOM MAX MIN NOM MAX
V
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
CC
V
High-level input voltage 2 2 V
IH
V
Low-level input voltage 0.7 0.8 V
IL
I
High-level output current –1 –2.6 mA
OH
p
t
Pulse duration, C high 25 20 ns
w
t
Setup time, data before C↓ 16 10 ns
su
t
Hold time,, data after C↓ 7 5 ns
h
T
Operating free-air temperature –55 125 0 70 °C
A
†
The 48-mA limit applies only to the -1 versions and only if VCC is maintained between 4.75 V and 5.25 V .
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54ALS841 SN74ALS841
MIN TYP‡MAX MIN TYP‡MAX
V
IK
V
OH
V
OL
I
OZH
I
OZL
I
I
I
IH
I
IL
§
I
O
I
CC
‡
All typical values are at VCC = 5 V, TA = 25°C.
§
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC–2 VCC–2 VCC = 4.5 V, IOH = –1 mA 2.4 3.3 V VCC = 4.5 V, IOH = –2.6 mA 2.4 3.2 VCC = 4.5 V, IOL = 12 mA 0.25 0.4 0.25 0.4 VCC = 4.5 V, IOL = 24 mA 0.35 0.5 V VCC = 4.75 V, IOL = 48 mA (–1 versions) 0.35 0.5 VCC = 5.5 V, VO = 2. 7 V 20 20 µA VCC = 5.5 V, VO = 0.4 V –20 –20 µA VCC = 5.5 V, VI = 7 V 0.1 0.1 mA VCC = 5.5 V, VO = 2.7 V 20 20 µA VCC = 5.5 V, VI = 0 .4 V –0.1 –0.1 mA VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
Outputs high 19 30 19 30
VCC = 5.5 V Outputs low 38 62 38 62 mA
Outputs disabled 23 40 23 40
12 24
48
†
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
5
SN54ALS841, SN74ALS841
D
Q
ns
C
Q
ns
OC
Q
ns
OC
Q
ns
10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B – D2910, DECEMBER 1983 – REVISED MAY 1986
’ALS841 switching characteristics (see Note 1)
VCC = 5 V, VCC = 4.5 V to 5.5 V, CL = 50 pF, CL = 50 pF, R1 = 500 Ω,
PARAMETER FROM TO R2 = 500 Ω,
(INPUT) (OUTPUT) TA = 25°C TA = MIN to MAX
′ALS841 SN54ALS841 SN74ALS841
MIN TYP MAX MIN MAX MIN MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
† NOTE 1: Load circuit and voltage waveforms are shown in Section 1.
PLZ
The conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
8.5 11 2 15 2 13
8.5 11 2 15 2 13 14 18 7 25 7 21 17 23 8 30 8 26
7.5 10 2 14 2 12
7.5 10 2 14 2 12
6 8 2 12 2 10 7 9 2 14 2 12
R1 = 500 Ω, R2 = 500 Ω,
UNIT
†
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54ALS842, SN74ALS842
UNIT
IOLLow-level output current
mA
PARAMETER
TEST CONDITIONS
UNIT
10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B – D2910, DECEMBER 1983 – REVISED MAY 1986
recommended operating conditions
SN54ALS842 SN74ALS842
MIN NOM MAX MIN NOM MAX
V
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
CC
V
High-level input voltage 2 2 V
IH
V
Low-level input voltage 0.7 0.8 V
IL
I
High-level output current –1 –2.6 mA
OH
p
t
Pulse duration, C high 25 20 ns
w
t
Setup time, data before C↓ 16 10 ns
su
t
Hold time,, data after C↓ 7 5 ns
h
T
Operating free-air temperature –55 125 0 70 °C
A
†
The 48-mA limit applies only to the –1 versions and only if VCC is maintained between 4.75 V and 5.25 V .
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54ALS842 SN74ALS842
MIN TYP‡MAX MIN TYP‡MAX
V
IK
V
OH
V
OL
I
OZH
I
OZL
I
I
I
IH
I
IL
§
I
O
I
CC
‡
All typical values are at VCC = 5 V, TA = 25°C.
§
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V VCC = 4.5 V to 5.5 V, IOH = –0.4 mA VCC–2 VCC–2 VCC = 4.5 V, IOH = –1 mA 2.4 3.3 V VCC = 4.5 V, IOH = –2.6 mA 2.4 3.2 VCC = 4.5 V, IOL = 12 mA 0.25 0.4 0.25 0.4 VCC = 4.5 V, IOL = 24 mA 0.35 0.5 V VCC = 4.75 V, IOL = 48 mA (-1 versions) 0.35 0.5 VCC = 5.5 V, VO = 2. 7 V 20 20 µA VCC = 5.5 V, VO = 0.4 V –20 –20 µA VCC = 5.5 V, VI = 7 V 0.1 0.1 mA VCC = 5.5 V, VO = 2.7 V 20 20 µA VCC = 5.5 V, VI = 0.4 V –0.1 –0.1 mA VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
Outputs high 20 35 20 35
VCC = 5.5 V Outputs low 48 74 48 74 mA
Outputs disabled 27 44 27 44
12 24
48
†
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
7
SN54ALS842, SN74ALS842
PARAMETER
UNIT
D
Q
ns
C
Q
ns
OC
Q
ns
OC
Q
ns
10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B – D2910, DECEMBER 1983 – REVISED MAY 1986
’ALS842 switching characteristics (see Note 1)
VCC = 5 V, VCC = 4.5 V to 5.5 V, CL = 50 pF, CL = 50 pF, R1 = 500 Ω, R1 = 500 Ω,
FROM TO R2 = 500 Ω, R2 = 500 Ω,
(INPUT) (OUTPUT) TA = 25°C TA = MIN to MAX
’ALS842 SN54ALS842 SN74ALS842
MIN TYP MAX MIN MAX MIN MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
† NOTE 1: Load circuit and voltage waveforms are shown in Section 1.
PLZ
The conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
11 15 4 22 4 18
8 11 3 17 3 13 17 23 8 31 8 27 13 18 6 24 6 20
8 10 2 14 2 12
8 11 2 14 2 12
6 8 1 12 1 10
7 9 2 14 2 12
†
8
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
SN54AS841, SN54AS842, SN74AS841, SN54AS842
V
V
ICCV
V
mA
10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B – D2910, DECEMBER 1983 – REVISED MAY 1986
recommended operating conditions
SN54AS841 SN54AS842
MIN NOM MAX MIN NOM MAX
V
Supply voltage 4.5 5 5.5 4.5 5 5.5 V
CC
V
High-level input voltage 2 2 V
IH
V
Low-level input voltage 0.8 0.8 V
IL
I
High-level output current –24 –24 mA
OH
I
Low-level output current 32 48 mA
OL
t
Pulse duration, C high 5 4 ns
w
t
Setup time, data before C↓ 3.5 2.5 ns
su
t
Hold time,, data after C↓ 3.5 2.5 ns
h
T
Operating free-air temperature –55 125 0 70 °C
A
electrical characteristics over recommended operating free-air temperature range (unless otherwise noted)
SN54AS841 SN74AS841
PARAMETER TEST CONDITIONS SN54AS842 SN74AS842 UNIT
MIN TYP‡MAX MIN TYP‡MAX
V
IK
V
OH
OL
I
OZH
I
OZL
I
I
I
IH
I
IL
‡
I
O
’AS841 Outputs low 58 94 58 94
’AS842 Outputs low 60 97 60 97
†
All typical values are at VCC = 5 V, TA = 25°C.
‡
The output conditions have been chosen to produce a current that closely approximates one half of the true short-circuit output current, IOS.
VCC = 4.5 V, II = –18 mA –1.2 –1.2 V VCC = 4.5 V to 5.5 V, IOH = – 2 mA VCC–2 VCC–2 VCC = 4.5 V, IOH = –15 mA 2.4 3.2 2.4 3.2 V VCC = 4.5 V, IOH = –24 mA 2 2 VCC = 4.5 V, IOL = 32 mA 0.25 0.5 VCC = 4.5 V, IOL = 48 mA 0.35 0.5 VCC = 5.5 V, VO= 2. 7 V 50 50 µA VCC = 5.5 V, VO = 0.4 V –50 –50 µA VCC = 5.5 V, VI = 7 V 0.1 0.1 mA VCC = 5.5 V, VO = 2.7 V 20 20 µA VCC = 5.5 V, VI = 0 .4 V –0.5 –0.5 mA VCC = 5.5 V, VO = 2.25 V –30 –112 –30 –112 mA
Outputs high 36 60 36 60
CC
= 5.5
Outputs disabled 56 92 56 92 Outputs high 38 62 38 62
Outputs disabled 58 95 58 95
SN74AS841 SN74AS842
UNIT
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
9
SN54AS841, SN54AS842, SN74AS841, SN54AS842
PARAMETER
UNIT
D
Q
ns
C
Q
ns
OC
Q
ns
OC
Q
ns
FROM
(INPUT)
(OUTPUT)
D
Q
ns
C
Q
ns
OC
Q
ns
OC
Q
ns
10-BIT BUS INTERFACE D-TYPE LATCHES WITH 3-STATE OUTPUTS
SDAS059B – D2910, DECEMBER 1983 – REVISED MAY 1986
’AS841 switching characteristics (see Note 1)
VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω,
FROM TO
(INPUT) (OUTPUT) TA = MIN to MAX
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
’AS842 switching characteristics (see Note 1)
PARAMETER
t
PLH
t
PHL
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
†
The conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions.
NOTE 1: Load circuit and voltage waveforms are shown in Section 1.
PLZ
TO
R2 = 500 Ω,
SN54AS841 SN74AS841
MIN MAX MIN MAX
1 8.5 1 6.5 1 10 1 9 2 13 2 12 2 13 2 12 2 13.5 2 10.5 2 15 2 13.5 1 10 1 8 1 10 1 8
VCC = 4.5 V to 5.5 V, CL = 50 pF, R1 = 500 Ω, R2 = 500 Ω, TA = MIN to MAX
SN54AS842 SN74AS842
MIN MAX MIN MAX
1 11 1 8.5 1 10 1 9 2 13 2 12 2 13 2 12 2 14.5 2 12 2 15 2 12.5 1 10 1 8 1 10 1 8
†
UNIT
†
10
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
IMPORTANT NOTICE
T exas Instruments and its subsidiaries (TI) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. All products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability.
TI warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements.
CERT AIN APPLICATIONS USING SEMICONDUCTOR PRODUCTS MAY INVOLVE POTENTIAL RISKS OF DEATH, PERSONAL INJURY, OR SEVERE PROPERTY OR ENVIRONMENTAL DAMAGE (“CRITICAL APPLICATIONS”). TI SEMICONDUCTOR PRODUCTS ARE NOT DESIGNED, AUTHORIZED, OR WARRANTED TO BE SUITABLE FOR USE IN LIFE-SUPPORT DEVICES OR SYSTEMS OR OTHER CRITICAL APPLICA TIONS. INCLUSION OF TI PRODUCTS IN SUCH APPLICATIONS IS UNDERST OOD TO BE FULLY AT THE CUSTOMER’S RISK.
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TI assumes no liability for applications assistance or customer product design. TI does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of TI covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. TI’s publication of information regarding any third party’s products or services does not constitute TI’s approval, warranty or endorsement thereof.
Copyright 1998, Texas Instruments Incorporated
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