TEXAS INSTRUMENTS SLTS029A Technical data

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PT6100 Series
1 Amp Adjustable Positive Step-down Integrated Switching Regulator
SLTS029A
(Revised 6/30/2000)
The PT6100 Series is a line of High-Perfor-
90% Efficiency
Adjustable Output Voltage
Internal Short Circuit Protection
Over-Temperature Protection
On/Off Control (Ground Off)
Small SIP Footprint
Meets Requirements for FCC
Part 15; Class B limits for Radiated Emissions
Wide Input Range
Pin-Out Information
Pin Function
Inhibit
1
Standard Application
VOADJ
V
IN
C1
INH
COM COM
12
2,3,4
PT6100
1
5,6,7,8
Q1
C1 = Optional 1µF ceramic
= NFET
Q
1
C
= Required 100µF electrolytic
2
9,10,11
V
OUT
+
C2
Specifications
Characteristics (T
=25°C unless noted) Symbols Conditions Min Typ Max Units
a
Output Current I
Short Circuit Current I
Input Voltage Range V
(Note: inhibit function cannot Vo = 5V 9 30/38** V be used with Vin above 30V.) Vo = 12V 16 30/38** V
Output Voltage Tolerance ∆V
Line Regulation Reg
Load Regulation Reg
V
Ripple/Noise V
o
Transient Response t with Co = 100µF V
Efficiency η V
Switching Frequency ƒ
Shutdown Current I Quiescent Current I Output Voltage V
Adjustment Range Above V
Absolute Maximum T Operating Temperature Range
Recommended Operating T Temperature Range (40-60LFM) V
Thermal Resistance
Storage Temperature T
Mechanical Shock Per Mil-STD-883D, Method 2002.3
Mechanical Vibration Per Mil-STD-883D, Method 2007.2
Weight 5.0 grams
* ISR will operate down to no load with reduced specifications. ** Input voltage cannot exceed 30V when the inhibit function is used. ***See Thermal Derating chart.
Note:
The PT6100 Series requires a 100µF electrolytic or tantalum output capacitor for proper operation in all applications.
o
sc
in
o
line
load
n
tr
os
o
sc
nl
o
a
a
θ
ja
s
(30V max)
2V
in
3V
in
4V
in
5 GND 6 GND 7 GND 8 GND 9V
out
10 V
out
11 V
out
12 V
out
Adj
Over Vin range 0.1* 1.0 A
min 3.5 Apk
Vin = V
in
0.1 Io 1.0 A V
Over Vin Range, Io = 1.0 A T
= 0°C to +60°C
a
Over Vin range ±0.25 ±0.5 %V
0.1 Io 1.0 A ±0.25 ±0.5 %V
Vin=V
min, I
in
50% load change 100 200 µSec Vo over/undershoot 5.0 %V
=9V, Io=0.5A, Vo=3.3V 84 %
in
=9V, Io=0.5A, Vo=5V 89 %
V
in
Vin=16V, Io=0.5A, Vo=12V 91 %
Over Vin and Io ranges 400 500 600 kHz
Vin = 15V 100 µA Io = 0A, V Below V
=10V 10 mA
in
o
o
Free Air Convection, Vo= 3.3V -40 +85***
Vin=24V, Io=0.75A Vo= 12V -40 +80***
Free Air Convection V (40-60LFM) V
1 msec, Half Sine, mounted to a fixture
20-2000 Hz, Soldered in a PC board
Ordering Information
PT6101 = +5 Volts PT6102 = +3.3 Volts PT6103 = +12 Volts
Pkg Style 200
= 3.3V 9 26 V
o
=1.0 A ±2 %V
o
= 5V -40 +85*** °C
o
= 3.3V 50
o
= 5V 40 °C/W
o
V
= 12V 40
o
mance 1 Amp, 12-Pin SIP (Single In-line Package) Integrated Switching Regulators (ISRs) designed to meet the on-board power conversion needs of battery powered or other equipment requiring high efficiency and small size. This high performance ISR family offers a unique combination of features combining 90% typical efficiency with open-collector on/off control and adjustable output voltage. Quiescent current in the shutdown mode is less than 100µA.
PT Series Suffix
Vertical Through-Hole Horizontal Through-Hole Horizontal Surface Mount
PT6100 SERIES
±1.0 ±2.0 %V
See Application Notes.
-40 +85 °C
-40 +125 °C
500
—10
(PT1234X)
N A C
o
o
o
o
o
G’s
G’s
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
n
PT6100 Series
Typical Characteristics
1 Amp Adjustable Positive Step-down Integrated Switching Regulator
PT6102, 3.3 VDC (See Note 1) PT6101, 5.0 VDC (See Note 1) PT6103, 12.0 VDC (See Note 1)
Efficiency vs Output Current Efficiency vs Output Current
100
90
80
70
Efficiency - %Ripple-(mV)Iout-(Amps)PD-(Watts)
60
50
40
0 0.2 0.4 0.6 0.8 1
Iout-(Amps)
Vin
9.0V
12.0V
15.0V
18.0V
26.0V
100
90
80
70
Efficiency - %
60
50
40
0 0.2 0.4 0.6 0.8 1
Iout-(Amps)
Ripple vs Output Current Ripple vs Output Current
90
80
70
60
50
40
30
20
10
0
0 0.2 0.4 0.6 0.8 1
Thermal Derating (T
Iout-(Amps)
) (See Note 2) Thermal Derating (Ta) (See Note 2)
a
1
0.8
85°C
0.6
0.4
0.2
0
9 121518212427
Vin-(Volts) Vin-(Volts)Vin-(Volts)
70°C
Vin
26.0V
18.0V
15.0V
12.0V
9.0V
(
180
160
140
120
100
80
Ripple-(mV)
60
40
20
0
0 0.2 0.4 0.6 0.8 1
Iout-(Amps)
1
0.8
0.6
0.4
Iout-(Amps)
0.2
0
9 12151821242730333639
85°C
Efficiency vs Output Current
100
Vin
9.0V
12.0V
18.0V
24.0V
30.0V
38.0V
90
80
70
Efficiency - %
60
50
40
0 0.2 0.4 0.6 0.8 1
16.0V
20.0V
24.0V
30.0V
38.0V
Iout-(Amps)
Ripple vs Output Current
400
350
Vin
38.0V
30.0V
24.0V
18.0V
12.0V
9.0V
70°C
300
250
200
150
Ripple-(mV)Iout-(Amps)
100
50
0
0 0.2 0.4 0.6 0.8 1
Thermal Derating (T
1
0.8
0.6
0.4
0.2
0
16 18 20 22 24 26 28 30 32 34 36 38
Iout-(Amps)
a
85°C
) (See Note 2)
70°C
60°C
50°C
38.0V
30.0V
24.0V
20.0V
16.0V
Power Dissipation vs Output Current Power Dissipation vs Output Current
1
0.9
0.8
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0
0 0.2 0.4 0.6 0.8 1
Vin
26.0V
18.0V
15.0V
12.0V
9.0V
1.4
1.2
1
0.8
0.6
PD-(Watts)
0.4
0.2
0
0 0.2 0.4 0.6 0.8 1
Vin
38.0V
30.0V
24.0V
18.0V
12.0V
9.0V
Power Dissipation vs Output Current
2
1.8
1.6
1.4
1.2
1
0.8
PD-(Watts)
0.6
0.4
0.2
0
0 0.2 0.4 0.6 0.8 1
Vin
38.0V
30.0V
24.0V
20.0V
16.0V
Iout-(Amps) Iout-(Amps) Iout-(Amps)
Note 1: All data listed in the above graphs, except for derating data, has been developed from actual products tested at 25°C. This data is considered typical data for the ISR. Note 2: Thermal derating graphs are developed in free air convection cooling of 40-60 LFM. (See Thermal Application Notes.)
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
Application Notes
PT6100/6210/6300 Series
Adjusting the Output Voltage of Power Trends’ Wide Input Range Bus ISRs
The output voltage of the Power Trends’ Wide Input Range Series ISRs may be adjusted higher or lower than the factory trimmed pre-set voltage with the addition of a single external resistor. Table 1 accordingly gives the allowable
adjust)
o
(min)
a
adjustment range for each model for either series as V
(max).
and V
a
Adjust Up: An increase in the output voltage is obtained by adding a resistor R2, between pin 12 (Vo adjust) and pins 5-8 (GND).
Adjust Down: Add a resistor (R1), between pin 12 (V and pins 9-11(V
out
).
Refer to Figure 1 and Table 2 for both the placement and value of the required resistor; either (R1) or R2 as appropriate.
Notes:
1. Use only a single 1% resistor in either the (R1) or R2
location. Place the resistor as close to the ISR as possible.
2. Never connect capacitors from Vo adjust to either GND or
. Any capacitance added to the Vo adjust pin will affect
V
out
the stability of the ISR.
3. Adjustments to the output voltage may place additional
limits on the maximum and minimum input voltage for the
part. The revised maximum and minimum input voltage
limits must comply with the following requirements. Note
that the minimum input voltage limits are also model
dependant.
(max) = (8 x Va)V or *30/38V,
V
in
*
Limit is 30V when inhibit function is active.
whichever is less.
PT6x0x/PT6x1x series:
Vin (min) = (Va + 4)V or 9V,
whichever is greater.
PT6x2x series:
Vo <10V; Vin (min) = (Va + 2.0)V or 7.0V,
whichever is greater.
10V; V
V
o
(min) = (Va + 2.5)V
in
Figure 1
Vin
C1 1
µ
F Ceramic
(Optional)
PT6100/6200/6300
2,3,4
Vin Vo
GND Vo(adj)
125,6,7,8
(R1) Adj Down
R2 Adjust Up
9,10,11
C2 100
µ
F
(Req’d)
Vo
+
COMCOM
The values of (R1) [adjust down], and R2 [adjust up], can also be calculated using the following formulae.
(R1) =
R2 =
Ro (Va – 1.25) V
– V
o
a
1.25 R
o
– V
V
a
o
k
k
Where: Vo= Original output voltage
= Adjusted output voltage
V
a
= The resistance value fromTable 1
R
o
Table 1
ISR ADJUSTMENT RANGE AND FORMULA PARAMETERS
1Adc Rated PT6102 PT6101 PT6103 2Adc Rated PT6213 PT6212 PT6214 3Adc Rated PT6303 PT6302 PT6304
Vo (nom) 3.3 5.0 5.0 12.0
Va (min) 1.89 1.88 2.18 2.43
Va (max) 6.07 11.25 8.5 22.12
ΩΩ
Ro (k
Ω) 66.5 150.0 90.9 243.0
ΩΩ
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
Application Notes
continued
PT6100/6210/6300 Series
Table 2
ISR ADJUSTMENT RESISTOR VALUES
1Adc Rated PT6102 PT6101 PT6103 2Adc Rated PT6213 PT6212 PT6214 3Adc Rated PT6303 PT6302 PT6304 Vo (nom) 3.3 5.0 5.0 12.0 Va (req.d)
1.9 (30.9)k (31.5)k
2.0 (38.4)k (37.5)k
2.1 (47.1)k (44.0)k
2.2 (57.4)k (50.9)k (30.8)k
2.3 (69.8)k (58.3)k (35.4)k
2.4 (85.0)k (66.3)k (40.2)k
2.5 (104.0)k (75.0)k (45.5)k (32.0)k
2.6 (128.0)k (84.4)k (51.1)k (34.9)k
2.7 (161.0)k (94.6)k (57.3)k (37.9)k
2.8 (206.0)k (106.0)k (64.0)k (40.9)k
2.9 (274.0k (118.0)k (71.4)k (44.1)k
3.0 (388.0)k (131.0)k (79.5)k (47.3)k
3.1 (615.0)k (146.0)k (88.5)k (50.5)k
3.2 (1300.0)k (163.0)k (98.5)k (53.8)k
3.3 (181.0)k (110.0)k (57.3)k
3.4 831.0k (202.0)k (122.0)k (60.8)k
3.5 416.0k (225.0)k (136.0)k (64.3)k
3.6 227.0k (252.0)k (153.0)k (68.0)k
3.7 208.0k (283.0)k (171.0)k (71.7)k
3.8 166.0k (319.0)k (193.0)k (75.6)k
3.9 139.0k (361.0)k (219.0)k (79.5)k
4.0 119.0k (413.0)k (250.0)k (83.5)k
4.1 104.0k (475.0)k (288.0)k (87.7)k
4.2 92.4k (533.0)k (335.0)k (91.9)k
4.3 83.1k (654.0)k (396.0)k (96.3)k
4.4 75.6k (788.0)k (477.0)k (101.0)k
4.5 69.3k (975.0)k (591.0)k (105.0)k
4.6 63.9k (1260.0)k (761.0)k (110.0)k
4.7 59.4k (1730.0)k (1050.0)k (115.0)k
4.8 55.4k (1610.0)k (120.0)k
4.9 52.0k (125.0)k
5.0 48.9k (130.0)k
5.1 46.2k 1880.0k 1140.0k (136.0)k
5.2 43.8k 937.0k 568.0k (141.0)k
5.3 41.6k 625.0k 379.0k (147.0)k
5.4 39.6k 469.0k 284.0k (153.0)k
5.5 37.8k 375.0k 227.0k (159.0)k
5.6 36.1k 313.0k 189.0k (165.0)k
5.7 34.6k 268.0k 162.0k (172.0)k
5.8 33.3k 234.0k 142.0k (178.0)k
5.9 32.0k 208.0k 126.0k (185.0)k
6.0 30.8k 188.0k 114.0k (192.0)k
R1 = (Blue) R2 = Black
ISR ADJUSTMENT RESISTOR VALUES (Cont)
1Adc Rated PT6101 PT6103 2Adc Rated PT6212 PT6214 3Adc Rated PT6302 PT6304 Vo (nom) 5.0 5.0 12.0 Va (req.d)
6.2 156.0k 94.7kΩ (207.0)k
6.4 134.0k 81.2k (223.0)k
6.6 117.0k 71.0k (241.0)k
6.8 104.0k 63.1k (259.0)k
7.0 93.8k 56.8k (279.0)k
7.2 85.2k 51.6k (301.0)k
7.4 78.1k 47.3k (325.0)k
7.6 72.1k 43.7k (351.0)k
7.8 67.0k 40.6k (379.0)k
8.0 62.5k 37.9k (410.0)k
8.2 58.6k 35.5k (444.0)k
8.4 55.1k 33.4k (483.0)k
8.6 52.1k (525.0)k
8.8 49.3k (573.0)k
9.0 46.9k (628.0)k
9.5 41.7k (802.0)k
10.0 37.5k (1060.0)k
10.5 34.1k (1500.0)k
11.0 31.3k
11.5
12.0
12.5 608.0k
13.0 304.0k
13.5 203.0k
14.0 152.0k
14.5 122.0k
15.0 101.0k
15.5 86.8k
16.0 75.9k
16.5 67.5k
17.0 60.8k
17.5 55.2k
18.0 50.6k
18.5 46.7k
19.0 43.4k
19.5 40.5k
20.0 38.0k
20.5 35.7k
21.5 33.8k
21.5 32.0k
22.0 30.4k
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
Application Notes
PT6100/6210/6300 Series
Using the Inhibit Function on Power Trends’ Wide Input Range Bus ISRs
For applications requiring output voltage On/Off con­trol, the 12pin ISR products incorporate an inhibit function. The function has uses in areas such as battery conservation, power-up sequencing, or any other application where the regulated output from the module is required to be switched off. The On/Off function is provided by the Pin 1 (Inhibit) control.
The ISR functions normally with Pin 1 open-circuit, providing a regulated output whenever a valid source voltage is applied to V signal is applied to Pin 1, the regulator output will be dis­abled.
Figure 1 shows an application schematic, which details the typical use of the Inhibit function. Note the discrete transistor (Q1). The Inhibit control has its own internal pull-up with a maximum open-circuit voltage of 8.3VDC. Only devices with a true open-collector or open-drain out­put can be used to control this pin. A discrete bipolar transistor or MOSFET is recommended.
Equation 1 may be used to determine the approximate current drawn by Q1 when the inhibit is active.
Equation 1
I
stby
, (pins 2, 3, & 4). When a low-level2 ground
in
=V
÷ 155k ± 20%
in
Figure 1
V
in
Inh
COM
C1, 1µF (Optional)
PT6100/6210/6300
2,3,4
Vin Vo
GND Vo(adj)
Inh*
1
Q1 BSS138
9,10,11
125,6,7,8
C2
F
100
µ
V
out
+
COM
Turn-On Time: The output of the ISR is enabled automatically when external power is applied to the input. The Inhibit control pin is pulled high by its internal pull-up resistor. The ISR produces a fully regulated output voltage within 1-msec of either the release of the Inhibit control pin, or the application of power. The actual turn-on time will vary with the input voltage, output load, and the total amount of capacitance con­nected to the output Using the circuit of Figure 1, Figure 2 shows the typical rise in output voltage for the PT6101 follow­ing the turn-off of Q1 at time t =0. The waveform was measured with a 9Vdc input voltage, and 5-Ohm resistive load.
Notes:
1. The Inhibit control logic is similar for all Power Trends’
modules, but the flexibility and threshold tolerances will be
different. For specific information on the inhibit function
of other ISR models, consult the applicable application
note.
2. Use only a true open-collector device (preferably a discrete
transistor) for the Inhibit input.
Do Not use a pull-up resistor, or drive the input directly from the output of a TTL or other logic gate. To disable the output voltage, the control pin should be pulled low to less than +1.5VDC.
3. When the Inhibit control pin is active, i.e. pulled low, the maximum allowed input voltage is limited to +30Vdc.
4. Do not control the Inhibit input with an external DC voltage. This will lead to erratic operation of the ISR and may over-stress the regulator.
5. Avoid capacitance greater than 500pF at the Inhibit control pin. Excessive capacitance at this pin will cause the ISR to produce a pulse on the output voltage bus at turn-on.
6. Keep the On/Off transition to less than 10µs. This
prevents erratic operation of the ISR, which can cause a momentary high output voltage.
Figure 2
6
5
4
3
(Vdc)
o
V
2
1
0
-0.2 0 0.2 0.4 0.6 0.8 1 t (mill i -secs)
For technical support and more information, see inside back cover or visit www.ti.com/powertrends
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