TEXAS INSTRUMENTS PCM3000 Technical data
Lch In
Rch In
Analog Front-End
Delta-Sigma
Modulator
Digital
Decimation
Filter
Serial Interface
and
Mode Control
Digital Out
Mode Control
System Clock
B0006-03
Digital In
Digital
Interpolation
Filter
Lch Out
Rch Out
Low-Pass Filter
and
Output Buffer
Multilevel
Delta-Sigma
Modulator
18-BIT STEREO AUDIO CODEC, SINGLE-ENDED ANALOG INPUT/OUTPUT
PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
FEATURES
• Monolithic 18-Bit ∆ Σ ADC and DAC
• Single 5-V Power Supply
• Small Package: SSOP-28
• 16- or 18-Bit Input/Output Data
• Accepts Seven Alternate Formats
• Stereo ADC:
– Single-Ended Voltage Input
– 64 × Oversampling Digital Filter
• Pass-Band Ripple: ± 0.05 dB
• Stop-Band Attenuation: –65 dB
– High Performance:
• THD+N: –88 dB
APPLICATIONS
• Sampling Keyboards
• Digital Mixers
• Mini-Disk Recorders
• Hard-Disk Recorders
• Karaoke Systems
• DSP-Based Car Stereo
• DAT Recorders
• Video Conferencing
• SNR: 94 dB
• Dynamic Range: 94 dB
DESCRIPTION
– Digital High-Pass Filter The PCM3000/3001 is a low-cost, single-chip stereo
• Stereo DAC
– Single-Ended Voltage Outut
– Analog Low-Pass Filter
– 8 × Oversampling Digital Filter
audio codec (analog-to-digital and digital-to-analog
converter) with single-ended analog voltage input and
output.
Both ADCs and DACs employ delta-sigma modulation with 64-times oversampling. The ADCs include
• Pass-Band Ripple: ± 0.17 dB a digital decimation filter and the DACs include an
• Stop-Band Attenuation: 35 dB
– High Performance:
• THD+N: –90 dB
• SNR: 98 dB
• Dynamic Range: 97 dB
• Special Features (PCM3000)
– Digital De-Emphasis
– Digital Attenuation (256 Steps)
– Soft Mute
8-times oversampling digital interpolation filter. The
DACs also include digital attenuation, de-emphasis,
infinite zero detection and soft mute to form a
complete subsystem. The PCM3000/3001 operates
with left-justified, right-justified, I2S or DSP data
formats.
The PCM3000 can be programmed with a three-wire
serial interface for special features and data formats.
The PCM3001 can be pin-programmed for data
formats.
The PCM3000 and PCM3001 are fabricated using a
– Digital Loopback highly advanced CMOS process and are available in
• Sample Rate: 4 kHz to 48 kHz
• System Clock: 256 fs, 384 fs, 512 f
s
a small 28-pin SSOP package. The PCM3000/3001
are suitable for a wide variety of cost-sensitive
consumer applications where good performance is
required.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
System Two, Audio Precision are trademarks of Audio Precision, Inc.
All other trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.
Copyright © 2000–2004, Texas Instruments Incorporated
www.ti.com
PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated
circuits be handled with appropriate precautions. Failure to observe proper handling and installation
procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision
integrated circuits may be more susceptible to damage because very small parametric changes could
cause the device not to meet its published specifications.
ELECTRICAL CHARACTERISTICS
All specifications at TA= 25 ° C, V
otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
DIGITAL INPUT/OUTPUT
Input Logic
(1)
V
IH
(1)
V
IL
(2)
I
IN
(3)
I
IN
(4)
V
IH
(4)
V
IL
(4)
I
IN
Output Logic
(5)
V
OH
(5)
V
OL
(6)
V
OH
(6)
V
OL
Clock Frequency
f
S
ADC CHARACTERISTICS
Resolution 18 Bits
DC Accuracy
(1) Pins 16, 17, 18, 22, 25, 26, 27, 28: LRCIN, BCKIN, DIN, CLKIO, MC/FMT2, MD/FMT1, ML/FMT0, RSTB
(2) Pins 16, 17, 18, 22: LRCIN, BCKIN, DIN, CLKIO (Schmitt-trigger input)
(3) Pins 25, 26, 27, 28: MC/FMT2, MD/FMT1, ML/FMT0, RSTB (Schmitt-trigger input, 70-k Ω internal pullup resistor)
(4) Pin 20: XTI
(5) Pins 19, 22: DOUT, CLKIO
(6) Pin 21: XTO
(7) Refer to Application Bulletin SBAA033 for information relating to operation at lower sampling frequencies.
(8) High-pass filter disabled (PCM3000 only) to measure dc offset
Input logic level VDC
Input logic current µ A
Input logic level
Input logic current ± 40 µ A
Output logic level
Output logic level
Sampling frequency 4
System clock frequency 384 f
Gain mismatch, channel-to-channel ± 1 ± 5
Gain error ± 2 ± 5
Gain drift ± 20 ppm of FSR/ ° C
Bipolar zero error High-pass filter off
Bipolar zero drift High-pass filter off
= V
DD
= 5 V, fS= 44.1 kHz, SYSCLK = 384 fS,CLKIO input, and 18-bit data, unless
CC
2
0.8
± 1
–120
0.64 V
DD
0.28 V
DD
I
= –1.6 mA 4.5
OUT
I
= 3.2 mA 0.5
OUT
I
= –3.2 mA 4.5
OUT
I
= 3.2 mA 0.5
OUT
256 f
512 f
(7)
S
S
S
(8)
(8)
1.024 11.2896 12.288
1.536 16.9344 18.432 MHz
2.048 22.5792 24.576
44.1 48 kHz
± 1.7 % of FSR
± 20 ppm of FSR/ ° C
VDC
VDC
% of FSR
2
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SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA= 25 ° C, V
otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Dynamic Performance
THD+N dB
Dynamic range f = 1 kHz, A-weighted 90 94 dB
Signal-to-noise ratio f = 1 kHz, A-weighted 90 94 dB
Channel separation 88 92 dB
Digital Filter Performance
Pass band 0.454 f
Stop band 0.583 f
Pass-band ripple ± 0.05 dB
Stop-band attenuation –65 dB
Delay time (latency) 17.4/f
Digital High-Pass Filter Response
Cutoff frequency –3 dB 0.019 f
ANALOG INPUT
Voltage range 0 dB (full scale) 2.9 Vp-p
Center voltage 2.1 VDC
Input impedance 15 k Ω
Antialiasing Filter
Cutoff frequency –3 dB, C
DAC CHARACTERISTICS
Resolution 18 Bits
DC Accuracy
Gain mismatch, channel-to-channel ± 1 ± 5 % of FSR
Gain error ± 1 ± 5 % of FSR
Gain drift ± 20 ppm of FSR/ ° C
Bipolar zero error ± 1 % of FSR
Bipolar zero drift ± 20 ppm of FSR/ ° C
Dynamic Performance
THD+N dB
Dynamic range EIAJ A-weighted 90 97 dB
Signal-to-noise ratio (idle channel) EIAJ A-weighted 92 98 dB
Channel separation 90 95 dB
Digital Filter Performance
Pass band 0.445 f
Stop band 0.555 f
Pass-band ripple ± 0.17 dB
Stop-band attenuation –35 dB
Delay time 11.1/f
(9)
(9)
= V
DD
= 5 V, fS= 44.1 kHz, SYSCLK = 384 fS,CLKIO input, and 18-bit data, unless
CC
f = 1 kHz, VIN= –0.5 dB –88 –80
f = 1 kHz, VIN= –60 dB –31
S
S
S
S
= 470 pF 170 kHz
EXT
V
= 0 dB (full scale) –90 –80
OUT
V
= –60 dB –34
OUT
S
S
S
PCM3000
PCM3001
Hz
Hz
s
mHz
Hz
Hz
s
(9) fIN= 1 kHz, using the System Two™ audio measurement system by Audio Precision™, rms mode with 20-kHz LPF, 400-Hz HPF
used for performance calculation or measurement.
3
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PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
ELECTRICAL CHARACTERISTICS (continued)
All specifications at TA= 25 ° C, V
otherwise noted
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
Analog Output
Voltage range 0.62 V
Center voltage 0.5 V
Load impedance AC load 5 k Ω
Analog Low-Pass Filter
Frequency response f = 20 kHz –0.16 dB
POWER SUPPLY REQUIREMENTS
V
CC
V
DD
ICC, I
DD
TEMPERATURE RANGE
T
A
T
stg
θ
JA
Voltage range
(10)
Supply current V
Power dissipation V
Operation –25 85 ° C
Storage –55 125 ° C
Thermal resistance 100 ° C/W
= V
DD
= 5 V, fS= 44.1 kHz, SYSCLK = 384 fS,CLKIO input, and 18-bit data, unless
CC
CC
CC
4.5 5 5.5 VDC
4.5 5 5.5 VDC
= V
CC
CC
= 5 V 32 50 mA
DD
= V
= 5 V 160 250 mW
DD
Vp-p
VDC
(10) With no load on XTO and CLKIO
PACKAGE/ORDERING INFORMATION
PRODUCT PACKAGE QUANTITY
PCM3000E PCM3000E
28-pin SSOP DB
PCM3001E PCM3001E
PACKAGE PACKAGE ORDERING TRANSPORT
CODE MARKING NUMBER MEDIA
PCM3000E Rails 47
PCM3000E/2K Tape and reel 2000
PCM3001E Rails 47
PCM3001E/2K Tape and reel 2000
ABSOLUTE MAXIMUM RATINGS
over operating free-air temperature range (unless otherwise noted)
Supply voltage: VDD, VCC1, VCC2 –0.3 V to 6.5 V
Supply voltage differences ± 0.1 V
GND voltage differences ± 0.1 V
Digital input voltage –0.3 to V
Analog input voltage –0.3 to VCC1, VCC2 + 0.3 V, < 6.5 V
Power dissipation 300 mW
Input current (any pins except supplies) ± 10 mA
Operating temperature –25 ° C to 85 ° C
Storage temperature –55 ° C to 125 ° C
Lead temperature, soldering 260 ° C, 5 s
Package temperature (IR reflow, peak) 235 ° C
+ 0.3 V, < 6.5 V
DD
4
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SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
RECOMMENDED OPERATING CONDITIONS
over operating free-air temperature range (unless otherwise noted)
MIN NOM MAX UNIT
Analog supply voltage, VCC1, VCC2 4.5 5 5.5 VDC
Digital supply voltage, V
Analog input voltage, full scale (–0 dB) 2.9 Vp-p
Digital input logic family TTL
Digital input clock frequency
Analog output load resistance 5 k Ω
Analog output load capacitance 50 pF
Digital output load capacitance 10 pF
Operating free-air temperature, T
DD
System clock 8.192 24.576 MHz
Sampling clock 32 48 kHz
A
4.5 5 5.5 VDC
–25 85 ° C
PCM3000
PCM3001
5
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1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VINL
VCC1
AGND1
V
REF
L
V
REF
R
VINR
CINPR
CINNR
CINNL
CINPL
VCOM
V
OUT
R
AGND2
VCC2
RSTB
ML
MD
MC
DGND
V
DD
CLKIO
XTO
XTI
DOUT
DIN
BCKIN
LRCIN
V
OUT
L
PCM3000
(TOP VIEW)
P0007-01
1
2
3
4
5
6
7
8
9
10
11
12
13
14
28
27
26
25
24
23
22
21
20
19
18
17
16
15
VINL
VCC1
AGND1
V
REF
L
V
REF
R
VINR
CINPR
CINNR
CINNL
CINPL
VCOM
V
OUT
R
AGND2
VCC2
RSTB
FMT0
FMT1
FMT2
DGND
V
DD
CLKIO
XTO
XTI
DOUT
DIN
BCKIN
LRCIN
V
OUT
L
PCM3001
(TOP VIEW)
PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
PIN CONFIGURATION—PCM3000/3001
NAME PIN I/O DESCRIPTION
AGND1 3 – ADC analog ground
AGND2 13 – DAC analog ground
BCKIN 17 I Bit clock input
CINNL 9 – ADC antialias filter capacitor (–), Lch
CINNR 8 – ADC antialias filter capacitor (–), Rch
CINPL 10 – ADC antialias filter capacitor (+), Lch
CINPR 7 – ADC antialias filter capacitor (+), Rch
CLKIO 22 I/O Buffered oscillator output or external clock input
DGND 24 – Digital ground
DIN 18 I Data input
DOUT 19 O Data output
LRCIN 16 I Sample rate clock input (fS)
MC 25 I Serial mode control, bit clock
MD 26 I Serial mode control, data
ML 27 I Serial mode control, strobe pulse
RSTB 28 I Reset, active-low
V
CC
V
CC
V
DD
VCOM 11 – DAC output common
(1) Schmitt-trigger input
(2) With 70-k Ω typical internal pullup resistor
6
VINL 1 I ADC analog input, Lch
VINR 6 I ADC analog input, Rch
V
OUT
V
OUT
V
REF
V
REF
PIN ASSIGNMENTS—PCM3000
(1)
(1)
1 2 – ADC analog power supply
2 14 – DAC analog power supply
23 – Digital power supply
L 15 O DAC analog output, Lch
R 12 O DAC analog output, Rch
L 4 – ADC input reference, Lch
R 5 – ADC input reference, Rch
(1)
(1)
(1) (2)
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NAME PIN I/O DESCRIPTION
XTI 20 I Oscillator input
XTO 21 O Oscillator output
NAME PIN I/O DESCRIPTION
AGND1 3 – ADC analog ground
AGND2 13 – DAC analog ground
BCKIN 17 I Bit clock input
CINNL 9 – ADC antialias filter capacitor (–), Lch
CINNR 8 – ADC antialias filter capacitor (–), Rch
CINPL 10 – ADC antialias filter capacitor (+), Lch
CINPR 7 – ADC antialias filter capacitor (+), Rch
CLKIO 22 I/O Buffered oscillator output or external clock input
DGND 24 – Digital ground
DIN 18 I Data input
DOUT 19 O Data output
FMT0 27 I Audio data format control 0
FMT1 26 I Audio data format control 1
FMT2 25 I Audio data format control 2
LRCIN 16 I Sample rate clock input (fS)
RSTB 28 I Reset, active-low
V
1 2 – ADC analog power supply
CC
V
2 14 – DAC analog power supply
CC
V
DD
VCOM 11 – DAC output common
VINL 1 I ADC analog input, Lch
VINR 6 I ADC analog input, Rch
V
L 15 O DAC analog output, Lch
OUT
V
R 12 O DAC analog output, Rch
OUT
V
L 4 – ADC input reference, Lch
REF
V
R 5 – ADC input reference, Rch
REF
XTI 20 I Oscillator input
XTO 21 O Oscillator output
(1) Schmitt-trigger input
(2) With 70-k Ω typical internal pullup resistor
PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
PIN ASSIGNMENTS—PCM3000 (continued)
PIN ASSIGNMENTS—PCM3001
(1)
(1)
(1)
(1) (2)
(1) (2)
(1) (2)
(1)
(1) (2)
23 – Digital power supply
7
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0.002
0.004
0.006
0.008
0.010
−25 0 25 50 75 100
TA − Free-Air Temperature − °C
THD+N − Total Harm. Dist. + Noise at FS − %
FS
4
3
2
0
1
−60 dB
G001
THD+N − Total Harm. Dist. + Noise at −60 dB − %
0.002
0.004
0.006
0.008
0.010
4.25 4.50 4.75 5.00 5.25 5.50 5.75
VCC − Supply Voltage − V
THD+N − Total Harm. Dist. + Noise at FS − %
4
3
2
0
1
THD+N − Total Harm. Dist. + Noise at −60 dB − %
G002
−60 dB
FS
90
92
94
96
98
4.25 4.50 4.75 5.00 5.25 5.50 5.75
VCC − Supply Voltage − V
Dynamic Range − dB
98
96
94
90
92
SNR − Signal-to-Noise Ratio − dB
G004
Dynamic Range
SNR
0.002
0.004
0.006
0.008
0.010
System Clock
THD+N − Total Harm. Dist. + Noise at FS − %
4
3
2
0
1
G003
THD+N − Total Harm. Dist. + Noise at −60 dB − %
512 f
S
256 f
S
384 f
S
44.1 kHz
FS
−60 dB
48 kHz
48 kHz
44.1 kHz
PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
TYPICAL PERFORMANCE CURVES OF ADC SECTION
All specifications at TA= 25 ° C, V
TEMPERATURE POWER SUPPLY
= V
CC
THD+N THD+N
vs vs
= 5 V, fIN= 1 kHz, fS= 44.1 kHz, 18-bit data, V
DD
unless otherwise noted
= 2.9 Vp-p, and SYSCLK = 384 fS,
IN
Figure 1. Figure 2.
THD+N SNR AND DYNAMIC RANGE
vs vs
SYSTEM CLOCK AND SAMPLING FREQUENCY POWER SUPPLY
Figure 3. Figure 4.
8
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0.002
0.004
0.006
0.008
0.010
Resolution
THD+N − Total Harm. Dist. + Noise at FS − %
4
3
2
0
1
G005
THD+N − Total Harm. Dist. + Noise at −60 dB − %
−60 dB
18-Bit16-Bit
FS
0.002
0.004
0.006
0.008
0.010
−25 0 25 50 75 100
TA − Free-Air Temperature − °C
THD+N − Total Harm. Dist. + Noise at FS − %
FS
4
3
2
0
1
G006
THD+N − Total Harm. Dist. + Noise at −60 dB − %
−60 dB
0.002
0.004
0.006
0.008
0.010
4.25 4.50 4.75 5.00 5.25 5.50 5.75
VCC − Supply Voltage − V
THD+N − Total Harm. Dist. + Noise at FS − %
4
3
2
0
1
THD+N − Total Harm. Dist. + Noise at −60 dB − %
G007
−60 dB
FS
TYPICAL PERFORMANCE CURVES OF ADC SECTION (continued)
All specifications at TA= 25 ° C, V
unless otherwise noted
= V
CC
= 5 V, fIN= 1 kHz, fS= 44.1 kHz, 18-bit data, V
DD
OUTPUT DATA RESOLUTION
PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
= 2.9 Vp-p, and SYSCLK = 384 fS,
IN
THD+N
vs
TYPICAL PERFORMANCE CURVES OF DAC SECTION
All specifications at TA= 25 ° C, V
THD+N THD+N
TEMPERATURE POWER SUPPLY
Figure 5.
= V
CC
= 5 V, fIN= 1 kHz, fS= 44.1 kHz, 18-bit data, and SYSCLK = 384 fS, unless
DD
otherwise noted
vs vs
Figure 6. Figure 7.
9
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92
94
96
98
100
4.25 4.50 4.75 5.00 5.25 5.50 5.75
VCC − Supply Voltage − V
Dynamic Range − dB
100
98
96
92
94
SNR − Signal-to-Noise Ratio − dB
G009
Dynamic Range
SNR
0.002
0.004
0.006
0.008
0.010
System Clock
THD+N − Total Harm. Dist. + Noise at FS − %
4
3
2
0
1
G008
THD+N − Total Harm. Dist. + Noise at −60 dB − %
512 f
S
256 f
S
384 f
S
FS
−60 dB
48 kHz
48 kHz
44.1 kHz
44.1 kHz
0.002
0.004
0.006
0.008
0.010
Resolution
THD+N − Total Harm. Dist. + Noise at FS − %
4
3
2
0
1
G010
THD+N − Total Harm. Dist. + Noise at −60 dB − %
−60 dB
18-Bit16-Bit
FS
PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
TYPICAL PERFORMANCE CURVES OF DAC SECTION (continued)
All specifications at TA= 25 ° C, V
otherwise noted
SYSTEM CLOCK AND SAMPLING FREQUENCY POWER SUPPLY
= V
CC
= 5 V, fIN= 1 kHz, fS= 44.1 kHz, 18-bit data, and SYSCLK = 384 fS, unless
DD
THD+N SNR AND DYNAMIC RANGE
vs vs
Figure 8. Figure 9.
THD+N
vs
INPUT DATA RESOLUTION
Figure 10.
10
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DECIMATION FILTER
Normalized Frequency [× fS Hz]
−200
−150
−100
−50
0
0 8 16 24 32
Amplitude − dB
G011
Normalized Frequency [× fS Hz]
−100
−80
−60
−40
−20
0
0.0 0.2 0.4 0.6 0.8 1.0
Amplitude − dB
G012
Normalized Frequency [× fS Hz]
−1.0
−0.8
−0.6
−0.4
−0.2
0.0
0.2
0.0 0.1 0.2 0.3 0.4 0.5
Amplitude − dB
G013
TYPICAL PERFORMANCE CURVES OF INTERNAL FILTERS (ADCs)
All specifications at TA= 25 ° C, V
OVERALL CHARACTERISTICS STOP-BAND ATTENUATION CHARACTERISTICS
= V
CC
= 5 V, and SYSCLK = 384 fS, unless otherwise noted
DD
PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
Figure 11. Figure 12.
PASS-BAND RIPPLE CHARACTERISTICS
Figure 13.
11
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Normalized Frequency [× fS/1000 Hz]
−1.0
−0.8
−0.6
−0.4
−0.2
0.0
0.2
0 1 2 3 4
Amplitude − dB
G014
−1.0
−0.8
−0.6
−0.4
−0.2
0.0
0.2
f − Frequency − Hz
Amplitude − dB
1 10 100 100k1k 10k
G015
470 pF
1000 pF
−50
−40
−30
−20
−10
0
f − Frequency − Hz
Amplitude − dB
1 10 100 10M1k 10k
G016
100k 1M
470 pF
1000 pF
PCM3000
PCM3001
SBAS055A – OCTOBER 2000 – REVISED OCTOBER 2004
TYPICAL PERFORMANCE CURVES OF INTERNAL FILTERS (ADCs) (continued)
All specifications at TA= 25 ° C, V
HIGH-PASS FILTER
= V
CC
= 5 V, and SYSCLK = 384 fS, unless otherwise noted
DD
HIGH-PASS FILTER RESPONSE
ANTIALIASING FILTER
Figure 14.
ANTIALIASING FILTER PASS-BAND ANTIALIASING FILTER OVERALL
FREQUENCY RESPONSE (C
= 470 pF, 1000 pF) FREQUENCY RESPONSE (C
EXT
= 470 pF, 1000 pF)
EXT
12
Figure 15. Figure 16.
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