TEXAS INSTRUMENTS NA555 Technical data

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1 2 3 4

8 7 6 5

GND

TRIG

OUT

RESET

DISCH THRES CONT

3 2 1 20 19

9 10 11 12 13

4 5 6 7 8

18 17 16 15 14

NC DISCH NC THRES NC

TRIG

OUT

GND

CONT

VCCNC

RESET

NC – No internal connection

NA555...D OR P PACKAGE

NE555...D, P, PS, OR PW PACKAGE

SA555...D OR P PACKAGE

SE555...D, JG, OR P PACKAGE

(TOPVIEW)

SE555...FK PACKAGE

(TOPVIEW)

NA555 , NE555 , SA555 , SE555

PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

FEATURES

• Timing From Microseconds to Hours • Adjustable Duty Cycle

• Astable or Monostable Operation • TTL-Compatible Output Can Sink or Source

up to 200 mA

DESCRIPTION/ORDERING INFORMATION

These devices are precision timing circuits capable of producing accurate time delays or oscillation. In the time-delay or monostable mode of operation, the timed interval is controlled by a single external resistor and capacitor network. In the astable mode of operation, the frequency and duty cycle can be controlled independently with two external resistors and a single external capacitor.

The threshold and trigger levels normally are two-thirds and one-third, respectively, of V altered by use of the control-voltage terminal. When the trigger input falls below the trigger level, the flip-flop is set, and the output goes high. If the trigger input is above the trigger level and the threshold input is above the threshold level, the flip-flop is reset and the output is low. The reset (RESET) input can override all other inputs and can be used to initiate a new timing cycle. When RESET goes low, the flip-flop is reset, and the output goes low. When the output is low, a low-impedance path is provided between discharge (DISCH) and ground.

The output circuit is capable of sinking or sourcing current up to 200 mA. Operation is specified for supplies of 5 V to 15 V. With a 5-V supply, output levels are compatible with TTL inputs.

. These levels can be

PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters.

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

On products compliant to MIL-PRF-38535, all parameters are tested unless otherwise noted. On all other products, production processing does not necessarily include testing of all parameters.

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NA555 , NE555 , SA555 , SE555 PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

ORDERING INFORMATION

THRES

MAX PACKAGE

= 15 V

PDIP – P Tube of 50 NE555P NE555P

SOIC – D NE555

0 ° C to 70 ° C 11.2 V

SOP – PS Reel of 2000 NE555PSR N555

TSSOP – PW N555

PDIP – P Tube of 50 SA555P SA555P

–40 ° C to 85 ° C 11.2 V Tube of 75 SA555D

SOIC – D SA555

PDIP – P Tube of 50 NA555P NA555P

–40 ° C to 105 ° C 11.2 V Tube of 75 NA555D

SOIC – D NA555

PDIP – P Tube of 50 SE555P SE555P

–55 ° C to 125 ° C 10.6 Reel of 2500 SE555DR

SOIC – D SE555D

CDIP – JG Tube of 50 SE555JG SE555JG LCCC – FK Tube of 55 SE555FK SE555FK

(1) Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(1)

Tube of 75 NE555D Reel of 2500 NE555DR

Tube of 150 NE555PW Reel of 2000 NE555PWR

Reel of 2000 SA555DR

Reel of 2000 NA555DR

Tube of 75 SE555D

ORDERABLE PART NUMBER TOP-SIDE MARKING

FUNCTION TABLE

RESET OUTPUT

Low Irrelevant Irrelevant Low On High <1/3 V High >1/3 V High >1/3 V

(1) Voltage levels shown are nominal.

TRIGGER THRESHOLD DISCHARGE

VOLTAGE

(1)

DD DD DD

VOLTAGE

Irrelevant High Off >2/3 V <2/3 V

(1)

DD DD

Low On

As previously established

SWITCH

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TRIG

THRES

CONT

RESET

OUT

DISCH

GND

Pin numbers shown are for the D, JG, P, PS, and PW packages. NOTE A: RESET can override TRIG, which can override THRES.

FUNCTIONAL BLOCK DIAGRAM

NA555 , NE555 , SA555 , SE555

PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

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NA555 , NE555 , SA555 , SE555 PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

Absolute Maximum Ratings

over operating free-air temperature range (unless otherwise noted)

Supply voltage Input voltage CONT, RESET, THRES, TRIG V Output current ± 225 mA

Package thermal impedance

Operating virtual junction temperature 150 ° C Case temperature for 60 s FK package 260 ° C Lead temperature 1, 6 mm (1/16 in) from case for 60 s JG package 300 ° C

stg

Storage temperature range –65 150 ° C

(1) Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings

only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating

conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) All voltage values are with respect to GND. (3) Maximum power dissipation is a function of TJ(max), θJA, and TA. The maximum allowable power dissipation at any allowable ambient

temperature is PD= (TJ(max) - TA)/ θ (4) The package thermal impedance is calculated in accordance with JESD 51-7. (5) Maximum power dissipation is a function of TJ(max), θJC, and TC. The maximum allowable power dissipation at any allowable case

temperature is PD= (TJ(max) - TC)/ θJC. Operating at the absolute maximum TJof 150 ° C can affect reliability. (6) The package thermal impedance is calculated in accordance with MIL-STD-883.

(2)

(1)

D package 97

(3) (4)

P package 85 PS package 95 PW package 149

(5) (6)

FK package 5.61 JG package 14.5

Operating at the absolute maximum TJof 150 ° C can affect reliability.

JA.

MIN MAX UNIT

18 V

° C/W

Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

Supply voltage V

Input voltage CONT, RESET, THRES, and TRIG V Output current ± 200 mA

Operating free-air temperature ° C

MIN MAX UNIT

NA555, NE555, SA555 4.5 16 SE555 4.5 18

NA555 –40 105 NE555 0 70 SA555 –40 85 SE555 –55 125

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NA555 , NE555 , SA555 , SE555

PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

Electrical Characteristics

= 5 V to 15 V, TA= 25 ° C (unless otherwise noted)

PARAMETER TEST CONDITIONS UNIT

SE555 NE555

MIN TYP MAX MIN TYP MAX

= 15 V 9.4 10 10.6 8.8 10 11.2

THRES voltage level V

THRES current

(1)

TRIG voltage level V

= 5 V 2.7 3.3 4 2.4 3.3 4.2

30 250 30 250 nA

= 15 V

= 5 V

TA= –55 ° C to 125 ° C 3 6

TA= –55 ° C to 125 ° C 1.9

4.8 5 5.2 4.5 5 5.6

1.45 1.67 1.9 1.1 1.67 2.2

TRIG current TRIG at 0 V 0.5 0.9 0.5 2 µ A

RESET voltage level V

RESET current mA

TA= –55 ° C to 125 ° C 1.1 RESET at V

RESET at 0 V –0.4 –1 –0.4 –1.5

DISCH switch off-state current

= 15 V

CONT voltage

TA= –55 ° C to 125 ° C 9.6 10.4

(open circuit)

= 5 V

= 15 V, IOL= 10 mA

= 15 V, IOL= 50 mA

= 15 V, IOL= 100 mA

Low-level output voltage TA= –55 ° C to 125 ° C 2.7 V

High-level output voltage V

= 15 V, IOL= 200 mA 2.5 2.5

= 5 V, IOL= 3.5 mA TA= –55 ° C to 125 ° C 0.35

= 5 V, IOL= 5 mA

= 5 V, IOL= 8 mA 0.15 0.25 0.15 0.4

= 15 V, IOL= –100 mA

= 15 V, IOH= –200 mA 12.5 12.5 V

= 15 V, IOL= –100 mA

Output low, No load

Supply current mA

Output high, No load

TA= –55 ° C to 125 ° C 2.9 3.8

TA= –55 ° C to 125 ° C 0.2

TA= –55 ° C to 125 ° C 1

TA= –55 ° C to 125 ° C 0.8

TA= –55 ° C to 125 ° C 12

TA= –55 ° C to 125 ° C 2 V

= 15 V 10 12 10 15

= 5 V 3 5 3 6

= 15 V 9 10 9 13

= 5 V 2 4 2 5

0.3 0.7 1 0.3 0.7 1

0.1 0.4 0.1 0.4

20 100 20 100 nA

9.6 10 10.4 9 10 11

2.9 3.3 3.8 2.6 3.3 4

0.1 0.15 0.1 0.25

0.4 0.5 0.4 0.75

2 2.2 2 2.5

0.1 0.2 0.1 0.35

13 13.3 12.75 13.3

3 3.3 2.75 3.3

(1) This parameter influences the maximum value of the timing resistors RAand RBin the circuit of Figure 12 . For example,

when V

= 5 V, the maximum value is R = RA+ RB≈ 3.4 M Ω , and for V

= 15 V, the maximum value is 10 M Ω .

NA555 SA555

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NA555 , NE555 , SA555 , SE555 PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

Operating Characteristics

= 5 V to 15 V, TA= 25 ° C (unless otherwise noted)

PARAMETER UNIT

TEST

CONDITIONS

(1)

SE555 NE555

MIN TYP MAX MIN TYP MAX

Initial error of timing

(2)

interval Temperature coefficient of ppm/

timing interval ° C Supply-voltage sensitivity of

timing interval

Each timer, monostable Each timer, astable Each timer, monostable Each timer, astable Each timer, monostable Each timer, astable

Output-pulse rise time 100 200

Output-pulse fall time 100 200

(3)

TA= 25 ° C 0.5 1.5

(5)

(3)

TA= MIN to MAX 30 100

(5)

(3)

TA= 25 ° C 0.05 0.2

(5)

1.5 2.25

90 150

0.15 0.3

CL= 15 pF, TA= 25 ° C

(4)

(1) For conditions shown as MIN or MAX, use the appropriate value specified under recommended operating conditions. (2) Timing interval error is defined as the difference between the measured value and the average value of a random sample from each

process run. (3) Values specified are for a device in a monostable circuit similar to Figure 9 , with the following component values: RA= 2 k Ω to 100 k Ω ,

C = 0.1 µ F. (4) On products compliant to MIL-PRF-38535, this parameter is not production tested. (5) Values specified are for a device in an astable circuit similar to Figure 12 , with the following component values: RA= 1 k Ω to 100 k Ω ,

C = 0.1 µ F.

NA555 SA555

1 3

0.1 0.5

100 300 ns

%/V

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TA = 125°C

TA = 25°C

IOL − Low-Level Output Current − mA

VCC = 5 V

LOW-LEVEL OUTPUT VOLTAGE

LOW-LEVEL OUTPUT CURRENT

TA = −55°C

0.1

0.04

0.01 1 2 4 7 10 20 40 70 100

0.07

0.4

0.7

0.02

0.2

− Low-Level Output Voltage − VV OL

VCC = 10 V

LOW-LEVEL OUTPUT VOLTAGE

LOW-LEVEL OUTPUT CURRENT

− Low-Level Output Voltage − VV OL

− Low-Level Output Current − mA

0.1

0.04

0.01 1 2 4 7 10 20 40 70 100

0.07

0.4

0.7

0.02

0.2

TA = 125°C

TA = 25°C

TA= −55°C

TA = 125°C

TA = 25°C

TA = −55°C

VCC = 15 V

LOW-LEVEL OUTPUT VOLTAGE

LOW-LEVEL OUTPUT CURRENT

− Low-Level Output Voltage − VV OL

IOL − Low-Level Output Current − mA

0.1

0.04

0.01 1 2 4 7 10 20 40 70 100

0.07

0.4

0.7

0.02

0.2

0.6

0.2 0

1.4

1.8

2.0

0.4

1.6

0.8

1.2

−

IOH − High-Level Output Current − mA

TA = 125°C

TA = 25°C

100704020107421

VCC = 5 V to 15 V

TA = −55°C

− Voltage Drop − V

)

(

DROP BETWEEN SUPPLY VOLTAGE AND OUTPUT

HIGH-LEVEL OUTPUT CURRENT

NA555 , NE555 , SA555 , SE555

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

TYPICAL CHARACTERISTICS

Data for temperatures below 0 ° C and above 70 ° C are applicable for SE555 circuits only.

PRECISION TIMERS

Figure 1. Figure 2.

Figure 3. Figure 4.

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2 1 0

5 6 7 8 9 10 11

− Supply Current − mA

SUPPLY CURRENT

SUPPLY VOLTAGE

12 13 14 15

= 25°C

= 125°C

= −55°C

Output Low, No Load

VCC − Supply Voltage − V

0.995

0.990

0.985 0 5 10

1.005

1.010

NORMALIZED OUTPUT PULSE DURATION

(MONOSTABLE OPERATION)

SUPPLY VOLTAGE

1.015

15 20

VPulse Duration Relative to Value at = 10 V

VCC − Supply Voltage − V

0.995

0.990

0.985

−75 −25 25

1.005

1.010

NORMALIZED OUTPUT PULSE DURATION

(MONOSTABLE OPERATION)

FREE-AIR TEMPERATURE

1.015

75 125

TA − Free-Air Temperature − °C

−50 0 50 100

VCC = 10 V

Pulse Duration Relative to Value at T

= 255C

150

100

200

250

300

− Propagation Delay Time − ns

PROPAGATION DELAY TIME

LOWEST VOLTAGE LEVEL

OF TRIGGER PULSE

Lowest Voltage Level of Trigger Pulse

= −55°C

= 125°C

= 25°C

= 0°C

= 70°C

0 0.1 x V

0.2 x V

0.3 x V

0.4 x V

NA555 , NE555 , SA555 , SE555 PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

TYPICAL CHARACTERISTICS (continued)

Data for temperatures below 0 ° C and above 70 ° C are applicable for SE555 circuits only.

Figure 5. Figure 6.

Figure 7. Figure 8.

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(5 V to 15 V)

Output

GND

OUT

CONT

RESET DISCH

THRES TRIGInput

4 7

6 2

Pin numbers shown are for the D, JG, P, PS, and PW packages.

NA555 , NE555 , SA555 , SE555

PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

APPLICATION INFORMATION

Monostable Operation

For monostable operation, any of these timers can be connected as shown in Figure 9 . If the output is low, application of a negative-going pulse to the trigger (TRIG) sets the flip-flop ( Q goes low), drives the output high, and turns off Q1. Capacitor C then is charged through R threshold voltage of the threshold (THRES) input. If TRIG has returned to a high level, the output of the threshold comparator resets the flip-flop ( Q goes high), drives the output low, and discharges C through Q1.

until the voltage across the capacitor reaches the

Figure 9. Circuit for Monostable Operation

Monostable operation is initiated when TRIG voltage falls below the trigger threshold. Once initiated, the sequence ends only if TRIG is high at the end of the timing interval. Because of the threshold level and saturation voltage of Q1, the output pulse duration is approximately tw= 1.1R constant for various values of R the supply voltage, V

. The timing interval is, therefore, independent of the supply voltage, so long as the

and C. The threshold levels and charge rates both are directly proportional to

C. Figure 11 is a plot of the time

supply voltage is constant during the time interval. Applying a negative-going trigger pulse simultaneously to RESET and TRIG during the timing interval discharges

C and reinitiates the cycle, commencing on the positive edge of the reset pulse. The output is held low as long as the reset pulse is low. To prevent false triggering, when RESET is not used, it should be connected to V

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− Output Pulse Duration − s

C − Capacitance − µF

−1

−2

−3

−4

1001010.10.01

−5

0.001

= 10 MΩ

= 10 kΩ

= 1 kΩ

= 100 kΩ

= 1 MΩ

Voltage − 2 V/div

Time − 0.1 ms/div

Capacitor Voltage

Output Voltage

Input Voltage

RA = 9.1 kΩ CL = 0.01 µF RL = 1 kΩ See Figure 9

Voltage − 1 V/div

Time − 0.5 ms/div

Capacitor Voltage

Output Voltage

RA = 5 kW R

= 1 kW

RB = 3 kW See Figure 12 C = 0.15 µF

GND

OUT

CONT RESET DISCH

THRES TRIG

Output

0.01 µF

(5 V to 15 V)

(see Note A)

NOTE A: Decoupling CONT voltage to ground with a capacitor can

improve operation. This should be evaluated for individual applications.

Open

5 8

4 7

6 2

Pin numbers shown are for the D, JG, P, PS, and PW packages.

NA555 , NE555 , SA555 , SE555 PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

APPLICATION INFORMATION (continued)

Figure 10. Typical Monostable Waveforms Figure 11. Output Pulse Duration vs Capacitance

Astable Operation

As shown in Figure 12 , adding a second resistor, RB, to the circuit of Figure 9 and connecting the trigger input to the threshold input causes the timer to self-trigger and run as a multivibrator. The capacitor C charges through R

and R

RB. This astable connection results in capacitor C charging and discharging between the threshold-voltage level

( ≈ 0.67 × V times (and, therefore, the frequency and duty cycle) are independent of the supply voltage.

and then discharges through R

) and the trigger-voltage level ( ≈ 0.33 × V

Figure 12. Circuit for Astable Operation Figure 13. Typical Astable Waveforms

only. Therefore, the duty cycle is controlled by the values of R

). As in the monostable circuit, charge and discharge

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and

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tH+ 0.693 (RA) RB)C tL+ 0.693 (RB)C

Other useful relationships are shown below.

period + tH) tL+ 0.693 (RA) 2RB) C frequency [

1.44

(RA) 2RB) C

Output driver duty cycle +

tH) t

RA) 2R

Output waveform duty cycle

RA) R

Low-to-high ratio

tH) t

+ 1–

RA) 2R

f − Free-Running Frequency − Hz

C − Capacitance − µF

100 k

10 k

1 k

100

1001010.10.01

0.1

0.001

+ 2 RB = 10 MΩ

+ 2 RB = 1 MΩ

+ 2 RB = 100 kΩ

+ 2 RB = 10 kΩ

+ 2 RB = 1 kΩ

Time − 0.1 ms/div

Voltage − 2 V/div

VCC = 5 V RA = 1 kΩ C = 0.1 µF See Figure 15

Capacitor Voltage

Output Voltage

Input Voltage

VCC (5 V to 15 V)

DISCH

OUT

RESET

A5T3644

THRES

GND

CONT

TRIG

Input

0.01 µF

Output

4 8

Pin numbers shown are shown for the D, JG, P, PS, and PW packages.

NA555 , NE555 , SA555 , SE555

PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

APPLICATION INFORMATION (continued)

Figure 13 shows typical waveforms generated during astable operation. The output high-level duration tHand low-level duration tLcan be calculated as follows:

Missing-Pulse Detector

The circuit shown in Figure 15 can be used to detect a missing pulse or abnormally long spacing between consecutive pulses in a train of pulses. The timing interval of the monostable circuit is retriggered continuously by the input pulse train as long as the pulse spacing is less than the timing interval. A longer pulse spacing, missing pulse, or terminated pulse train permits the timing interval to be completed, thereby generating an output pulse as shown in Figure 16 .

Figure 15. Circuit for Missing-Pulse Detector Figure 16. Completed Timing Waveforms for

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Figure 14. Free-Running Frequency

Missing-Pulse Detector

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Voltage − 2 V/div

Time − 0.1 ms/div

Capacitor Voltage

Output Voltage

Input Voltage

VCC = 5 V RA = 1250 Ω C = 0.02 µF See Figure 9

NA555 , NE555 , SA555 , SE555 PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

APPLICATION INFORMATION (continued)

Frequency Divider

By adjusting the length of the timing cycle, the basic circuit of Figure 9 can be made to operate as a frequency divider. Figure 17 shows a divide-by-three circuit that makes use of the fact that retriggering cannot occur during the timing cycle.

Figure 17. Divide-by-Three Circuit Waveforms

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THRES

GND

VCC (5 V to 15 V)

Output

DISCH

OUT

RESET

TRIG

CONT

Modulation

Input

(see Note A)

Clock

Input

NOTE A: The modulating signal can be direct or capacitively coupled

to CONT. For direct coupling, the effects of modulation source voltage and impedance on the bias of the timer should be considered.

4 8

Pin numbers shown are for the D, JG, P, PS, and PW packages.

Voltage − 2 V/div

Time − 0.5 ms/div

Capacitor Voltage

Output Voltage

Clock Input Voltage

RA = 3 kΩ C = 0.02 µF RL = 1 kΩ See Figure 18

ППППППП

Modulation Input Voltage

NA555 , NE555 , SA555 , SE555

PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

APPLICATION INFORMATION (continued)

Pulse-Width Modulation

The operation of the timer can be modified by modulating the internal threshold and trigger voltages, which is accomplished by applying an external voltage (or current) to CONT. Figure 18 shows a circuit for pulse-width modulation. A continuous input pulse train triggers the monostable circuit, and a control signal modulates the threshold voltage. Figure 19 shows the resulting output pulse-width modulation. While a sine-wave modulation signal is shown, any wave shape could be used.

Figure 18. Circuit for Pulse-Width Modulation Figure 19. Pulse-Width-Modulation Waveforms

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Voltage − 2 V/div

= 3 kΩ

RB = 500 Ω R

= 1 kΩ

See Figure 20

Capacitor Voltage

Output Voltage

ООООООО

Modulation Input Voltage

Time − 0.1 ms/div

Modulation

Input

(see Note A)

CONT

TRIG

RESET V

OUT

DISCH

VCC (5 V to 15 V)

GND

THRES

NOTE A: The modulating signal can be direct or capacitively coupled

to CONT. For direct coupling, the effects of modulation source voltage and impedance on the bias of the timer should be considered.

Pin numbers shown are for the D, JG, P, PS, and PW packages.

4 8

Output

NA555 , NE555 , SA555 , SE555 PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

APPLICATION INFORMATION (continued)

Pulse-Position Modulation

As shown in Figure 20 , any of these timers can be used as a pulse-position modulator. This application modulates the threshold voltage and, thereby, the time delay, of a free-running oscillator. Figure 21 shows a triangular-wave modulation signal for such a circuit; however, any wave shape could be used.

Figure 20. Circuit for Pulse-Position Modulation Figure 21. Pulse-Position-Modulation Waveforms

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RESET V

OUT

DISCH

GND

CONT

TRIG

4 8

THRES

0.01

CC = 14.7 µF RC = 100 kΩ

Output C

RESET V

OUT

DISCH

GND

CONT

TRIG

4 8

THRES

33 kΩ

0.001

0.01

µF

CB = 4.7 µF RB = 100 kΩ

Output BOutput A

RA = 100 kΩ

CA = 10 µF

µF

0.01

µF

0.001

33 kΩ

THRES

TRIG

CONT

GND

DISCH

OUT

RESET

µF

Pin numbers shown are for the D, JG, P, PS, and PW packages. NOTE A: S closes momentarily at t = 0.

Voltage − 5 V/div

t − Time − 1 s/div

See Figure 22

Output A

Output B

Output C

t = 0

twC = 1.1 RCC

twC

twB = 1.1 RBC

twA = 1.1 RAC

twA

twB

NA555 , NE555 , SA555 , SE555

PRECISION TIMERS

SLFS022F – SEPTEMBER 1973 – REVISED JUNE 2006

APPLICATION INFORMATION (continued)

Sequential Timer

Many applications, such as computers, require signals for initializing conditions during start-up. Other applications, such as test equipment, require activation of test signals in sequence. These timing circuits can be connected to provide such sequential control. The timers can be used in various combinations of astable or monostable circuit connections, with or without modulation, for extremely flexible waveform control. Figure 22 shows a sequencer circuit with possible applications in many systems, and Figure 23 shows the output waveforms.

Figure 23. Sequential Timer Waveforms

Figure 22. Sequential Timer Circuit

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PACKAGE OPTION ADDENDUM

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PACKAGING INFORMATION

Orderable Device Status

JM38510/10901BPA ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type

NA555D ACTIVE SOIC D 8 75 Green (RoHS &

NA555DG4 ACTIVE SOIC D 8 75 Green (RoHS &

NA555DR ACTIVE SOIC D 8 2500 Green (RoHS &

NA555DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

NA555P ACTIVE PDIP P 8 50 Pb-Free

NA555PE4 ACTIVE PDIP P 8 50 Pb-Free

NE555D ACTIVE SOIC D 8 75 Green (RoHS &

NE555DE4 ACTIVE SOIC D 8 75 Green (RoHS &

NE555DG4 ACTIVE SOIC D 8 75 Green (RoHS &

NE555DR ACTIVE SOIC D 8 2500 Green (RoHS &

NE555DRE4 ACTIVE SOIC D 8 2500 Green (RoHS &

NE555DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

NE555P ACTIVE PDIP P 8 50 Pb-Free

NE555PE4 ACTIVE PDIP P 8 50 Pb-Free

NE555PSLE OBSOLETE SO PS 8 TBD Call TI Call TI

NE555PSR ACTIVE SO PS 8 2000 Green (RoHS &

NE555PSRE4 ACTIVE SO PS 8 2000 Green (RoHS &

NE555PW ACTIVE TSSOP PW 8 150 Green (RoHS &

NE555PWE4 ACTIVE TSSOP PW 8 150 Green (RoHS &

NE555PWR ACTIVE TSSOP PW 8 2000 Green (RoHS &

NE555PWRE4 ACTIVE TSSOP PW 8 2000 Green (RoHS &

NE555Y OBSOLETE 0 TBD Call TI Call TI SA555D ACTIVE SOIC D 8 75 Green (RoHS &

SA555DE4 ACTIVE SOIC D 8 75 Green (RoHS &

SA555DG4 ACTIVE SOIC D 8 75 Green (RoHS &

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

no Sb/Br)

(RoHS)

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU N / A for Pkg Type

CU NIPDAU Level-1-260C-UNLIM

CU NIPDAU N / A for Pkg Type

CU NIPDAU Level-1-260C-UNLIM

31-Jul-2006

(3)

Addendum-Page 1

PACKAGE OPTION ADDENDUM

www.ti.com

Orderable Device Status

(1)

Package

Type

Package Drawing

Pins Package

Qty

Eco Plan

SA555DR ACTIVE SOIC D 8 2500 Green (RoHS &

(2)

Lead/Ball Finish MSL Peak Temp

CU NIPDAU Level-1-260C-UNLIM

31-Jul-2006

(3)

no Sb/Br)

SA555DRE4 ACTIVE SOIC D 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SA555DRG4 ACTIVE SOIC D 8 2500 Green (RoHS &

CU NIPDAU Level-1-260C-UNLIM

no Sb/Br)

SA555P ACTIVE PDIP P 8 50 Pb-Free

CU NIPDAU N / A for Pkg Type

(RoHS)

SA555PE4 ACTIVE PDIP P 8 50 Pb-Free

CU NIPDAU N / A for Pkg Type

(RoHS)

SE555D ACTIVE SOIC D 8 75 TBD CU NIPDAU Level-1-220C-UNLIM

SE555DR ACTIVE SOIC D 8 2500 TBD CU NIPDAU Level-1-220C-UNLIM

SE555FKB ACTIVE LCCC FK 20 1 TBD POST-PLATE N / A for Pkg Type

SE555JG ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type

SE555JGB ACTIVE CDIP JG 8 1 TBD A42 SNPB N / A for Pkg Type

SE555N OBSOLETE PDIP N 8 TBD Call TI Call TI SE555P ACTIVE PDIP P 8 50 Pb-Free

CU NIPDAU N / A for Pkg Type

(RoHS)

(1)

The marketing status values are defined as follows:

ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in

a new design.

PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device.

(2)

Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check

http://www.ti.com/productcontent for the latest availability information and additional product content details.

TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements

for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material)

(3)

MSL, Peak Temp. -- The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder

temperature.

Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.

In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.

Addendum-Page 2

MECHANICAL DATA

MCER001A – JANUARY 1995 – REVISED JANUARY 1997

JG (R-GDIP-T8) CERAMIC DUAL-IN-LINE

0.400 (10,16)

0.355 (9,00)

0.063 (1,60)

0.015 (0,38)

0.100 (2,54)

0.065 (1,65)

0.045 (1,14)

0.020 (0,51) MIN

0.023 (0,58)

0.015 (0,38)

0.280 (7,11)

0.245 (6,22)

0.310 (7,87)

0.290 (7,37)

0.200 (5,08) MAX Seating Plane

0.130 (3,30) MIN

0°–15°

0.014 (0,36)

0.008 (0,20)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a ceramic lid using glass frit. D. Index point is provided on cap for terminal identification.

E. Falls within MIL STD 1835 GDIP1-T8

4040107/C 08/96

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MLCC006B – OCTOBER 1996

FK (S-CQCC-N**) LEADLESS CERAMIC CHIP CARRIER

28 TERMINAL SHOWN

A SQ

B SQ

12826 27

1314151618 17

0.020 (0,51)

0.010 (0,25)

MIN

0.342 (8,69)

0.442

0.640

0.739

0.938

1.141

0.358 (9,09)

0.458

(11,63)

0.660

(16,76)

0.761

(19,32)(18,78)

0.962

(24,43)

1.165

(29,59)

(10,31)

(12,58)

NO. OF

TERMINALS

432

0.020 (0,51)

0.010 (0,25)

(11,23)

(16,26)

(23,83)

(28,99)

MINMAX

0.307 (7,80)

0.406

0.495

0.850 (21,6)

1.047 (26,6)

0.080 (2,03)

0.064 (1,63)

MAX

0.358 (9,09)

0.458

(11,63)

0.560

(14,22)

0.560

(14,22)

0.858 (21,8)

1.063 (27,0)

0.055 (1,40)

0.045 (1,14)

0.028 (0,71)

0.022 (0,54)

0.050 (1,27)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice. C. This package can be hermetically sealed with a metal lid. D. The terminals are gold plated.

E. Falls within JEDEC MS-004

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

0.045 (1,14)

0.035 (0,89)

0.045 (1,14)

0.035 (0,89)

4040140/D 10/96

MECHANICAL DATA

MPDI001A – JANUARY 1995 – REVISED JUNE 1999

P (R-PDIP-T8) PLASTIC DUAL-IN-LINE

0.400 (10,60)

0.355 (9,02)

0.260 (6,60)

0.240 (6,10)

0.021 (0,53)

0.015 (0,38)

NOTES: A. All linear dimensions are in inches (millimeters).

B. This drawing is subject to change without notice. C. Falls within JEDEC MS-001

0.070 (1,78) MAX

0.020 (0,51) MIN

0.200 (5,08) MAX

0.125 (3,18) MIN

0.100 (2,54)

0.010 (0,25)

Seating Plane

0.325 (8,26)

0.300 (7,62)

0.015 (0,38)

Gage Plane

0.010 (0,25) NOM

0.430 (10,92) MAX

4040082/D 05/98

For the latest package information, go to http://www.ti.com/sc/docs/package/pkg_info.htm

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

MECHANICAL DATA

MTSS001C – JANUARY 1995 – REVISED FEBRUARY 1999

PW (R-PDSO-G**) PLASTIC SMALL-OUTLINE PACKAGE

14 PINS SHOWN

0,65

1,20 MAX

0,30 0,19

4,50 4,30

PINS **

Seating Plane

0,15 0,05

DIM

6,60 6,20

0,10

0,15 NOM

2016

0°–8°

Gage Plane

0,25

0,75 0,50

A MAX

A MIN

NOTES: A. All linear dimensions are in millimeters.

B. This drawing is subject to change without notice. C. Body dimensions do not include mold flash or protrusion not to exceed 0,15. D. Falls within JEDEC MO-153

3,10

2,90

5,10

4,90

5,10

4,90

6,60

6,40

7,90

7,70

9,80

9,60

4040064/F 01/97

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

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TI warrants performance of its hardware products to the specifications applicable at the time of sale in accordance with TI’s standard warranty. Testing and other quality control techniques are used to the extent TI deems necessary to support this warranty . Except where mandated by government requirements, testing of all parameters of each product is not necessarily performed.

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TEXAS INSTRUMENTS NA555 Technical data

Specifications and Main Features

Frequently Asked Questions

User Manual