This manual describes the hardware of the Texas Instruments MSP-FET430 Flash Emulation Tool (FET).
The FET is the program development tool for the MSP430 ultra-low-power microcontroller. Both available
interface types, the parallel port interface and the USB interface, are described.
How to Use This Manual
Read and follow the instructions in Chapter 1. This chapter lists the contents of the FET, provides
instructions on installing the hardware and according software drivers. After you see how quick and easy it
is to use the development tools, TI recommends that you read all of this manual.
This manual describes the setup and operation of the FET but does not fully describe the MSP430™
microcontrollers or the development software systems. For details of these items, see the appropriate TI
documents listed in Section 1.18.
This manual applies to the following tools (and devices):
•MSP-FET430PIF (debug interface with parallel port connection, for all MSP430 flash-based devices)
•MSP-FET430UIF (debug interface with USB connection, for all MSP430 flash-based devices)
•eZ430-F2013 (USB stick form factor interface with attached MSP430F2013 target, for all
MSP430F20xx, MSP430G2x01, MSP430G2x11, MSP430G2x21 and MSP430G2x31 devices)
•eZ430-T2012 (three MSP430F2012 based target boards)
•eZ430-RF2500 (USB stick form factor interface with attached MSP430F2274/CC2500 target, for all
MSP430F20xx, MSP430F21x2, MSP430F22xx, MSP430G2x01, MSP430G2x11, MSP430G2x21 and
MSP430G2x31 devices)
•eZ430-RF2500T (one MSP430F2274/CC2500 target board including battery pack)
•eZ430-RF2500-SEH (USB stick form factor interface with attached MSP430F2274/CC2500 target and
solar energy harvesting module)
•eZ430-Chronos-xxx (USB stick form factor interface with CC430F6137 based development system
contained in a watch. Includes <1 GHz RF USB access point)
Preface
SLAU278F–May 2009–Revised December 2010
Read This First
SLAU278F–May 2009–Revised December 2010Read This First
•MSP-TS430RGC64B (for MSP430F530x devices in 64-pin RGC packages)
•MSP-TS430RGC64USB (for MSP430F550x, MSP430F551x, MSP430552x, devices in 64-pin RGC
packages)
•MSP-TS430PN80 (for MSP430F241x, MSP430F261x, MSP430F43x, MSP430F43x1, MSP430FG43x,
MSP430F47x, and MSP430FG47x devices in 80-pin PN packages)
•MSP-TS430PN80A (for MSP430F532x devices in 80-pin PN packages)
•MSP-TS430PN80USB (for MSP430F552x devices with USB peripheral in 80-pin PN packages)
•MSP-TS430PZ100 (for MSP430F43x, MSP430F43x1, MSP430F44x, MSP430FG461x, and
MSP430F47xx devices in 100-pin PZ packages)
•MSP-TS430PZ100A (for MSP430F471xx devices in 100-pin PZ packages — red PCB)
•MSP-TS430PZ5x100 (for MSP430F54xx(A) and the MSP430BT5190 devices in 100-pin PZ packages)
•MSP-TS430PZ100USB (for MSP430F663x and MSP430F563x devices in 100-pin PZ packages)
•EM430F5137RF900 (with integrated CC430F5137 IC in a 48-pin RGZ package)
•EM430F6137RF900 (with integrated CC430F6137 IC in a 64-pin RGC package)
These tools contain the most up-to-date materials available at the time of packaging. For the latest
materials (data sheets, user's guides, software, application information, etc.), visit the TI MSP430 web site
at www.ti.com/msp430 or contact your local TI sales office.
Information About Cautions and Warnings
This document may contain cautions and warnings.
Information About Cautions and Warnings
CAUTION
This is an example of a caution statement.
A caution statement describes a situation that could potentially damage your
software or equipment.
WARNING
This is an example of a warning statement.
A warning statement describes a situation that could potentially
cause harm to you.
The information in a caution or a warning is provided for your protection. Read each caution and warning
carefully.
SLAU278F–May 2009–Revised December 2010Read This First
CCS for MSP430 User's Guide, literature number SLAU157
Code Composer Studio v4.x Core Edition, CCS Mediawiki
IAR for MSP430 User's Guide, literature number SLAU138
IAR Embedded Workbench KickStart, SLAC050
eZ430-F2013 Development Tool User's Guide, literature number SLAU176
eZ430-RF2480 User's Guide, literature number SWRA176
eZ430-RF2500 Development Tool User's Guide, literature number SLAU227
eZ430-RF2500-SEH Development Tool User's Guide, literature number SLAU273
eZ430-Chronos Development Tool User's Guide, literature number SLAU292
MSP430xxxx device user's guides:
MSP430x1xx Family User's Guide, literature number SLAU049
MSP430x2xx Family User's Guide, literature number SLAU144
MSP430x3xx Family User's Guide, literature number SLAU012
MSP430x4xx Family User's Guide, literature number SLAU056
MSP430x5xx Family User's Guide, literature number SLAU208
CC430 Family User's Guide, literature number SLAU259
www.ti.com
If You Need Assistance
Support for the MSP430 devices and the FET development tools is provided by the Texas Instruments
Product Information Center (PIC). Contact information for the PIC can be found on the TI web site at
www.ti.com/support. The Texas Instruments E2E Community support forums for the MSP430 provide
open interaction with peer engineers, TI engineers, and other experts. Additional device-specific
information can be found on the MSP430 web site.
FCC Warning
This equipment is intended for use in a laboratory test environment only. It generates, uses, and can
radiate radio frequency energy and has not been tested for compliance with the limits of computing
devices pursuant to subpart J of part 15 of FCC rules, which are designed to provide reasonable
protection against radio-frequency interference. Operation of this equipment in other environments may
cause interference with radio communications, in which case, the user is required to take whatever
measures may be required to correct this interference at his own expense.
12
Read This FirstSLAU278F–May 2009–Revised December 2010
•One MSP-FET430UIF USB interface module. This is the unit that has a USB B-connector on one end
of the case, and a 2×7-pin male connector on the other end of the case.
•One USB cable
•One 32.768-kHz crystal from Micro Crystal (except MSP-FET430U24)
•A 2×7-pin male JTAG connector is also present on the PCB (see different setup for L092)
•One 14-Pin JTAG conductor cable
•One small box containing two MSP430 device samples (See table for Sample Type)
•One target socket module. To check the devices used for each board and a summary of the board,
see Table 1-2. MSP-TS430xx below is the target socket module for each MSP-FET430Uxx kit.
MSP-FET430U14: One MSP-TS430PW14 target socket module.
MSP-FET430U092: One MSP-TS430L092 target socket module with Active Cable.
MSP-FET430U24: One MSP-TS430PW24 target socket module.
MSP-FET430U28: One MSP-TS430PW28 target socket module.
MSP-FET430U28A: One MSP-TS430PW28A target socket module.
MSP-FET430U38: One MSP-TS430DA38 target socket module..
MSP-FET430U23x0: One MSP-TS430QFN23x0 (former name MSP-TS430QFN40) target socket
module.
MSP-FET430U40: One MSP-TS430RSB40 target socket module.
MSP-FET430U48: One MSP-TS430DL48 target socket module.
MSP-FET430U48B: One MSP-TS430RGZ48B target socket module.
MSP-FET430U64: One MSP-TS430PM64 target socket module.
MSP-FET430U64A: One MSP-TS430PM64A target socket module.
MSP-FET430U64B: One MSP-TS430RGC64B target socket module.
MSP-FET430U64USB: One MSP-TS430RGC64USB target socket module.
MSP-FET430U80: One MSP-TS430PN80 target socket module.
MSP-FET430U80A: One MSP-TS430PN80A target socket module.
MSP-FET430U80USB: One MSP-TS430PN80USB target socket module.
MSP-FET430U100: One MSP-TS430PZ100 target socket module.
MSP-FET430U100A: One MSP-TS430PZ100A target socket module
MSP-FET430U100B: One MSP-TS430PZ100B target socket module
MSP-FET430U5x100: One MSP-TS430PZ5x100 target socket module.
MSP-FET430U100USB: One MSP-TS430PZ100USB target socket module.
Consult the device data sheets for device specifications. Device errata can be found in the respective
device product folder on the web provided as a PDF document. Depending on the device, errata may also
be found in the device bug database at www.ti.com/sc/cgi-bin/buglist.cgi.
www.ti.com
16
Get Started Now!SLAU278F–May 2009–Revised December 2010
•Two target socket module
MSP-FET430F5137RF900: Two EM430F5137RF900 target socket modules. This is the PCB on which
is soldered a CC430F5137 device in a 48-pin RGZ package. A 2×7-pin male connector is also present
on the PCB
MSP-FET430F6137RF900: Two EM430F6137RF900 target socket modules. This is the PCB on which
is soldered a CC430F6137 device in a 64-pin RGC package. A 2×7-pin male connector is also present
on the PCB
See the device data sheets for device specifications. Device errata can be found in the respective device
product folder on the web provided as a PDF document. Depending on the device, errata may also be
found in the device bug database at www.ti.com/sc/cgi-bin/buglist.cgi.
1.13 Kit Contents, EM430Fx137RF900
•One READ ME FIRST document
•One legal notice
•One MSP430 CD-ROM
•Two target socket module
MSP-EM430F5137RF900: Two EM430F5137RF900 target socket modules. This is the PCB on which
is soldered a CC430F5137 device in a 48-pin RGZ package. A 2×7-pin male connector is also present
on the PCB
MSP-EM430F6137RF900: Two EM430F6137RF900 target socket modules. This is the PCB on which
is soldered a CC430F6137 device in a 64-pin RGC package. A 2×7-pin male connector is also present
on the PCB
•Two CC430EM battery packs
•Four AAA batteries
•Two 868-/915-MHz antennas
•Two 32.768-kHz crystals
•18 PCB 2×4-pin headers
Kit Contents, EM430Fx137RF900
2 x MSP430F5438IPZ
1.14 Hardware Installation, MSP-FET430PIF
Follow these steps to install the hardware for the MSP-FET430PIF tools:
1. Use the 25-conductor cable to connect the FET interface module to the parallel port of the PC. The
necessary driver for accessing the PC parallel port is installed automatically during CCE/CCS or IAR
Embedded Workbench installation. Note that a restart is required after the CCE/CCS or IAR
Embedded Workbench installation for the driver to become active.
2. Use the 14-conductor cable to connect the parallel-port debug interface module to a target board, such
as an MSP-TS430xxx target socket module. Module schematics and PCBs are shown in Appendix B.
SLAU278F–May 2009–Revised December 2010Get Started Now!
Follow these steps to install the hardware for the MSP-FET430UIF tool:
1. Use the USB cable to connect the USB-FET interface module to a USB port on the PC. The USB FET
should be recognized, as the USB device driver should have been installed with the IDE (Code
Composer Essentials/Studio or IAR Embedded Workbench).. If the install wizard starts, follow the
prompts and point the wizard to the driver files.
The default location for CCE is C:\Program Files\Texas Instruments\MSP430_USB_DRIVERS_v3\.
The default location for CCS is C:\Program Files\Texas Instruments\ccs4\emulation\drivers\msp430\.
The default location for IAR Embedded Workbench is <Installation Root>\Embedded Workbench x.x\
430\bin\WinXP.
Detailed driver installation instructions can be found in Appendix C.
2. After connecting to a PC, the USB FET performs a self-test during which the red LED flashes for
approximately two seconds. If the self-test passes successfully, the green LED stays on.
3. Use the 14-conductor cable to connect the USB-FET interface module to a target board, such as an
MSP-TS430xxx target socket module.
4. Ensure that the MSP430 device is securely seated in the socket, and that its pin 1 (indicated with a
circular indentation on the top surface) aligns with the "1" mark on the PCB.
5. Compared to the parallel-port debug interface, the USB FET has additional features including JTAG
security fuse blow and adjustable target VCC(1.8 V to 3.6 V). Supply the module with up to 100 mA.
Follow these steps to install the hardware for the eZ430-F2013 and eZ430-RF2500 tools:
1. Connect the eZ430-F2013, eZ430-RF2500 and eZ430-Chronos to a USB port of the PC.
2. The USB FET should be recognized by the PC. The USB device driver should have been installed with
the IDE (Code Composer Studio or IAR Embedded Workbench - Code Composer Essentials only
supports eZ430-F2013 and eZ430-RF2500). If the install wizard starts, follow the prompts and point
the wizard to the driver files.
The default location for CCE is C:\Program Files\Texas Instruments\MSP430_USB_DRIVERS_v3\.
The default location for CCS is C:\Program Files\Texas Instruments\ccs4\emulation\drivers\msp430\.
The default location for IAR Embedded Workbench is <Installation Root>\Embedded Workbench x.x\
430\bin\WinXP.
Detailed driver installation instructions can be found in Appendix C.
1.18 Important MSP430 Documents on the CD-ROM and Web
The primary sources of MSP430 information are the device-specific data sheet and user's guide. The most
up-to-date versions of these documents that are available at the time of production are provided on the
CD-ROM included with this tool. The MSP430 web site (www.ti.com/msp430) contains the most recent
version of these documents.
PDF documents describing the CCS tools (CCS IDE, the assembler, the C compiler, the linker, and the
librarian) are in the msp430\documentation folder. A Code Composer Studio specific Wiki page (FAQ) is
available, and the Texas Instruments E2E Community support forums for the MSP430 and Code
Composer Studio v4 provide additional help besides the product help and Welcome page.
PDF documents describing the IAR tools (Workbench/C-SPY, the assembler, the C compiler, the linker,
and the librarian) are in the common\doc and 430\doc folders. Supplements to the documents (i.e., the
latest information) are available in HTML format in the same directories. 430\doc\readme_start.htm
provides a convenient starting point for navigating the IAR documentation.
SLAU278F–May 2009–Revised December 2010Get Started Now!
With the proper connections, the debugger and an FET hardware JTAG interface (such as the
MSP-FET430PIF and MSP-FET430UIF) can be used to program and debug code on the target board. In
addition, the connections also support the MSP-GANG430 or MSP-PRGS430 production programmers,
thus providing an easy way to program prototype boards, if desired.
Figure 2-1 shows the connections between the 14-pin FET interface module connector and the target
device required to support in-system programming and debugging for 4-wire JTAG communication.
Figure 2-2 shows the connections for 2-wire JTAG mode (Spy-Bi-Wire). While 4-wire JTAG mode is
supported on all MSP430 devices, 2-wire JTAG mode is available on selected devices only. See the CCSUser's Guide for MSP430 (SLAU157) or IAR for MSP430 User's Guide (SLAU138) for information on
which interface method can be used on which device.
The connections for the FET interface module and the MSP-GANG430 or MSP-PRGS430 are identical.
Both the FET interface module and MSP-GANG430 can supply VCCto the target board (via pin 2). In
addition, the FET interface module and MSP-GANG430 have a VCC-sense feature that, if used, requires
an alternate connection (pin 4 instead of pin 2). The VCC-sense feature senses the local VCCpresent on the
target board (i.e., a battery or other local power supply) and adjusts the output signals accordingly. If the
target board is to be powered by a local VCC, then the connection to pin 4 on the JTAG should be made,
and not the connection to pin 2. This utilizes the VCC-sense feature and prevents any contention that might
occur if the local on-board VCCwere connected to the VCCsupplied from the FET interface module or the
MSP-GANG430. If the VCC-sense feature is not necessary (i.e., the target board is to be powered from the
FET interface module or the GANG430) the VCCconnection is made to pin 2 on the JTAG header and no
connection is made to pin 4. Figure 2-1 and Figure 2-2 show a jumper block that supports both scenarios
of supplying VCCto the target board. If this flexibility is not required, the desired VCCconnections may be
hard-wired eliminating the jumper block. Pins 2 and 4 must not be connected simultaneously.
Note that in 4-wire JTAG communication mode (see Figure 2-1), the connection of the target RST signal
to the JTAG connector is optional when using devices that support only 4-wire JTAG communication
mode. However, when using devices that support 2-wire JTAG communication mode in 4-wire JTAG
mode, the RST connection must be made. The MSP430 development tools and device programmers
perform a target reset by issuing a JTAG command to gain control over the device. However, if this is
unsuccessful, the RST signal of the JTAG connector may be used by the development tool or device
programmer as an additional way to assert a device reset.
www.ti.com
24
Design Considerations for In-Circuit ProgrammingSLAU278F–May 2009–Revised December 2010
Signal Connections for In-System Programming and Debugging
AMake either connection J1 in case a local target power supply is used or connection J2 to power target from the
debug/programming adapter.
BThe RST/NMI pin R1/C1 configuration is device family dependent. See the respective MSP430 family user's guide for
the recommended configuration.
CThe TEST pin is available only on MSP430 family members with multiplexed JTAG pins. See the device-specific data
sheet to determine if this pin is available.
DThe connection to the JTAG connector RST pin is optional when using 4-wire JTAG communication mode
capable-only devices and not required for device programming or debugging. However, this connection is required
when using 2-wire JTAG communication mode capable devices in 4-wire JTAG mode.
EWhen using 2-wire JTAG communication capable devices in 4-wire JTAG mode, the upper limit for C1 should not
exceed 2.2 nF. This applies to both TI FET interface modules (LPT/USB FET).
Figure 2-1. Signal Connections for 4-Wire JTAG Communication
SLAU278F–May 2009–Revised December 2010Design Considerations for In-Circuit Programming
Signal Connections for In-System Programming and Debugging
www.ti.com
AMake either connection J1 in case a local target power supply is used or connection J2 to power target from the
debug/programming adapter.
BThe device RST/NMI/SBWTDIO pin is used in 2-wire mode for bidirectional communication with the device during
JTAG access and that any capacitance attached to this signal may affect the ability to establish a connection with the
device. The upper limit for C1 is 2.2 nF when using current TI FET interface modules (USB FET).
CR2 protects the JTAG debug interface TCK signal from the JTAG security fuse blow voltage that is supplied by the
TEST/VPP pin during the fuse blow process. If fuse blow functionality is not needed, R2 is not required (populate
0 ?), and do not connect TEST/VPP to TEST/SBWTCK.
Figure 2-2. Signal Connections for 2-Wire JTAG Communication (Spy-Bi-Wire)
26
Design Considerations for In-Circuit ProgrammingSLAU278F–May 2009–Revised December 2010
The PC parallel port can source a limited amount of current. Because of the ultra-low-power requirement
of the MSP430, a standalone FET does not exceed the available current. However, if additional circuitry is
added to the tool, this current limit could be exceeded. In this case, external power can be supplied to the
tool via connections provided on the target socket modules. See the schematics and pictorials of the
target socket modules in Appendix B to locate the external power connectors.
The MSP-FET430UIF can supply targets with up to 100 mA through pin 2 of the 14-pin connector. VCCfor
the target can be selected between 1.8 V and 5 V in steps of 0.1 V. Alternatively, the target can be
supplied externally. In this case, the external voltage should be connected to pin 4 of the 14-pin connector.
The MSP-FET430UIF then adjusts the level of the JTAG signals to external VCCautomatically. Only pin 2
(MSP-FET430UIF supplies target) or pin 4 (target is externally supplied) must be connected; not both at
the same time.
When a target socket module is powered from an external supply, the external supply powers the device
on the target socket module and any user circuitry connected to the target socket module, and the FET
interface module continues to be powered from the PC via the parallel port. If the externally supplied
voltage differs from that of the FET interface module, the target socket module must be modified so that
the externally supplied voltage is routed to the FET interface module (so that it may adjust its output
voltage levels accordingly). See the target socket module schematics in Appendix B.
2.3Bootstrap Loader (BSL)
The JTAG pins provide access to the flash memory of the MSP430Fxxx devices. On some devices, these
pins are shared with the device port pins, and this sharing of pins can complicate a design (or sharing may
not be possible). As an alternative to using the JTAG pins, most MSP430Fxxx devices contain a program
(a "bootstrap loader") that permits the flash memory to be erased and programmed using a reduced set of
signals. The MSP430 Programming Via the Bootstrap Loader User's Guide (SLAU319) describes this
interface. TI does not produce a BSL tool. However, customers can easily develop their own BSL tools
using the information in the application reports, or BSL tools can be purchased from third parties. See the
MSP430 web site for the application reports and a list of MSP430 third-party tool developers.
TI suggests that MSP430Fxxx customers design their circuits with the BSL in mind (i.e., TI suggests
providing access to these signals via, for example, a header).
See FAQ Hardware #11 for a second alternative to sharing the JTAG and port pins.
External Power
SLAU278F–May 2009–Revised December 2010Design Considerations for In-Circuit Programming
1. The state of the device (CPU registers, RAM memory, etc.) is undefined following a reset.
Exceptions to the above statement are that the PC is loaded with the word at 0xFFFE (i.e., the reset
vector), the status register is cleared, and the peripheral registers (SFRs) are initialized as documented
in the device family user's guides. The CCE/CCS debugger and C-SPY reset the device after
programming it.
2. MSP430F22xx Target Socket Module (MSP-TS430DA38) – Important Information
Due to the large capacitive coupling introduced by the device socket between the adjacent signals
XIN/P2.6 (socket pin 6) and RST/SBWTDIO (socket pin 7), in-system debugging can disturb the
LFXT1 low-frequency crystal oscillator operation (ACLK). This behavior applies only to the Spy-Bi-Wire
(2-wire) JTAG configuration and only to the period while a debug session is active.
Workarounds:
•Use the 4-wire JTAG mode debug configuration instead of the Spy-Bi-Wire (2-wire) JTAG
configuration. This can be achieved by placing jumpers JP4 through JP9 accordingly.
•Use the debugger option "Run Free" that can be selected from the Advanced Run drop-down
menu (at top of Debug View). This prevents the debugger from accessing the MSP430 while the
application is running. Note that, in this mode, a manual halt is required to see if a breakpoint was
hit. See the IDE documentation for more information on this feature.
•Use an external clock source to drive XIN directly.
3. With current interface hardware and software, there is a weakness when adapting target boardsthat are powered externally. This leads to an accidental fuse check in the MSP430. This is valid for
PIF and UIF but is mainly seen on UIF. A solution is being developed.
Workarounds:
•Connect RST/NMI pin to JTAG header (pin 11), LPT/USB tools are able to pull the RST line, which
also resets the device internal fuse logic.
•Use the debugger option "Release JTAG On Go" that can be selected from the IDE drop-down
menu. This prevents the debugger from accessing the MSP430 while the application is running.
Note that in this mode, a manual halt is required to see if a breakpoint was hit. See the IDE
documentation for more information on this feature.
•Use an external clock source to drive XIN directly.
4. The 14-conductor cable connecting the FET interface module and the target socket module must notexceed 8 inches (20 centimeters) in length.
5. The signal assignment on the 14-conductor cable is identical for the parallel port interface and the
USB FET.
6. To utilize the on-chip ADC voltage references, C6 (10 ?F, 6.3 V, low leakage) must be installed on
the target socket module.
7. To utilize the charge pump on the devices with LCD+ Module, C4 (10 ?F, low leakage) must beinstalled on the target socket module.
8. Crystals/resonators Q1 and Q2 (if applicable) are not provided on the target socket module. For
MSP430 devices that contain user-selectable loading capacitors, the effective capacitance is the
selected capacitance plus 3 pF (pad capacitance) divided by two.
9. Crystals/resonators have no effect upon the operation of the tool and the CCE/CCS debugger orC-SPY (as any required clocking/timing is derived from the internal DCO/FLL).
10. On 20-pin and 28-pin devices with multiplexed port/JTAG pins (P1.4 to P1.7), to use these pin in
their port capacity:
For CCE/CCS: "Run Free" (in Run pull-down menu at top of Debug View) must be selected.
For C-SPY: "Release JTAG On Go" must be selected.
11. As an alternative to sharing the JTAG and port pins (on 20 and 28 pin devices), consider usingan MSP430 device that is a "superset" of the smaller device. A very powerful feature of the
MSP430 is that the family members are code and architecturally compatible, so code developed on
one device (for example, one without shared JTAG and port pins) ports effortlessly to another
(assuming an equivalent set of peripherals).
www.ti.com
30
Frequently Asked Questions and Known IssuesSLAU278F–May 2009–Revised December 2010