The MPY634 is a wide bandwidth, high accuracy, fourquadrant analog multiplier. Its accurately laser-trimmed
multiplier characteristics make it easy to use in a wide
variety of applications with a minimum of external parts,
often eliminating all external trimming. Its differential X, Y,
and Z inputs allow configuration as a multiplier, squarer,
divider, square-rooter, and other functions while maintaining high accuracy.
The wide bandwidth of this new design allows signal
processing at IF, RF, and video frequencies. The internal
output amplifier of the MPY634 reduces
design complexity compared to other high frequency multipliers and balanced modulator circuits. It is
capable of performing frequency mixing, balanced modulation, and demodulation with excellent carrier rejection.
An accurate internal voltage reference provides
precise setting of the scale factor. The differential Z input
allows user-selected scale factors from 0.1 to 10 using
external feedback resistors.
+V
S
–V
S
X
1
X
2
Y
1
Y
2
Z
1
Z
2
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
All trademarks are the property of their respective owners.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
* Specification same as for MPY634AM.
Gray indicates obsolete parts.
NOTES: (1) Figures given are percent of full scale, ±10V (i.e., 0.01% = 1mV). (2) May be reduced to 3V using external resistor between –V
component due to nonlinearity; excludes effect of offsets.
* Specification same as for MPY634AM/BM.
NOTE: Gray indicates obsolete parts.
OBSOLETEOBSOLETE
S
**
1
1
2
Input
NC
NC
Input
Input
NC
1
2
3
4
5
6
7
8
SOIC: MPY634KUDIP: MPY634KP
X
14
+V
S
13
NC
12
Output
11
Z
Input
1
10
Z
Input
2
9
NC
8
–V
S
X2 Input
Scale Factor
Y
Y
16
+V
S
15
NC
14
Output
13
Z
Input
1
12
Z
Input
2
11
NC
10
–V
S
9
NC
ORDERING INFORMATION
Basic Model Number
Performance Grade
K: U: –40°C to +85°C
Package Code
P: Plastic 14-pin DIP
U: 16-pin SOIC
NOTE: (1) Performance grade identifier may not be marked on the SOIC
package; a blank denotes “K” grade.
(1)
MPY634( )( )
PACKAGE INFORMATION
PRODUCTPACKAGENUMBER
MPY634KP14-Pin PDIP010
MPY634KU16-Pin SOIC211
NOTE: (1) For the most current package and ordering information, see the
Package Option Addendum located at the end of this data sheet.
(1)
PACKAGE DRAWING
MPY634
SBFS017A
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3
TYPICAL PERFORMANCE CURVES
At TA = +25°C, VS = ±15VDC, unless otherwise noted.
–20
FEEDTHROUGH vs FREQUENCY
–40
X Feedthrough
–60
Y Feedthrough
–80
Feedthrough Attenuation (dB)
–100
1001k10k1M10M100M
100k
Frequency (Hz)
COMMON-MODE REJECTION RATIO vs FREQUENCY
90
80
70
60
Typical for all inputs
50
40
CMRR (dB)
30
20
10
0
100100M
10k1M10M
Frequency (Hz)
10
FREQUENCY RESPONSE AS A MULTIPLIER
Normal Connection
0
CL = 0pF
–10
With X10 Feedback
–20
Output Response (dB)
Attenuator
–30
1k10k100k1M10M100M
Frequency (Hz)
FEEDTHROUGH vs TEMPERATURE
–50
–60
fY = 500kHz
V
= nulled
X
–70
nulled at 25°C
Feedthrough Attenuation (dB)
–80
–60
–202060100140–4004080120
Temperature (°C)
C
= 1000pF
L
NOISE SPECTRAL DENSITY
1.5
1.25
1
0.75
Noise Spectral Density (µV/√Hz)
0.5
1010010k100k
vs FREQUENCY
1k
Frequency (Hz)
4
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60
FREQUENCY RESPONSE AS A DIVIDER
VX = 100mVDC
V
= 10mVrms
40
(dB)
2
/V
0
20
Output, V
Z
= 1VDC
V
X
V
= 100mVrms
Z
= 10VDC
V
X
V
= 100mVrms
Z
0
–20
1k10k100k1M10M100M
Frequency (Hz)
MPY634
SBFS017A
TYPICAL PERFORMANCE CURVES (CONT)
TA = +25°C, VS = ±15VDC, unless otherwise noted.
INPUT/OUTPUT SIGNAL RANGE
vs SUPPLY VOLTAGES
14
INPUT DIFFERENTIAL-MODE/
COMMON-MODE VOLTAGE
10
V
CM
12
Output, RL ≥ 2kΩ
10
All inputs, SF = 10V
8
6
Peak Positive or Negative Signal (V)
4
81012161820
Positive or Negative Supply (V)
14
Bias Current (nA)
800
700
600
500
400
300
200
100
BIAS CURRENTS vs TEMPERATURE
0
–60
–20060100140
(X,Y or Z Inputs)
Scaling Voltage = 10V
Scaling Voltage = 3V
20–404080120
Temperature (°C)
5
Specified
Accuracy
–1212
Functional
Derated Accuracy
–5510–10
VS = ±15V
–5
–10
V
DIFF
THEORY OF OPERATION
The transfer function for the MPY634 is:
V
OUT
where:
A = open-loop gain of the output amplifier (typically
85dB at DC).
SF = Scale Factor. Laser-trimmed to 10V but adjustable
over a 3V to 10V range using external resistors.
X, Y, Z are input voltages. Full-scale input voltage
is equal to the selected SF. (Max input voltage =
±1.25 SF).
An intuitive understanding of transfer function can be gained
by analogy to the op amp. By assuming that the open-loop
gain, A, of the output operational amplifier is infinite,
MPY634
SBFS017A
(X1 – X2) (Y1 – Y2)
= A – (Z1 – Z2)
SF
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inspection of the transfer function reveals that any V
OUT
can
be created with an infinitesimally small quantity within the
brackets. Then, an application circuit can be analyzed by
assigning circuit voltages for all X, Y and Z inputs and
setting the bracketed quantity equal to zero. For example,
the basic multiplier connection in Figure 1, Z1 = V
OUT
and
Z2 = 0. The quantity within the brackets then reduces to:
(X1 – X2) (Y1 – Y2)
– (V
SF
OUT
– 0) = 0
This approach leads to a simple relationship which can be
solved for V
to provide the closed-loop transfer function.
OUT
The scale factor is accurately factory adjusted to 10V and is
typically accurate to within 0.1% or less. The scale factor
may be adjusted by connecting a resistor or potentiometer
between pin SF and the –VS power supply. The value of the
external resistor can be approximated by:
5
RSF = 5.4kΩ
SF
10 – SF
Internal device tolerances make this relationship accurate to
within approximately 25%. Some applications can benefit
from reduction of the SF by this technique. The reduced
input bias current, noise, and drift achieved by this technique
can be likened to operating the input circuitry in a higher
gain, thus reducing output contributions to these effects.
Adjustment of the scale factor does not affect bandwidth.
The MPY634 is fully characterized at V
= ±15V but
S
operation is possible down to ±8V with an attendant reduction of input and output range capability. Operation at
voltages greater than ±15V allows greater output swing to be
achieved by using an output feedback attenuator (Figure 1).
As with any wide bandwidth circuit, the power supplies
should be bypassed with high frequency ceramic capacitors.
These capacitors should be located as near as practical to the
power supply connections of the MPY634. Improper bypassing can lead to instability, overshoot, and ringing in the
output.
X Input
±10V FS
±12V PK
Y Input
±10V FS
±12V PK
+V
X
1
X
Out
2
MPY634
SFZ
Y
1
Y
–V
2
+15V
S
1
Z
2
–15V
S
10kΩ
V
, ±12V PK
OUT
= (X
– X2) (Y1 – Y2)
1
(Scale = 1V)
90kΩ
Optional
Peaking
Capacitor
C
= 200pF
F
FIGURE 1. Connections for Scale-Factor of Unity.
BASIC MULTIPLIER CONNECTION
Figure 2 shows the basic connection as a multiplier. Accuracy is fully specified without any additional user-trimming
circuitry. Some applications can benefit from trimming of
one or more of the inputs. The fully differential inputs
facilitate referencing the input quantities to the source voltage common terminal for maximum accuracy. They also
allow use of simple offset voltage trimming circuitry as
shown on the X input.
The differential Z input allows an offset to be summed in
V
. In basic multiplier operation, the Z2 input serves as
OUT
the output voltage ground reference and should be connected
to the ground of the driven system for maximum accuracy.
A method of changing (lowering) SF by connecting to the
SF pin was discussed previously. Figure 1 shows an alternative method of changing the effective SF of the overall
circuit by using an attenuator in the feedback connection to
Z1. This method puts the output amplifier in a higher gain
and is thus accompanied by a reduction in bandwidth and an
+15V
V
OUT
– X2) (Y1 – Y2)
(X
1
=
–15V
, ±12V PK
10V
Optional
Summing
Z, ±10V PK
+ Z2
Input,
+15V
50kΩ
–15V
Optional Offset
Trim Circuit
X Input
±10V FS
±12V PK
470kΩ
Y Input
±10V FS
±12V PK
1kΩ
+V
X
1
X
Out
2
MPY634
SFZ
Y
1
Y
–V
2
S
1
Z
2
S
FIGURE 2. Basic Multiplier Connection.
increase in output offset voltage. The larger output offset
may be reduced by applying a trimming voltage to the high
impedance input, Z
.
2
The flexibility of the differential Z inputs allows direct
conversion of the output quantity to a current. Figure 3
shows the output voltage differentially-sensed across a series resistor forcing an output-controlled current. Addition
of a capacitor load then creates a time integration function
useful in a variety of applications such as power computation.
X Input
±10V FS
±12V PK
Y Input
±10V FS
±12V PK
+V
X
1
X
Out
2
MPY634
SFZ
Y
1
Y
–V
2
S
1
Z
2
S
+15V
I
=
OUT
– X2) (Y1 – Y2)
(X
1
x
10V
Current
Sensing
Resistor,
R
, 2kΩ
–15V
S
min
1
R
S
Integrator
Capacitor
(see text)
FIGURE 3. Conversion of Output to Current.
SQUARER CIRCUIT (FREQUENCY DOUBLER)
Squarer, or frequency doubler, operation is achieved by
paralleling the X and Y inputs of the standard multiplier
circuit. Inverted output can be achieved by reversing the
differential input terminals of either the X or Y input.
Accuracy in the squaring mode is typically a factor of two
better than the specified multiplier mode with maximum
error occurring with small (less than 1V) inputs. Better
accuracy can be achieved for small input voltage levels by
reducing the scale factor, SF.
DIVIDER OPERATION
The MPY634 can be configured as a divider as shown in
Figure 4. High impedance differential inputs for the numerator and denominator are achieved at the Z and X inputs,
Hello
6
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MPY634
SBFS017A
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