Texas Instruments CY74FCT2541CTSOCT, CY74FCT2541CTSOC, CY74FCT2541CTQCT, CY74FCT2541CTQC, CY74FCT2541ATSOCT Datasheet

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8-Bit Buffer/Line Drive
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CY74FCT2541T
SCCS041 - September 1994 - Revised March 2000
Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.
Copyright © 2000, Texas Instruments Incorporated
Function and pinout compatible with FCT and F logic
FCT-C speed at 4.1 ns max.
FCT-A speed at 4.8 ns max.
25outputseriestoreducetransmissionlinereflection
noise
Reduced V
OH
(typically = 3.3V) versions of equivalent
FCT functions
Edge-rate control circuitry for significantly improved
noise characteristics
Power-off disable feature
ESD > 2000V
Matched rise and fall times
• Fully compatible with TTLinput andoutput logic levels
• Sink current 12 mA Source current 15 mA
• Extended commercial temp. range of –40˚C to +85˚C
• Three-state outputs
Functional Description
The FCT2541T is an octal buffer and line driver designed to be employed as a memory address dr iver, clock dr iver, andbus-oriented transmitter/receiv er .On-chiptermination resistors havebeen addedto the outputs to reducesystem noisecaused by reflections.The FCT2541Tcan beused toreplacethe FCT541Tto reduce noisein an existingdesign. The speed ofthe FCT2541T is comparableto bipolar logiccounterpartswhile reducing powerdis­sipation. The input and output voltage lev els allow direct interface with TTL and CMOS devices without e xternal components.
The outputs are designed with a power-off disable feature to allow for live insertion of boards.
]
Logic Block Diagram
Pin Configurations
1 2 3
4 5 6 7 8 9 10 11
12
16
17
18
19
20
13
14
V
CC
FCT2541T–2
15
SOIC/QSOP
Top View
GND
FCT2541T
–3
O
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
OE
B
OE
A
O
0
D
1
D
2
D
3
D
4
D
5
D
6
D
7
D
0
O
1
O
2
O
3
O
4
O
5
O
6
O
7
OE
B
OE
A
Function Table
[1]
Inputs
OutputOE
A
OE
B
D
L L
H
L L
H
L H X
L H Z
Note:
1. H = HIGH Voltage Level L = LOW Voltage Level X = Don’t Care Z = High Impedance
CY74FCT2541T
2
Maximum Ratings
[2,3]
(Above which theuseful life may be impaired.For user guide­lines, not tested.)
Storage Temperature .....................................−65°C to +150°C
Ambient Temperature with
Power Applied..................................................−65°C to +135°C
Supply Voltage to Ground Potential..................−0.5V to +7.0V
DC Input Voltage .................................................−0.5V to +7.0V
DC Output Voltage..............................................−0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......120 mA
Power Dissipation..........................................................0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Operating Range
Range
Ambient
Temperature V
CC
Commercial 40°C to +85°C 5V ± 5%
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions Min. Typ.
[5]
Max. Unit
V
OH
Output HIGH Voltage VCC= Min., IOH= 15 mA 2.4 3.3 V
V
OL
Output LOW Voltage VCC= Min., IOL= 12 mA 0.3 0.55 V
R
OUT
Output Resistance VCC= Min., IOL= 12 mA 20 25 40
V
IH
Input HIGH Voltage 2.0 V
V
IL
Input LOW Voltage 0.8 V
V
H
Hysteresis
[6]
All inputs 0.2 V
V
IK
Input Clamp Diode Voltage VCC= Min., IIN= 18 mA 0.7 1.2 V
I
I
Input HIGH Current VCC= Max., VIN= V
CC
5 µA
I
IH
Input HIGH Current VCC= Max., VIN= 2.7V ±1 µA
I
IL
Input LOW Current VCC= Max., VIN= 0.5V ±1 µA
I
OZH
Off State HIGH-Level Output Current
VCC= Max., V
OUT
= 2.7V 15 µA
I
OZL
Off State LOW-Level Output Current
VCC = Max., V
OUT
= 0.5V 15 µA
I
OS
Output Short Circuit Current
[7]
VCC= Max., V
OUT
= 0.0V 60 120 225 mA
I
OFF
Power-Off Disable VCC= 0V, V
OUT
= 4.5V ±1 µA
Capacitance
[6]
Parameter Description Typ.
[5]
Max. Unit
C
IN
Input Capacitance 5 10 pF
C
OUT
Output Capacitance 9 12 pF
Notes:
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V
CC
or ground.
4. TA is the “instant on” case temperature.
5. Typical values are at VCC=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more thanone output shouldbeshorted ata time. Duration of shortshould not exceedone second. The useof high-speed testapparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of a high outputmayraisethe chip temperature wellabovenormaland thereby cause invalidreadings in otherparametrictests.In any sequence ofparameter tests, IOS tests should be performed last.
CY74FCT2541T
3
Power Supply Characteristics
Parameter Description Test Conditions Typ.
[5]
Max. Unit
I
CC
Quiescent Power Supply Current
VCC=Max., VIN≤0.2V, V
IN≥VCC
0.2V
0.1 0.2 mA
I
CC
Quiescent Power Supply Current (TTL inputs)
VCC=Max., VIN=3.4V,
[8]
f1=0, Outputs Open
0.5 2.0 mA
I
CCD
Dynamic Power Supply Current
[9]
VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling, OEA=OEB=GND, VIN≤0.2V or V
IN≥VCC
0.2V
0.06 0.12 mA/ MHz
I
C
Total Power Supply Current
[10]
VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f
1
=10 MHz,
OEA=OEB=GND, VIN≤0.2V or VIN≥VCC−0.2V
0.7 1.4 mA
VCC=Max., 50% Duty Cycle, Outputs Open, One Bit Toggling at f
1
=10 MHz,
OEA=OEB=GND, VIN=3.4V or VIN=GND
1.0 2.4 mA
VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f
1
=2.5 MHz,
OEA=OEB=GND, VIN≤0.2V or VIN≥VCC−0.2V
1.3 2.6
[11]
mA
VCC=Max., 50% Duty Cycle, Outputs Open, Eight Bits Toggling at f
1
=2.5 MHz,
OEA=OEB=GND, VIN=3.4V or VIN=GND
3.3 10.6
[11]
mA
Switching Characteristics Over the Operating Range
[12]
Parameter Description
CY74FCT2541T CY74FCT2541AT CY74FCT2541AT Unit
Fig.
No.
[13]
Min. Max. Min. Max. Min. Max.
t
PLH
t
PHL
Propagation Delay Data to Output
1.5 8.0 1.5 4.8 1.5 4.1 ns 1, 3
t
PZH
t
PZL
Output Enable Time 1.5 10.0 1.5 6.2 1.5 5.8 ns 1, 7, 8
t
PHZ
t
PLZ
Output Disable Time 1.5 9.5 1.5 5.6 1.5 5.2 ns 1, 7, 8
Notes:
8. Per TTL driven input (V
IN
=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
10. I
C
=I
QUIESCENT
+ I
INPUTS
+ I
DYNAMIC
IC=ICC+ICCDHNT+I
CCD(f0
/2 + f1N1)
I
CC
= Quiescent Current with CMOS input levels
I
CC
= Power Supply Current for a TTL HIGH input (VIN=3.4V)
D
H
= Duty Cycle for TTL inputs HIGH
N
T
= Number of TTL inputs at D
H
I
CCD
= Dynamic Current caused by an input transition pair (HLH or LHL)
f
0
= Clock frequency for registered devices, otherwise zero
f
1
= Input signal frequency
N
1
= Number of inputs changing at f
1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
CY74FCT2541T
4
Ordering Information
Speed
(ns) Ordering Code
Package
Name Package Type
Operating
Range
4.1 CY74FCT2541CTQCT Q5 20-Lead (150-Mil) QSOP Commercial CY74FCT2541CTSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC
4.8 CY74FCT2541ATQCT Q5 20-Lead (150-Mil) QSOP Commercial CY74FCT2541ATSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC
8.0 CY74FCT2541TQCT Q5 20-Lead (150-Mil) QSOP Commercial CY74FCT2541TSOC/SOCT S5 20-Lead (300-Mil) Molded SOIC
Document #: 3800342A
CY74FCT2541T
5
Package Diagrams
20-Lead Quarter Size Outline Q5
20-Lead (300-Mil) Molded SOIC
S5
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Copyright 2000, Texas Instruments Incorporated
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