Texas Instruments CY74FCT2574ATQCT, CY74FCT2574ATQC, CY74FCT2574TSOCT, CY74FCT2574TSOC, CY74FCT2574CTSOCT Datasheet

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8-Bit Registers
CY74FCT2374T
CY74FCT2574T
SCCS040 - September 1994 - Revised March 2000
Data sheet acquired from Cypress Semiconductor Corporation. Data sheet modified to remove devices not offered.
Copyright © 2000, Texas Instruments Incorporated
Features
•25Ωoutputseriesresistorstoreducetransmissionline
reflection noise
• FCT-C speed at 5.2 ns max.
• Reduced V
OH
(typically=3.3V) versions of equivalent
FCT functions
• Edge-rate control circuitry for significantly improved noise characteristics
• Power-off disable feature
• Matched rise and fall times
• Fully compatible with TTL input and output logic levels
• ESD > 2000V
• Sink current 12 mA Source current 15 mA
• Edge-triggered D-type inputs
• 250 MHz typical toggle rate
• Extended commercial temp. range of –40˚C to +85˚C
Functional Description
The FCT2374T and FCT2574T are high-speed low-power octalD-typeflip-flops featuring separate D-type inputsforeach flip-flop.On-chip termination resistors have been added to the outputs to reduce system noise caused by reflections. The FCT2374T and FCT2574T can be used to replace the FCT374T and FCT574T to reduce noise in an existing design. Both devices have three-state outputs for bus oriented appli­cations. A buffered clock (CP) and output enable (
OE) are common to all flip-flops. The FCT2574T is identical to the FCT2374T except that all the outputs are on one side of the package and inputs on the other side. The flip-flops contained in the FCT2374T and FCT2574T will store the state of their individual D inputs that meet the set-up and hold time require­ments on the LOW-to-HIGH clock (CP) transition. When
OE is LOW, the contents of the flip-flops are availableat the outputs. When
OE is HIGH, the outputs will be in the high-impedence state. The state of output enable does not affect the state of the flip-flops.
The outputs are designed with a power-off disable feature to allow for liv e insertion of boards.
Logic Block Diagram
Pin Configurations
Logic Symbol
1 2 3 4 5 6 7 8 9 10
11
12
16
17
18
19
20
13
14
V
CC
FCT2374T-2
15
SOIC/QSOP
Top View
O
0
D
0
D
1
O
2
D
2
D
3
O
3
D
7
D
6
O
6
O
5
D
5
D
4
O
4
CP
OE
GND
O
7
O
1
1 2 3 4 5 6 7 8 9 10
11
12
16
17
18
19
20
13
14
V
CC
FCT2374T-4
15
SOIC/QSOP
Top View
D
0
D
1
D
2
D
4
D
5
D
6
D
7
O
1
O
2
O
3
O
4
O
5
O
6
O
7
CP
OE
GND
O
0
D
3
FCT2374T-5
CP OE
D
0
O
0
D
1
O
1
D
2
O
2
D
3
O
3
D
4
O
4
D
5
O
5
D
6
O
6
D
7
O
7
FCT2374T-6
CP
D
O
0
D
0
CP
OE
CP D
O
1
D
1
CP D
O
2
D
2
CP D
O
3
D
3
CP D
O
4
D
4
CP D
O
5
D
5
CP D
O
6
D
6
CP D
O
7
D
7
QQQQQQQQ
FCT2574
FCT2374T
CY74FCT2374T CY74FCT2574T
2
Function Table
[1]
Maximum Ratings
[2, 3]
(Above which the useful life may be impaired. For user guide­lines, not tested.)
Storage Temperature .................................–65°C to +150°C
Ambient Temperature with
Power Applied.............................................–65°C to +135°C
Supply Voltage to Ground Potential............... –0.5V to +7.0V
DC Input Voltage ........................................... –0.5V to +7.0V
DC Output Voltage......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ......120 mA
Power Dissipation..........................................................0.5W
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Inputs Outputs
DCP
OE O
HLH
LLL
XXH Z
Operating Range
Range
Ambient
Temperature V
CC
Commercial –40°C to +85°C 5V ± 5%
Electrical Characteristics Over the Operating Range
Parameter Description Test Conditions Min. Typ.
[5]
Max. Unit
V
OH
Output HIGH Voltage VCC=Min., IOH=–15 mA 2.4 3.3 V
V
OL
Output LOW Voltage VCC=Min., IOL=12 mA 0.3 0.55 V
R
OUT
Output Resistance VCC=Min., IOL=12 mA 20 25 40
V
IH
Input HIGH Voltage 2.0 V
V
IL
Input LOW Voltage 0.8 V
V
H
Hysteresis
[6]
All inputs 0.2 V
V
IK
Input Clamp Diode Voltage VCC=Min., IIN=–18 mA –0.7 –1.2 V
I
I
Input HIGH Current VCC=Max., VIN=V
CC
5 µA
I
IH
Input HIGH Current VCC=Max., VIN=2.7V ±1 µA
I
IL
Input LOW Current VCC=Max., VIN=0.5V ±1 µA
I
OZH
Off State HIGH-Level Output Current
VCC=Max., V
OUT
=2.7V 10 µA
I
OZL
Off State LOW-Level Output Current
VCC=Max., V
OUT
=0.5V –10 µA
I
OS
Output Short Circuit Current
[7]
VCC=Max., V
OUT
=0.0V –60 –120 –225 mA
I
OFF
Power-Off Disable VCC=0V, V
OUT
=4.5V ±1 µA
Capacitance
[6]
Parameter Description Test Conditions Typ.
[5]
Max. Unit
C
IN
Input Capacitance 5 10 pF
C
OUT
Output Capacitance 9 12 pF
Notes:
1. H = HIGH Voltage Level. L = LOW Voltage Level X = Don’t Care Z = HIGH Impedance
= LOW-to-HIGH clock transition
2. Unless otherwise noted, these limits are over the operating free-air temperature range.
3. Unused inputs must always be connected to an appropriate logic voltage level, preferably either V
CC
or ground.
4. T
A
is the “instant on” case temperature.
5. Typical values are at V
CC
=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values.Otherwise prolonged shorting of a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter tests, I
OS
tests should be performed last.
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