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CDC2351
1-LINE TO 10-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS442B – FEBRUARY 1994 – REVISED NOVEMBER 1995
D
Low Output Skew, Low Pulse Skew for
Clock-Distribution and Clock-Generation
Applications
D
Operates at 3.3-V V
D
LVTTL-Compatible Inputs and Outputs
D
Supports Mixed-Mode Signal Operation
CC
(5-V Input and Output Voltages With 3.3-V
VCC)
D
Distributes One Clock Input to Ten Outputs
D
Outputs Have Internal Series Damping
Resistor to Reduce Transmission Line
Effects
D
Distributed VCC and Ground Pins Reduce
DB OR DW PACKAGE
(TOP VIEW)
GND
Y10
V
CC
Y9
OE
P0
P1
Y8
V
CC
Y7
GND
A
1
2
3
4
5
6
7
8
9
10
11
12
24
23
22
21
20
19
18
17
16
15
14
13
GND
Y1
V
CC
Y2
GND
Y3
Y4
GND
Y5
V
CC
Y6
GND
Switching Noise
D
State-of-the-Art
EPIC-ΙΙB
BiCMOS Design
Significantly Reduces Power Dissipation
D
Package Options Include Plastic
Small-Outline (DW) and Shrink
Small-Outline (DB) Packages
description
The CDC2351 is a high-performance clock-driver circuit that distributes one input (A) to ten outputs (Y) with
minimum skew for clock distribution. The output-enable (OE) input disables the outputs to a high-impedance
state. Each output has an internal series damping resistor to improve signal integrity at the load. The CDC2351
operates at nominal 3.3-V VCC.
The propagation delays are adjusted at the factory using the P0 and P1 pins. The factory adjustments ensure
that the part-to-part skew is minimized and is kept within a specified window. Pins P0 and P1 are not intended
for customer use and should be connected to GND.
The CDC2351 is characterized for operation from 0°C to 70°C.
FUNCTION TABLE
INPUTS
A OE
L H Z
H HZ
L LL
H L H
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of
Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
OUTPUTS
Yn
EPIC-ΙΙΒ is a trademark of Texas Instruments Incorporated.
PRODUCTION DATA information is current as of publication date.
Products conform to specifications per the terms of Texas Instruments
standard warranty. Production processing does not necessarily include
testing of all parameters.
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
Copyright 1995, Texas Instruments Incorporated
1
CDC2351
1-LINE TO 10-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS442B – FEBRUARY 1994 – REVISED NOVEMBER 1995
logic symbol
†
This symbol is in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12.
†
OE
5
6
A
EN
logic diagram (positive logic)
5
OE
23
21
19
18
16
14
11
Y1
Y2
Y3
Y4
Y5
Y6
Y7
9
Y8
4
Y9
2
Y10
23
Y1
21
Y2
19
Y3
18
Y4
6
A
16
14
11
Y5
Y6
Y7
9
Y8
4
Y9
2
Y10
87
P0 P1
2
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
V
I
V
CC
GND
CDC2351
1-LINE TO 10-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS442B – FEBRUARY 1994 – REVISED NOVEMBER 1995
absolute maximum ratings over operating free-air temperature range (unless otherwise noted)
Supply voltage range, V
Input voltage range, VI (see Note 1) –0.5 V to 7 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Voltage range applied to any output in the high state or power-off state,
VO (see Note 1) –0.5 V to 3.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Current into any output in the low state, IO 24 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Input clamp current, I
Output clamp current, I
Maximum power dissipation at TA = 55°C (in still air) (see Note 2):DB package 0.65 W. . . . . . . . . . . . . . . . .
Storage temperature range, T
†
Stresses beyond those listed under “absolute maximum ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “recommended operating conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
NOTES: 1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperature of 150°C and a board trace length of 750 mils.
For more information, refer to the
Data Book
, literature number SCBD002B.
–0.5 V to 4.6 V. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
CC
(V
< 0) –18 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
IK
I
(V
OK
< 0) –50 mA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
I
DW package 1.7 W. . . . . . . . . . . . . . . . .
–65°C to 150°C. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
stg
Package Thermal Considerations
application note in the 1994
ABT Advanced BiCMOS T echnology
recommended operating conditions (see Note 3)
MIN MAX UNIT
V
CC
V
IH
V
IL
V
I
I
OH
I
OL
f
clock
T
A
NOTE 3: Unused pins (input or I/O) must be held high or low.
Supply voltage 3 3.6 V
High-level input voltage 2 V
Low-level input voltage 0.8 V
Input voltage 0 5.5 V
High-level output current –12 mA
Low-level output current 12 mA
Input clock frequency 100 MHz
Operating free-air temperature 0 70 °C
†
electrical characteristics over recommended operating free-air temperature range (unless
otherwise noted)
PARAMETER TEST CONDITIONS MIN TYP MAX UNIT
V
IK
V
OH
V
OL
I
I
‡
I
O
I
OZ
I
CC
C
i
C
‡
Not more than one output should be tested at a time, and the duration of the test should not exceed one second.
o
VCC = 3 V, II = –18 mA –1.2 V
VCC = 3 V, IOH = – 12 mA 2 V
VCC = 3 V, IOL = 12 mA 0.8 V
VCC = 3.6 V, VI = VCC or GND ±1 µA
VCC = 3.6 V, VO = 2.5 V –7 –70 mA
VCC = 3.6 V, VCC = 3 V or 0 ±10 µA
VCC = 3.6 V, IO = 0,
=
or
VI = VCC or GND, VCC = 3.3 V, f = 10 MHz 4 pF
VO = VCC or GND, VCC = 3.3 V, f = 10 MHz 6 pF
Outputs high 0.3
Outputs low 15
Outputs disabled 0.3
mA
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
3
CDC2351
(INPUT)
(OUTPUT)
A
Y
ns
OE
Y
ns
OE
Y
ns
1-LINE TO 10-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS442B – FEBRUARY 1994 – REVISED NOVEMBER 1995
switching characteristics, CL = 50 pF (see Figures 1 and 2)
VCC = 3.3 V,
TA = 25°C
MIN TYP MAX MIN MAX
3.8 4.3 4.8
3.6 4.1 4.6
2.4 4.9 6.0 1.8 6.9
2.4 4.3 6.0 1.8 6.9
2.2 4.4 6.3 2.1 7.1
2.2 4.6 6.3 2.1 7.3
PARAMETER
t
PLH
t
PHL
t
PZH
t
PZL
t
PHZ
t
PLZ
t
sk(o)
t
sk(p)
t
sk(pr)
t
r
t
f
FROM
A Y 0.3 0.5 0.5 ns
A Y 0.2 0.8 0.8 ns
A Y 1 1 ns
A Y 2.5 ns
A Y 2.5 ns
TO
switching characteristics temperature and VCC coefficients over recommended operating free-air
temperature and V
∝t
(T)
PLH
∝t
(T)
PHL
∝t
PLH(VCC
∝t
PHL(VCC
†
∝t
(T) and ∝t
PLH
‡
∝t
PLH(VCC
NOTE 4: These data were extracted from characterization material and are not tested at the factory.
Average temperature coefficient of low to high
propagation delay
Average temperature coefficient of high to low
propagation delay
Average VCC coefficient of low to high propagation
)
delay
Average VCC coefficient of high to low propagation
)
delay
(T) are virtually independent of VCC.
PHL
) and ∝t
PHL(VCC
range (see Note 4)
CC
PARAMETER
) are virtually independent of temperature.
FROM
(INPUT)
A Y 85†ps/10°C
A Y 50†ps/10°C
A
A
TO
(OUTPUT)
VCC = 3 V to 3.6 V,
TA = 0°C to 70°C
MIN MAX UNIT
Y –145
Y –100
‡
‡
UNIT
ps/
100 mV
ps/
100 mV
4
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
CDC2351
1-LINE TO 10-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS442B – FEBRUARY 1994 – REVISED NOVEMBER 1995
PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
(see Note A)
Timing Input
Data Input
Input
t
PLH
Output
CL = 50 pF
t
500 Ω
500 Ω
LOAD CIRCUIT
1.5 V
1.5 V
t
h
2 V
t
f
t
su
1.5 V 1.5 V
VOLTAGE WAVEFORMS
1.5 V 1.5 V
2 V
0.8 V
r
S1
t
PHL
0.8 V
3 V
0 V
V
V
3 V
0 V
3 V
0 V
OH
OL
6 V
GND
Open
Input
Output
Control
(low-level
enabling)
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
TEST
t
PLH/tPHL
t
PLZ/tPZL
t
PHZ/tPZH
t
w
1.5 V 1.5 V
VOLTAGE WAVEFORMS
t
PZL
t
PZH
t
PLZ
1.5 V
t
PHZ
1.5 V
S1
Open
6 V
GND
1.5 V1.5 V
VOL + 0.3 V
VOH – 0.3 V
3 V
0 V
3 V
0 V
3 V
V
OL
V
OH
≈ 0 V
VOLTAGE WAVEFORMS
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 10 MHz, ZO = 50 Ω, tr ≤ 2.5 ns, tf≤ 2.5 ns.
D. The outputs are measured one at a time with one transition per measurement.
Figure 1. Load Circuit and Voltage Waveforms
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VOLTAGE WAVEFORMS
5
CDC2351
1-LINE TO 10-LINE CLOCK DRIVER
WITH 3-STATE OUTPUTS
SCAS442B – FEBRUARY 1994 – REVISED NOVEMBER 1995
PARAMETER MEASUREMENT INFORMATION
A
Y1
t
PHL1
Y2
t
PHL2
Y3
t
PHL3
Y4
t
PHL4
t
PLH1
t
PLH2
t
PLH3
t
PLH4
Y5
t
PHL5
Y6
t
PHL6
Y7
t
PHL7
Y8
t
PHL8
Y9
t
PHL9
Y10
t
PHL10
NOTES: A. Output skew, t
– The difference between the fastest and slowest of t
– The difference between the fastest and slowest of t
B. Pulse skew, t
C. Process skew, t
– The difference between the fastest and slowest of t
operating conditions
– The difference between the fastest and slowest of t
operating conditions
, is calculated as the greater of:
sk(o)
, is calculated as the greater of | t
sk(p)
, is calculated as the greater of:
sk(pr)
t
PLH5
t
PLH6
t
PLH7
t
PLH8
t
PLH9
t
PLH10
(n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10)
PLHn
(n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10)
PHLn
PLHn
PLHn
PHLn
– t
| (n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10).
PHLn
(n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10) across multiple devices under identical
(n = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10) across multiple devices under identical
Figure 2. Waveforms for Calculation of t
6
POST OFFICE BOX 655303 • DALLAS, TEXAS 75265
sk(o)
, t
sk(p)
, t
sk(pr)
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pertaining to warranty, patent infringement, and limitation of liability.
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accordance with TI’s standard warranty. Testing and other quality control techniques are utilized to the extent
TI deems necessary to support this warranty . Specific testing of all parameters of each device is not necessarily
performed, except those mandated by government requirements.
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Copyright 1998, Texas Instruments Incorporated
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