Pin Descriptions
TM Time-out programming input
Sets the maximum charge time. The resistor
and capacitor values are determined using
Equation 5. Figure 10 shows the resistor/ca
-
pacitor connection.
CHG Charge active output
An open-drain output is driven low when the
battery is removed, during a temperature
pend, when a fault condition is present, or
when charge is done. CHG can be used to
disable a high-value load capacitor to detect
quickly any battery removal.
BAT Battery voltage input
Sense input. This potential is generally de
-
veloped using a high-impedance resistor di
-
vider network connected between the posi
tive and the negative terminals of the battery. See Figures 6 and 7 and Equation 1.
VCOMP Voltage loop compensation input
Connects to an external R-C network to stabilize the regulated voltage.
ICOMP Current loop compensation input
Connects to an external R-C network to stabilize the regulated current.
I
TERM
Charge full and minimum current termi
nation select
Three-state input is used to set I
FULL
and
I
MIN
for fast charge termination. See Table 4.
SNS Charging current sense input
Battery current is sensed via the voltage devel
oped on this pin by an external sense-resistor.
TS Temperature sense input
Used to monitor battery temperature. An exter
nal resistor-divider network sets the lower and
upper temperature thresholds. (See Figures 8
and 9 and Equations 3 and 4.)
TPWM Regulation timebase input
Uses an external timing capacitor to ground
to set the pulse-width modulation (PWM)
frequency. See Equation 7.
BTST Battery test output
Driven high in the absence of a battery in or
-
der to provide a potential at the battery ter
-
minal when no battery is present.
LCOM Common LED output
Common output for LED
1-2
. This output is
in a high-impedance state during initiali
zation to read programming input on DSEL
and CSEL.
V
SS
Ground
V
CC
VCCsupply
5.0V, ±10%
MOD Current-switching control output
Pulse-width modulated push/pull output used
to control the charging current to the battery.
MOD switches high to enable current flow and
low to inhibit current flow. (The maximum
duty cycle is 80%.)
LED
1
–
LED
2
Charger display status 1–2 outputs
Drivers for the direct drive of the LED display. These outputs are tri-stated during
initialization so that DSEL and CSEL can be
read.
DSEL Display select input (shared pin with
LED
2
)
Three-level input that controls the LED
1–2
charge display modes.
CSEL
Charge sense-select input (shared pin
with LED
1
)
Input that controls whether current is
sensed on low side of battery or high side of
battery. A current mirror is required for
high-side sense.
2
bq2954