XLi Time and Frequency System Description and Features
The XLi provides high-precision time and frequency signals. Its modular design allows customization for
a wide range of applications. In its standard configuration, the XLi functions as a Time Code Unit which
receives an IRIG time code input, synchronizes its internal oscillator to that input, and produces time
code and frequency outputs. When paired with its internal timing-optimized GPS receiver, the XLi
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provides 1x10
XLi is available in a 19-inch 1U or 2U chassis with rack mount ears for installation.
This new series of Time and Frequency Clock incorporates a flexible architecture to meet the most
demanding clock synchronization requirements. The Model XLi incorporates a dual redundant reference
source design that enables high-availability of the clock source. To achieve high-availability, the user
configures the XLi with dual independent GPS receivers and antennas, or with one GPS antenna/
receiver and one time code or 1PPS reference. In addition, the 2U chassis, when configured with
multiple options, provides dual redundancy and
Optional oscillator upgrades provide enhanced short term stability when locked to a reference source,
and improved holdover ‘flywheeling’ when a reference source is unavailable. See “P7: Oscillators” on
page 223 for more information.
frequency output accuracy, and better than 30 nS RMS accuracy to UTC (USNO). The
distribution in a single unit.
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Features and Options
Three user interfaces are available for managing the XLi:
•The web interface, available using a browser connected to the network port
•The command line interface, available from the serial port and standard network port (telnet)
•The keypad/display interface, available on the front panel of the XLi
The XLi’s modular design allows customization for a wide range of applications. The following range of
features are available in the standard configuration:
In addition, the XLi’s standard features can be expanded with the following optional configurations:
•GPS C/A Receiver References
•Programmable Pulse Output (PPO)
•Network Time Server (NTP)
•Multicode Output Card
•N.1 / N.8 Frequency Synthesizer
•Low Phase Noise 5 MHz Output Card
•Low Phase Noise 10MHz Output Card
•Enhanced Low Phase Noise Module
•T1/E1 Output Card
•Second Serial Talker or T1/E1 Rate Generator
•1, 5, 10 MHz Sine/MPPS Square Output Card
•Have Quick Input/1 PPS Sync Reference Card
•Have Quick with TFOM Output Card
•PTTI BCD Output
•Parallel BCD mSec Output with Time Quality Card
•Parallel BCD uSec Output with Time Quality Card
•Parallel BCD mSec Output Card
•Oscillator Options: OCXO, Rubidium
•Frequency and Time Deviation Monitor
•Time Interval Event Time Option
•DC Power Supplies for 12, 24, and 48 VDC applications
•Redundant power supplies
•TimeMonitor Software
•Expansion module
See“6: Option Cards” on page 167 for more information. Optional oscillator upgrades provide enhanced
short term stability when locked to a reference source, and improved holdover ‘flywheeling’ when a
reference source is unavailable. See “P7: Oscillators” on page 223
Operating Temperature:0 °C to +50 °C (+32 °F to +122 °F)
Maximum Rate of Change:8 °C per hour
Storage Temperature:-55 °C to +85 °C (-67 °F to +185 °F)
Humidity:To 95% non-condensing
Operating Altitude:Maximum 4 km (2.49 mi. or 13147 ft.)
Front Panel Display:Vacuum Fluorescent Display (VFD) 4.38” x 0.88" (11.13cm x 2.24 cm). 160X16
pixels. Displays startup messages, clock status, time and day of year, and
interactive clock functions. The TIME button displays Time and Day of Year
(TOD) on one full-height line.
Keypad:0–9, UP, DOWN, LEFT, RIGHT, ENTER, CLR, TIME, STATUS, MENU
Serial I/O:Full user-selectable RS-232/422 communication protocol up to 19200 baud
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AC Power Supply
Input:
Input connector:IEC 320 connector
Input voltage range:UL: 100 – 240 VAC
Universal, 90 – 264 VAC and 110 – 370 VDC
Input freq. range:47 Hz – 440 Hz
Output:+5.2 V (5.0 to 5.4 V), 25 watts, 0 to 5 amps
+12 V (11.4 to 12.6 V), 45 watts, 0 to 3.8 amps
-12 V (-11.4 to -12.6 V) 32 watts, 0 to 2.7 amps
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Wattage:104 watts
Power Supply Status:The Fault Detector monitors all three output voltages and provides a visual
(panel LED) and fault status if any output voltage decreases by 10%.
Alarm Status LED:Green LED on with no fault and AC power applied. Green LED off with fault or no
AC power applied.
Fan:Exhaust 3-6 CFM
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XLi-man, Issue 8, 6/17/2008, Rev. H
Accuracy of AM Code Output:10 μS to the incoming code
5x10
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@ 10 sec
Accuracy of DC Level Shift
Code Output:
See “HaveQuick/1 PPS Time and Frequency Reference(87-8016-3)” on page 216.
10 μS to the incoming code
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1 PPS Input
1 PPS Output:10 μS to the incoming 1 PPS
Stability of Frequency/Timing –
Allan Deviation:
Accuracy of AM Code Output:10 μS to the incoming 1 PPS
Accuracy of DC Level Shift
Code Output:
See “HaveQuick/1 PPS Time and Frequency Reference(87-8016-3)” on page 216.
-9
5x10
@ 10 sec
10 μS to the incoming 1 PPS
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Aux Ref Input
If an Aux Ref input is available and enabled, the XLi assumes that Aux Ref is a better frequency source
than its own oscillator. If a timing reference is not available (or becomes unavailable) and Aux Ref is
enabled, the XLi locks to the Aux Ref input. Under those conditions, frequency output accuracy is equal
to the reference < 1 x 10
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.
Note: Manually set the time and date, when using 1 PPS or Aux Ref as the primary references. Set the
date (year) when using IRIG A000, A130, B000, B120, or NASA 36 as the primary reference.
See F3 – Time & Date (page 50)
.
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Chassis
1U Chassis:Standard 19" EIA Rack System, hardware included
The following specifications describe the standard (as opposed to optional) inputs and outputs on the
standard configuration of the XLi.
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Serial I/O Port
The standard serial data port is a bi-directional EIA standard RS-232C interface. The serial data port is
configured via the Keypad / Display and Standard network port.
Note: Parity - NONE is only available/valid when Data Bits is set to 8.
See “F4 – Serial Port Configuration” on page 52.
NET – Network Port
The Ethernet port interface has a standard RJ-45 connector that provides IEEE 802.3 frame 10/100
Base-T Ethernet. The XLi can optionally be factory configured as a Network Time Protocol (NTP) server,
which can be used to synchronize client computer clocks over a network. This function is only available
with GPS and IRIG B input. See “F100 – Network Port Configuration & XLi Firmware” on page 117.
J1 Input – Time Code or Time Interval - Event Time
Time Code Input Specifications - Modulated (AM) and Demodulated (DC):
Format:IRIG-B120, B000, B120 1344, B000 1344
IRIG-A130, A000
NASA 36
Amplitude (AM):0.5 Vp-p to 10 Vp-p, 100 kΩ to ground
Ratio (AM):3:1 ±10%
Amplitude (DC):
Logic Low:
Logic Hi:
Impedance:100 kΩ, 50 Ω
Polarity:Positive or negative
Direction:Forward
Quantity:1
Connector:Female BNC
Related Features
< 1.25V and Min. 300mV
> 1.25V and Max 10V
Propagation delay 0-99999 μS. Error bypass. (See F110 on
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page 137)
The Time Interval - Event Time (TIET) option measures a 1 PPS or Event input signal on J1 against the
XLi derived time. The rising edge of the pulse is measured against XLi time with 5 nS resolution.
Pulse Width100 nS, min.
Active Edge:Rising
Amplitude (DC):
Logic Low:
Logic Hi:
Impedance:100 kΩ, 50 Ω
< 1.25V and Min. 300mV
> 1.25V and Max 10V
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Polarity:Positive
Resolution:5 nS, Single Shot
Accuracy
Refer to
“System Time & Frequency Accuracy” on page 6
See “F110 – J1 Input (Time Code, TIET)” on page 137.
Note: Any stray input capacitance loading will impact TIET measurements
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Factory Configuration:The Rate Output is default 10 MPPS
The Programmable Pulse Output (PPO) option (part number 87-8024) generates a precisely
synchronized trigger pulse at an arbitrary time and with arbitrary pulse width in integer multiples of 1 μS.
The start and stop edges of the PPO can be programmed with 1 μS resolution.
Pulse Width:Programmable in 1 μS steps
Start:Rising
Stop:Falling
Amplitude:TTL levels into 50 Ω
Accuracy
Refer to
“System Time & Frequency Accuracy” on page 6
See “F111 – J2 Output (Rate, PPO)” on page 142.
J3 Input – Auxiliary Reference or Frequency Measurement
The Frequency Measurement (Freq Meas) option: measures an external frequency applied to the J3
input relative to the XLi’s disciplined frequency.
Frequency:1, 5, 10 MHz
Resolution120 x 10-12@ 1 Second Interval
12 x 10-12@ 10 Second Interval
1 x 10-12@ 100 Second Interval
Range1000 x10-6
Impedance:1 kΩ, 50 Ω
Factory Configuration:Disabled
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Accuracy
See “F113 – J3 Input (Aux Ref, Freq Meas)” on page 146.
Refer to
“System Time & Frequency Accuracy” on page 6
1 PPS – Pulse Per Second Output
1
Pulse width:20 μS ±1 μS
On time edge:Rising
Amplitude:TTL Levels into 50 Ω
Quantity:1
Connector:Female BNC
If a time reference is unavailable, 1 PPS is as stable as the frequency reference (e.g., the system
oscillator or Aux Ref).
CODE – Time Code Output
Time Code Output Specifications - Modulated (AM) and Demodulated (DC or DCLS)
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Format:IRIG-B120, B000, B120 1344, B000 1344
IRIG-A130, A000
NASA 36
Amplitude (AM):3 Vp-p, into 50Ω ±10%
Ratio (AM):3:1 ±10%
Amplitude (DC):TTL into 50Ω
Quantity:1
Connector:Female BNC
Phasing:In phase with carrier ± 10 μS
Default Configuration:IRIG-B 120
Many IRIG reader devices only decode the BCD time-of-year (TOY) portion of the IRIG frame. Reader
devices designed to the IRIG-B122, B002, A132, A002 standard should be compatible with the XLi’s
time code outputs.
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The selectable Code output has an additional selection for IRIG-B-120 w/ IEEE1344. Configuration is via
the Keypad / Display, RS232/422 and the Network port via telnet and HTML.
IRIG-B-120 IS DEFINED IN IRIG STANDARD 200-04 AS:
•Format B 100 pps
•1 = Sine wave amplitude modulated
•2 = 1KHz carrier/1mSec resolution
•0 = BCD TOY,CF,SBS
IEEE1344 IS DEFINED IN IEEE1344-1995(R2001) ANNEX F AS:
IRIG-B format, <sync>SS:MM:HH:DDD<control bits> <binary seconds>
where
<sync>is the on time marker
SSseconds 00-59 (60 during leap seconds)
MMminutes 00-59
HHhour of day 00-23
DDDday of year 001-366
<control>27 binary control characters, see Table 1 (reference IEEE1344)
1111Initial condition clock unlocked or 10Sec < ETE
1011Clock unlocked and 1Sec < ETE <= 10Sec
1010Clock unlocked and 100mSec < ETE <= 1Sec
1001Clock unlocked and 10mSec < ETE <= 100mSec
1000Clock unlocked and 1mSec < ETE <= 10mSec
0111Clock unlocked and 100uSec < ETE <= 1mSec
0110Clock unlocked and 10uSec < ETE <= 100uSec
0101Clock unlocked and 1uSec < ETE <= 10uSec
0100 Clock unlocked and 100nSec < ETE <= 1uSec
0011Clock unlocked and 10nSec < ETE <= 100nSec
0010Clock unlocked and 1nSec < ETE <= 10nSec
0001Clock unlocked and ETE <= 1nSec
0000Clock locked to a reference source
Xli Estimated Time Error (ETE)
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OUTPUT:
5
•Amplitude (AM):3 Vp-p ±10%, into 50
•Ratio (AM):3:1 ±10%
•Qty:1
•Connector:BNC female
•Phasing:In phase with the XLi 1PPS ± 10 us
Time Code Output IRIG-B000 w/ IEEE1344
The selectable Code output has an additional selection for IRIG-B-000 w/ IEEE1344, configuration is via
the Keypad / Display, RS232/422 and the Network port via telnet and HTML.
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IEEE1344 IS DEFINED IN IEEE1344-1995(R2001) ANNEX F AS:
See above
OUTPUT:
•Amplitude (DC):TTL into
50 Ω
•Qty:1
•Connector:BNC female
•Phasing:In phase with the XLi 1PPS ± 200ns
Time Code Input IRIG-B120 w/ IEEE1344
The selectable Code input has an additional selection for IRIG-B-127. Configuration is via the Keypad /
Display, RS232/422 and the Network port via telnet and HTML.
IRIG-B-120 IS DEFINED IN IRIG STANDARD 200-04 AS:
•Format B 100 pps
•1 = Sine wave amplitude modulated
•2 = 1KHz carrier/1mSec resolution
•0 = BCD TOY,CF,SBS
IEEE1344 IS DEFINED IN IEEE1344-1995(R2001) ANNEX F AS:
See section TIME CODE OUTPUT IRIG-B120 200-04 W/ IEEE1344 for definition
The XLi first synchronizes to IRIG-B-120 w/ IEEE1344 when the Time Quality control bits are = 0000.
The XLi remains synchronized (Locked) while the Time Quality control bits are 0000 through 0101 (ETE
< 10uSec). The XLi utilizes the IRIG-B-120 BCD TOY, IEEE1344 year, leap second, and leap second
pending bit as the UTC epoch. The XLi time format selection remains on the XLi including the Daylight
saving time offset.
INPUT:
•Amplitude (AM):0.5 Vp-p to 10 Vp-p, 100 k
•Ratio (AM):3:1 ±10%
•Qty:1
•Connector:BNC female
Ω to ground
2
Time Code Input IRIG-B000 w/ IEEE1344
The selectable Code input has an additional selection for IRIG-B-000 w/ IEEE1344. Configuration is via
the Keypad / Display, RS232/422 and the Network port via telnet and HTML.
IRIG-B-007 IS DEFINED IN IRIG STANDARD 200-04 AS:
•Format B 100 pps
•0 = Pulse width code
•0 = No carrier/index count interval
•0 = BCD TOY,CF,SBS
IEEE1344 IS DEFINED IN IEEE1344-1995(R2001) ANNEX F AS:
1
See section TIME CODE OUTPUT IRIG-B120 W/ IEEE1344 for definitions
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XLI SYNC:
The XLi first synchronizes to IRIG-B-120 w/ IEEE1344 when the Time Quality control bits are = 0000.
The XLi remains synchronized (Locked) while the Time Quality control bits are 0000 through 0101 (ETE
< 1uSec). The XLi utilizes the IRIG-B-120 BCD TOY, IEEE1344 year, leap second, and leap second
pending bit as the UTC epoch. The XLi time format selection remains on the XLi including Daylight
saving time offset.
Input:
•Amplitude (DC):Logic Low < 1.25V >0V
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XLi-man, Issue 8, 6/17/2008, Rev. H
The Manual Leap Second Entry is configurable via the Keypad / Display, RS232/422 and the Network
port via telnet and HTML. This function allows the user to enter leap second data. This mode of
operation will allow the user to maintain UTC with the XLi clock without an external time reference
providing leap second data or in a standalone mode (i.e. without a time reference).
Locked reference sources containing leap second data (GPS and IRIG-B w/ IEEE1344) take priority to
the manual leap second entry.
Manual leap second data is applied to the XLi UTC TOD when locked to any reference source that does
not contain leap second data.
The manual leap second data will be applied to the clock at the end of the current quarter that it was
entered at UTC midnight on the last day of March, June, September, or December
The function is selectable by:
1.Enter / Request the current GPS leap second, e.g. 14.
2.Enter / Request the leap second, adding or subtracting in March, June, September, or
December
HaveQuick TFOM
The following Time Figure of Merit Code has been added to the HaveQuick output
For units that include the GPS option, install the GPS antenna and cable as described below.
Selecting a GPS Antenna Site Outdoors
Select a site that...
•Is the highest point available
•Offers a full 360° view horizontally, to within 10° vertically of the horizon
•Is higher than neighboring buildings/obstructions
•Is protected from strong radio frequency (RF) and microwave transmissions
•Is set away from RF-reflective surfaces that cause multipath interference
•Is set 3 ft. (1 m) away from other GPS antennas
Avoid...
•Mounting the antenna between tall buildings or next to walls and equipment
•Cable runs from the antenna to the receiver that exceed the specified length
•Patching multiple cables together to make a single cable run
•Running the cable through bulkheads and along side high-energy cables
•Crimping or damaging the cable
Blocked signals and multipath cancellation significantly increase GPS acquisition time. Multipath
cancellation is caused by reflected signals that reach the antenna out of phase with the direct signal due
to vertical reflective objects positioned to the side and above the antenna. To solve these problems, mast
mount the antenna at least 1 meter away from and above the reflecting surface.
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Mounting the GPS Antenna
Mount the GPS antenna on an antenna mast (recommended) or on the peak of a building. The GPS
antenna kit includes special mounting brackets. For the mast, use 2-inch (5.08-cm) diameter water pipe
or conduit that is rigid enough to withstand high winds without flexing. Use guy wires to stabilize masts
longer than 10 ft. (3.048 m).
Notes:
•The XLi requires a 12 Volt-compatible antenna. Antennas not rated for 12 V will be damaged.
•Use a splitter to connect a GPS antenna to multiple receivers. Avoid using BNC “T” connectors.
•The L1 GPS antenna is designed to operate with up to 150 ft. (60.96 m) of RG-59 coax cable. An
optional Down Converter can be used for cable runs of 1,500 ft. (457.2 m) using RG-58 coaxial
cable.
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