Symmetricom bc635PCI-V2, bc637PCI-V2-OCXO, bc637PCIe, bc635PCI-V2-OCXO, bc635PCIe-OCXO User Manual

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PCI / PCIe

Time and Frequency Processor

User’s Guide

Products Included:

PCI

bc635PCI-V2

bc637PCI-V2

bc635PCI-V2-OCXO

bc637PCI-V2-OCXO

PCIe

bc635PCIe

bc637PCIe

bc635PCIe-OCXO

bc637PCIe-OCXO

Product CD, 098-00179-000

November 2, 2009

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Revision A

Symmetricom Customer Assistance

Symmetricom's Customer Assistance Centers are a centralized resource to handle all of your customer needs.

Customer Assistance Center Telephone Numbers:

n Worldwide (Main Number): 1-408-428-7907

n USA, Canada, Latin America including Caribbean, Pacific Rim including Asia, Australia and New

Zealand: 1-408-428-7907

n USA toll-free: 1-888-367-7966 (1-888-FOR-SYMM)

n Europe, Middle East & Africa: 49 700 32886435

Technical Support can be obtained either through the Online Support area of our website:

(http://www.symmetricom.com/support/online-support/ttm-product-support/), or by calling one of the above Customer Assistance Center numbers.

When calling the worldwide or USA-based number, select Option 1 at the first prompt. Telecom Solutions Division customers should then select Option 1; Timing, Test and Measurement Division customers should then select Option 2.

Technical Support personnel are available by phone:

n Between 7 a.m. to 5 p.m. Pacific Time, weekdays through the Main Customer Assistance Center

number 1-408-428-7907.

n Between 8 a.m. to 5 p.m. Central European Time weekdays at the Europe, Middle East and

Africa number 49 700 32886435.

n After hours support for emergencies only is handled through the worldwide (main) number 1-408-

428-7907.

Customers who have purchased Technical Support Contracts may e-mail support requests to:

n support@symmetricom.com (Americas, Asia, Pacific Rim)

n emeasupport@symmetricom.com (Europe, Middle East, Africa)

Due to continued product development this information may change without notice. If you find any errors in the documentation, please report them to us in writing. Symmetricom, Inc. does not warrant that this document is error-free.

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Intellectual Property

The software contains proprietary information of Symmetricom, Inc.; it is provided under a license agreement containing restrictions on use and disclosure and is also protected by copyright law. Reverse engineering of the software is prohibited.

Limited Product Warranty

Hardware and embedded software - For a period of one (1) year from date of shipment by Symmetricom, Symmetricom warrants that all Products shall be free from defects in design, material, and workmanship; shall conform to and perform in accordance with Symmetricom's published specifications, if any; shall be free and clear of any liens and encumbrances; and shall have good and valid title. This warranty will survive inspection, acceptance, and payment by Buyer. Symmetricom does not warrant that the operation of such Products will be uninterrupted or error free. This warranty does not cover failures caused by acts of God, electrical or environmental conditions; abuse, negligence, accident, loss or damage in transit; or improper site preparation.

This warranty shall be null and void in the event (i) Buyer or any third party attempts repair of the goods without Symmetricom's advance written authorization, or (ii) defects are the result of improper or inadequate maintenance by Buyer or third party; (iii) of damage to said goods by Buyer or third party-supplied software, interfacing or supplies; (iv) of improper use (including termination of non-certified third party equipment on Symmetricom's proprietary interfaces and operation outside of the product's specifications) by Buyer or third party; or (v) the goods are shipped to any country other than that originally specified in the Buyer's purchase order.

Goods not meeting the foregoing warranty will be repaired or replaced, at Symmetricom's option, upon return to Symmetricom's factory freight prepaid; provided, however that Buyer has first obtained a return materials authorization number ("RMA Number") from Symmetricom authorizing such return. The RMA Number shall be placed on the exterior packaging of all returns. Symmetricom will pay shipping costs to return repaired or replacement goods to Buyer.

Symmetricom reserves the right to disallow a warranty claim following an inspection of returned product. When a warranty claim is questioned or disallowed, Symmetricom will contact Buyer by telephone or in writing to resolve the problem.

Software - Symmetricom warrants that for a period of ninety (90) days from date of shipment by Symmetricom the accompanying media will be free from defects in materials and workmanship under normal use. The physical media warranty does not apply to defects arising from misuse, theft, vandalism, fire, water, acts of God or other similar perils. Symmetricom will not be liable for any damages caused by the Buyer's failure to fulfill its responsibilities as stated above.

THE FOREGOING WARRANTY IS IN LIEU OF ALL OTHER WARRANTIES, EXPRESSED OR IMPLIED, INCLUDING, BUT NOT LIMITED TO, ANY IMPLIED WARRANTIES OF TITLE, MERCHANTABILITY, OR FITNESS FOR A PARTICULAR PURPOSE HOWSOEVER ARISING.

Limitation of Liability - The remedies provided herein are the Buyer's sole and exclusive remedies. In no event or circumstances will Symmetricom be liable to Buyer for indirect, special, incidental or consequential damages, including without limitation, loss of revenues or profits, business interruption costs, loss of data or software restoration, or damages relating to Buyer's procurement of substitute products or services. Except for liability for personal injury or property damage arising from Symmetricom's negligence or willful misconduct, in no event will Symmetricom's total cumulative liability in connection with any order hereunder or Symmetricom's Goods, from all causes of action of any

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kind, including tort, contract, negligence, strict liability and breach of warranty, exceed the total amount paid by Buyer hereunder. SOME JURISDICTIONS DO NOT ALLOW CERTAIN LIMITATIONS OR EXCLUSIONS OF LIABILITY, SO THE ABOVE LIMITATIONS OR EXCLUSIONS MAY NOT APPLY TO ALL BUYERS.

Contact Information

Symmetricom, Inc. Timing, Test & Measurement 3750 Westwind Blvd. Santa Rosa, CA 95403 Main: +1 (707) 528-1230

For Sales, Technical Support, and Return Materials Authorization, please see

"Symmetricom Customer Assistance" on page ii.

Conventions

The conventions used in this manual are:

Note:Tips and clarifications

Warning:Actions to prevent equipment damage.

Bold:Used to show messages, menu items, etc., that appear on a computer screen. For example, click on Submit Changes.

Text:Used to indicate text you should enter with your keyboard, exactly as printed.

Errata

Errata are available on the CD ROM supplied with the equipment. The errata file name is “Errata.pdf”.

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Table of Contents

Symmetricom Customer Assistance ii

Intellectual Property iii

Limited Product Warranty iii

Contact Information iv

Conventions iv

Errata iv

1. PCI/PCIe TFP Hardware 1

1.1. Introduction 1

1.1.1. General Information 1

1.1.2. Key Features 4

1.1.4. Specifications and Settings 5

Time Code Inputs 5

Time Code Outputs 5

PCIe Bus Characteristics 6

PCI Bus Characteristics 6

Inputs 6

Outputs 7

bc635PCI-V2 and bc637PCI-V2 Jumpers 7

bc635PCIe and bc637PCIe Jumpers 7

Environmental Specifications 8

Front Panel LED 8

GPS Antenna 8

1.2. Installation 10

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1.2.1. General 10

1.2.2. Installing the Card and Antenna 11

Installing the Card 11

Changing the TFP Card Front Panel 11

Procedure for Changing the TFP Card Front Panel 11

Antenna Location and Installation (bc637PCI-V2 and bc637PCIe) 12

Quick Initial Setup 12

Permanent Antenna Installation 13

1.2.3. bc637PCI/PCIe Additional Hardware 14

1.2.4. Minimum System Requirements 14

1.2.5. Installation Under Windows 14

1.2.6. Windows Software Development Kit 14

1.2.7. Linux Software Development Kit 15

1.2.8. Solaris Software Development Kit 16

1.2.9. Installation Under Other Operating Systems 16

1.3. Functional Description 16

1.3.1. General 16

Mode 0 (Time Code Mode) 17

Mode 1 (Free Running Mode) 17

Mode 2 (External 1 PPS Mode) 17

Mode 3 (RTC) 17

Mode 6 (GPS) - bc637PCI-V2 and bc637PCIe 17

Time Capture Registers 18

1.3.2. Heartbeat Output 18

1.3.3. DDS Output 19

Continuous mode 19

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Fractional mode 19

Divider Source 19

Divider Mode 20

Multiplier Mode 20

1.3.4. Time Coincidence Strobe Output 21

1.3.5. PCI(e) Interrupts 21

1.3.6. Additional Timing Output Signals 21

1.3.7. AM Time Code Calibration 21

1.3.8. Calibration Procedure 22

1.3.9. Field Upgrade of Embedded Program 23

1.4. Device Registers 26

1.4.1. General 26

1.4.2. PCI Memory Map 26

1.4.3. Device Register Description 26

TFP Device Register Summary 27

TIMEREQ Register (0x00) 27

EVENTREQ Register (0x04) 27

UNLOCK1 Register (0x08) 28

UNLOCK2 Register (0x0C) 28

CONTROL Register (0x10) 28

CONTROL Register 29

ACK Register (0x14) 30

MASK Register (0x18) 31

INTSTAT Register (0x1C) 31

INTSTAT Register 31

MINSTRB (0x20) – MAJSTRB (0x24) Registers 31

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EVENT2_0 (0x28) – EVENT2_1 (0x2C) Registers 32

TIME0 (0x30) - TIME1 (0x34) Registers 32

EVENT0 (0x38) - EVENT1 (0x3C) Registers 32

UNLOCK3 Register (0x44) 32

EVENT3_0 (0x48) – EVENT3_1 (0x4C) Registers 32

1.4.4. TIME FORMAT 32

STATUS BITS 34

Status Bits Summary 35

STATUS: Tracking (Bit 24) 35

STATUS: Phase (Bit 25) 35

STATUS: Frequency Offset (Bit 26) 35

1.5. Dual-Port RAM Interface 35

1.5.1. General 36

Input Area 36

Output Area 36

GPS Area 36

Year Area 36

DPRAM Address and Contents 36

1.5.2. ACK Register 36

ACK Bit 0 37

ACK Bit 2 37

ACK Bit 7 37

1.5.3. TFP DPRAM Commands 37

DPRAM Command Summary 40

Command 0x10: Set TFP Timing Mode 41

Command 0x11: Set Time Register Format 41

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Command 0x12: Set Major Time 42

Command 0x13: Set Year 42

Command 0x14: Set Periodic Output 43

Command 0x15: Set Input Time Code Format 43

Command 0x16: Set Input Time Code Modulation Type 44

Command 0x17: Set Propagation Delay Compensation 44

Command 0x18: Request UTC Time Data (bc637 only) 45

Command 0x19: Request TFP Data 45

Command 0x1A: Software Reset 46

Command 0x1B: Set Time Code Output Format 46

Command 0x1C: Set Generator Time Offset 48

Command 0x1D: Set Local Time Offset 49

Command 0x1E: Program Leap Second Event 49

Command 0x1F: Request Firmware Information 49

Command 0x20: Select Clock Source 50

Command 0x21: Control Jamsync 50

Command 0x22: Force Jamsync 50

Command 0x24: Load DAC 51

Command 0x25: Set Disciplining Gain 51

Command 0x26: Request Battery Connection Status 51

Command 0x27: Synchronize RTC to External Time Data 52

Command 0x28: RTC Battery Connection Control 52

Command 0x30: Send Packet to GPS Receiver (bc637 only) 52

Command 0x31: Request Packet from GPS Receiver (bc637 only) 52

Command 0x32: Manually Request Packet from GPS Receiver (bc637 only) 52

Command 0x33: Set GPS Time Format (bc637 only) 52

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Command 0x40: Observe Local Time Flag 53

Command 0x41: IEEE 1344 Daylight Saving and Local Time Flags 53

Command 0x43: Select Periodic or DDS Output 54

Command 0x44: Periodic or DDS Output Enable 54

Command 0x45: DDS Divide Select 54

Command 0x46: DDS Divide Source 55

Command 0x47: DDS Synchronization Mode Select 55

Command 0x48: DDS Multiplier Value 56

Command 0x49: DDS Period Value 56

Command 0x4A: DDS Tuning Word 56

Command 0x4F: PCI Firmware Part Number (request only) 57

Command 0xF6: TFP Model Identification (request only) 57

Command 0xFE: TFP Serial Number (request only) 58

1.6. Inputs and Outputs 58

1.6.1. TFP I/O ConnectorSignals 58

1.6.2. bc635PCIe and bc637PCIe Accessories 59

Signal Breakout Kit 59

Breakout Cables 61

Timing Input/Output Breakout cable and Patch Panel BNC Map 63

1.7. GPS Receiver Interface 63

1.7.1. General 63

1.7.2. GPS Timing Mode (Mode 6) Characteristics 64

1.7.3. Communicating With the GPS Receiver 64

Sending GPS Data Packets to the GPS Receiver 64

Receiving GPS Data Packets from the GPS Receiver 65

Retrieve Packet from GPS Receiver (Command 0x31) 65

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Manually Request Packet from GPS Receiver (Command 0x32) 67

1.7.4. Position Fix Modes 68

Position Fix Mode 0 68

Position Fix Mode 1 68

Position Fix Mode 3 and 4 68

1.8.5. GPS Default Parameters 68

Set Operating Parameters (GPS packet 0x2C) 69

Set High-8 / High-6 Mode (GPS packet 0x75) 69

Set I/O Options (GPS packet 0x35) 69

1.9. Legacy and New Generation Cards 69

1.9.1. PCI Bar Mapping 70

1.9.2. Differences Between Versions -U and New Generation Cards 70

2. Windows Application Programs 72

2.1. bc635PCIcfg.exe Windows Application Program 72

2.1.1. General 72

2.1.2. Quickstart Guide to Operating bc635PCIcfg.exe 72

2.1.3. bc637PCIcfg Program Menu Interface 74

File Menu 74

Time Menu 75

Time Code Menu 78

Signals Menu 79

Hardware Menu 81

Special Menu 82

PCI Menu 85

Help Menu 86

2.2. bc637PCIcfg.exe Windows Application Program 87

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2.2.1. General 87

2.2.2. Quickstart Guide to Operating bc637PCIcfg.exe 87

2.2.3. bc637PCIcfg.exe Program Menu Interface 88

File Menu 88

Time Menu 90

Status Menu 91

Mode Menu 91

Position Menu 92

Options Menu 92

Request Menu 93

Send Menu 94

Reset Menu 95

Help Menu 96

2.3. Traytime Windows Application Program 97

2.3.1. Installation 97

2.3.2. Functionality 97

2.3.3. TrayTime Dialog Windows 98

Main Window 98

TrayTime Setup - Status Window 99

TrayTime Setup - Configuration Window 100

3. Windows SDK 101

3.1. Introduction 101

3.1.1. General 101

3.1.2. Features 101

3.1.3. Overview 101

3.2. Release Notes 102

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Driver 102

Installation 102

Driver Packages 103

64-Bit Applications 103

DLL File 103

Software Developers Kit 103

TrayTime.exe 103

API Calling Convention 104

NoSync Read Time Functions 104

3.3. Installation 104

Hardware and driver installation 104

Software developer's kit installation 104

Configuration 105

Test installation 105

Project creation 105

Microsoft Visual C++ 6.0 105

Microsoft Visual Studio 2008 106

3.4. Library definitions 106

General 106

Windows SDK Command Finder 107

Functions 109

4. Linux SDK 139

4.1. Introduction 139

4.1.1. General 139

4.1.2. Features 139

4.1.3. Overview 139

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4.2. Installation 140

4.2.1. Hardware installation 140

4.2.2. Software installation 140

4.2.3. Linux kernel versions supported 142

4.2.4. Test Installation 142

4.2.5. Using the bc63xPCIcfg.exe program 143

Select Operational Mode 144

Request Time Settings 145

Select Timecode Decoding Format 146

Request Timecode Settings 146

Select Timecode Output Format 147

Select the Time Register Format 148

Read Current Time 149

Set Current Time 150

Set Current Year 150

Request Model Information 152

DDS Frequency and New Time Codes 152

Compatibility with Old bc635PCI or bc637PCI Card 155

Uninstall Instructions 155

4.3. Library Definitions 155

4.3.1. General 155

4.3.2. Functions 156

4.4. Programming Examples 186

4.4.1. General 186

4.4.2. Starting and Stopping the Device 186

4.4.3. Reading Time On Demand 187

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Reading in Binary Time Format 187

Reading in Decimal Time Format 188

3.4.4. Setting theTFP Mode 188

4.4.5. Setting Interrupts 188

5. Solaris SDK 191

5.1. Introduction 191

5.1.1. General 191

5.1.2. Features 191

5.1.3. Overview 191

5.2. Installation 191

5.2.1. Hardware Installation 191

5.2.2. Software Installation 192

5.2.3. Test Installation 196

5.2.4. Driver Compilation 197

5.3. Driver Function Definitions 199

5.3.1. General 199

5.3.2. Functions 199

5.4. Example Program 207

5.4.1. General 207

5.4.2. Program Functions 208

4.4.3. Example 1: GPS Packet 46 - Health Packet Sample 217

4.4.4. Example 2: 1PPS Interrupt Sample 217

Glossary 219

Index 222

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1. PCI/PCIe TFP Hardware

1.1. Introduction

1.1.1. General Information

The Symmetricom model bc635PCI-V2, bc637PCI-V2, bc635PCIe, and bc637PCIe Time and Frequency Processors (TFP) are high performance plug-in cards used for precise time synchronization of the host computer over the PCI or PCIe bus.

Note that these Time and Frequency Processors will be referred as “TFP” or “TFPs” for the remainder of the document.

The PCI TFP cards operate at 33 MHz and are compatible with PCI Local Bus Specification Revision

2.3. The PCI products support both the 3.3V and 5V signaling environments defined by the PCI Local Bus Specification. They are considered Universal add-in cards that are capable of detecting the signaling environment and adapting themselves to that environment.

The PCIe TFP cards offer similar features to the PCI cards. The PCIe cards use a single lane and support full 2.5 Gbps in either direction.

The TFP products may be used in either Generator mode or Synchronized Generator mode, supplying precise time (100's nanoseconds through thousands of years) to the host computer. When the card is operating as a Synchronized Generator, the output signals are synchronized to the timing reference. The card phase locks to the timing reference and controls the on-board oscillator to remove frequency errors. If the timing reference is lost, the card continues to increment time and output timing signals based upon the card's 10 MHz oscillator frequency (flywheeling).

There are eight separate TFP products supported by this manual:

Model Description

1 bc635PCI-V2 PCI Time & Frequency Processor with TCXO 2 bc637PCI-V2 GPS Synchronized, PCI Time & Frequency Processor with TCXO 3 bc635PCI-V2-OCXO PCI Time & Frequency Processor with OCXO 4 bc637PCI-V2-OCXO GPS Synchronized, PCI Time & Frequency Processor with OCXO 5 bc635PCIe PCI Express Time & Frequency Processor with TCXO 6 bc637PCIe GPSSynchronized, PCI Express Time & Frequency Processor with TCXO 7 bc635PCIe-OCXO PCI Express Time & Frequency Processor with OCXO 8 bc637PCIe-OCXO GPSSynchronized, PCI Express Time & Frequency Processor with OCXO

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1. PCI/PCIe TFP Hardware

Images of bc635PCI-V2 and bc635PCIe follow

Figure 1-1: Model bc635PCI-V2 Time and Frequency Processor

GPS Antenna

A: SMB Antenna Connector

B: J1 Module I/O 15 pin D-sub connector

Figure 1-2: Model bc637PCI-V2 (GPS option shown with GPS antenna)

All sections of this manual are applicable to all boards except where noted.

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Images of bc635PCI-V2 and bc635PCIe follow::

1.1. Introduction

Figure 1-3: Model bc635PCIe Time and Frequency Processor

GPS Antenna

P/N 142-614-50

A: SMB Antenna Connector

B: J1 Module I/O 15 pin D-sub connector

Figure 1-4: Model bc637PCIe (GPS option shown with GPS antenna)

All sections of this manual are applicable to all boards except where noted.

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1. PCI/PCIe TFP Hardware

1.1.2. Key Features

n All modes of operation are supplemented by flywheel operation. If the synchronization source is

lost, the TFP will continue to function at the last known reference rate. The following operational modes are supported, and are distinguished by the reference source.

Mode Source of Synchronization

0 Time Code - IRIG A, B, G, E, IEEE 1344, NASA 36, XR3 & 2137 1 Free Running (Generator Mode) - 10 MHz Selected Reference (Internal or External) 2 1 PPS - External One Pulse Per Second Input 3 RTC-Uses battery backed on-board real time clock I.C. 4-5 Reserved 6 GPS (bc637) - GPS Antenna/Receiver

n Time may be captured in four independent sets of time capture registers. The default time format

is provided in binary form (UNIX seconds through 100 nanoseconds). The TFP Device Register Summary and register formats are outlined in "TFP Device Register Summary" on page 27.

n In synchronized generator mode, the TFP uses the selected reference source to discipline either

the standard on-board TCXO (Temperature Compensated Crystal Oscillator), optional on-board OCXO (Oven Controlled Crystal Oscillator) or external 10 MHz oscillator. The 10 MHz oscillator drives all timing functions and outputs on the card. 10 MPPS and 1 PPS signals derived from the 10 MHz oscillator are provided as outputs, among others. The advantage of the OCXO is better holdover (should the synchronization source be lost).

n The TFP generates IRIG A, B, G, E, IEEE 1344, NASA 36, XR3 and 137 time codes. Amplitude

modulated and DC level shift formats are produced simultaneously.

n A Programmable Periodic (also known as Heartbeat) output is provided. The output frequency is

programmable and may be synchronized to the TFP 1 PPS signal. The Periodic output programming is discussed in"1.3.2. Heartbeat Output" on page 18. This signal may be internally connected to the Event Input to capture the time associated with the Programmable Periodic edge. The Event Input may be configured via the CONTROL Register as described in "CONTROL Register (0x10)" on page 28. Note that the Periodic square wave output and the DDS square wave output share the same output driver where either signal may be selected for output on J1 pin 15.

n A DDS (also known as frequency synthesizer) output may be selected in place of the periodic

rate generator's output. The DDS offers a much wider frequency range than the Programmable Periodic. The DDS is discussed in more detail in "1.3.3. DDS Output" on page 19. Note that the DDS and the Programmable Periodic signals are capable of generating interrupts. Caution should be taken when using either of these sources with a rate that exceeds the computer's ability to service the interrupts.

n A Time Coincidence Strobe output is provided. The Strobe is programmable from days through

microseconds. The strobe also has an each second mode (referred to in this manual as Minor

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1.1. Introduction

n One set of time capture registers is used for event time capture. Time is captured on the rising or

falling edge (user programmable) of the Event Input signal provided to the TFP via the J1 I/O connector or from the Programmable Periodic Output signal. The Event Input configuration is manipulated via the CONTROL Register as described in "CONTROL Register (0x10)" on page 28.

n Two sets of event capture registers are available from dual-purposed input pins. J1 pin 10 may be

used as the DCLS Time Code Input or as the Event2 input. J1 pin 14 may be used as the External 1PPS Input or as the Event3 input.

n Seven maskable interrupt sources are supported. All interrupt sources may be polled. Interrupts

are discussed in more detail in "MASK Register (0x18)" on page 31.

Note: The bc635PCI-V2 and bc637PCI-V2 do not provide interrupts at system start-up and therefore do not support the PCI Local Bus Specification Revision 2.3 feature of software disable of interrupts at start-up.

1.1.4. Specifications and Settings

Time Code Inputs

Formats IRIG A, B, G, E, IEEE 13441, NASA 36, XR3 and 2137 (AM/DCLS) Carrier Range ± 5 PPM Time Accuracy

< 5 μsec. (AM with carrier frequencies 1 kHz or greater)

< 1 μsec. (DCLS) AM Modulation Ratio 2:1 to 4:1 AM Input Amplitude 1 to 8 Vp-p AM Input Impedance 5 kΩ, AC Coupled DCLS Input 5V HCMOS, >2V high, <0.8V low

IEEE 1344 compliance - The translator processes the 27 control function bits of IRIG B time code

as set forth in IEEE 1344.

May require a calibration to attain this accuracy. See "1.3.7. AM Time Code Calibration" on page 21.

Time Code Outputs

Formats IRIG A, B, G, E, IEEE 1344, NASA 36, XR3 & 2137 (Modulated/DCLS) Modulation Ratio 3:1 ± 10% Output Amplitude 3V p-p ±10% (fixed) into 50 Ω DC Level Shift 5V HCMOS, >2V high, < 0.8V low into 50 Ω

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1. PCI/PCIe TFP Hardware

PCIe Bus Characteristics

Specifications Single Lane, 2.5 Gbps each direction Size Single-Width 6.6” x 2.7” (Low Profile) Interrupts Auto Configurable Power (bc635PCIe) +3.3V @ 400 mA, +12V @ 250 mA Power (bc637PCIe) +3.3V @ 400 mA, +12V @ 300 mA

+3.3V @ 400 mA, +12V @ 350 mA, (0.5 A @ start up)

Power (bc635PCIe-OCXO)

+3.3V @ 400 mA, +12V @ 400 mA, (0.6 A @ start up)

Power (bc637PCIe-OCXO)

PCI Bus Characteristics

Specifications PCI local bus™ 2.2 compliant, 2.3 compatible, PCI-X compatible Size 4.2” x 6.875” (Full Height) Interrupts Automatically Assigned (PnP) Power (bc635PCI-V2) +5V @ 700 mA, +12V @ 50 mA Power (bc637PCI-V2) +5V @ 800 mA, +12V @ 50 mA

+5V @ 800 mA, (1.1 A @ start up), +12V @ 50 mA

Power (bc635PCI-V2-OCXO)

Power (bc637PCI-V2-OCXO) +5V @ 900 mA, (1.2 A @ start up), +12V @ 50 mA

Inputs

5V HCMOS,>2V high, < 0.8V, zero latency,

Event Inputs (1,2,3)

Rising or Falling Edge Triggered, 20 nS min. width, 250 nS min. period 5V HCMOS, >2V high, < 0.8V low

External 1 PPS

Rising Edge On Time, 20 nS minimum width

External 10 MHz Digital 40% to 60% Duty Cycle (or) Sine wave, 0.5 to 8Vp-p, >10k Ω

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Outputs

1.1. Introduction

1 PPS

Periodic

DDS

5V HCMOS, >2V high, < 0.8V low into 50 Ω , Rising Edge On Time, 60 μS Positive pulse

5V HCMOS, >2V high, < 0.8V low into 50 Ω , Rising Edge On Time (selectable on time control), <1 Hz to 250 kHz, square wave

5V HCMOS, >2V high, < 0.8V low into 50 Ω , Rising Edge On Time (selectable on time control), 1/1e7 - 1e8 Hz, <2 nS jitter p-p, square wave

Strobe 5V HCMOS, >2V high, < 0.8V low into 50 Ω , 1 μS Positive pulse, variable delay

1, 5, 10 MHz clock

5V HCMOS, >2V high, < 0.8V low into 50 Ω (see "1.3. Functional Description"

on page 16 for signal characteristics) Time Code DCLS 5V HCMOS, >2V high, < 0.8V low into 50 Ω External 10 MHz

Oscillator DAC

Jumper selectable 0-5VDC or 0-10VDC into 1kΩ

bc635PCI-V2 and bc637PCI-V2 Jumpers

The following is a list of the hardware jumpers on the bc635PCI-V2 and bc637PCI-V2 boards:

n JP1 is a 2mm jumper that is the RTC battery connect switch. The RTC battery is a non-recharge-

able lithium cell with 48 mAh capacity. When the card is not powered and the RTC battery has not been disabled, the RTC draws about 20 uA which will provide >100 days of RTC operation. Longterm storage of the card should be done only after issuing the Disconnect RTC Battery command or by the manual disconnection of the jumper on JP1. The factory configuration places the 2mm J1 jumper ON.

n JP2 is the 1, 5, 10 MPPS or 10 MHz oscillator select switch. The factory configuration places the

2mm JP2 jumper on pins 1-2 which will allow for the software selection of 1, 5 or 10 MPPS for the output on J1 pin 13. When the jumper is in the 2-3 position, the output on J1 pin 13 is a buffered signal from the 10 MHz oscillator.

n JP3 is the DAC voltage range switch. When the jumper is OFF, the DAC voltage is 0-5 VDC;

when ON the voltage is 0-10 VDC. Both oscillators that are offered for this board have 0-5 VDC control voltage ranges, therefore the 2mm jumper is not factory installed. If an external oscillator requires a 0-10 VDC control voltage range, a 2mm jumper should be placed on JP3.

n JP4 is for factory use only.

bc635PCIe and bc637PCIe Jumpers

The following is a list of the hardware jumpers on the bc635PCIe and bc637PCIe boards:

n JP1 is a 2mm jumper that is the RTC battery connect switch. The RTC battery is a non-recharge-

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1. PCI/PCIe TFP Hardware

n JP3 is the DAC voltage range switch. When the jumper is OFF, the DAC voltage is 0-5 VDC;

n JP4 is for factory use only.

Environmental Specifications

Temperature Operating 0°C to +70°C (32°F to +158°F)

Non-Operating -30°C to +85°C (-22°F to +185 °F)

Relative Humidity Operating/Non-Operating To 95% RH, non-condensing

Front Panel LED

LED indication LEDDefinition

1 Off No power 2 Red No valid reference 3 Orange Valid reference but not locked to it yet 4 Green Freerun mode 5 Green Blinking Locked to a timing reference

GPS Antenna

To operate in the GPS Synchronized Generator mode, the bc637 models use an external antenna. The standard antenna kit supplied with these models includes the antenna, 50 feet (15.24 meters) of coaxial cable and antenna mounting hardware.

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1.1. Introduction

Figure 1-5: Antenna parts

The antenna is housed in completely waterproof packaging designed to withstand the elements. When the four UNC 4-40 screws are loosened, the antenna module detaches as shown below, exposing the TNC connector.

Figure 1-6: Antenna with TNC connector

Warning: Models bc637PCI-V2 and bc637PCIe supply +5 VDC to the antenna. Connection to an alternate antenna may damage the board and/or antenna functionality.

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1. PCI/PCIe TFP Hardware

General Specifications for the Antenna Operating Temperature -40°C to +85°C (-40°F to +185°F) Storage Temperature -40°C to +100° C (-40°F to +212°F) Humidity 100% condensing Power 30 mA @ 5 V (supplied by card)

Cable Specifications for the Antenna Cable Type RG-59 (Belden 9104) Length 50 feet (15.24 meters) Weight 1.2 lb. (0.545 kg) Humidity All weather, outdoors Connectors Type TNC male to BNC male

Cable lengths from 150 feet (45 meters) to 300 feet (90 meters) require an in-line GPS Signal Amplifier (P/N 150-200).

Cable lengths from 300 feet (90 meters) to 1,500 feet (457.2 meters) require the antenna Down/Up Converter option, part number 142-6150. Refer to the optional 142-6150 Down/Up Converter antenna manual for specifications.

Antenna and Down/Up Converter units are mounted on a 12-inch (30.48 cm) long PVC mast with 3/4inch (1.9 cm) Male Pipe Thread (MPT) on both ends.

1.2. Installation

1.2.1. General

This section contains TFP installation instructionsand information regarding operating modes and the use of registers to configure the card. Models bc637PCI-V2 and bc637PCIe have the additional feature of GPS mode that will automatically synchronize the card to UTC time.

Installation of PCI/PCIe boards is quite a bit simpler than in most bus architectures due to the following factors:

n Geographical addressing, which eliminates the need for DIP switches and jumpers normally

required to select a “base address” or interrupt level for plug-in modules.

n Auto configuration that allows the host computer to read the device ID, and other configuration

information directly from the PCI Configuration Registers.

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1.2. Installation

n The TFP is shipped with software suitable for use with Linux, Solaris and Windows. The kit

includes drivers for low-level access, as well as software programs for configuring and accessing the card.

Installation is as easy as choosing a vacant PCI or PCIe slot, plugging in the Symmetricom Time and Frequency Processor (TFP) and installing the device driver. Be sure to consult the user documentation that came with your particular workstation for any specific installation instructions. In addition, to protect the card, use good ESD protection practices when installing the card.

1.2.2. Installing the Card and Antenna

Installing the Card

n Unpack the card and carefully inspect it for shipping damage. Report any damage to the carrier

immediately.

n Record the card's serial number. The serial number has eight numerals, for example 08190018.

The first two are the last two numbers of the year. The second two is the week number of the year. The final four is a unique number for the card.

n With the computer's power turned OFF, if the TFP front panel height is correct install and secure

the card in an empty card slot. If a low-profile front panel needs to be attached to the TFP, follow the instructions below.

Changing the TFP Card Front Panel

The bc63xPCI-V2 and bc63xPCIe TFP card is shipped with a full-height front panel attached to it. A low-profile front panel is included as an alternative for low-profile situations. If the low-profile front panel option is required use the following procedure. Note, the following three tools will be required to change the front panel:

l 3/16 inch wrench l 1/4 inch wrench l Phillip's #1 screwdriver

Standard ESD precautions should be followed when handling the TFP printed circuit board.

Procedure for Changing the TFP Card Front Panel

The TFP card is attached to the front panel in three places, the GPS RFconnector, the 15 pin D-subconnector and a single Phillip's #1 screw. To change the front panel, do the following:

1. Remove the two nuts and washers from the backs of the 15 pin D-sub connector (3/16 wrench).

2. Remove the two standoff screws from the front panel side of the 15 pin D-sub connector (3/16 wrench).

3. Remove the retaining nut and washer from the GPS RFconnector (1/4 wrench).

4. Remove the Phillip's #1 screw that secures the TFP card directly to the front panel.

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1. PCI/PCIe TFP Hardware

5. Set the full-height front panel aside and pick up the low-profile front panel.

6. Secure the GPS RFconnector loosely to the front panel with its nut and washers.

7. Secure the TFP card loosely to the low-profile front oanel with the Phillip's #1 screw.

8. Secure the 15 pin D-sub connector to the front panel with its two standoff screws.

9. Secure the 15 pin D-sub connector to the front panel with its two retaining lock washers and nuts.

10. Tighten the GPS RFconnector front panel retaining nut.

11. Tighten the Phillip's #1 screw connecting the TFP card directly to the front panel.

Antenna Location and Installation (bc637PCI-V2 and bc637PCIe)

When selecting a site for the antenna, find an outdoor location that provides full 360-degree visibility of the horizon. In most cases, this means locating the antenna as high as possible. Any obstruction will degrade unit performance by blocking satellite signals. Blocked signals can significantly increase the time for satellite acquisition, or prevent acquisition all together.

The installation instructions are divided into “Quick Initial Setup” and “Permanent Installation” sections. This is designed to firstly get the GPS unit up and running as quickly as possible, and secondly to verify its operation and to become familiar with the equipment, We recommend that new users follow the “Quick Initial Setup” instructions first before proceeding to a permanent installation.

Quick Initial Setup

Connect the antenna cable to the unit and to the antenna. Simply run the antenna outside the building or set it on a window sill. Depending on the lead content or coating on the glass, it may be necessary to go outside. Turn on the unit and verify its operation.

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Permanent Antenna Installation

1.2. Installation

A: Secure mast to pole or pipe

B: Secure mast to mounting surface with pipe straps.

n Wood mounting - Drill hole with #43 bit and install with a #10 wood screw.

n Drywall/Masonry - Drill hole with 1/4 “bit, Insert #10 screw anchor. Then install the #10 wood

screws.

C: Shows the cable connector relative to the antenn. The antenna is shown separated from antenna mast. In reality, the cable is connected to the antenna and the mast is firmly attached to the antenna. Do not disconnect the pipe from the antenna assembly. To gain access to the TNC antenna input connector, untighten the four captive UNC screws that secure the two parts of the antenna.

Figure 1-7: Permanent Antenna Installation

Mast top mounting is the preferred mounting method. Special brackets are provided to mount the antenna to a pipe or the peak of a building. The antenna mounting mast should be 2-inch (5.08-cm) water pipe or conduit. The mast must be rigid and able to withstand high winds without flexing. Guy wires may be used to stabilize a mast longer than 10 ft. (3.048 m).

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1. PCI/PCIe TFP Hardware

1.2.3. bc637PCI/PCIe Additional Hardware

The GPS antenna equipment included with the product and described in this manual consists of the following:

n One wide-range 5-12 VDC GPS L1 antenna

n One 50 ft. length of Belden 9104 coaxial cable with BNC(m) and TNC(m) connectors

n SMB to BNC adaptor is included

Optional cable lengths and accessories are available. Please note the following when setting up longer cable runs:

Note:Using Belden 9104, the maximum cable length without amplification is 150 feet . Using Belden 9104, the maximum cable length using the optional in-line amplifier is 300 feet. For cable runs longer than 300 feet, an optional GPS Down/Up Converter kit is available.

1.2.4. Minimum System Requirements

n PC with one free PCI or PCIe slot

n 25 MB disk space

1.2.5. Installation Under Windows

1. With the PC turned off, insert the Symmetricom TFP in an open slot. Use good ESD protection practices when installing the card.

2. Boot the PC. After login, Windows may prompt you to install newly found hardware. Disregard/cancel this dialog box.

3. Insert the bc63xPCIe-V2 product CD and select bc635PCIcfg or bc637PCIcfg to install depending on the type of TFP you inserted into your PC. The bc637PCIcfg.exe demonstrates the board's GPS functionality.Follow the instructions shown on the screen to finish the installation. The computer will reboot at the end of the installation.

4. If Auto-Run is disabled, manually install the software by browsing to the Windows directory on the product CD. Click on bc635PCIcfg_Setup.exe or bc637PCIcfg_Setup.exe depending on the type of TFP you inserted into your PC. Follow the instructions shown on the screen to finish the installation. The computer will reboot at the end of the installation.

5. After the computer reboots, launch the TFP configuration software bc635PCIcfg or bc637PCIcfg to begin communication with the card.

6. If no time is displayed, or if you are prompted

1.2.6. Windows Software Development Kit

To develop Windows based applications for Symmetricom TFP cards, you must install the bc63x Windows Software Developer’s Kit included on the bc63xPCIe-V2 product CD. You can insert the

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1.2. Installation

product CD and use the SDK installation button to install the SDK or browse to the Windows directory and run bc635_637PCI_SDK_Setup.exe.

The bc63x Windows SDK is a full featured software development kit containing functions necessary to control and read the time from the card. The example application programs were originally developed under Microsoft Visual C++ 6.0 and ported to support both Visual C++ 6.0 and Visual Studio

2008.This allows the user to create customized applications to use with the Symmetricom TFP cards with a minimum amount of time and effort. The SDK is an easy to integrate and highly reliable alternative to writing lower level code to access a TFP card’s registers directly. The API functions make interfacing to a TFP card straight forward, keeping software development effort focused on the end user applications.

The Windows SDK supports both 32 and 64-bit Windows operating system from Windows XP through Windows 7. However, the SDK does not support Windows 2000, NT 4, or any Windows 95 based Windows operating system (95, 98 and Me). The target application development environment is Microsoft Visual Studio. The SDK includes .h, .lib, and .dll files for customer application development. The SDK also includes source code for the bc635PCIcfg, bc637PCIcfg and the TrayTime programs as well as other example programs.

Customers using the previous version of the SDK, which we will now refer to as the "Legacy bc635 SDK software”, can continue to use that driver and any application software previously written using Legacy bc635 SDK software with the bc635PCIe.

For customers wanting to run previously written software with the new 32/64 bit driver, you will need to recompile your applications with the new driver and .dll to support operating systems from Windows XP through Windows 7. See "3.2. Release Notes" on page 102.

1.2.7. Linux Software Development Kit

To develop Linux based applications for Symmetricom TFP cards, you must install the bc63x Linux Software Developer’s Kit included on the bc63xPCIe-V2 product CD. Browse to the Linux directory and follow instructions in the readme file to install the Linux SDK.

The Linux SDK is a full featured software development kit (SDK) containing functions necessary to control and read the time from the card. This SDK allows the user to create customized applications to use with the Symmetricom TFP cards with a minimum amount of time and effort. The SDK is an easy to integrate and highly reliable alternative to writing lower level code to access a TFP card’s registers directly. The API functions make interfacing to a TFP card straight forward, keeping software development effort focused on the end user application.

The SDK supports both 32-bit and 64-bit Linux 2.4 and 2.6 kernels. The target application development environment is GNU gcc/g++. The SDK includes .h, .lib and .so files for customer application development. The SDK also includes source code for the bc63xPCIcfg example program. The example program uses discrete functions to access TFP features. This allows developers to copy and paste useful code into their own applications so that they can keep development effort focused on the end user applications.

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1. PCI/PCIe TFP Hardware

1.2.8. Solaris Software Development Kit

To develop Solaris based applications for Symmetricom TFP cards, you must install the bc63x Solaris Software Developer’s Kit included on the bc63xPCIe-V2 product CD. Browse to the Solaris directory and follow instructions in the readme file to install the Solaris SDK.

The SDK supports 64-bit Solaris 8 to 10 on both SPARC and x86_64 platform. The target application development environment is Solaris C/C++ compiler or GNU gcc/g++. The SDK includes source code for the driver stfp and the bc63xPCIcfg example program. The example program shows how to use discrete functions and ioctl code to access TFP features. This allows developers to copy and paste useful code into their own applications so that they can keep development effort focused on the end user applications.

1.2.9. Installation Under Other Operating Systems

Usage of the TFP under other operating systems may require a special driver for the device. Please contact Symmetricom for source code availability. With the wide variety of machines and operating systems that support the PCI(e) bus, it is not practical for Symmetricom to develop drivers for use in all of these environments.

1.3. Functional Description

1.3.1. General

The primary function of the TFP is to provide precise time to the host computer across the PCI or PCIe bus. The TFP can derive time from any one of the sources listed in "1.1.2. Key Features" on page 4.

In all but the Free Running mode of operation, the TFP synchronizes its 10 MHz oscillator to an input reference. The TFP achieves synchronization from the input reference and disciplines the 10 MHz oscillator such that the locally generated 1 PPS signal is matched in phase and frequency to the input reference.

Once synchronization is achieved, the TFP is able to maintain time even if the reference source is lost (though some timing drift will occur). This is referred to as flywheeling or holdover. If available, the TFP will obtain major time (days, hours, minutes, and seconds) from the input reference. In Time

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1.3. Functional Description

Code and GPS Mode, this major time is readily available, but in the Free Running and External 1 PPS Modes, major time is not available and must be set manually by the user. The Timing Mode is selected via the dual-port RAM interface as described in "Command 0x10: Set TFP Timing Mode" on page 41, using command 10.

Mode 0 (Time Code Mode)

In Time Code Mode, the TFP derives time from the currently selected input time code. The TFP will accept time code in either amplitude modulated (AM) or DC Level Shift (DCLS) form. AM time code is a sinusoidal analog signal that is amplitude modulated with the time data. DCLS is simply the envelope of the modulated time code and is a digital signal. Most time codes provide both major time (days, hours, minutes, and seconds) and minor time (subseconds) to the card. Some IRIG time codes (e.g., IEEE1344) and GPS (if equipped) provide year information.

Mode 1 (Free Running Mode)

In Free Running Mode, no external timing source is used and the TFP oscillator is allowed to free-run. The user must set major time manually. The Major Time is selected via the dual port RAM interface as described in "Command 0x11: Set Time Register Format" on page 41, using command 11. Free Run mode allows the user to perform timing tests when an external timing source is unavailable.

Mode 2 (External 1 PPS Mode)

In External 1 PPS Mode, the TFP synchronizes its oscillator to a user-supplied 1 PPS signal. The user must set major time manually. The Major Time is selected via the dual-port RAM interface as described in "Command 0x11: Set Time Register Format" on page 41 Chapter 1.5, using command

11. The External 1PPS Mode will not indicate locked status to the External 1PPS reference without first being synchronized to a time reference that includes time of day information (Time Code or GPS). Please note that the TFM will always synchronize to the External 1PPS when selected, but if the card has not been previously synchronized by Time Code or GPS, the Tracking, Phase and Frequency Status information will not be valid in External 1PPS mode.

Mode 3 (RTC)

In the Real Time Clock (RTC) mode, the TFP receives its major time via the RTC and operates as a Generator (no input reference).

Mode 6 (GPS) - bc637PCI-V2 and bc637PCIe

In GPS Mode, like Time Code Mode, both major and minor times are derived from the timing source. In addition to time, other information is available from the GPS system such as position and velocity. This mode requires the use of a GPS antenna that has an unobstructed view of the sky. Note that the antenna location is important because the GPS receiver must initially acquire and track at least four

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1. PCI/PCIe TFP Hardware

satellites to obtain accurate time for the TFP card. If however, the user's position is accurately known, or has been previously determined, the position information can be sent to the TFP’s GPS receiver, enabling GPS lock from just one satellite.

Time Capture Registers

The TFP supports four independent sets of time capture registers. Each set consists of two 32-bit wide registers that hold both the major and minor time. One set of registers, called TIME0 and TIME1, support time on demand across the PCI bus. Time is captured in these registers whenever the user accesses a special time request register (TIMEREQ). The captured time is held until a subsequent access of the TIMEREQ register. Valid time can be read from the TIMEx registers immediately following the access of the TIMEREQ register. "1.4.3. Device Register Description" on page 26 describes the available time formats used on the TFP.

The second set of time capture registers, called EVENT0 & EVENT1, are identical in format to the TIMEx registers. Time is captured in these registers whenever the user accesses the special time request register labeled EVENTREQ. Additionally, the EVENTx registers can be set up to capture time in response to either the Event Input or the Programmable Periodic Output (see next section). These device registers are described in more detail in "1.4.3. Device Register Description" on page

26.

The third and fourth set of time capture registers, EVENT2_0, EVENT 2_1, EVENT3_0, and EVENT3_1 are identical in format to the TIMEx registers, but they are only usable with external event sources. The inputs to the Event2 and Event3 time capture registers are on dual-purposed input pins, where usually one or other of the function is chosen.J1 pin 10 may be used as the DCLS Time Code Input or as the Event2 input. J1 pin 14 may be used as the External 1PPS Input or as the Event3 input.

1.3.2. Heartbeat Output

The Heartbeat output is a legacy function. The DDS output described in the next section is a superior frequrency synthesizer. The Heartbeat Output (also known as Programmable Periodic or PPO) allows the user to configure a repetitive digital output synchronized with the timing source. The PPO may optionally be synchronized to the TFP's 1 PPS signal when the Periodic Output frequency is an integer value. If PPO is not an integer value and Synchronous Mode is used, the last Periodic Output cycle before the 1 PPS edge will not be square.

The PPO signal is generated by dividing down a 1 MHz clock, synchronous to the 10 MHz oscillator. The periodic output frequency ranges from 250 kHz (n1 = n2 = 2) to less than 1 Hz. The frequency is determined by the relationship:

Frequency = 1,000,000 / (n1 * n2) Hz

Where:

n1 : divider 1 (range = 2-65535)

n2 : divider 2(range = 2-65535)

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1.3. Functional Description

Setting the periodic output frequency to less than 1 Hz and using Synchronous Mode will cause the periodic output to be held at a logic high level. When a rate below 1PPS is desired, Asynchronous Mode must be used. Values of 0 or 1 for either n1 or n2 will also cause the periodic output to be held at a logic high level in either Synchronous or Asynchronous Modes.

Note that the PPO signal is multiplexed with the DDS signal, where one or the other signal is selected for output on the 15-pin I/O connector pin 15.

1.3.3. DDS Output

This DDS circuit is a frequency synthesizer that provides a square wave output with a frequency resolution of 0.03125 (1/32) Hz. Refer to manual section 1.4.5 on Digital Outputs for specifications.

The formula for setting the desired frequency is:

n Frequency x 32 = DDS tuning word value.

The DDS circuit has two synchronization modes, Continuous and Fractional.

Continuous mode

Continuous mode synchronizes the DDS circuit each second, maintaining rising edge timing to the card's on-time 1PPS signal. Continuous mode may be used when the DDS is set for an integer rate.

Fractional mode

Fractional mode allows the DDS circuit to generate a non-integer frequency after first being synchronized to the card's on-time 1PPS signal. Note that the DDS circuit is always re-synchronized to the 1PPS rising edge when a new frequency is chosen.

DDS fractional frequency example:

n Desired frequency:10,491,426.56 Hz

n Desired frequency x 32: (example 10,491,426.56 x 32 = 335,725,649.92 Hz)

n Rounded to integer 335,725,650

n Actual DDS frequency10,491,426.5625 Hz

This is the closest the DDS can get to the desired frequency with 1/32 Hz resolution.

Divider Source

The DDS circuit also includes 7 decades of divider that may be used. The DDS frequency is passed through a divider circuit before being output. The divider's input source may be selected to be one of the following:

1. DDS

2. Multiplier (DDS x multiplier)

3. 100 MHz PLL source

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1. PCI/PCIe TFP Hardware

Divider Mode

The divider can be used to generate low or fractional frequencies. The divide range is 1E0 through 1E7 in decades. The divider will also allow for fractional frequency outputs where the divider's input source is decimal shifted by up to seven places.

The divider has another selectable mode, Period Mode. This mode may be desirable when the DDS cannot be set exactly to the desired frequency but using a period value would be exact. When operating in this mode, the output is also a square wave with the period resolution equal to 2 times the period of the input (Divider Source). If the Divider Source of 100 MHz is selected, the period resolution is 20nS. When using 100 MHz as the Divider Source, a period register of 0 corresponds to a 40 nS period (25 MHz) which is Period Mode's upper limit. Use the following formula to set the Period Value Register.

Period Register = (Desired Period / (Divider Source period * 2)) - 2

Example of period mode calculation using 100 MHz Divider Source:

Desired period 59.3 ms= (59.3E-3 / 20E-9) - 2

Result= 2964998

Multiplier Mode

The DDS circuit also includes a frequency multiplier that may be used. The multiplier's input is the DDS and the output is DDS times the multiplication factor. This circuit can multiply the DDS frequency by 1, 2, 3, 4, 6, 8, 10 or 16. Note that the DDS frequency must be high or low enough for use (depends on multiplication factor - see following ranges).

Input (MHz)

x1 22 - 150 x2 x3 8 - 56 x4 6 - 38 x6 5 - 23

x8 5 - 19 x10 5 - 15 x16 5 - 10

When using the Multiplier Mode, the resolution of the DDS is 1/32 Hz * the multiplier value. The output of this circuitry is capable of creating interrupts. This circuit can generate rates that far exceed a computer's ability to service the DDS interrupts. Note that the DDS signal is multiplexed with the PPO signal, where one or the other signals is selected for output on the 15-pin I/O connector pin 15. The TFP card will load previously set DDS configuration registers at power-on.

11 - 75

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1.3. Functional Description

1.3.4. Time Coincidence Strobe Output

The TFP provides one Time Coincidence Strobe Output signal. The Strobe output is like an alarm that is activated at some preprogrammed time. The Strobe time can be set from days through microseconds. The duration of the Strobe pulse is one microsecond. Two modes of operation are supported. In one mode (STRMODE=0), both the major and minor times are used to generate the Strobe. In the other mode (STRMODE=1), only the minor time is used to generate the Strobe output, producing an output pulse once each second. The Strobe is programmed using the CONTROL Register as described in "CONTROL Register (0x10)" on page 28.

1.3.5. PCI(e) Interrupts

The TFP supports the seven interrupt sources listed in Table 1. Each interrupt source can be individually masked off. Use the MASK register to mask on or off each interrupt source. Each interrupt source sets a corresponding bit in the INTSTAT register when the interrupt occurs. When servicing a TFP interrupt, the Interrupt Service Routine (ISR) in the driver reads the INTSTAT register in order to determine the interrupt source(s) requesting service.

Table 1: TFP Interrupt Sources

Int Interrupt Source

0 Signal transition on Event Input has occurred (edge selected by EVSENSE) 1 PPO edge has occurred (edge selected by EVSENSE) 2 Time Coincident Strobe output rising edge has occurred 3 One second epoch (1 PPS output) rising edge has occurred 4 GPS data packet is available (bc637pci-V2 only) 5 Signal transition on Event2 Input has occurred 6 Signal transition on Event3 Input has occurred

1.3.6. Additional Timing Output Signals

The 1 PPS output is a 60 μsec wide pulse with the rising edge occurring at each 1 second epoch.

A Time Code output signal is available in both AM and DCLS forms simultaneously.

An output frequency of 1 MHz, 5 MHz, or 10 MHz (HCMOS) is selectable.

1.3.7. AM Time Code Calibration

The following AM Time Code calibration procedure is used to adjust the phase of the Time and Frequency Processor when operating in Time Code Mode and using an AM (amplitude modulated)

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1. PCI/PCIe TFP Hardware

input reference. Modulation ratio, carrier frequency, impedance loading, and other effects may degrade time code performance accuracy. Some applications require very high synchronization accuracy while using AM time codes as a reference. The following calibration procedure helps assure the best time code synchronization accuracy. Because of the inherent differences in the time codes, a different calibration factor exists for each time code type. The user should determine which time code to use in their system, and then perform the calibration for that code. The user can consult Symmetricom if unsure of which code type is best for their application.

1.3.8. Calibration Procedure

The following procedure uses the Windows based bc635PCIcfg.exe program to perform the adjustments. This procedure will synchronize the on-time mark of an incoming time code reference with the rising edge of an incoming 1 PPS signal. (The accuracy of this calibration is limited by the synchronization of the incoming 1 PPS and the on-time mark of the incoming time code).

1. Connect the AM Time code reference to the Time code Input on J1 pin 7 of the TFP card.

2. Select the Format and Modulation type for the reference Time code (using the bc635PCIcfg.exe pull down menu “Time code > Decode”).

3. Connect the 1 PPS reference to the External Event Input on J1 pin 6 of the TFP card.

4. Enable the External Event Input on the Rising Edge (using the bc635PCIcfg.exe pull down menu “Signals > Events”, and select External Input and Rising Edge).

5. Read the minor event time (using the bc635PCIcfg.exe pull down menu “Time > Get Event Time”).

6. Repeat the previous step to obtain an average value. You may have to average two neighboring values (e.g., the average of x.000012 and x.000013 is x.0000125).

7. Convert the minor event time to a calibration factor. If the minor event time is close to rolling over (i.e., x.999950), subtract 1 from the minor event time to get the calibration factor in microseconds (e.g., -50 uS or 50E-6 sec); otherwise the minor event time is the calibration factor (e.g., X.000012 = 12 uS or 12E-6 sec).

8. Convert the units of the calibration factor measured in the previous step from microseconds to hundreds of nanoseconds by multiplying it by 10 (12 uS = 120 hundreds of ns). x hundreds of nanoseconds is equivalent to xE-7sec.

9. Set the Propagation delay on the card to the calibration factor in units of hundreds of nanoseconds as calculated in the previous step (using the bc635PCIcfg.exe pull down menu “Time > Set Prop Delay”).

10. Read the minor event time (using the bc635PCIcfg.exe pull down menu “Time > Get Event Time”), and verify that the minor time reading is .000000.

If the minor event time is greater than ±1 uS, adjust the calibration factor as necessary.

Note: Keep this calibration factor and the associated time code type (i.e., IRIG B AM CAL = +120E-7) in a safe place. If another time code type is to be used as a reference, a new calibration factor should be determined for that code.

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1.3. Functional Description

1.3.9. Field Upgrade of Embedded Program

New versions of the bc63xPCI-V2 (identifiable by the status LED on the front panel) and the bc63xPCIe cards are upgraded over the host PC’s PCI or PCIe bus. Included on the product CD is the update program named bcUpgFmware.exe. This Windows based program is used to update the firmware in the TFP’s flash memory.

Older versions of the bc63xPCI-V2 cards (identifiable by the circular DIN connector on the front panel) use a serial port interface for firmware updates. TFP cards use flash memory, which is upgraded using an embedded boot loader program. The user transfers the program file that is in S Record format to the card via a serial port running a terminal program that supports a “text” file transfer format (e.g. TeraTerm or Hyperterminal). Insertion of the mating DIN connector is automatically detected which places the card in its boot load mode. The following procedure uses TeraTerm, an open source terminal emulator.

TeraTerm is configured as follows:

Setup/Serial port...

ll Port:COMx l Baud rate:19200

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1. PCI/PCIe TFP Hardware

l Data:8 bit l Parity:none l Stop:1 bit l Flow control:none l Transmit delay:

Setup/Terminal...

l New-line l Receive:CR l Transmit:CR l Local echo: not selected

After plugging in the DIN serial port adapter that is connected to a serial port running TeraTerm as configured above, the following string should be output to the terminal screen:

<E>rase , <P>rogram or <R>un Application:

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1.3. Functional Description

1. Select <E> to erase the Flash, then select again after the message <Erased> has been returned.

2. Select <P>. Use File/Send file... (in Tera Term pulldown), a dialog box appears to select the file that is to be sent (e.g. bc635-v2.sx). The file should begin transferring with a string of asterisks being sent back to the terminal screen until the file transfer is complete (approximately 408KB). It takes approximately 5 minutes to download the new file.

3. Select <R> to run the application.

Note: The application is set up to run automatically. However, if the serial cable is connected to the card, but not to the host computer, the application will hang, awaiting response from the host. If the application does not run automatically, disconnect the serial cable from the card.

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1. PCI/PCIe TFP Hardware

1.4. Device Registers

1.4.1. General

The Time & Frequency Processor (TFP) is controlled by a combination of hardware device registers and a dual-port RAM interface. This chapter describes the TFP device registers. "1.5. Dual-Port RAM Interface" on page 35 describes the dual-port RAM interface.

1.4.2. PCI Memory Map

The TFP is divided into two 2K memory spaces, Dual-Port RAM and Register. The following table lists the card's physical memory map.

TFP Physical Memory Map

Start Type Size Register Field

PCI Auto R/W 0x800 Dual Port RAM PCI Auto R/W 0x50 (0x800 reserved) Device Registers

1.4.3. Device Register Description

The TFP device registers are 32-bits wide (PCI word size). For many of the registers, only a few of the bits have any significance while the rest of the bits are ignored during writes and are meaningless during reads. Registers may be:

l Read only (R) l Write only (W) l Read/write (R/W) l Access (A)

Access type registers perform a function simply by being read or written without regard to the data contents. It is best to use a write operation with the access type registers because most optimizing compilers will remove statements that read a register but do nothing with the data returned. In some cases, a read/write register is structured to support dissimilar data in the read and write directions. The following table summarizes the type of register located at each offset and provides a brief description of the register function.

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1.4. Device Registers

TFP Device Register Summary

Offset Type Reset Label Description

0x00 A See Note TIMEREQ Time Request (TIME0-1) 0x04 A See Note EVENTREQ Event Request (EVENT0-1) 0x08 A See Note UNLOCK1 Release Lockout Event1 0x0C A See Note UNLOCK2 Release Lockout Event2

0x10 R/W 0 CONTROL Control Register 0x14 R/W See Note ACK Acknowledge Register 0x18 R/W 0 MASK Interrupt Mask 0x1C R/W 0 INTSTAT Interrupt Status 0x20 R/W See Note MINSTRB Minor Strobe Time 0x24 R/W See Note MAJSTRB Major Strobe Time 0x28 R See Note EVENT2_0 Minor Event2 Register 0x2C R See Note EVENT2_1 Major Event2 Register

0x30 R See Note TIME0 Minor Time Holding Register 0x34 R See Note TIME1 Major Time Holding Register 0x38 R See Note EVENT0 Minor Event1 Register 0x3C R See Note EVENT1 Major Event1 Register 0x40 Reserved 0x44 A See Note UNLOCK3 Release Lockout Event3 0x48 R See Note EVENT3_0 Minor Event3 Register 0x4C R See Note EVENT3_1 Major Event3 Register

Note:Register contents are undefined at reset.

TIMEREQ Register (0x00)

Accessing this register (with a read or write operation) latches the current time and timing status in the TIME0 - TIME1 registers. The data value transferred is meaningless.

EVENTREQ Register (0x04)

Accessing this register (with a read or write operation) latches the current time and timing status in the EVENT0 - EVENT1 registers. The data value transferred is meaningless. Accessing the

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1. PCI/PCIe TFP Hardware

EVENTREQ register does not generate an Event Input interrupt.

UNLOCK1 Register (0x08)

Accessing this register (with a read or write operation) releases the EVENT1 time capture lockout function if it has been enabled, allowing the Event Input or Periodic/DDS Output to capture a new time. The Event Time Capture Lockout is enabled using bit 0 in the CONTROL Register (LOCKEN1).

UNLOCK2 Register (0x0C)

Accessing this register (with a read or write operation) releases the EVENT2 time capture lockout function if it has been enabled, allowing a new event to be captured. The Event2 Time Capture Lockout is enabled using bit 8 in the CONTROL Register (LOCKEN2).

CONTROL Register (0x10)

This register controls a variety of TFP hardware functions. The following table lists the function of each bit in this register.

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CONTROL Register

Bit Name Function

EVENT1 Capture Lockout Enable

1.4. Device Registers

0 LOCKEN 1

1 EVSOURCE

2 EVSENSE1

3 EVENTEN1

4 STREN

0 = Disable Lockout

1 = Enable Lockout EVENT1 Time Capture Register Source Select

0 = Event Input

1 = Periodic/DDS

(Select Active Edge With EVSENSE) Event1 Edge Select

0 = Rising

1 = Falling Event1 Capture Register Enable

0 = Disable

1 = Enable

(Use EVSOURCE to Select Event Source) Time Coincidence Strobe Output Enable

0 = Disable (Strobe Output is Held Low)

1 = Enable Time Coincidence Strobe Mode

5 STRMODE

6 FREQSEL0

7 FREQSEL1

8 LOCKEN2

0 = Use Major and Minor Time for Strobe Function

1 = Use Minor Time Only for Strobe Function

If STRMODE = 1, an Output Strobe is Produced Each Second Output Frequency Select

00 = 10MHz

01 = 5MHz

1X = 1MHz Output Frequency Select

00 = 10MHz

01 = 5MHz

1X = 1MHz EVENT2 Capture Lockout Enable

0 = Disable Lockout

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1. PCI/PCIe TFP Hardware

Bit Name Function

1 = Enable Lockout Event2 Edge Select

9 EVSENSE2

10 EVENTEN2

11 Reserved

12 LOCKEN3

13 EVSENSE3

14 EVENTEN3

15 - 31 Reserved

0 = Rising

1 = Falling Event2 Capture Enable

0 = Disable

1 = Enable

EVENT3 Capture Lockout Enable

0 = Disable Lockout

1 = Enable Lockout Event3 Edge Select

0 = Rising

1 = Falling Event3 Capture Enable

0 = Disable

1 = Enable

Note: Register contents are undefined at reset.

Examples: 0x08 enables event1, 0x400 enables event2, 0x4000 enables event3.

The EVSOURCE bit selects one of two signal sources for capturing time in the EVENT1 registers; either the Event Input signal from the Signal I/O connector or the PPO/DDS Output. When PPO/DDS is selected as the Event Source, the PPO/DDS and Event Input are internally connected, eliminating the need for an external physical connection.

The EVENTENx bit is used to enable capture of time into the respective EVENTx registers.

The EVSENSEx bit controls the active edge that is used to capture time into the respective EVENTx registers.

Enabling the Lockout function via the LOCKENx bit allows only the first instance of the selected signal source to latch time in the respective EVENTx registers, locking out any subsequent events. Use the UNLOCKx register (0x08, 0x0C, 0x44) to re-arm the respective circuits.

ACK Register (0x14)

The ACK register is used to prevent dual-port RAM data contention when the same address on both sides of a dual-port RAM is accessed simultaneously. See "Command 0x14: Set Periodic Output" on

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1.4. Device Registers

page 43 for more information on the format and use of this register.

MASK Register (0x18)

The TFM supports the seven interrupt sources listed in the following table. Each interrupt source can be individually masked on or off using the MASK register (0x18). Each interrupt source sets a corresponding bit in the INTSTAT register (0x1C) when the interrupt occurs.

Bits 0-6 in the MASK register correspond to interrupt sources zero through six listed in the following table. An interrupt source is enabled (to generate a PCI interrupt) by writing a value of one to the corresponding MASK bit. Writing a zero to the interrupt MASK bit disables that interrupt source.

INTSTAT Register (0x1C)

The INTSTAT register has the same structure as the MASK register listed in the following table. Each interrupt source sets its corresponding bit in this register when it occurs. The INTSTAT register bits get set regardless of the state of the MASK bits. INTSTAT bits are cleared by writing to the INTSTAT register with the corresponding bit(s) set. For example, to clear INTSTAT bit zero, write 0x01 to the INTSTAT register. To clear all INTSTAT bits simultaneously, write 0x7F to the INTSTAT register. The corresponding INSTAT bit MUST be cleared in order to enable the next interrupt occurrence.

A PCI interrupt is generated anytime one or more INTSTAT bits [0 through 6] are set and the corresponding bit(s) are set in the MASK register and interrupts have been enabled (started).

INTSTAT Register

Bit Function

0 Event Input has occurred 1 Periodic/DDS Output has occurred 2 Strobe (time coincidence) has occurred 3 1 PPS output has occurred 4 GPS Data Packet is available (bc637 models only) 5 Signal transition on Event2 Input has occurred 6 Signal transition on Event3 Input has occurred 7-31 Reserved

Note: Register contents are undefined at reset.

MINSTRB (0x20) – MAJSTRB (0x24) Registers

These registers hold the programmed Time Coincidence Strobe time. The contents of these registers depend on the time format selected. The Strobe time is programmable from hours through microseconds in the decimal time format. When the time format is set to binary, only the 22 least sig-

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1. PCI/PCIe TFP Hardware

nificant bits of the major time are used (in addition to microseconds), this allows the user to program the Strobe to become activated up to 48 days beyond the current time.

Note: Disable the Strobe output (see CONTROL register) while programming the Strobe time to prevent spurious Strobe output pulses.

EVENT2_0 (0x28) – EVENT2_1 (0x2C) Registers

These read only registers hold the minor time (EVENT2_0) and major time (EVENT2_1) captured from an event on the EVENT2 input. The contents of these registers depend on the time format selected (see Time Format).

TIME0 (0x30) - TIME1 (0x34) Registers

These read only registers hold time captured by an access of the TIMEREQ register (0x00) providing a software time capture. The contents of these registers depend on the time format selected (see Time Format).

EVENT0 (0x38) - EVENT1 (0x3C) Registers

These read only registers hold time captured when the EVENTREQ register is accessed (0x04) by an Event Input (if enabled), or a PPO/DDS signal is generated (if enabled). The contents of these registers depend on the time format selected (see Time Format).

UNLOCK3 Register (0x44)

Accessing this register (with a read or write operation) releases the EVENT3 time capture lockout function if it has been enabled, allowing a new event to be captured. The Event3 Time Capture Lockout is enabled using bit 12 in the CONTROL Register (LOCKEN3).

EVENT3_0 (0x48) – EVENT3_1 (0x4C) Registers

These read only registers hold the minor time (EVENT3_0) and major time (EVENT3_1) captured from an event on the EVENT3 input. The contents of these registers depend on the time format selected (see Time Format).

1.4.4. TIME FORMAT

The TFP major time registers (TIME1, EVENT1, Event2_1, Event3_1, MAJSTRB) support binary time (Table 2) and decimal time (Table 3) formats. Sub-second time (minor time) is always represented in binary format. The 32-bit binary format represents time as the number of seconds since midnight, January 1, 1970 UTC (Universal Time Coordinated), which is the standard time format found on most UNIX systems. Note that the year field is stored in the dual-port RAM. The decimal time format is derived from the “struct-tm” format used on UNIX systems. The bottom numbers in

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1.4. Device Registers

each cell in Table 2 and Table 3 define the bit positions for each data field. All undefined bit positions in Table 3 are N/A.

Table 2. TFP Binary Time Format

31-28 27-24 23-20 19-16 15-8 7-0

TIME1

EVENT1

EVENT2_1

EVENT3_1

TIME0

EVENT0

EVENT2_0

EVENT3_0

MAJSTRB N/A

MINSTRB N/A

Major Time UNIX Seconds

31 - 0

N/A

31 - 28

31 - 22

31 - 28

Status

27 - 24

Status

27 - 24

100 ns

23 - 20

Major Time UNIX Sec (22 bits LSB)

21 - 0

N/A

23 20

Binary microseconds

19 - 0

Binary microseconds

19 - 0

Table 3. TFP Decimal Time Format

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1. PCI/PCIe TFP Hardware

31 - 28 27-24 23-20 19-16 15-8 7-0

TIME1_

EVENT1

EVENT2_1

EVENT3_1 TIME0_

EVENT0

EVENT2_0

EVENT3_0

MAJSTRB

MINSTRB

Days (0-366)

Bits 7 - 0

31 - 24

Days

Bit 8

N/A

31 - 24

N/A

31 - 28

Status

27 - 24

Status

27 - 24

Hours

(0 - 23)

20 - 16

100 nS

23 - 20

hours

(0 - 23)

20 - 16 N/A

23 - 20

Min

(0 - 59 )

12 - 8

Sec

(0 - 59)

5 - 0

Binary microsecond 19 - 0

Min

(0 - 59)

12 - 8

Sec

( 0 - 59)

5 - 0

Binary microseconds

19 - 0

The format of the minor time registers (TIME0, EVENT0, Event2_0, Event3_0, MINSTRB) is always binary, 20 bits of binary microseconds (0 - 999,999) in the lower part of the registers with an additional four bit field of hundreds of nanoseconds (0 - 9) located in bits 20 - 23. Most UNIX time functions use microseconds, but the TFP maintains time to hundreds of nanoseconds.

STATUS BITS

The TFP Status bits found in the minor time registers are summarized in the following table and are described below. Bits 24, 25 and 26, in the PCI Windows configuration program, are represented as LEDs labeled:

l Tracking (T) l Phase (P) l Frequency (F)

(0 = Green, 1 = Red).

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Status Bits Summary

Bit Description

Tracking (T)

1.5. Dual-Port RAM Interface

27 Reserved

0: Locked To Selected Reference

1: Flywheeling (Not Locked) Phase (P)

0: < X Microseconds

1: > X Microseconds

X = 5 (Mode 0) X = 2 (All Other Modes) Frequency (F)

0: < 5 x 10-8

1: > 5 x 10-8

STATUS: Tracking (Bit 24)

This bit indicates that the TFP is not tracking the reference time source, usually because the time source has been lost or has become unusable. When a timing Mode change occurs, this bit is set until the TFP locks to the new timing source.

STATUS: Phase (Bit 25)

This bit indicates the synchronization accuracy of the TFP relative to the timing source. This bit is updated approximately once per second. When the TFP's oscillator is synchronized to less than 5 microseconds with AM time code mode as a reference and less than 2 microseconds in other modes, this bit is cleared.

STATUS: Frequency Offset (Bit 26)

This bit is an indication of the TFP on-board oscillator frequency offset relative to the timing source. This bit reflects the short-term stability of the TFP's oscillator.

1.5. Dual-Port RAM Interface

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1. PCI/PCIe TFP Hardware

1.5.1. General

The byte-wide dual-port RAM (DPRAM) interface provides a communications pathway between the user and the Time & Frequency Processor (TFP) micro-controller (MPU). The RAM size is 2Kx8. The ACK register is used in conjunction with the DPRAM to avoid data contention when a memory location is accessed simultaneously from both sides of the DPRAM. Four areas within the DPRAM are available to the user:

Input Area

This area is used for sending commands to the TFP to set the timing mode, time code format, etc. This area is also used to send data packets to the optional GPS receiver.

Output Area

This area holds data that the user requests from the TFP.

GPS Area

This area holds packets of data from the optional GPS receiver such as position, velocity, GPS status, etc.

Year Area

This area holds the year number derived from the timing source (if available). The year value is restored after a power cycle.

DPRAM Address and Contents

Data Size Offset

Year Area 2 bytes 0x00 GPS Area 0x80 bytes 0x02 Output Area 0x80 bytes 0x82 Input Area 0x80 bytes 0x102

1.5.2. ACK Register

This register is used to prevent dual-port RAM data contention when the same address on both sides of a dual-port RAM is accessed simultaneously. Only three bits in this register are used, and each bit operates independently. The function of each bit in this register is described below.

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1.5. Dual-Port RAM Interface

ACK Bit 0

Set by the TFP to acknowledge the receipt of a user command from the DPRAM Input Area. The user can clear this bit by writing to the ACK register with bit 0 set, but cannot set this bit.

ACK Bit 2

Set by the TFP to indicate that a GPS packet is available in the DPRAM GPS Packet Area. The user can clear this bit by writing to the ACK register with bit two set, but cannot set this bit. The transition of this bit from zero to one activates interrupt source four.

ACK Bit 7

The user writes to the ACK register with bit seven set to cause the TFP to read a command from the DPRAM Input Area. This bit has no meaning when read.

1.5.3. TFP DPRAM Commands

This section describes the TFP commands available through the DPRAM Interface. Commands consist of a command ID byte followed by zero or more data bytes. The command ID byte is written to the first location in the DPRAM Input Area, followed by the command data byte(s). The following command data types are used. Command data is loaded into the DPRAM in the Big-Endian fashion, most significant byte first. The following table summarizes the DPRAM commands.

DPRAM Commands

UINT8 Unsigned 8 Bit Integer (1 Byte) INT8 Signed 8 Bit Integer (1 Byte) UINT16 Unsigned 16-Bit Integer (2 Bytes) INT16 Signed 16-Bit Integer (2 Bytes) UINT32 Unsigned 32-Bit Integer (4 Bytes) INT32 Signed 32-Bit Integer (4 Bytes) FLOAT ANSI / IEEE Std 754 Standard Floating-Point Format (4 Bytes) DOUBLE ANSI / IEEE Std 754 Standard Floating-Point Format (8 Bytes)

The following steps should be followed when sending commands to the TFP.

1. Write the command ID and data bytes to the DPRAM starting at the first location in the Input Area.

2. Clear bit zero of the ACK register by writing 0x01 to the ACK register.

3. Inform the TFP that a command is waiting by writing 0x80 to the ACK register.

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1. PCI/PCIe TFP Hardware

4. Wait for the TFP to set bit 0 of the ACK register. Do not begin writing another command to the Input Area until this bit becomes set.

Windows example (uses bc635PCIcfg.exe GUI):

Set the Periodic rate output to 10KPPS and Synchronous Mode.

Select the Advanced Menu.

Use the Special Tab and the DP RAM selection from the menu list.

a. Offset 102 (input packet base address)

b. Value 14 (14 is the set periodic output command ID)

c. select the WRITE button

d. Offset 103

e. Value 1 (value of 1 here selects Synchronous Mode)

f. select the WRITE button

g. Offset 104

h. Value 0 (msb of n1 value)

i. select the WRITE button

j. Offset 105

k. Value a (lsb of n1 value set to decimal 10)

l. select the WRITE button

m. Offset 106

n. Value 0 (msb of n2 value)

o. select the WRITE button

p. Offset 107

q. Value a (lsb of n2 value set to decimal 10)

r. select the WRITE button

s. select the ACK button and the Periodic output will be set.

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1.5. Dual-Port RAM Interface

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DPRAM Command Summary

ID Reset Command

0x10 NV Set TFP Timing Mode 0x11 1 Set Time Register Format (1 = binary, 0 = bcd) 0x12 RTC Set Major Time 0x13 RTC Set Year 0x14 NV Set Periodic Output 0x15 NV Set Input Time Code Format 0x16 NV Set Input Time Code Modulation 0x17 NV Set Propagation Delay Compensation 0x18 NV Request UTC Time Data (bc637 only) 0x19 N/A Request TFP Data 0x1A N/A Software Reset 0x1B NV Set Time Code Output Format 0x1C NV Set Generator Time Offset 0x1D NV Set Local Time Offset 0x1E 0 Set Leap Second Event 0x1F N/A Request Firmware information 0x20 NV Set Clock Source (0 = Internal, 1=External) 0x21 1 Control Jamsync 0x22 N/A Force Jamsync 0x24 NV Load DAC 0x25 N/A Set Disciplining Gain 0x26 N/A Battery Connection Status 0x27 N/A Synchronize RTC to TFP Time 0x28 N/A Battery Connection Control 0x30 N/A Send Packet to GPS Receiver (bc637 only) 0x31 N/A Request Packet from GPS Receiver (bc637 only) 0x32 N/A Manual Request GPS Packet (bc637 only) 0x33 0 Select GPS Time Format (bc637 only)

0x40 NV Observe Local Time Flag 0x41 NV IEEE 1344 Daylight Saving and Local Time Flags 0x43 NV Periodic/DDS Select (0=Periodic, 1=DDS) 0x44 NV Periodic/DDS Enable (0 = OFF, 1=ON) 0x45 NV DDS Divide Select 0x46 NV DDS Divide Source 0x47 NV DDS Sync Mode 0x48 NV DDS Multiplier 0x49 NV DDS Period Value 0x4A NV DDS Tuning Word 0x4F N/A Request PCI Firmware Part Number 0xF6 N/A Request TFP Model Identification 0xFE N/A Request TFP Serial Number (Request only)

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n RTC: Real Time Clock (Restored at Power-on)

n NV: Non Volatile (Restored at Power-on)

Command 0x10: Set TFP Timing Mode

This command selects the timing mode of the TFP.

Byte Type Item Value or Range

0 UINT8 ID 0x10 1 UINT8 Timing Mode See Below

TFP Timing Mode:

n 0x00 Time Code (Selected Time Code AM or DCLS)

1.5. Dual-Port RAM Interface

n 0x01 Free Running (Internal or External 10 MHz Reference Selected)

n 0x02 1 PPS (External One Pulse Per Second)

n 0x03 Real Time Clock (Battery backed RTC)

n 0x06 GPS (bc637 only)

Command 0x11: Set Time Register Format

This command allows the user to select the major time format. Available time formats are Binary Coded Decimal (BCD) and UNIX (Binary). The time format affects the TIMEx, and EVENTx registers and Command 0x12. See Table 1 and Table 2 for the UNIX and BCD time register definitions, respectively.

Byte Type Item Value or Range

0 UINT8 ID 0x11 1 UINT8 Data Format See Below

Time Data Format:

n 0x00 BCD TIME FORMAT

n 0x01 UNIX TIME FORMAT (default)

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1. PCI/PCIe TFP Hardware

Command 0x12: Set Major Time

This command allows the user to load the major time to the TFP Major Time Registers in binary (UNIX) or BCD format. The format is determined by Command 0x11 as referenced above. The default major time format is UNIX binary time. This command normally applies to the TFP while in time modes 1, 2 or 3. The TFP derives its major time from the selected external timing reference signal in time modes 0 and 6, and from the RTC in mode 3. If time mode 0 or 6 is used, any major time written by this command will be overwritten when the selected source is providing a valid time to the TFP.

Byte Type Item Value or Range

0 UINT8 ID 0x12

Case 1: UNIX Time Data Format = 0x01 (Command 0x11, format 0x01) default

Byte Type Item Value or Range

1-4 UINT32 UNIX Time 0 to 0xffffffff

Case 2: BCD Time Data Format = 0x00 (Command 0x11, format 0x00)

Byte Type Item Value or Range

0 UINT8 ID 0x12 1-2 UINT16 Year 1970 - 2036 3-4 UINT16 Days 0 to 0x16e (0 to 366) 5 UINT8 Hours 0 to 0x17 (0 to 23) 6 UINT8 Minutes 0 to 0x3b (0 to 59) 7 UINT8 Seconds 0 to 0x3b (0 to 59)

The time loaded by this command will not be readable until the one-second epoch following the load. There is a possibility the TFP will have incremented the time during the load. To prevent ambiguities in the time, the user must issue this command in advance of the 800-millisecond point within the onesecond epoch, referencing the current epoch.

This command normally applies to the TFP modes 1 and 2. The TFP derives its major time from the timing reference signal in other modes. The format data of this command depends on the Command 0x11 time format selection.

Command 0x13: Set Year

This command allows the user to set the year.

Byte Type Item Value or Range

0 UINT8 ID 0x13 1 UINT16 Year 1970 - 2036

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1.5. Dual-Port RAM Interface

Command 0x14: Set Periodic Output

This command establishes the frequency of the TFP Programmable Periodic Output. "1.3.2. Heartbeat Output" on page 18 describes the relationship between the dividers n1, n2 and the Periodic Output frequency.

Byte Type Item Value or Range

0 UINT8 ID 0x14

0 = Don't Sync To 1PPS

1 UINT8 Sync Flag

1 = Sync To 1 PPS 2-3 UINT16 Divider n1 2 - 65535 4-5 UINT16 Divider n2 2 - 65535

Command 0x15: Set Input Time Code Format

This command selects the time code format for TFP Timing Mode “0” time code input. (See Command 0x10.) Use Command 0x16 to set the modulation type. Note that this selection is restored at power-up from NV memory.

Byte Type Item Value or Range

0 UINT8 ID 0x15 1 UINT8 Format1 See below 2 UINT8 Format2 See below

Format Choices:

Format1 Format2 ASCII AM Time Code DCLS

0x41 0x0 'A' A130,1,2,3 IRIG A no year A000,1,2,3 0x41 0x59 'AY' A134,5,6,7 IRIG A w/year A004,5,6,7 0x42 0x0 'B' B120,1,2,3 IRIG B no year B000,1,2,3 0x42 0x59 'BY' B124,5,6,7 IRIG B w/year B004,5,6,7 0x45 0x0 'E' E121,2 IRIG E 1K no year E001,2 0x45 0x59 'EY' E125,6 IRIG E 1K w/year E005,6 0x65 0x0 'e' E111,2 IRIG E 100 no year E001,2 0x65 0x59 'eY' E115,6 IRIG E 1K w/year E005,6 0x47 0x0 'G' E141,2 IRIG G no year G001,2 0x47 0x59 'GY' E145,6 IRIG G w/year G005,6 0x42 0x54 'BT' AM IRIG B TrueTime DCLS 0x49 0x0 'I' AM IRIG B IEEE 1344 DCLS 0x4e 0x0 'N' AM NASA 36 DCLS 0x58 0x0 'X' AM XR3 (250 Hz) DCLS 0x32 0x0 '2' AM 2137 (1 kHz) DCLS

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1. PCI/PCIe TFP Hardware

Note that AM time codes with carrier frequencies less than 1 KHz (IRIG E111, 2, 5, 6 @ 100 Hz and XR3 @ 250 Hz) will decode properly but will not necessarily maintain short term phase and frequency lock. Long term, the low frequency carrier time codes maintain phase and frequency with reduced accuracy. Phase and frequency accuracy is better when using DCLS time codes.

Note: that when Legacy TrueTime IRIG B is used, the TFP will decode the “Lock” bit that is encoded in the Control Function area and will not lock to the incoming code if the bit = 1 (an indication of unlock from the input reference).

Command 0x16: Set Input Time Code Modulation Type

This command selects the time code modulation type format for TFP Timing Mode “0” time code input (See Command 0x10). Use Command 0x15 to select the time code format.

Byte Type Item Value or Range

0 UINT8 ID 0x16 1 UINT8 modulation See below

Modulation Choices:

n 0x4D ('M') amplitude modulated sine wave (AM)

n 0x44 ('D') DC level shift (DCLS)

Command 0x17: Set Propagation Delay Compensation

It is sometimes desired to program an offset into the basic TFP time keeping functions relative to the reference input. For example, if the reference input is an IRIG B time code, there may be significant cable delay between the IRIG B generator and the TFP location. This command allows this time difference to be removed by inserting the known amount of offset between the IRIG B reference and TFP location. The offset is programmable in units of 100 nanoseconds, and may be positive or negative.

Byte Type Item Value or Range

0 UINT8 ID 0x17 1-4 UINT32 offset -4,000,000 to +4,000,000

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1.5. Dual-Port RAM Interface

Command 0x18: Request UTC Time Data (bc637 only)

This command queries current GPS and UTC time information derived from the GPS receiver. This command must be used in conjunction with Command 0x19.

Byte Type Item Value or Range

0 UINT8 ID 0x18 1 UINT8 GPS Time Format See below 2 UINT8 Leap Second 0 to 0xff 3 INT8 Leap Second Flag See below 4-7 UINT32 Leap Event UNIX Time 0 to 0xffffffff

GPS Time Format:

n 0x00 UTC Time (GPS time plus leap seconds)

n 0x01 GPS Time

Leap Second Flag:

n 0xff Deletion Event

n 0x00 No Event

n 0x01 Addition Event

Command 0x19: Request TFP Data

This command requests data from the TFP that is not available via the device registers. The TFP transfers the requested data to the DPRAM Output Area. The data is available to the user as soon as the TFP sets ACK bit 0.

Byte Type Item Value or Range

0 UINT8 ID 0x19 1 UINT8 Req. data type (See Below)

Requested Data Type Choices

0x10 Timing Mode 0x11 Timing Format 0x13 Current Year 0x14 Periodic Output (Sync Flag only) 0x15 Time Code Format 0x16 Time Code Modulation 0x17 Propagation Delay 0x18 UTC Time Data (bc637) 0x1B Time Code Output Format

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1. PCI/PCIe TFP Hardware

0x1C Generator Time Offset 0x1D Local Time Offset 0x1E Leap Second Setting 0x1F TFP Firmware Information 0x20 Clock Source (on-board/external) 0x21 Jamsync Control 0x24 DAC Value 0x26 Battery Connection Status 0x4F FW Revision 0xF4 Assembly Number 0xF5 Hardware Revision 0xF6 TFP Model 0xFE Serial Number

Command 0x1A: Software Reset

This command vectors the TFP MPU to its power-on reset point and contains no data.

Command 0x1B: Set Time Code Output Format

This command allows the user to select the time code format that is generated by the TFP on J1. Note that this selection is restored at power-up from NV memory.

Byte Type Item Value or Range

0 UINT8 ID 0x1B 1 UINT8 Format1 See below 2 UINT8 Format2 See below

Time Code Output Formats:

Format1 Format2 ASCII AM Time Code DCLS

0x41 0x30 'A0' A130 BCD, CF, SBS A000 0x41 0x31 'A1' A131 BCD, CF A001 0x41 0x32 'A2' A132 BCD A002 0x41 0x33 'A3' A133 BCD, SBS A003 0x41 0x34 'A4' A134 BCD, YR, CF, SBS A004 0x41 0x35 'A5' A135 BCD, YR, CF A005 0x41 0x36 'A6' A136 BCD, YR A006 0x41 0x37 'A7' A137 BCD, YR, SBS A007 0x42 0x30 'B0' B120 BCD, CF, SBS B000 0x42 0x31 'B1' B121 BCD, CF B001 0x42 0x32 'B2' B122 BCD B002 0x42 0x33 'B3' B123 BCD, SBS B003

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1.5. Dual-Port RAM Interface

Format1 Format2 ASCII AM Time Code DCLS

0x42 0x34 'B4' B124 BCD, YR, CF, SBS B004 0x42 0x35 'B5' B125 BCD, YR, CF B005 0x42 0x36 'B6' B126 BCD, YR B006 0x42 0x37 'B7' B127 BCD, YR, SBS B007 0x42 0x0 'B' B122 BCD B002 0x42 0x54 'BT' AM Legacy TrueTime DCLS 0x49 0x0 'I' AM IEEE 1344 DCLS 0x45 0x31 'E1' E121 BCD, CF E001 0x45 0x32 'E2' E122 BCD E002 0x45 0x35 'E5' E125 BCD, YR, CF E005 0x45 0x36 'E6' E126 BCD, YR E006 0x65 0x31 'e1' E111 BCD, CF E001 0x65 0x32 'e2' E112 BCD E002 0x65 0x35 'e5' E115 BCD, YR, CF E005 0x65 0x36 'e6' E116 BCD, YR E006 0x47 0x35 'G5' G145 BCD, YR, CF G005 0x4E 0x0 'N' AM Nasa 36 DCLS 0x58 0x0 'X' AM XR3 DCLS 0x32 0x0 '2' AM 2137 DCLS

IRIG Control Function (CF) Bits In the following tables, tq1 through tq4 are time quality bits. For time quality and unlock bits, "1" means active.

For IRIG output codes A, B, E or G with CF bits, the following CF bits are encoded:

Index Bit

count name

----- -----

70 (0)

71 (0)

72 (0)

73 unlock (1 = unit not locked to reference)

74 (0)

75 tq1 (1 = timing error estimate > 1us)

76 tq2 (1 = timing error estimate > 10us)

77 tq3 (1 = timing error estimate > 100us)

78 tq4 (1 = timing error estimate > 1ms)

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1. PCI/PCIe TFP Hardware

For Legacy TrueTime IRIG B, the following CF bits are encoded:

Index Bit

count name

----- -----

50 (0)

51 (0)

52 (0)

53 unlock (1 = unit not locked to reference)

54 (0)

55 tq1 (1 = timing error estimate > 1us)

56 tq2 (1 = timing error estimate > 10us)

57 tq3 (1 = timing error estimate > 100us)

58 tq4 (1 = timing error estimate > 1ms)

Note that when Legacy TrueTime IRIG B is selected, CF bits are encoded. The unlock bit may be used to inform time code readers of the generators lock status.

Command 0x1C: Set Generator Time Offset

This command is used to add/subtract an offset to the time code generator output. This command affects the generator output only.

Byte Type Item Value or Range

0 UINT8 ID 0x1C 1-2 UINT16 Local Offset 0xfff0 to 0x0010 (-16 to +16) 3 UINT8 Half Hour 0 or 1

HALF HOUR:

n 0 = half hour not present (30 min)

n 1 = half hour present (30 min)

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1.5. Dual-Port RAM Interface

Command 0x1D: Set Local Time Offset

This command adds/subtracts local time offset to the TFP time. This command affects the TFP time only; the generator time is not affected. (See Command 0x1C.)

Byte Type Item Value or Range 0 UINT8 ID 0x1D 1-2 UINT16 Local Offset 0xfff0 to 0x0010 (-16 to +16) 3 UINT8 Half Hour 0 or 1

Half Hour:

n 0 = half hour not present (30 min)

n 1 = half hour present (30 min)

Command 0x1E: Program Leap Second Event

Byte Type Item Value or Range

0 UINT8 ID 0x1E 1 INT8 LS_Flag -1 to +1

Leap Second Flag:

l 1 = Insertion l -1= Deletion (0xff) l 0 = Disable

Command 0x1F: Request Firmware Information

Byte Type Item Value or Range

0 UINT8 ID 0x1F 1 INT8 Major SW version 0x1 to 0x63 (1- 99) 2 INT8 Minor identifier (Model dependant) * 3 INT8 SW release Month 0x1 to 0xC (1-12) 4 INT8 SW release Date 0x1 to 0x1F (1-31) 5 INT8 SW release YR (MS) Year 6 INT8 SW release YR (LS) Year

* Model dependant (x=Major version)

x.20 = bc635

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1. PCI/PCIe TFP Hardware

x .21= bc637

x.22 = bc635 + OCXO

x.23 = bc637 + OCXO

Year Example:

Byte5 = 0x07, Byte6 = 0xd9 => 0x7d9 = 2009

Command 0x20: Select Clock Source

This command selects the clock source for the TFP. The TFP uses a time base frequency of 10 MHz. The 10 MHz may be derived from the on-board oscillator or it may be supplied from an external oscillator via the J1 connector.

Byte Type Item Value or Range

0 UINT8 ID 0x20 1 UINT8 clock source see below

Clock Source Choices:

n 0x49 ('I') Internal 10 MHz Oscillator

n 0x45 ('E') External 10 MHz Oscillator

Command 0x21: Control Jamsync

This command can be used to disable TFP jam-syncs that normally occur automatically. The default is jamsync enabled.

Byte Type Item Value or Range

0 UINT8 ID 0x21

0 = jamsync disabled

1 UINT8 jamsync ctrl

1 = jamsync enabled

Command 0x22: Force Jamsync

This command forces the TFP to perform a single jamsync operation and contains no data. (See Command 0x21).

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1.5. Dual-Port RAM Interface

Command 0x24: Load DAC

The TFP’s 10MHz oscillator frequency is voltage controlled using the output from a 16-bit DAC. This command allows the user to directly load a 16-bit value to the DAC. This feature allows the user to fine tune the TFP time base when operating in the Free Running Mode. This voltage is also routed out of the TFP via the J1 connector (pin 9) allowing external oscillators to be disciplined. The DAC output voltage ranges nominally from 0 V (value = 0x0000) to 5 V (value = 0xFFFF).

JP3 is used to select the DAC voltage range. When the 2mm jumper is OFF, the DAC voltage is 0-5 VDC; when ON the voltage is 0-10 VDC. Both on-board oscillators that are offered for this card use the 0-5 VDC control voltage range. If an external oscillator requires a 0-10 VDC control voltage range, a 2mm jumper must be placed on JP3.

Byte Type Item Value or Range

0 UINT8 ID 0x24 1-2 UINT16 DAC value 0x0000 - 0xFFFF

Command 0x25: Set Disciplining Gain

This command allows the gain and sense of the disciplining process to be set by the user. A positive gain indicates that the voltage-controlled oscillator source frequency increases with increasing control voltage. This feature is valuable to anyone using the TFP to discipline an external oscillator.

Byte Type Item Value or Range

0 UINT8 ID 0x25 1-2 INT16 gain -100 to +100

Note: Use this command with caution, as it will affect the TFP disciplining routine.

Gain Default:

n 0x02 = TCXO

n 0x20 = OCXO

Command 0x26: Request Battery Connection Status

This request (used with command 0x19) reads the current RTC battery connection status which is either connected (0x1) or disconnected (0x0).

Byte Type Item Value or Range

0 UINT8 ID 0x26 1-2 INT16 battstat 0x0, 0x1

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1. PCI/PCIe TFP Hardware

Command 0x27: Synchronize RTC to External Time Data

This command forces the TFP to synchronize the RTC time to the current time. Note that when the TFP is locked to a timing reference, the RTC is adjusted automatically.

Command 0x28: RTC Battery Connection Control

This command controls the connection/disconnection of the RTC battery. The disconnect control may be used to keep the battery from being discharged while in storage. The next time the board is powered up, the battery is automatically reconnected to resume RTC battery backup power when the board power is removed. Connect=0x1, Disconnect=0x0.

Byte Type Item Value or Range

0 UINT8 ID 0x26 1-2 INT16 battcon 0x0, 0x1

Command 0x30: Send Packet to GPS Receiver (bc637 only)

This command allows the user to send a GPS packet to the GPS receiver. The format and use of this command is described in GPS Receiver Interface.

Command 0x31: Request Packet from GPS Receiver (bc637 only)

This command allows the user to request a GPS packet (i.e., position, velocity, status, etc.) from the GPS receiver. The format and use of this command is described in GPS Receiver Interface.

Command 0x32: Manually Request Packet from GPS Receiver (bc637 only)

This command is similar in function to Command 0x31. Refer to GPS Receiver Interface.

Command 0x33: Set GPS Time Format (bc637 only)

This command allows the user to select between GPS time and UTC when using Timing Mode 6 (GPS). The relationship between UTC and GPS time is shown below. The default setting is UTC (UTC = GPS Time + Leap Seconds).

Byte Type Item Value or Range

1 UINT8 ID 0x33 2-5 UINT8 GPS time format flag

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1.5. Dual-Port RAM Interface

GPS time format flag:

n 0 = UTC (default)

n 1 = GPS Time

Command 0x40: Observe Local Time Flag

This command programs the local time observed flag. If the local time flag is enabled, the TFP adjusts its time by the local time offset. Note that the Generator Time is also affected by this setting. See Command 0x1d for programming local time offset.

Byte Type Item Value or Range

0 UINT8 ID 0x40 1 UINT8 Flag 0 or 1

Local Time Observe Flag:

n 0 = disable

n 1 = enable

Command 0x41: IEEE 1344 Daylight Saving and Local Time Flags

This command queries the daylight saving and local time observed flag. Additionally, this command is used to set the IEEE 1344 Time Code daylight saving observed flag. Use this command in conjunction with Command 0x19.

Byte Type Item Value or Range

0 UINT8 ID 0x41 1 UINT8 Flag 0x00 - 0xff

Flag:

n bit0 = reserve

n bit1 = reserve

n bit2 = reserve

n bit3 (0x8) = local time observe flag

n bit4 (0x10) = IEEE 1344 DST observe flag

n bit5 - bit7 = not used

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1. PCI/PCIe TFP Hardware

Command 0x43: Select Periodic or DDS Output

This command selects the signal that is output on P1 pin 15. This output may be either the Periodic (heartbeat) signal or the DDS (frequency synthesizer) signal. Note that this selection is restored at power-up from NV memory.

Byte Type Item Value or Range

0 UINT8 ID 0x43 1 UINT8 Per/DDS see below

n 0 = Periodic

n 1 = DDS

Command 0x44: Periodic or DDS Output Enable

This command controls the Periodic or DDS signal that is output on P1 pin 15. This output may be either on or off based on the selection.

Note: that this selection is restored at power-up from NV memory.

Byte Type Item Value or Range

0 UINT8 ID 0x44 1 UINT8 Dis/En see below

n 0 = Disabled

n 1 = Enabled

Command 0x45: DDS Divide Select

The DDS frequency synthesizer's divider can be used to divide the selected input down to generate lower or fractional frequencies. Selectable decade divides that range from divide by 1E0 through divide by 1E7 are available. The divider will also allow for fractional frequency outputs where the divider's input source is decimal shifted by up to 7 places. The frequency synthesizer's divider is the output signal provided on P1 pin 15.

Note that this selection is restored at power-up from NV memory.

Byte Type Item Value or Range

0 UINT8 ID 0x45 1 UINT8 Div val see below

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1.5. Dual-Port RAM Interface

n 0= divide by 1,

n 1= divide by 10,

n 2= divide by 100,

n 3= divide by 1000,

n 4= divide by 10000,

n 5= divide by 100000,

n 6= divide by 1000000,

n 7= divide by 10000000

n F = divide by value in Period Register (when selected, refer to command 49)

Command 0x46: DDS Divide Source

The frequency synthesizer's divide chain has 3 possible input sources.

Byte Type Item Value or Range

0 UINT8 ID 0x46 1 UINT8 Div sel see below

n 0 =DDS n 1 =Multiplier (DDS x multiplier) n 2 =100 MHz (100 MHz PLL)

Command 0x47: DDS Synchronization Mode Select

The DDS frequency synthesizer's divider has 2 modes of operation, Fractional and Continuous. Fractional mode allows for fractional frequencies to be generated that are time synchronized only when a change is made to the DDS frequency but never again, allowing for non-integer rates. Continuous mode should be used for integer rates only where the frequency synthesizer and divider are synchronized each second. Note that integer frequency rates may use the fractional mode and it will remain on time if the unit does not adjust phase using a jamsync. Note that this selection is restored at power-up from NV memory.

Byte Type Item Value or Range

0 UINT8 ID 0x47 1 UINT8 sync sel see below

l 0 = Fractional (synchronizes only once - allows fractional rates) l 1 = Continuous (synchronizes every second - integer frequencies)

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1. PCI/PCIe TFP Hardware

Command 0x48: DDS Multiplier Value

The DDS frequency synthesizer has the ability to multiply its output by 1, 2, 3, 4, 6, 8, 10 or 16. Note that the DDS frequency must be high or low enough for the multiplier to operate correctly (see Input Range in MHz below). Note that this selection is restored at power-up from NV memory.

Byte Type Item Value or Range

0 UINT8 ID 0x48 1 UINT8 mult sel see below

Value Input Range MHz

0x1 = DDS x1 22- 150 0x2 = DDS x2 11- 75 0x3 = DDS x3 8- 56 0x4 = DDS x4 6- 38 0x6 = DDS x6 5- 23 0x8 = DDS x8 5- 19 0xa = DDS x10 5 - 15 0x10 = DDS x16 5- 10

Note that when using Multiplier Mode, the DDS resolution is reduced to 1/32 Hz x multiplication factor.

Command 0x49: DDS Period Value

The DDS divider has a selectable mode called Period Mode (command 0x45 value = F). This mode may be desirable when the DDS cannot be set to the exact frequency but a period value, based on the period of the DDS rate, will be exact. Note that this value is restored at power-up from NV memory.

Byte Type Item Value or Range

0 UINT8 ID 0x49 1-4 UINT32 Period val 0x0 to 0x00FFFFFF*

* (4 byte data, 3 lower bytes used)

Refer to section 1.3.3. Divider Mode for an example using the Period Mode divider.

Command 0x4A: DDS Tuning Word

The DDS frequency is set with this command. The desired frequency x32 = DDS Tuning Word. Frequencies higher than 22 MHz should be attained using Multiplier Mode (0x48, 0x46 commands). Note that this value is restored at power-up from NV memory.

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1.5. Dual-Port RAM Interface

Byte Type Item Value or Range

0 UINT8 ID 0x49 1-4 UINT32 DDS val 0x0 to 0x3FFFFFFF

Refer to section 1.3.3. DDS Output for details and an example on setting the DDS tuning word.

Note that the output of the DDS circuitry is capable of creating interrupts.

Command 0x4F: PCI Firmware Part Number (request only)

This command allows the user to request the TFP firmware part number. Use this command in conjunction with Command 0x19.

Byte Type Item Value or Range

0 UINT8 ID 0x4f 1 UINT8 'P' 'P' 0x50 2 UINT8 'C' 'C' 0x43 3 UINT8 'I' 'I' 0x49 4 UINT8 '-' 'E' 0x2d or 0x45 5 UINT8 'v' 0x76 6 UINT8 '2' 0x32

Command 0xF6: TFP Model Identification (request only)

This command queries the PCI family TFP part number. Use this command in conjunction with Command 0x19. Both the PCI-V2 and PCIe cards are shown.

Byte Type Item Value or Range

0 UINT8 ID 0xf6 1 UINT8 Model 'B' 2 UINT8 Model 'C' 3 UINT8 Model '6' 4 UINT8 Model '3' 5 UINT8 Model '5' or '7' 6 UINT8 Model 'P' 7 UINT8 Model 'C' 8 UINT8 Model 'I'

Model:

n “BC635PCI” = Time Code (same for bc635PCIe)

n “BC637PCI” = Time Code and GPS (same for bc637PCIe)

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1. PCI/PCIe TFP Hardware

Command 0xFE: TFP Serial Number (request only)

This command queries the TFP serial number. Use this command in conjunction with Command 0x19.

Byte Type Item Value or Range

0 UINT8 ID 0xf7 1-4 UINT32 SN 0x00 - 0xffffffff

1.6. Inputs and Outputs

1.6.1. TFP I/O Connector Signals

The TFP products have the following signals connected to their 15 pin D-sub connectors. Refer to Table 4 for the pin out assignments. Note that a few of these pins are dual-purposed with the functions separated with a" /", see pins 10, 14, and 15 below.

Figure 1-10

Table 4: Signal I/O Connector

Pin Direction Signal

1 input External 10 MHz input 2 n/a Ground 3 output Strobe output 4 output 1 PPS output 5 output Time Code output (AM) 6 input External Event input 7 input Time Code input (AM) 8 n/a Ground (Recommended Time Code return) 9 output Oscillator Control Voltage output 10 input Time Code input (DCLS) / Event2 input 11 output Time Code output (DCLS) 12 n/a Ground 13 output 1, 5, 10 MHz output 14 input External 1 PPS input / Event3 input 15 output Periodic / DDS output

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1.6. Inputs and Outputs

1.6.2. bc635PCIe and bc637PCIe Accessories

Signal Breakout Kit

The Symmetricom model bc63x PCI/PCIe Signal Breakout Board is a development tool for use with the bc635PCI-V2, bc637PCI-V2, bc635PCIe, and bc637PCIe Time and Frequency Processors (TFP) boards.

The Signal Breakout Boards provide a user-friendly interface by providing BNC connections to most of the I/O signals with the exceptions being the 10 MHz external oscillator input and the external oscillator voltage control output, which are available on a 3-pin Molex connector. The 3-pin connector on the breakout board is Molex part number 0022232031 (2.54mm (.100") Pitch KK® Solid Header, Vertical, with Friction Lock). This connector mates with Molex part number 0022012031 (2.54mm (.100") Pitch KK® Crimp Terminal Housing, 3 Circuits) using Molex part number 0008500113 pins (KK® Crimp Terminal, 22-30 AWG), not supplied.

The Breakout Kit consists of 2 PC boards where part number 089-00133-000 connects to the TFP via a male 15-pin D-sub connector. This board provides a separation between the TFP’s high frequency signals and the lower frequency signals. The 089-00133-000 board has BNC connectors for the Periodic/DDS output and the 1, 5, 10 MPPS output as well as a 3-pin Molex interface for the 10 MHz external oscillator input and the external oscillator voltage control output. This board also provides an interface to the other 8 signals via a male 9-pin D-sub that connects to part number 089-00135-000 via a 9-pin extension cable.

The 089-00135-000 board provides 8 BNC connections to the lower repetition rate/frequency signals from the TFP. This board can be mounted in a 19” rack enclosure or may be cut to fit into a ½ rack system. Please note that the 9-pin extension cable provided with the kit (6 feet) has been selected as the optimum length interconnect between the 2 breakout boards. The fast edge rate from the digital drivers on the TFP board coupled through longer than 6 foot lengths may produce undesirable effects on the TFP’s digital input lines.

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1. PCI/PCIe TFP Hardware

Figure 1-11 Large Breakout Board (top), and Small Breakout Board (bottom)

Figure 12: Large Breakout Board schematic

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1.6. Inputs and Outputs

Figure 1-13 Small Breakout Board schematic

Breakout Cables

Breakout cables with connectors simply access to the in and out timing signals of the PCIe card. These labeled cables mitigate the need to create special cables during project develoment and assure the correct timing signals are being accessed. There are two forms of breakout cable as follows.

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1. PCI/PCIe TFP Hardware

"D" to 6-BNC Breakout Cable, see cable (C) below for signal information

"D" to 5-BNC Breakoput Cable, see cable (A and B) below for signal information

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1.7. GPS Receiver Interface

Timing Input/Output Breakout cable and Patch Panel BNC Map

"D" to

Patch/

5-BNC

6-BNC

Breakout

(A)

Outputs

Time Code (AM) X X X X Time Code (DCLS) X X 1, 5, 10 MHz X Heartbeat/DDS X X Strobe X X 1 PPS X X X X Oscillator Control Voltage X

Inputs X Time Code (AM) X X X X Time Code (DCLS): Event2 X External Event1 X X X X External 1 PPS; Event3 X X External 10 MHz X

(B)

(C)

Breakout cable Part numbers

(A) BC11576-1000

(B) BC11576-9860115

1.7. GPS Receiver Interface

1.7.1. General

The most important aspects of using GPS equipment is antenna position. The GPS antenna must be located in an area that has a clear view of the sky. The GPS signals cannot penetrate foliage or structures. A good antenna position will provide optimal timing performance. See "1.2. Installation" on page 10 for detailed installation instructions.

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1. PCI/PCIe TFP Hardware

1.7.2. GPS Timing Mode (Mode 6) Characteristics

n The 1 PPS signal generated by the GPS Receiver provides the timing reference for all timing func-

tions.

n The 10 MHz oscillator is disciplined to the GPS 1 PPS signal whenever the receiver is tracking a

sufficient number of satellites. If too few satellites are tracked then the TFP will flywheel.

n The TFP extracts major time and satellite tracking status information from data packets sent from

the GPS receiver. By default, the TFP provides UTC time to the user. The user can select GPS time instead by issuing the DPRAM Command 0x33 (Select GPS Time Format) described in "Command 0x33: Set GPS Time Format (bc637 only)" on page 52.

n The TFP provides a communications pathway between the user and the GPS receiver. This path-

way is most often used to receive GPS data packets for position, velocity, and GPS system status.

1.7.3. Communicating With the GPS Receiver

The dual-port RAM (DPRAM) interface, described in "1.5. Dual-Port RAM Interface" on page 35 provides the communications pathway between the user and the GPS receiver. Using DPRAM commands and the DPRAM GPS Packet Area, the user can send and receive GPS data packets. A GPS data packet consists of a packet length byte, a packet ID byte, and zero or more data bytes. A packet length of zero indicates that no valid packet ID and data bytes are present. The GPS data packet structure is summarized below:

Byte Item

0 packet length = N = number of packet data bytes + 1 (for the packet ID byte) 1 packet ID 2 - N packet data bytes

The GPS packet IDs and packet data formats are described later in this section and are taken from Trimble Navigation's manuals. The user can determine the packet length from the documentation. The documentation describes a packet structure that includes, in addition to the packet ID and packet data bytes, header and trailer bytes and byte-stuffing/unstuffing. The TFP automatically adds (when sending packets) and removes (when receiving packets) the header and trailer bytes and handles all byte-stuffing/unstuffing operations. The TFP user should be concerned with the packet length, packet ID, and packet data bytes only.

Sending GPS Data Packets to the GPS Receiver

To send a GPS data packet to the receiver, use the DPRAM command “Send Packet to GPS Receiver” (command ID 0x30). The format of this command is shown below:

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1.7. GPS Receiver Interface

Byte Type Item Value or Range

0 UINT8 command ID 0x30 1 UINT8 packet length 1 - 255 2 UINT8 packet ID 0x00 - 0xFF 3 - N UINT8 packet data bytes 0 - 255

GPS packet data consists of various integer and floating-point data types. The user must convert these data types to an array of bytes.

Receiving GPS Data Packets from the GPS Receiver

The DPRAM GPS Packet Area holds packets received from the GPS receiver. The TFP writes GPS packets to this area upon user request. The format of the packets in the GPS Packet Area is shown below:

Byte Type Item Value or Range

0 UINT8 packet length 1 - 255, 0 = no valid packet 1 UINT8 packet ID 0x00 - 0xFF 2 - N UINT8 packet data bytes 0 - 255

There are two DPRAM commands that retrieve GPS Packets. These commands are described below. The TFP sets ACK register bit two whenever it writes a GPS packet to the GPS Packet Area. The transition of ACK register bit two from 0 to 1 is interrupt source four (GPS Packet Available). The user must clear ACK register bit two.

Retrieve Packet from GPS Receiver (Command 0x31)

This command allows the user to retrieve a GPS packet (i.e., position, velocity, status, etc.) from the GPS receiver by specifying the packet ID of the GPS packet of interest. Packets that can be retrieved with this command are listed below. Packets not found on this list must be retrieved with Command 0x32. The format of Command 0x31 is shown below:

Byte Type Item Value or Range

0 UINT8 command ID 0x31 1 UINT8 packet ID 0x00 - 0xFF

Some of the more commonly requested GPS packets are sent from the GPS receiver to the TFP either periodically (e.g., position fix) or whenever they change (e.g., satellite selection.) The TFP monitors these packets and stores them in on-board RAM so that they can be transferred to the user immediately upon request. The rest of the GPS packets must be retrieved from the GPS receiver by the TFP whenever the user requests them. Note that it can take 10's or 100's of milliseconds for the

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1. PCI/PCIe TFP Hardware

TFP to retrieve a packet from the GPS receiver. GPS packets that are monitored by the TFP are identified below.

Packet ID Monitored Packet Description

0x41 No GPS Time 0x42 Yes Single-Precision Position Fix, XYZ ECEF 0x43 Yes Velocity Fix, XYZ ECEF 0x44 Yes Satellite Selection 0x45 No Firmware Version 0x46 Yes Health of GPS receiver 0x47 No Signal Level For All Satellites* 0x48 No GPS System Message 0x49 No Almanac Health Page For All Satellites 0x4A Yes Single-Precision Position Fix, Lat/Long/Alt 0x4B Yes Machine/Code ID And Additional Status 0x4D No Oscillator Offset 0x4F No UTC Parameters 0x55 No I/O Options 0x56 Yes Velocity fix, East-North-Up (ENU) 0x57 No Information About Last Computed Fix 0x5E No Additional Fix Status 0x83 No Double-Precision Position Fix, XYZ ECEF 0x84 No Double-Precision Position Fix, Lat/Long/Alt

* Note: The first byte returned will be the length of the packet.

The retrieve packet command works as follows:

n If the requested packet is being monitored and a local copy exists, then the TFP transfers its local

copy of the packet to the DPRAM GPS Packet Area, sets ACK bit 2, then sets ACK bit 0 to acknowledge the retrieve packet command.

n If the requested packet is not being monitored or if the TFP has not yet received a monitored

packet, then the TFP must request the packet from the receiver by sending the appropriate request packet. Once the request has been sent, the TFP sets ACK bit 0 to acknowledge the retrieve packet command. Later, when the receiver responds with the retrieved packet, the TFP transfers the packet to the DPRAM GPS Packet Area and sets ACK bit 2. If the receiver does not respond to the request within a timeout period (typically 3 seconds), then the TFP sets the packet length byte in the DPRAM GPS Packet Area to zero and sets ACK bit 2.

n If the retrieved packet ID is not on the list above, the TFP sets the packet length byte in the

DPRAM GPS Packet Area to zero, sets ACK bit 2, then sets ACK bit 0.

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1.7. GPS Receiver Interface

Manually Request Packet from GPS Receiver (Command 0x32)

This command is a hybrid of commands 0x30 and 0x31. With this command the user specifies the packet length and ID of a packet sent by the receiver (response packet) and specifies the packet length, ID, and data for the packet to be sent to the receiver (request packet.) The TPF sends the request packet to the receiver and transfers the response packet to the DPRAM GPS Packet Area when it arrives. If the response packet ID is 0x00 then the TFP will ignore the response, in which case, this command would be functionally identical to Command 0x30. The TFP sets ACK bit 0 once the request packet is sent to the receiver. Later, when the response packet has been transferred to the DPRAM GPS Packet Area, the TFP sets ACK bit 2. As with Command 0x31, if the receiver fails to respond within a timeout period, the bc637PCI-V2 sets the packet length in the DPRAM GPS Packet Area to zero and then sets ACK bit 2.

Note: A response packet length of 0 (ZERO) (Byte 1) will return any packet with the corresponding response packet ID (Byte 2). This is useful for packets, like 0x47, that return variable length responses.

Byte Type Item Value or Range

0 UINT8 command ID 0x32 1 UINT8 response packet length 1 - 255 2 UINT8 response packet ID 0x00 - 0xFF 3 UINT8 request packet length 1 - 255 4 UINT8 request packet ID 0x00 - 0xFF 5 - N UINT8 request packet data bytes 0 - 255

As an example of this command, let us suppose the user wants to retrieve packet 0x5B (satellite ephemeris status) for satellite number six. The receiver sends packet 0x5B in response to packet 0x3B (request satellite ephemeris status.) Packet 0x3B specifies the PRN number for the satellite of interest, in this case, satellite number six. The appropriate command structure for this example is shown below:

Byte Item Value

0 command ID 0x32 1 response packet length 17 2 response packet ID 0x5B 3 request packet length 2 4 request packet ID 0x3B 5 satellite PRN number 6

Byte Item Value

0 command ID 0x32 1 response packet length 0 2 response packet ID 0x47 3 request packet length 1

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1. PCI/PCIe TFP Hardware

Byte Item Value

4 request packet ID 0x27

1.7.4. Position Fix Modes

An important aspect of GPS operation is the selection of the position fix mode (GPS packet 0x22.) The GPS receiver supports the following four GPS position fix modes.

Position Fix Mode 0

This mode uses as many satellites as are available to perform both position fixes and timing functions. Confusioncan arise because this mode selection interacts with the dynamics code selection (GPS packet 0x2C.) If a non-static dynamics code is selected then only three or four satellites will be used because the GPS sensor assumes that it is moving. If only three satellites are usable then altitude will be held constant. If a static dynamics code is entered then mode zero will use three or four satellites for a navigation solution as previously, however, if only one or two satellites are available the sensor will use the satellite with the highest elevation to continue calculating bias and bias rate (the timing functions will continue unimpaired). It is good therefore, to enter a static dynamics code if the sensor is static.

Symmetricom recommends using this static mode if the card is not on a moving installation.

Position Fix Mode 1

In this mode, a user-specified satellite is used for timing functions. If mode 1 is selected, only a single satellite will be used for timing, and the current position will be assumed accurate and static.

GPS packet 0x34 allows the satellite associated with mode one to be selected. This packet has one data byte that specifies the PRN of the desired satellite. If a data byte value of 0 is entered, then the sensor will always track the single satellite that has the highest elevation within the constellation in view.

It is good to operate in a single-satellite highest elevation mode for timing applications. The greatest contribution to timing error is the electron content variation in the path between the satellite and the receiver. Selecting the highest elevation satellite minimizes this variation.

Position Fix Mode 3 and 4

These modes are rarely used for timing applications unless the user operational platform is dynamic. Mode 3 is particularly useful in a marine environment where the sensor altitude is relatively constant.

1.8.5. GPS Default Parameters

The TFP sends the following GPS packets to the GPS receiver on reset or whenever the Timing Mode is changed to GPS Timing Mode 6.

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1.9. Legacy and New Generation Cards

Set Operating Parameters (GPS packet 0x2C)

Packet Data Item Value

Packet ID 0x2c Dynamics Code 4 (Static) Elevation Angle Mask 0.1745 Radians (10 Degrees) Signal Level Mask 6.0 PDOP Mask 12.0 PDOP Switch 8.0

Set High-8 / High-6 Mode (GPS packet 0x75)

Packet Data Item Value

Packet ID 0x75 Mode 0 (high-8)

Set I/O Options (GPS packet 0x35)

Packet Data Item Value

Packet ID 0x35 Position 0x03 Velocity 0x03 Timing 0x00 Auxiliary 0x00

To change any of the packet 0x35 options, keep the following in mind: The TFP monitors position and velocity packets so the “position” and “velocity” options should be sent with bits 0 and 1 set; the TFP extracts major time from time packets broadcast by the GPS receiver so the “timing” option should be sent with bits zero, one, and two cleared.

1.9. Legacy and New Generation Cards

This section covers differences between legacy bc635/637PCI-U (PCI-U) cards and the new generation bc635/637PCI-V2 (PCI-V2) and bc635/637PCIe (PCIe) cards.

Both the legacy and the new generation cards map both register and DPRAM into memory spaces, but there is a difference in the PCI base address register (BAR) mapping.

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1. PCI/PCIe TFP Hardware

1.9.1. PCI Bar Mapping

PCI-U PCI-V2 and PCIe

bar0 = 32-bit register space bar0 = reserved bar1 = 8-bit dpram space bar1 = reserved

bar2 = 32-bit register space bar3 = 8-bit dpram space

1.9.2. Differences Between Versions -U and New Generation Cards

PCI-U PCI-V2 and PCIe

Standard oscillator VCXO TCXO (better holdover) 1pps duty cycle 63 uS 60 uS Heartbeat (periodic)

duty cycle

Field program update

OCXO option +12V +5V OCXO option sine wave square wave Time at power-on elapsed RTC Time code input

level (AM) Time code output

level (AM) NV (Restored at

Power-on) Strobe output tim-

ing bc637 GPS

receiver Battery disconnect

jumper DDS (frequency

synthesizer) circuit Time Code Inputs No IRIG G, E, XR3 & 2137 Time Code Outputs No IRIG A, G, E, NASA 36, XR3 & 2137

Adjustable square wave

l Serial port download for early versions of

bc635PCI-V2 and bc637PCI-V2.

Replace flash

l Through the host PCI(e) bus for later models of

bc635PCI-V2, bc637PCI-V2, and all models of bc635PCIe, and bc637PCIe.

5V to 5V P-P 1V to 8V P-P

4V P-P 50 ohm 3V P-P 50 ohm

not supported many parameters restored

1 uS late on time

Ace III SKII (Lassen)

No Yes

n The PCI-V2 and PCIe cards transition through end of year properly, version -U did not.

n SET CLOCK Command (10 uSec Advance Retard) is not implemented on PCI-V2 or PCIe

design.

n PCI Special Boot mode is not supported on the PCI-v2 or PCIe design.

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1.9. Legacy and New Generation Cards

The user is no longer required to enter UNIX seconds of Leap Event when manually entering Leap Seconds settings. The PCI-V2 and PCIe cards use Year and Time of Year information to determine when Leap Events will occur.

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2. Windows Application Programs

2.1. bc635PCIcfg.exe Windows Application Program

2.1.1. General

Configuration programs bc635PCIcfg.exe, bc637PCIcfg.exe and a System Clock Utility TrayTime.exe are included with the TFP module.

When installing the SW from the supplied CD as described in "1.2.5. Installation Under Windows " on page 14, the installer will create a folder in 'program files' titled 'bc635PCI Configuration Software' containing bc635PCIcfg.exe, TrayTime.exe, and bc635pciReadEvent.exe. The bc635PCIcfg clock.exe icon is also copied to the system desktop.

When installing the SW, the installer will create a folder in 'program files' titled 'bc637PCI configuration Software' containing bc635PCIcfg.exe, TrayTime.exe, and bc635pciReadEvent.exe. Icons are copied to the system desktop.

The System Clock Utility, TrayTime.exe, (described later in this chapter) is a system tray utility that queries the TFP and periodically sets the computer's system clock at a user-defined interval. The utility may run either as a standard application or as a Windows Service.

The bc635PCIcfg.exe program allows the user to access the TFP card and demonstrates the card's functionality. This program is designed to operate under Microsoft Windows XP/Vista. This utility may be used to query current settings, modify settings, and retrieve or monitor data generated by the card. This program requires the runtime driver to be available in order to operate. The background window of the program provides time, as well as information regarding the clock status, interrupt bit status, and clock reference source type. A full menu system (described in the following paragraphs) has been designed to provide access to the card. Each associated pull-down menu provides a logical grouping of commands. Most of the pull-down menus also include a Current Settings selection that provides a review of the logical group.

The bc637cfg.exe program allows the user to access the GPS functions of the bc637PCI-V2 and bc637PCIe TFPs.

2.1.2. Quickstart Guide to Operating bc635PCIcfg.exe

Click on the desktop icon to execute the program bc635PCIcfg.exe that is an interface program for both the bc635 and bc637 cards. The bc637 may be set to GPS mode, and will initially display time based on the Real Time Clock until GPS lock is achieved. The bc637 unit is locked to GPS, and decoding time when the tracking LED in the GUI left-hand corner is green. The bc635 may be set to decode a time code. For testing, you may set the board time manually using the Time menu and selecting Set Time.

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Figure 2-1: bc637 set to GPS mode

2.1. bc635PCIcfg.exe Windows Application Program

Figure 2-2: bc635 set to Time Code mode

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2. Windows Application Programs

2.1.3. bc637PCIcfg Program Menu Interface

Figure 2-3: bc637PCIcfg Program

File Menu

The File menu group provides a few common functions associated with Windows applications.

Refer to Figure 2-3

File > Open Device

Each instance of the bc635PCIcfg.exe program communicates with only one device at a time. Open Device allows the user to open and operate any of up to four installed TFP devices. By default, the program opens and operates using the first device in the system (Device 0). By selecting a new device to open, the program will close the currently selected device before opening the newly requested device. This command will also clear the interrupt mask.

Select Device 0, 1, 2 or 3 and click OK. Use Device 0 if only 1 board is installed.

File > Interrupt Start

This command allows the user to start an interrupt service routine capable of handling the selected hardware interrupts created by the TFP module. After starting the interrupt service routine, the user may initiate any interrupt source located under “Signals > Interrupts”. For more information on interrupts, see the MASK and INSTAT registers described in "MASK Register (0x18)" on page 31.

File > Exit

This command allows the user to close the device and exit the program. This command will also clear the interrupt mask.

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2.1. bc635PCIcfg.exe Windows Application Program

Time Menu

The Time menu group, see Figure 2-4, provides access to functions that control how the TFP maintains time data. These functions allow the user to select where to obtain time data, whether or not to manipulate the time data and how to present the time data.

Figure 2-4: Time Menu

Time > Set Mode

The Set Mode menu selection allows the user to change the operating mode of the installed card. Selecting this option reveals a secondary menu listing the available operating modes of the TFP. The available mode selections are:

n Time Code

n Free Running

n External 1PPS

n RTC

n GPS

Note 1: The card automatically increments the Year value, in every operating mode. For more information on setting the card synchronization mode, refer to "CONTROL Register (0x10)" on page 28.

Note 2: The bc635 cards do not support GPS mode.

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2. Windows Application Programs

Time > Get Binary Time

The Get Binary Time menu selection exercises the device time capture registers. Get Binary Time requests the binary time 25 times, retrieving 25 consecutive timestamps as fast as the system will allow, and displays them. This function is designed to display binary data only. This command is provided as a demonstration of the binary time request. For more information on the Time Registers, refer to "1.4.3. Device Register Description" on page 26.

Time > Get Event Time

The Get Event Time menu selection exercises the event capture registers of the device. The function is similar to Get Binary Time where 25 consecutive requests are made to the event register. This function is designed to display binary data. The bc635PCI-V2 & bc637PCI-V2 card should be set to the binary time format when executing this function. If the decimal Time Register Format is selected, the major time (in front of the decimal point) will be garbled. Minor time will display correctly.

Time > Set Time

The Set Time menu selection will set the time on the TFP. Set Time displays the current time, years through seconds in a decimal format. The user may change any or all of these values and select the OK button. This command will load the time properly regardless of the currently selected time format. This function is typically used when operating in either the Free Running or External 1PPS modes. While the function may be used when operating in Time code or GPS modes, subsequent time data received from the selected reference source will overwrite the manually entered time. For information on Set Major Time, see "Command 0x12: Set Major Time" on page 42.

Time > Set Year

The Set Year menu selection will set the year data without affecting the other time data. Many time code formats do not include year information in the data. The supported range is 1970 - 2036. Set the year and click OK. See "Command 0x13: Set Year" on page 42.

Time > Set Local Offset

The Set Local Offset menu selection allows the user to program a local time offset into the TFP. If the local offset value is nonzero, the device will adjust any reference timing information in order to maintain a local time in TFP clock. Use of this function only affects the time data in the TIME registers described in Chapter1.4. Allowed values are -16 through +16, and can include half hour offsets. See "Command 0x1D: Set Local Time Offset" on page 49.

Enter Local Offset in hours (-16 to +16), check Half Hour if necessary and click OK.

Time > Set Prop Delay

The Set Prop Delay menu selection allows the user to compensate for propagation delays introduced by the currently selected reference source. For example, when the unit is operating in Time code

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2.1. bc635PCIcfg.exe Windows Application Program

decoding mode, a long cable run may result in the input time code having a propagation delay. The delay value is programmable in units of 100 ns and has an allowed range from -4000000 (advance by 400 ms) through +4000000 (retard by 400 ms). See "Command 0x17: Set Propagation Delay Compensation" on page 44.

Enter the Propagation Delay and click OK

Time > Set Leap Event

The Set Leap Event menu selection allows the user to program a future leap second event. The user is not required to enter UNIX seconds of Leap Event when manually entering Leap Seconds settings. The card uses Year and Time of Year information to determine when a Leap Event will occur. In operating modes that do not have a time source that provides leap second information, the card will calculate the leap event for UTC midnight of the current month. GPS time and IRIG B 1344 operating modes provide automatic leap second adjustments, which normally occur on June 30th or December 31st at UTC midnight.

When the leap second insertion transition takes place (add 1 second) the Time Code output produces a second 60 followed by second 0. The application program will show 2 second 59s followed by second 0.

When the leap second deletion transition takes place (subtract 1 second) the Time Code output produces a second 58 followed by second 0. The application program will show second 58 followed by second 0.

The TFP card uses only the Flag values of Disable, Insertion or Deletion; the Leap Event Time value is not supported.

See "Command 0x1E: Program Leap Second Event" on page 49.

Time > Time Settings

The Time Settings function allows the user to modify other timing operations. The UTC Corrections may be enabled or disabled. Enabling UTC Corrections commands the device to include any leap second corrections provided by the reference source and act on any leap event data that is present. The default operation is to use UTC corrections. This function is also used to enable or disable the following options: IEEE Daylight Saving (strips DST bit from IEEE 1344 Time Code input and output) and Local Time Offset (controls the use of Local Offset value). The board time format (Binary or Decimal) is also selected using this function.

Note: the Year Auto Increment cannot be disabled; the year is always incremented when operating with sources that do not include year information.

See "1.5. Dual-Port RAM Interface" on page 35, commands 0x11, 0x1D, 0x33 and 0x41.

Time > Current Settings

The Current Settings function provides a summary of all the time data relevant to the devices current settings. In addition to the programmable values, the values of some of the card's timing data are also

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2. Windows Application Programs

presented as information points via the UTC Data button. These values include UTC Control, leap second count, leap second event data and leap second event time.

Settings are:

l Timing Mode l Time Format l Current Year l Local Offset l Propagation Delay l Daylight Saving Flag l Local time Flag

Time Code Menu

The Time Code menu group, see Figure 2-5, provides access to functions that control how the TFP card operates while decoding time code. These functions allow the user to control both the time code decoding, and the time code generating circuits.

Figure 2-5: Time Code

Time Code > Decode

The Decode menu selection allows the user to select the format and modulation types associated with an input timing signal. These values control how the device attempts to decode the input time code. These values may be set regardless of the mode but will only be used in time code decoding mode. The format defines the type of the time code data. The modulation defines the envelope for the signal and which input pin the signal will be extracted from. See "Command 0x15: Set Input Time Code Format" on page 43: Set Input Time Code Format for supported time codes and command 0x16, which is used to select the modulation type.

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2.1. bc635PCIcfg.exe Windows Application Program

Time Code > Generate

The Generate menu selection allows the user to select the time code format that will be generated by the TFP. See "Command 0x1B: Set Time Code Output Format" on page 46 for supported time codes. Detailed performance specifications are outlined in "1.1.4. Specifications and Settings" on page 5

Time code > Gen Offset

The Gen Offset menu selection allows the user to add an offset to the time code signal produced by the TFP. The generator offset only affects the time code generation. This functionality is useful for driving time code display units to display local time. Allowed values are -16 through +16, and may include half hour offsets. See "Command 0x1C: Set Generator Time Offset" on page 48.

Time code > Current Settings

The Current Settings menu selection provides time code output data summary for:

l Decoding l Modulation Type l Generating l Generator Offset

Signals Menu

This menu group provides access to functions that control various hardware-timing signals.

Figure 2-6: Signals Menu

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2. Windows Application Programs

Signals > Heartbeat

The Heartbeat function allows the user to command the TFP to produce a clock signal at a specified frequency. The heartbeat signal, also referred to as a periodic pulse output (PPO), periodic or programmable periodic, may be either synchronous or asynchronous to the TFP's 1PPS epoch.

The formula for determining the heartbeat frequency is f = 1,000,000/n1*n2, where n1 and n2 are greater than or equal to 2 and less than 65536. Synchronous mode aligns the periodic output's rising edge to rising edge of 1PPS.

Periodic output fractional frequencies (non-integer) should use Asynchronous mode.

Signals > DDS (aka frequency synthesizer)

The DDS output may be selected in place of the periodic rate generator's output. This circuit provides a square wave output with a frequency resolution of 0.03125 (1/32) Hz. Direct frequency entry of 7 significant digits with decimal adjustment up to 7 places or entry of 8 digits with 1 Hz resolution is supported with the entry in this dialog box. Value range is 1/1e7 (.0000001) to 1e8 (100000000).

Signals > Strobe

The Strobe function allows the user to command the TFP to produce a hardware signal at a particular time, or at a particular point during a 1 second interval. When major/minor mode is selected, a hardware signal (1 uS pulse) will be produced when the internal time of the TFP matches the values entered for the major and minor strobe registers. Up to 22 bits of binary major time may be supplied in addition to the microseconds loaded in the minor strobe register. This allows strobe signals to be programmed up to 48 days in advance. This function is designed to operate with the timing format in binary mode. When minor mode is selected, a strobe signal is produced every second when the internal microsecond count in the TFP matches the value entered in the minor strobe register. The output of this circuitry is capable of creating a PCI bus interrupt. For details on Strobe programming, see "1.3.4. Time Coincidence Strobe Output" on page 21.

Signals > Events

The Events function allows the user to command the TFP to monitor a hardware-timing signal. The source for the signal can be either the External Event input or the Periodic/DDS output. The capture may be set to occur on either the rising or falling edge. When the selected signal occurs, the time at which the signal occurred is loaded into the event time registers. The capture lockout checkbox can be used to control whether or not subsequent signals will overwrite the data in the event time registers. The output of this circuitry is capable of creating a PCI bus interrupt. See "CONTROL Register (0x10)" on page 28 for event programming details.

Note: The capture rate is dependent on the rate that the Software extracts the event times which is dependent on the operating system and speed of the host computer.

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2.1. bc635PCIcfg.exe Windows Application Program

Signals > Frequency

The Frequency function allows the user to control the frequency signal output by the TFP. The available frequencies are 1, 5 and 10 MHz. See the CONTROL Register described in "CONTROL Register (0x10)" on page 28 for more detail.

Signals > Interrupts

The Interrupts function allows the user to control the generation of interrupts by the TFP. The detection of an interrupt will be displayed in the background of the main window by seven LEDs which are displayed in the upper-right corner. When an interrupt occurs, the program queries the interrupt source and the associated LED is displayed in red. In order to display consecutive interrupts, the LEDs are changed back to green once per second. This may result in LEDs only remaining red for a short period of time.

The default state of the interrupts is OFF. Interrupt programming is described in detail in "MASK Register (0x18)" on page 31.

Signals > Current Settings

The Current Settings function provides a summary of all the signal data. In addition to the programmable values, other values may be presented as information points.

Hardware Menu

See Figure 2-7. This group provides additional access to functions that control the oscillator and its associated disciplining circuits. These functions modify the actual oscillator control function used to slave the oscillator to the selected reference signal. This function is not modified during standard operation.

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2. Windows Application Programs

Figure 2-7: Hardware Menu

Hardware > Set Osc Parameters

The Set Osc Parameters function allows the user to select an external oscillator or the on-board oscillator, in addition to enabling/disabling disciplining and jamsyncing. Oscillator selection and control is described in more detail in "1.5. Dual-Port RAM Interface" on page 35; commands 20, 21, and 24.

Hardware > Sync RTC to Ext Time

The Sync RTC to Ext Time function updates the RTC circuit time to the current time on the board. The board contains a separate battery-backed Real Time Clock Circuit (RTC) that may be used to keep time while the device is powered down.

Hardware > Current Settings

The Current Settings function provides a summary of all the oscillator data. In addition to the programmable values, other values may be presented as information points.

Special Menu

The Special Menu group provides access to those functions that do not fit in any particular category. See Figure 2-8. Most of these functions are not used during normal operation.

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Figure 2-8: Special Menu

2.1. bc635PCIcfg.exe Windows Application Program

Special > Registers

The Registers function is provided to perform direct reads and writes to the TFP registers. While most of the functionality available through the registers can be controlled via other aspects of the configurator program, this function may be useful for debugging purposes.

Special > Board Reset

The Board Reset function allows the user to reset the TFP device. This command is useful when starting a test or in the case that unexpected behavior is observed from the card. This function is not used during normal operation. See "Command 0x1A: Software Reset" on page 46.

Special > Autotime

The Autotime function allows the user to control the data display in the background of the main program window. If this function is turned off, the display will stop updating but will continue to show the reference source type.

Special > Menu

The Menu command allows the user to switch to an advanced version of the menu. See Figure 2-9. The advanced menu selection adds Special menu options, as well as the PCI menu selection.

Warning: The advanced menu contains operations that may disable the function of the TFP.

Special > Menu > Advanced

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Symmetricom bc635PCI-V2, bc637PCI-V2-OCXO, bc637PCIe, bc635PCI-V2-OCXO, bc635PCIe-OCXO User Manual

Specifications and Main Features

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