The information in this User’s Manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
and makes no commitment to update or to keep current the information in this manual, or to notify
any person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our Website at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/or its licensors, and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.
IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between the manufacturer and the customer shall be governed by the laws of
Santa Clara County in the State of California, USA. The State of California, County of Santa Clara
shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for
all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.
WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.
Manual Revision 1.1
Release Date: November 25, 2013
Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
Note: For detailed information on memory support and updates, please refer to the SMC Recommended Memory
List posted on our website at http://www.supermicro.com/support/resources/mem.cfm.
Note: For detailed information on memory support and updates, please refer to the SMC Recommended Memory
List posted on our website at http://www.supermicro.com/support/resources/mem.cfm.
1333
10661066,
1333
106610661066106610661066
Other Important Notes and Restrictions
•For the memory modules to work properly, please install DIMM modules of the same
type, same speed and same operating frequency on the motherboard. Mixing of
RDIMMs, UDIMMs or LRDIMMs is not allowed. Do not install both ECC and Non-ECC
memory modules on the same motherboard.
•Using DDR3 DIMMs with different operating frequencies is not allowed. All channels
in a system will run at the lowest common frequency.
2-15
Page 40
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
LAN1
LAN2
COM1
VGA
LEM1
JIB1
JBR1
InfiniBand
UID
LE2
LEB1
LEB2
JI2C2
JI2C1
JWD1
CPU1 PCI-E 3.0 x16
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JSD1
P1-DIMMA1
P1-DIMMB1
P2-DIMMH1
P2-DIMMG1
J23
JP8
Fan1
LE1
BIOS
Fan3
P2-DIMMF1
P2-DIMME1
Fan4
JPI2C1
(4-Pin PWR)
(20-Pin PWR)
(20-Pin PWR)
J24
JF1
FPCTRL
P1-DIMMC1
P1-DIMMD1
T-SGPIO1
JBT1
JVRM_I2C2
JVRM_I2C1
JIPMB1
USB2
JPG1
JPL1
JPTM1
JPB1
JBAT1
CPU2
CPU1
SW1
PCH
C602J
BMC
LAN
CTRL
IB
CTRL
Processor
#1
Processor
#2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
JPME2
JPME1
2-4 Motherboard Installation
All motherboards have standard mounting holes to t different types of chassis.
Make sure that the locations of all the mounting holes for both motherboard and
chassis match. Although a chassis may have both plastic and metal mounting fas-
teners, metal ones are highly recommended because they ground the motherboard
to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.
Then use a screwdriver to secure the motherboard onto the motherboard tray.
Tools Needed
•Philips Screwdriver
•Pan head screws (9 pieces)
•Standoffs (9 pieces, if needed)
Location of Mounting Holes
There are nine (9) mounting holes on this motherboard indicated by the arrows.
Warning: 1) To avoid damaging the motherboard and its components, please do
not use a force greater than 8 lb/inch on each mounting screw during motherboard
installation. 2) Some components are very close to the mounting holes. Please take
precautionary measures to prevent damage to these components when installing the
motherboard to the chassis.
2-16
Page 41
Chapter 2: Installation
Installing the Motherboard
1. Install the I/O shield into the chassis.
2. Locate the mounting holes on the motherboard.
3. Locate the matching mounting holes on the chassis. Align the mounting holes
on the motherboard against the mounting holes on the chassis.
4. Install standoffs in the chassis as needed.
5. Install the motherboard into the chassis carefully to avoid damaging mother-
board components.
6. Using the Phillips screwdriver, insert a Pan head #6 screw into a mounting
hole on the motherboard and its matching mounting hole on the chassis.
7. Repeat Step 5 to insert #6 screws into all mounting holes.
8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed are for illustration only. Your chassis or compo-
nents might look different from those shown in this manual.
2-17
Page 42
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
1
234
567
8
9
2-5 Control Panel Connectors and I/O Ports
The I/O ports are color coded in conformance with the PC 99 specication. See
the picture below for the colors and locations of the various I/O ports.
Back Panel Connectors and I/O Ports
LEB1
LEB2
LE2
SW1
UID
JIB1
InfiniBand
VGA
JPME1
JI2C2
JI2C1
JBR1
JWD1
JPME2
IB
CPU1 PCI-E 3.0 x16
CTRL
PCH
C602J
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
JSD1
P1-DIMMB1
P1-DIMMA1
CLOSE 1st
CLOSE 1st
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
P2-DIMMH1
P2-DIMMG1
Fan1
LEM1
CPU1
Processor
CPU2
Processor
COM1
BIOS
#1
#2
LAN2
LAN
CTRL
X9DRT-F
Rev. 1.01A
OPEN 1st
OPEN 1st
Fan3
LE1
LAN1
BMC
JVRM_I2C1
JBT1
P1-DIMMD1
P2-DIMMF1
USB0/1
IPMI_LAN
JPTM1
JPG1
JVRM_I2C2
P1-DIMMC1
FPCTRL
P2-DIMME1
Fan4
JPB1
JPL1
T-SGPIO1
JF1
JPI2C1
JBAT1
USB2
JIPMB1
J24
(20-Pin PWR)
BackPanelI/OPortLocationsandDenitions
1. (Back Panel) USB 0
2. (Back Panel) USB 0
3. IPMI_Dedicated LAN
4. Gigabit LAN 1
5. Gigabit LAN 2
6. COM Port 1
7. (Back Panel) VGA (Blue)
8. InniBand (IB)
9. UID Switch
2-18
Page 43
Chapter 2: Installation
3
1
2
UniversalSerialBus(USB)
Two Universal Serial Bus ports (USB
0/1) are located on the I/O back panel.
In addition, a Type USB 2.0 connector
(USB 2), located next to the BMC chip,
also provides onboard USB support.
(Cables are not included.) See the
table on the right for pin denitions.
LEB1
LEB2
LE2
SW1
UID
JI2C2
JI2C1
JPME2
CPU1 PCI-E 3.0 x16
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
JSD1
JWD1
InfiniBand
JPME1
P1-DIMMA1
JBR1
C602J
P1-DIMMB1
JIB1
PCH
VGA
IB
CTRL
CLOSE 1st
LEM1
COM1
BIOS
CPU1
LAN1
LAN2
LAN
CTRL
BMC
JVRM_I2C1
LE1
JBT1
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
JPTM1
P1-DIMMC1
P1-DIMMD1
JVRM_I2C2
JPB1
JPL1
JPG1
JBAT1
USB2
JIPMB1
T-SGPIO1
(BP)USB0/1&
Onboard USB2
PinDenitions
Pin# Denition
1+5V
2PO-
3PO+
4Ground
5NA
1. (BP) USB 0
2. (BP) USB 1
3. (Type A) USB 2
Processor
#1
OPEN 1st
CPU2
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
P2-DIMMG1
CLOSE 1st
JF1
Processor
#2
OPEN 1st
P2-DIMMH1
FPCTRL
J24
P2-DIMME1
P2-DIMMF1
(20-Pin PWR)
Fan3
Fan4
Fan1
JPI2C1
2-19
Page 44
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
1
2
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
LAN1
LAN2
COM1
VGA
LEM1
JIB1
JBR1
InfiniBand
UID
LE2
LEB1
LEB2
JI2C2
JI2C1
JWD1
CPU1 PCI-E 3.0 x16
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JSD1
P1-DIMMA1
P1-DIMMB1
P2-DIMMH1
P2-DIMMG1
J23
JP8
Fan1
LE1
BIOS
Fan3
P2-DIMMF1
P2-DIMME1
Fan4
JPI2C1
(4-Pin PWR)
(20-Pin PWR)
(20-Pin PWR)
J24
JF1
FPCTRL
P1-DIMMC1
P1-DIMMD1
T-SGPIO1
JBT1
JVRM_I2C2
JVRM_I2C1
JIPMB1
USB2
JPG1
JPL1
JPTM1
JPB1
JBAT1
CPU2
CPU1
SW1
PCH
C602J
BMC
LAN
CTRL
IB
CTRL
Processor
#1
Processor
#2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
JPME2
JPME1
3
Ethernet Ports
Two Gigabit Ethernet ports
(LAN1/2) and an IPMI_Dedicat-
ed LAN are located on the I/O
backplane on the motherboard.
The IPMI_LAN provides KVM
support for IPMI 2.0. All these
ports accept RJ45 type cables.
(Note: Please refer to the LED
Indicator Section for LAN LED
information.)
Pin# Denition
1P2V5SB10SGND
2TD0+11Act LED
3TD0-12P3V3SB
4TD1+13Link 100 LED (Yel-
5TD1-14Link 1000 LED
6TD2+15Ground
7TD2-16Ground
LAN Ports
PinDenition
low, +3V3SB)
(Yellow, +3V3SB)
8TD3+17Ground
9TD3-18Ground
(NC: No Connection)
1. LAN 1
2. LAN 2
3. IPMI_LAN
2-20
Page 45
Chapter 2: Installation
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
LAN1
LAN2
COM1
VGA
LEM1
JIB1
JBR1
InfiniBand
UID
LE2
LEB1
LEB2
JI2C2
JI2C1
JWD1
CPU1 PCI-E 3.0 x16
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JSD1
P1-DIMMA1
P1-DIMMB1
P2-DIMMH1
P2-DIMMG1
J23
JP8
Fan1
LE1
BIOS
Fan3
P2-DIMMF1
P2-DIMME1
Fan4
JPI2C1
(4-Pin PWR)
(20-Pin PWR)
(20-Pin PWR)
J24
JF1
FPCTRL
P1-DIMMC1
P1-DIMMD1
T-SGPIO1
JBT1
JVRM_I2C2
JVRM_I2C1
JIPMB1
USB2
JPG1
JPL1
JPTM1
JPB1
JBAT1
CPU2
CPU1
SW1
PCH
C602J
BMC
LAN
CTRL
IB
CTRL
Processor
#1
Processor
#2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
JPME2
JPME1
1
2
Serial Ports
A COM Port is located next to LAN2
port on the IO Backplane. See the
table on the right for pin denitions.
SerialPortPinDenitions
(COM1)
Pin # DenitionPin # Denition
1CDC6DSR
2RXD7RTS
3TXD8CTS
4DTR9RI
5Ground
Video Connector
A Video (VGA) connector is located
next to COM Port 1 on the IO back-
plane. This connector is used to
provide video and CRT display. Refer
to the board layout below for the
location.
1. COM Port
2. VGA Port
2-21
Page 46
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
1
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
LAN1
LAN2
COM1
VGA
LEM1
JIB1
JBR1
InfiniBand
UID
LE2
LEB1
LEB2
JI2C2
JI2C1
JWD1
CPU1 PCI-E 3.0 x16
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JSD1
P1-DIMMA1
P1-DIMMB1
P2-DIMMH1
P2-DIMMG1
J23
JP8
Fan1
LE1
BIOS
Fan3
P2-DIMMF1
P2-DIMME1
Fan4
JPI2C1
(4-Pin PWR)
(20-Pin PWR)
(20-Pin PWR)
J24
JF1
FPCTRL
P1-DIMMC1
P1-DIMMD1
T-SGPIO1
JBT1
JVRM_I2C2
JVRM_I2C1
JIPMB1
USB2
JPG1
JPL1
JPTM1
JPB1
JBAT1
CPU2
CPU1
SW1
PCH
C602J
BMC
LAN
CTRL
IB
CTRL
Processor
#1
Processor
#2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
JPME2
JPME1
Pin Description
1 Ground
2
Transmitter Inverted Data
Input
3
Transmitter
Non-Inverted
Data
Input
4 Ground
5Transmitter Inverted Data
Input
6
Transmitter
Non-Inverted
Data
Input
7 Ground
8
Module
Select
9
Module
Reset
10
+3.3 V Power supply
receiver
11
2-wire serial interface
clock
12
2-wire serial interface
data
13
Ground
14
Receiver
Non-Inverted
Data
Output
15
Receiver Inverted Data
Output
16 Ground
17
Receiver
Non-Inverted
Data
Output
18
Receiver Inverted Data
Output
19 Ground
20 Ground
21
Receiver Inverted Data
Output
22
Receiver
Non-Inverted
Data
Output
23
Ground
24
Receiver Inverted Data
Output
25
Receiver
Non-Inverted
Data
Output
26 Ground
27
Module
Present
28 Interrupt
29
+3.3 V Power supply
transmitter
30
+3.3 V Power
Supply
31
Low Power
Mode
32
Ground
33
Transmitter
Non-Inverted
Data
Input
34
Transmitter Inverted Data
Input
35
Ground
36
Transmitter
Non-Inverted
Data
Input
37
Transmitter Inverted Data
Input
38 Ground
InniBandConnection(ForX9DRT-IBQF/IBFF)
The onboard InniBand (IB) connector is located on the backplane on the
motherboard. The IB switch is primarily used for High-performance computing.
See the table below for pin denitions.
1. InfiniBand (IB) (X9DRT-IBQF/
IBFF only)
2-22
Page 47
Chapter 2: Installation
1
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
LAN1
LAN2
COM1
VGA
LEM1
JIB1
JBR1
InfiniBand
UID
LE2
LEB1
LEB2
JI2C2
JI2C1
JWD1
CPU1 PCI-E 3.0 x16
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JSD1
P1-DIMMA1
P1-DIMMB1
P2-DIMMH1
P2-DIMMG1
J23
JP8
Fan1
LE1
BIOS
Fan3
P2-DIMMF1
P2-DIMME1
Fan4
JPI2C1
(4-Pin PWR)
(20-Pin PWR)
(20-Pin PWR)
J24
JF1
FPCTRL
P1-DIMMC1
P1-DIMMD1
T-SGPIO1
JBT1
JVRM_I2C2
JVRM_I2C1
JIPMB1
USB2
JPG1
JPL1
JPTM1
JPB1
JBAT1
CPU2
CPU1
SW1
PCH
C602J
BMC
LAN
CTRL
IB
CTRL
Processor
#1
Processor
#2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
JPME2
JPME1
2
3
UnitIdentierSwitches
Two Unit Identier (UID) Switches and two LED
Indicators are located on the motherboard. The
Front Panel UID Switch is located at pin 13 on JF1.
The Rear UID Switch is located at SW1 next to the
InniBand connector. The Front Panel UID LED is
located at pin 8 of JF1, and the Rear UID LED is
located at LE2. When the user presses a UID switch
on the front panel or on the back panel, both Rear
UID LED and Front Panel UID LED Indicators will be
turned on. Press the UID switch again to turn off both
LED Indicators. These UID Indicators provide easy
identication of a system unit that may be in need of
service. See the table on the right for pin denitions.
DescriptionLocation
FP SwitchPin 13 on JF1
Rear SwitchSW1
FP UID LED
(Blue LED)
Rear UID LED LE2
UID Switch
Pin# Denition
1Ground
2Ground
3Button In
4Ground
UID Switches & LEDs
Pin 8 on JF1
Note: UID LED is supported by the physical
switch or the BMC. When it is controlled by
the physical switch, it will stay solid. When it
is controlled by the BMC, it will blink.
1. Rear UID Switch
2. Front Panel UID LED
3. Front Panel UID Switch
Ground
NIC1 Link LED
NIC2 Link LED
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
X
FP PWRLED
HDD LED
Power Fail LED
Ground
Ground
NMI
3.3 V
ID_UID_SW/3/3V Stby
NIC1 Activity LED
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset
PWR
2
1
X
Reset Button
Power Button
1920
2-23
Page 48
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
LAN1
LAN2
COM1
VGA
LEM1
JIB1
JBR1
InfiniBand
UID
LE2
LEB1
LEB2
JI2C2
JI2C1
JWD1
CPU1 PCI-E 3.0 x16
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JSD1
P1-DIMMA1
P1-DIMMB1
P2-DIMMH1
P2-DIMMG1
J23
JP8
Fan1
LE1
BIOS
Fan3
P2-DIMMF1
P2-DIMME1
Fan4
JPI2C1
(4-Pin PWR)
(20-Pin PWR)
(20-Pin PWR)
J24
JF1
FPCTRL
P1-DIMMC1
P1-DIMMD1
T-SGPIO1
JBT1
JVRM_I2C2
JVRM_I2C1
JIPMB1
USB2
JPG1
JPL1
JPTM1
JPB1
JBAT1
CPU2
CPU1
SW1
PCH
C602J
BMC
LAN
CTRL
IB
CTRL
Processor
#1
Processor
#2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
JPME2
JPME1
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally lo-
cated on a control panel at the front of the chassis. These connectors are designed
specically for use with Supermicro's server chassis. See the gure below for the
descriptions of the various control panel buttons and LED indicators. Refer to the
following section for descriptions and pin denitions.
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
FP PWRLED
NIC1 Link LED
NIC2 Link LED
Power Fail LED
Ground
X
HDD LED
Ground
Ground
2-24
JF1 Header Pins
1920
NMI
3.3 V
ID_UID_SW/3/3V Stby
NIC1 Activity LED
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset
PWR
2
1
X
Reset Button
Power Button
Page 49
FrontControlPanelPinDenitions
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
LAN1
LAN2
COM1
VGA
LEM1
JIB1
JBR1
InfiniBand
UID
LE2
LEB1
LEB2
JI2C2
JI2C1
JWD1
CPU1 PCI-E 3.0 x16
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JSD1
P1-DIMMA1
P1-DIMMB1
P2-DIMMH1
P2-DIMMG1
J23
JP8
Fan1
LE1
BIOS
Fan3
P2-DIMMF1
P2-DIMME1
Fan4
JPI2C1
(4-Pin PWR)
(20-Pin PWR)
(20-Pin PWR)
J24
JF1
FPCTRL
P1-DIMMC1
P1-DIMMD1
T-SGPIO1
JBT1
JVRM_I2C2
JVRM_I2C1
JIPMB1
USB2
JPG1
JPL1
JPTM1
JPB1
JBAT1
CPU2
CPU1
SW1
PCH
C602J
BMC
LAN
CTRL
IB
CTRL
Processor
#1
Processor
#2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
JPME2
JPME1
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin denitions.
Chapter 2: Installation
NMI Button
PinDenitions(JF1)
Pin# Denition
19Control
20Ground
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin denitions.
Ground
B
FP PWRLED
HDD LED
NIC1 Link LED
NIC2 Link LED
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
Power Fail LED
Ground
Ground
2-25
A. NMI
B. PWR LED
X
Power LED
PinDenitions(JF1)
Pin# Denition
153.3V
16PWR LED
1920
NMI
A
X
3.3 V
ID_UID_SW/3/3V Stby
NIC1 Activity LED
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset
Reset Button
Power Button
PWR
2
1
Page 50
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
LAN1
LAN2
COM1
VGA
LEM1
JIB1
JBR1
InfiniBand
UID
LE2
LEB1
LEB2
JI2C2
JI2C1
JWD1
CPU1 PCI-E 3.0 x16
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JSD1
P1-DIMMA1
P1-DIMMB1
P2-DIMMH1
P2-DIMMG1
J23
JP8
Fan1
LE1
BIOS
Fan3
P2-DIMMF1
P2-DIMME1
Fan4
JPI2C1
(4-Pin PWR)
(20-Pin PWR)
(20-Pin PWR)
J24
JF1
FPCTRL
P1-DIMMC1
P1-DIMMD1
T-SGPIO1
JBT1
JVRM_I2C2
JVRM_I2C1
JIPMB1
USB2
JPG1
JPL1
JPTM1
JPB1
JBAT1
CPU2
CPU1
SW1
PCH
C602J
BMC
LAN
CTRL
IB
CTRL
Processor
#1
Processor
#2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
JPME2
JPME1
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach a
cable here to indicate HDD activ-
ity. See the table on the right for pin
denitions.
NIC1/NIC2 LED Indicators
The NIC (Network Interface Control-
ler) LED connection for GLAN port 1 is
located on pins 11 and 12 of JF1, and
the LED connection for GLAN Port 2 is
on pins 9 and 10. Attach the NIC LED
cables here to display network activity.
Refer to the table on the right for pin
denitions.
HDD LED
PinDenitions(JF1)
Pin# Denition
133.3V SB/UID_SW
14HD Active
GLAN1/2 LED
PinDenitions(JF1)
Pin# Denition
9NIC 2 Activity LED
10NIC 2 Link LED
11NIC 1 Activity LED
12NIC 1 Link LED
A. HDD LED/ID_UID SW PWR Standby
2-26
B. NIC1 Link/Activity LED
C. NIC2 Link/Activity LED
Ground
X
FP PWRLED
HDD LED
A
B
NIC1 Link LED
NIC2 Link LED
C
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
Power Fail LED
Ground
Ground
1920
NMI
3.3 V
ID_UID_SW/3/3V Stby
NIC1 Activity LED
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset
PWR
2
1
X
Reset Button
Power Button
Page 51
Chapter 2: Installation
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
LAN1
LAN2
COM1
VGA
LEM1
JIB1
JBR1
InfiniBand
UID
LE2
LEB1
LEB2
JI2C2
JI2C1
JWD1
CPU1 PCI-E 3.0 x16
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JSD1
P1-DIMMA1
P1-DIMMB1
P2-DIMMH1
P2-DIMMG1
J23
JP8
Fan1
LE1
BIOS
Fan3
P2-DIMMF1
P2-DIMME1
Fan4
JPI2C1
(4-Pin PWR)
(20-Pin PWR)
(20-Pin PWR)
J24
JF1
FPCTRL
P1-DIMMC1
P1-DIMMD1
T-SGPIO1
JBT1
JVRM_I2C2
JVRM_I2C1
JIPMB1
USB2
JPG1
JPL1
JPTM1
JPB1
JBAT1
CPU2
CPU1
SW1
PCH
C602J
BMC
LAN
CTRL
IB
CTRL
Processor
#1
Processor
#2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
JPME2
JPME1
Overheat(OH)/FanFail/PWRFail/
UID LED
Connect an LED cable to pins 7 and
8 of Front Control Panel to use the
Overheat /Fan Fail/Power Fail and
UID LED connections. The Red LED
on pin 7 provides warnings of over-
heat, fan failure or power failure. The
Blue LED on pin 8 works as the front
panel UID LED indicator. The Red
LED takes precedence over the Blue
LED by default. Refer to the tables on
the right for pin denitions.
Power Fail LED
The Power Fail LED connection is
located on pins 5 and 6 of JF1. Re-
fer to the table on the right for pin
denitions.
OH/Fan Fail/ PWR Fail/Blue_UID
LEDPinDenitions(JF1)
Pin# Denition
7Red_LED-Cathode/OH/Fan Fail/
Power Fail5.5V.SB
8Blue_UID LED
OH/Fan Fail/PWR Fail
LEDStatus(RedLED)
State Denition
OffNormal
OnOverheat
FlashingFan Fail
PWR Fail LED
PinDenitions(JF1)
Pin# Denition
53.3V
6PWR Supply Fail
FP PWRLED
NIC1 Link LED
NIC2 Link LED
Blue+ (OH/Fan Fail/
A
PWR FaiL/UID LED)
Power Fail LED
B
2-27
Ground
HDD LED
Ground
A. OH/Fail/PWR Fail/UID LED
B. PWR Supply Fail
1920
NMI
X
Ground
3.3 V
ID_UID_SW/3/3V Stby
NIC1 Activity LED
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset
PWR
2
1
X
Reset Button
Power Button
Page 52
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
LAN1
LAN2
COM1
VGA
LEM1
JIB1
JBR1
InfiniBand
UID
LE2
LEB1
LEB2
JI2C2
JI2C1
JWD1
CPU1 PCI-E 3.0 x16
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JSD1
P1-DIMMA1
P1-DIMMB1
P2-DIMMH1
P2-DIMMG1
J23
JP8
Fan1
LE1
BIOS
Fan3
P2-DIMMF1
P2-DIMME1
Fan4
JPI2C1
(4-Pin PWR)
(20-Pin PWR)
(20-Pin PWR)
J24
JF1
FPCTRL
P1-DIMMC1
P1-DIMMD1
T-SGPIO1
JBT1
JVRM_I2C2
JVRM_I2C1
JIPMB1
USB2
JPG1
JPL1
JPTM1
JPB1
JBAT1
CPU2
CPU1
SW1
PCH
C602J
BMC
LAN
CTRL
IB
CTRL
Processor
#1
Processor
#2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
JPME2
JPME1
Reset Button
The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to a
hardware reset switch on the computer
case. Refer to the table on the right for
pin denitions.
Power Button
The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be con-
gured to function as a suspend button
(with a setting in the BIOS - See Chapter
4). To turn off the power when the system
is in suspend mode, press the button for
4 seconds or longer. Refer to the table
on the right for pin denitions.
Reset Button
PinDenitions(JF1)
Pin# Denition
3Reset
4Ground
Power Button
PinDenitions(JF1)
Pin# Denition
1Signal
2Ground
FP PWRLED
HDD LED
NIC1 Link LED
NIC2 Link LED
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
Power Fail LED
2-28
A. Reset Button
B. PWR Button
Ground
X
Ground
Ground
2
1920
NMI
NIC1 Activity LED
NIC2 Activity LED
Reset
PWR
1
X
3.3 V
ID_UID_SW/3/3V Stby
Red+ (Blue LED Cathode)
3.3V
Reset Button
Power Button
A
B
Page 53
Chapter 2: Installation
2-6 Connecting Cables
Power Connectors
Two 20-pin main power supply connectors (J23/
J24) and a 4-pin power connector (JP8) are
located on the motherboard. These power con-
nectors meet the SSI EPS 12V specication. For
power supply to work properly, please follow the
instructions given below. See the table on the right
for pin denitions.
Note 1: You cannot use both 20-pin
power connectors: PWR1 (the right con-
nector) and PWR2 (the left connector)
as input power supply at the same time.
Only one connector can be used for input
power supply to the motherboard at a
time. For proper use of these proprietary
PWR Connectors, please customize
your PWR cables based on Supermicro
PWR Connector Pin-Out Definitions
listed above.
Note 2: The black square (dot) on a
power connector indicates the location
of pin 1. (See the pictures below for the
power cable connections.)
LEB1
LEB2
LE2
SW1
UID
JIB1
InfiniBand
VGA
JPME1
JI2C2
JI2C1
JBR1
JWD1
JPME2
IB
CPU1 PCI-E 3.0 x16
CTRL
PCH
C602J
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
JSD1
P1-DIMMB1
P1-DIMMA1
LAN1
USB0/1
LAN2
LEM1
COM1
IPMI_LAN
LAN
JPTM1
JBAT1
JPB1
CTRL
JPL1
USB2
JPG1
BMC
JIPMB1
JVRM_I2C1
JVRM_I2C2
LE1
BIOS
CPU1
CLOSE 1st
Processor
#1
X9DRT-F
Rev. 1.01A
OPEN 1st
T-SGPIO1
JBT1
P1-DIMMC1
P1-DIMMD1
C
ATX Power 20-pin Connector
PinDenitions
Pin# Denition Pin # Denition
1GND11PS_ON_N
2GND125V_STBY
3GND13GND
4GND14GND
5GND15GND
6NC16NC
712V1712V
812V1812V
912V1912V
1012V2012V
A. J23 (Left 20-Pin PWR) & Cable
B. J24 (Right 20-Pin PWR) & Cable
C. JP8 (Right 4-Pin PWR) & Cable
B
CPU2
CLOSE 1st
(4-Pin PWR)
JP8
C
A
Fan1
Processor
J23
(20-Pin PWR)
#2
P2-DIMMH1
P2-DIMMG1
JF1
FPCTRL
OPEN 1st
Fan3
J24
P2-DIMME1
(20-Pin PWR)
P2-DIMMF1
B
JPI2C1
A
Fan4
2-29
Page 54
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
JPI2C1
(20-Pin PWR)
J24
JIPMB1
USB2
JBAT1
4-pin Auxiliary Power Connector
In addition to two 20-pin power connectors, a
4-pin 12V PWR supply is located at JP8 on the
motherboard. This power connector is used to
provide power supply to hard drive disks. Refer
to the layout below for the location.
Note 1: The 4-pin Auxiliary Power Con-
nector is used for power supply output
to HDDs only.
Note 2: The black square (dot) on the
power connector indicates the location
of pin 1. (See the pictures below for the
power cable connections.)
LEB1
LEB2
LE2
SW1
UID
JI2C2
JI2C1
JPME2
CPU1 PCI-E 3.0 x16
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
JSD1
JWD1
JPME1
InfiniBand
JBR1
C602J
P1-DIMMB1
P1-DIMMA1
PCH
JIB1
VGA
IB
CTRL
CLOSE 1st
LEM1
COM1
CPU1
BIOS
LAN1
LAN2
LAN
CTRL
BMC
JVRM_I2C1
LE1
JBT1
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
JPTM1
P1-DIMMC1
P1-DIMMD1
JPB1
JPG1
JVRM_I2C2
JPL1
T-SGPIO1
4-Pin PWR
PinDenitions
Pin# Denition
1+12V
2Ground
3Ground
4+5V
A. JP8 (Right 4-Pin PWR) & Cable
Processor
#1
OPEN 1st
CPU2
(4-Pin PWR)
JP8
A
J23
(20-Pin PWR)
Fan1
CLOSE 1st
JF1
Processor
#2
P2-DIMMH1
P2-DIMMG1
OPEN 1st
Fan3
FPCTRL
P2-DIMME1
P2-DIMMF1
Fan4
A
2-30
Page 55
Chapter 2: Installation
D
Fan Headers
This motherboard has three system/CPU fan
headers (Fan 1, Fan 3, and Fan 4) on the
motherboard. All these 4-pin fans headers
are backward compatible with the traditional
3-pin fans. The fan speeds are controlled by
rmware management via IPMI interface.
See the table on the right for pin denitions.
SATA DOM Power Connector
A power connector for SATA DOM (Disk_On_
Module) devices is located at JSD1. Connect
an appropriate cable here to provide power
support for your SATA DOM devices.
LEB1
LEB2
LE2
SW1
UID
JI2C2
JI2C1
JPME2
CPU1 PCI-E 3.0 x16
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
JSD1
JWD1
JPME1
InfiniBand
JBR1
PCH
C602J
P1-DIMMB1
P1-DIMMA1
JIB1
VGA
IB
CTRL
CLOSE 1st
LEM1
COM1
BIOS
CPU1
LAN1
LAN2
LAN
CTRL
BMC
JVRM_I2C1
LE1
JBT1
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
JPTM1
P1-DIMMC1
P1-DIMMD1
JPB1
JPL1
JPG1
JVRM_I2C2
JBAT1
USB2
JIPMB1
T-SGPIO1
Fan Header
PinDenitions
Pin# Denition
1Ground
2+12V
3Tachometer
4PWR Modulation
DOM PWR
PinDenitions
Pin# Denition
1+5V
2Ground
3Ground
A. Fan 1
B. Fan 3
C. Fan 4
D. SATA DOM PWR
Processor
#1
OPEN 1st
CPU2
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
P2-DIMMG1
CLOSE 1st
JF1
Processor
#2
OPEN 1st
P2-DIMMH1
FPCTRL
J24
P2-DIMME1
P2-DIMMF1
(20-Pin PWR)
Fan3
Fan4
Fan1
A
B
C
JPI2C1
2-31
Page 56
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
IPMB I2C SMB
A System Management Bus header for the
IPMI slot is located at JIPMB1. Connect an
appropriate cable here to use the IPMB I2C
connection on your system.
PowerSMB(I2C)Connector
Power System Management Bus (I2C) Connec-
tor (JPI2C1) monitors power supply, fan and
system temperatures. See the table on the right
for pin denitions.
LEB1
LEB2
LE2
SW1
UID
JI2C2
JI2C1
JWD1
JPME2
CPU1 PCI-E 3.0 x16
JPME1
InfiniBand
JBR1
JIB1
VGA
IB
CTRL
LEM1
COM1
PCH
JSD1
P1-DIMMA1
C602J
P1-DIMMB1
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
BIOS
CPU1
CLOSE 1st
LAN1
LAN2
LAN
CTRL
BMC
JVRM_I2C1
LE1
JBT1
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
JPTM1
P1-DIMMC1
P1-DIMMD1
JPB1
JPL1
JPG1
JVRM_I2C2
JBAT1
USB2
JIPMB1
A
T-SGPIO1
SMB Header
PinDenitions
Pin# Denition
1Data
2Ground
3Clock
4No Connection
PWR SMB
PinDenitions
Pin# Denition
1Clock
2Data
3PWR Fail
4Ground
5+3.3V
A. IPMB
B. PWR SMB (JPI
2
C1)
Fan1
Processor
#1
OPEN 1st
CPU2
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
P2-DIMMG1
CLOSE 1st
JF1
Processor
#2
OPEN 1st
P2-DIMMH1
Fan3
FPCTRL
J24
P2-DIMME1
Fan4
(20-Pin PWR)
JPI2C1
B
P2-DIMMF1
2-32
Page 57
Chapter 2: Installation
TPM Header/Port 80
A Trusted Platform Module/Port 80 head-
er is located at JTPM1 to provide TPM
support and Port 80 connection. Use this
header to enhance system performance
and data security. See the table on the
right for pin denitions.
T-SGPIO1 Header
A Serial Link General Purpose Input/
Output header (T-SGPIO 1) is located at
on the motherboard to provide support for
onboard SATA connections. See the table
on the right for pin denitions.
LEB1
LEB2
LE2
SW1
UID
JI2C2
JI2C1
JPME2
CPU1 PCI-E 3.0 x16
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
JSD1
JWD1
JPME1
InfiniBand
JBR1
C602J
P1-DIMMB1
P1-DIMMA1
PCH
JIB1
VGA
IB
CTRL
LEM1
CPU1
CLOSE 1st
COM1
BIOS
LAN1
LAN2
LAN
CTRL
A
BMC
JVRM_I2C1
LE1
JBT1
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
JPTM1
P1-DIMMC1
P1-DIMMD1
JPG1
JVRM_I2C2
JPB1
JPL1
JBAT1
USB2
JIPMB1
T-SGPIO1
B
TPM/Port 80 Header
PinDenitions
Pin # DenitionPin # Denition
1LCLK2GND
3LFRAME#4<(KEY)>
5LRESET#6+5V (X)
7LAD 38LAD 2
9+3.3V10LAD1
11LAD012GND
13SMB_CLK414SMB_DAT4
15+3V_DUAL16SERIRQ
17GND18CLKRUN# (X)
19LPCPD#20LDRQ# (X)
T-SGPIO
PinDenitions
Pin# Denition Pin Denition
1NC2NC
3Ground4Data
5Load6Ground
7Clock8NC
Note: NC= No Connection
A. TPM/Port80
B. T-SGPIO 1
Fan1
Processor
#1
OPEN 1st
CPU2
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
CLOSE 1st
Processor
#2
P2-DIMMH1
P2-DIMMG1
OPEN 1st
JF1
FPCTRL
J24
P2-DIMME1
(20-Pin PWR)
P2-DIMMF1
Fan3
Fan4
JPI2C1
2-33
Page 58
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
Connector
Pins
Jumper
Cap
Setting
2-7 Jumper Settings
Explanation of Jumpers
To modify the operation of the mother-
board, jumpers can be used to choose
between optional settings. Jumpers cre-
ate shorts between two pins to change
the function of the connector. Pin 1
is identied with a square solder pad
on the printed circuit board. See the
motherboard layout pages for jumper
locations.
Note: On two-pin jumpers,
"Closed" means the jumper
is on and "Open" means the
jumper is off the pins.
GLAN Enable/Disable
JPL1 enables or disables the GLAN
1/2 ports on the motherboard. See the
table on the right for jumper settings.
The default setting is Enabled.
LEB1
LEB2
LE2
SW1
UID
JIB1
LEM1
InfiniBand
VGA
JPME1
JI2C2
JI2C1
JBR1
JWD1
JPME2
CPU1 PCI-E 3.0 x16
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
JSD1
IB
CTRL
PCH
C602J
P1-DIMMB1
P1-DIMMA1
CLOSE 1st
COM1
BIOS
CPU1
Processor
#1
LAN2
LAN
CTRL
LE1
X9DRT-F
Rev. 1.01A
OPEN 1st
LAN1
IPMI_LAN
BMC
JVRM_I2C1
JBT1
P1-DIMMD1
USB0/1
JPTM1
P1-DIMMC1
JPG1
JVRM_I2C2
JPB1
JPL1
JBAT1
USB2
JIPMB1
T-SGPIO1
A
3 2 1
3 2 1
Pin 1-2 short
GLAN Enable
Jumper Settings
Jumper Setting Denition
1-2Enabled (default)
2-3Disabled
A. GLAN1/2 Enable
(4-Pin PWR)
Fan1
CPU2
CLOSE 1st
JP8
J23
(20-Pin PWR)
Processor
#2
OPEN 1st
P2-DIMMH1
P2-DIMMG1
Fan3
JF1
FPCTRL
J24
P2-DIMME1
(20-Pin PWR)
P2-DIMMF1
Fan4
JPI2C1
2-34
Page 59
Chapter 2: Installation
CMOS Clear
JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads
to prevent accidental clearing of CMOS. To clear CMOS, use a metal object such
as a small screwdriver to touch both pads at the same time to short the connection.
Always remove the AC power cord from the system before clearing CMOS.
Note 1: For an ATX power supply, you must completely shut down the
system, remove the AC power cord, and then short JBT1 to clear CMOS.
Note 2: Be sure to remove the onboard CMOS Battery before you short
JBT1 to clear CMOS.
Note 3: Clearing CMOS will also clear all passwords.
Watch Dog Enable/Disable
Watch Dog (JWD1) is a system monitor that
can reboot the system when a software ap-
plication hangs. Close pins 1-2 to reset the
system if an application hangs. Close pins
2-3 to generate non-maskable interrupt sig-
nals for the application that hangs. See the
Watch Dog
Jumper Settings
Jumper Setting Denition
Pins 1-2Reset (default)
Pins 2-3NMI
OpenDisabled
table on the right for jumper settings. Watch
Dog must also be enabled in the BIOS.
LEB1
LEB2
LE2
SW1
UID
JIB1
LEM1
InfiniBand
VGA
JPME1
JI2C2
JI2C1
JBR1
JWD1
JPME2
B
JSD1
IB
CTRL
PCH
C602J
P1-DIMMB1
P1-DIMMA1
CLOSE 1st
Processor
CPU1 PCI-E 3.0 x16
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
COM1
BIOS
CPU1
#1
LAN2
LAN
CTRL
LE1
X9DRT-F
Rev. 1.01A
OPEN 1st
LAN1
IPMI_LAN
JPTM1
BMC
JVRM_I2C1
JBT1
P1-DIMMD1
USB0/1
A
P1-DIMMC1
JPG1
JVRM_I2C2
JPB1
JPL1
A. Clear CMOS
B. Watch Dog Enable
JBAT1
USB2
JIPMB1
T-SGPIO1
Fan1
CPU2
(4-Pin PWR)
CLOSE 1st
JP8
J23
(20-Pin PWR)
P2-DIMMG1
Processor
#2
OPEN 1st
P2-DIMMH1
Fan3
JF1
FPCTRL
J24
P2-DIMME1
(20-Pin PWR)
P2-DIMMF1
Fan4
JPI2C1
2-35
Page 60
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
VGA Enable
Jumper JPG1 allows the user to en-
able the onboard VGA connectors. The
default setting is 1-2 to enable the con-
nection. See the table on the right for
jumper settings.
BMC Enable
Jumper JPB1 allows you to enable the
onboard BMC (Baseboard Management)
Controller to provide IPMI 2.O/KVM sup-
port on the motherboard. See the table
on the right for jumper settings.
LEB1
LEB2
LE2
SW1
UID
JI2C2
JI2C1
JPME2
CPU1 PCI-E 3.0 x16
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
JSD1
JWD1
JPME1
InfiniBand
JBR1
C602J
P1-DIMMB1
P1-DIMMA1
PCH
JIB1
VGA
IB
CTRL
CLOSE 1st
LEM1
COM1
BIOS
CPU1
LAN1
LAN2
LAN
CTRL
B
BMC
A
JVRM_I2C1
LE1
JBT1
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
JPTM1
P1-DIMMC1
P1-DIMMD1
JPG1
JVRM_I2C2
JPB1
JPL1
JBAT1
USB2
JIPMB1
T-SGPIO1
VGA Enable
Jumper Settings
Jumper Setting Denition
1-2Enabled (Default)
2-3Disabled
BMC Enable
Jumper Settings
Jumper Setting Denition
Pins 1-2BMC Enable (Default)
Pins 2-3 Normal
A. VGA Enabled
B. BMC Enabled
Fan1
Processor
#1
OPEN 1st
CPU2
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
P2-DIMMG1
CLOSE 1st
JF1
Processor
#2
OPEN 1st
P2-DIMMH1
FPCTRL
J24
P2-DIMME1
P2-DIMMF1
(20-Pin PWR)
Fan3
Fan4
JPI2C1
2-36
Page 61
Chapter 2: Installation
I2C Bus to PCI-Exp. Slots
Use Jumpers JI2C1 and JI2C2 to connect
the System Management Bus (I2C) to SMC-
Proprietary Expansion slot to improve system
performance. These two jumpers are to be
set at the same time. The default setting is
Open for normal operation. See the table on
the right for jumper settings.
IBEnable(X9DRT-IBQF/IBFFOnly)
Use Jumper JIB1 to enable or disable the
onboard InniBand support on the X9DRT-
IBQF/IBFF. See the table on the right for
jumper settings.
LEB1
LEB2
LE2
SW1
UID
JI2C2
JI2C1
JPME2
CPU1 PCI-E 3.0 x16
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
JSD1
JWD1
JPME1
A
InfiniBand
JBR1
PCH
C602J
P1-DIMMB1
P1-DIMMA1
JIB1
VGA
IB
CTRL
LEM1
COM1
B
CPU1
CLOSE 1st
BIOS
LAN1
LAN2
LAN
CTRL
BMC
JVRM_I2C1
LE1
JBT1
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
JPTM1
P1-DIMMC1
P1-DIMMD1
JVRM_I2C2
JPB1
JPL1
JPG1
JBAT1
USB2
JIPMB1
T-SGPIO1
I2C for PCI-E slots
Jumper Settings
Jumper Setting Denition
ClosedEnabled
OpenNormal (Default)
InniBandEnable
Jumper Settings
Jumper Setting Denition
Pins 1-2IB Enable (Default)
Pins 2-3IB Disable
2
A. JI
C1/ JI2C2
B. IB Enabled
Fan1
Processor
#1
OPEN 1st
CPU2
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
P2-DIMMG1
CLOSE 1st
JF1
Processor
#2
OPEN 1st
P2-DIMMH1
FPCTRL
J24
P2-DIMME1
P2-DIMMF1
(20-Pin PWR)
Fan3
Fan4
JPI2C1
2-37
Page 62
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
LAN1
LAN2
COM1
VGA
LEM1
JIB1
JBR1
InfiniBand
UID
LE2
LEB1
LEB2
JI2C2
JI2C1
JWD1
CPU1 PCI-E 3.0 x16
I-SATA0
I-SATA1
I-SATA2
I-SATA3
I-SATA4
I-SATA5
JSD1
P1-DIMMA1
P1-DIMMB1
P2-DIMMH1
P2-DIMMG1
J23
JP8
Fan1
LE1
BIOS
Fan3
P2-DIMMF1
P2-DIMME1
Fan4
JPI2C1
(4-Pin PWR)
(20-Pin PWR)
(20-Pin PWR)
J24
JF1
FPCTRL
P1-DIMMC1
P1-DIMMD1
T-SGPIO1
JBT1
JVRM_I2C2
JVRM_I2C1
JIPMB1
USB2
JPG1
JPL1
JPTM1
JPB1
JBAT1
CPU2
CPU1
SW1
PCH
C602J
BMC
LAN
CTRL
IB
CTRL
Processor
#1
Processor
#2
CLOSE 1st
OPEN 1st
CLOSE 1st
OPEN 1st
JPME2
JPME1
ManagementEngine(ME)Recovery
Use Jumper JPME1 to select ME Firm-
ware Recovery mode, which will limit
resource allocation for essential system
operation only in order to maintain nor-
ME Recovery
Jumper Settings
Jumper Setting Denition
1-2Normal (Default)
2-3ME Recovery
mal power operation and management.
In the single operation mode, online
upgrade will be available via Recovery
mode. See the table on the right for
jumper settings.
Manufacture Mode Select
Close pin 2 and pin 3 of Jumper JPME2
to bypass SPI ash security and force
the system to operate in the Manufac-
ture Mode, allowing the user to ash the
ME Mode Select
Jumper Settings
Jumper Setting Denition
1-2Normal (Default)
2-3Manufacture Mode
system rmware from a host server for
system setting modications. See the
table on the right for jumper settings.
A. JPME1
A
B
B. JPME2
2-38
Page 63
2-8 Onboard LED Indicators
LAN 1/LAN 2
GLAN LEDs
The Gigabit LAN ports are located on the IO
Backplane on the motherboard. Each Ether-
net LAN port has two LEDs. The Yellow LED
indicates activity. The Link LED on the left
side of the LAN port may be green, amber or
off to indicate the speed of the connection.
See the tables at right for more information.
Chapter 2: Installation
Link LED
Rear View (when facing the
rear side of the chassis)
GLANActivityIndicator(Left)
LED Settings
Color Status Denition
YellowFlashingActive
GLAN Link Indicator
LED Settings
LED Color Denition
Off10 Mbps, or No Connection
Green100 Mbps
Amber1 Gbps
Activity LED
IPMI Dedicated LAN LEDs
In addition to the Gigabit Ethernet ports, an
IPMI Dedicated LAN is also located on the
motherboard. The amber LED on the right
indicates activity, while the green LED on
the left indicates the speed of the con-
nection. See the tables at right for more
information.
LEB1
LE2
SW1
UID
JI2C2
JI2C1
JWD1
JPME2
CPU1 PCI-E 3.0 x16
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
JSD1
Fan1
IPMI LAN
Link LED
IPMILANLinkLED(Left)&
ActivityLED(Right)
Activity LED
Color/State Denition
Link (Left)Green: Solid100 Mbps
Activity (Right) Amber: Blinking Active
LEB2
JIB1
InfiniBand
VGA
JPME1
JBR1
IB
CTRL
PCH
C602J
P1-DIMMB1
P1-DIMMA1
CLOSE 1st
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
P2-DIMMH1
P2-DIMMG1
CLOSE 1st
LEM1
Processor
Processor
COM1
CPU1
#1
CPU2
BIOS
#2
LAN2
LAN
CTRL
LE1
X9DRT-F
Rev. 1.01A
OPEN 1st
OPEN 1st
Fan3
LAN1
IPMI_LAN
BMC
JVRM_I2C1
JBT1
P1-DIMMD1
P2-DIMMF1
USB0/1
JPTM1
P1-DIMMC1
Fan4
JPB1
JPG1
JVRM_I2C2
FPCTRL
P2-DIMME1
JBAT1
JPL1
USB2
T-SGPIO1
JF1
J24
(20-Pin PWR)
JPI2C1
JIPMB1
B
A
A. LAN1/2 LEDs
B. IPMI LAN LEDs
2-39
Page 64
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
USB0/1
IPMI_LAN
I-SATA3
JPI2C1
(20-Pin PWR)
J24
T-SGPIO1
JIPMB1
USB2
JPL1
JBAT1
Onboard Power LED
An Onboard Power LED is located at LE1
on the motherboard. When this LED is on,
the system is on. Be sure to turn off the
system and unplug the power cord before
removing or installing components. See
the tables at right for more information.
Rear UID LED
The rear UID LED is located at LE2 on
the rear of the motherboard. This LED
is used in conjunction with the rear UID
switch to provide easy identication of a
OnboardPWRLEDIndicator(LE1)
LED Settings
LED Color Status
OffSystem Off (PWR cable
not connected)
GreenSystem On
Green:
Flashing
Quickly
ACPI S1 State
UID LED
Status
Color/State OS Status
Blue: On Windows OS Unit Identied
Blue:
Blinking
Linux OSUnit Identied
system that might be in need of service.
Refer to UID Switch on Page 2-18 for
more information.
LEB1
LEB2
B
LE2
SW1
UID
JI2C2
JI2C1
JPME2
CPU1 PCI-E 3.0 x16
I-SATA4
I-SATA5
I-SATA1
I-SATA2
I-SATA0
JSD1
JWD1
JPME1
InfiniBand
JBR1
C602J
P1-DIMMB1
P1-DIMMA1
PCH
JIB1
IB
CTRL
VGA
LEM1
CPU1
CLOSE 1st
COM1
BIOS
A
LAN2
LAN
CTRL
LE1
X9DRT-F
Rev. 1.01A
LAN1
JPTM1
BMC
JVRM_I2C1
JBT1
P1-DIMMC1
P1-DIMMD1
JPG1
JVRM_I2C2
JPB1
A. Onboard PWR LED
B. Rear UID LED
Fan1
Processor
#1
OPEN 1st
CPU2
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
CLOSE 1st
JF1
Processor
#2
P2-DIMMH1
P2-DIMMG1
OPEN 1st
Fan3
FPCTRL
P2-DIMME1
P2-DIMMF1
Fan4
2-40
Page 65
Chapter 2: Installation
IPMI_LAN
JPI2C1
(20-Pin PWR)
J24
T-SGPIO1
JIPMB1
USB2
JPL1
JBAT1
BMC Heartbeat LED
A BMC Hear tbeat LED is located at
LEM1 on the motherboard. When LEM1
is blinking, BMC functions normally. See
the table at right for more information.
IBLEDIndicators(X9DRT-IBQF+/IBFF
Only)
Two InniBand (IB) LED Indicators (LEB1/
LEB2) are located on the motherboard.
The green LED (LEB1) is InniBand Link
LED. The yellow LED (LEB2) indicates
activity. Refer to the table on the right for
details. Also see the layout below for the
LED locations.
B
C
LEB1
LEB2
LE2
SW1
UID
JI2C2
JI2C1
JPME2
CPU1 PCI-E 3.0 x16
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
JSD1
JWD1
JPME1
InfiniBand
JBR1
C602J
P1-DIMMB1
P1-DIMMA1
PCH
JIB1
VGA
IB
CTRL
LEM1
CPU1
CLOSE 1st
COM1
A
BIOS
LAN2
LAN
CTRL
X9DRT-F
Rev. 1.01A
LE1
LAN1
USB0/1
JPTM1
BMC
JVRM_I2C1
JBT1
P1-DIMMC1
P1-DIMMD1
JPB1
JPG1
JVRM_I2C2
BMC Heartbeat LED
Status
Color/State Denition
Green:
Blinking
InniBandLinkLED
BMC: Normal
(LEB1)Settings
Color Status Denition
Green SolidInniBand
Connected
OffOffNo connection
InniBandActivityLED
(LEB2)Settings
Color Status Denition
Yellow SolidInniBand:
Yellow DimInniBand:
Active
Connected,
Activity: Idle
OffOffNo connection
A. BMC LED
B. LEB1 (IB Link LED)
C. LEB2 (IB Act. LED)
Fan1
Processor
#1
OPEN 1st
CPU2
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
CLOSE 1st
JF1
Processor
#2
P2-DIMMH1
P2-DIMMG1
OPEN 1st
Fan3
FPCTRL
P2-DIMME1
P2-DIMMF1
Fan4
2-41
Page 66
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
JPI2C1
(20-Pin PWR)
J24
JIPMB1
USB2
JBAT1
2-9 Expansion Slot and SATA Connections
PCI-E 3.0 x 16 Slot for SMC-Proprietary
Riser Card
(CPU1) PCI-Express 3.0 x16 slot is located
on the motherboard. This slot is used for an
SMC-Proprietary Riser card (P/N RSC-RIUT-
E16). This slot is available when a processor
is installed in the CPU1 socket. Refer to the
layout below for the location.
LEB1
LEB2
LE2
SW1
UID
JI2C2
JI2C1
JPME2
CPU1 PCI-E 3.0 x16
JWD1
JPME1
InfiniBand
JBR1
JIB1
VGA
IB
CTRL
LEM1
A
PCH
I-SATA4
I-SATA3
I-SATA1
I-SATA0
C602J
I-SATA5
I-SATA2
JSD1
P1-DIMMB1
P1-DIMMA1
CPU1
CLOSE 1st
COM1
BIOS
LAN1
LAN2
LAN
CTRL
BMC
JVRM_I2C1
LE1
JBT1
X9DRT-F
Rev. 1.01A
USB0/1
IPMI_LAN
JPTM1
P1-DIMMC1
P1-DIMMD1
JVRM_I2C2
JPB1
JPL1
JPG1
T-SGPIO1
A. CPU1 PCI-E 3.0 x16 Slot
Fan1
Processor
#1
OPEN 1st
CPU2
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
CLOSE 1st
Processor
#2
P2-DIMMH1
P2-DIMMG1
OPEN 1st
Fan3
JF1
FPCTRL
P2-DIMME1
P2-DIMMF1
Fan4
2-42
Page 67
Chapter 2: Installation
(20-Pin PWR)
JIPMB1
F
D
E
SerialATA(SATA)Ports
There are two SATA 3.0 (I-SATA 0/1), and four SATA
2.0 ports (I-SATA2-I-SATA5) are located on the moth-
erboard. These ports provide serial-link signal connec-
tions, which are faster than the connections of Parallel
ATA. See the table on the right for pin denitions.
LEB1
LEB2
LAN1
USB0/1
IPMI_LAN
JPTM1
BMC
JVRM_I2C1
JBT1
JPB1
JPL1
JPG1
JVRM_I2C2
JBAT1
USB2
T-SGPIO1
LE2
SW1
JI2C1
UID
JI2C2
JWD1
JPME2
CPU1 PCI-E 3.0 x16
InfiniBand
JPME1
JBR1
JIB1
VGA
IB
CTRL
LEM1
COM1
LAN2
LAN
CTRL
PCH
I-SATA4
I-SATA5
I-SATA3
I-SATA1
I-SATA2
I-SATA0
C602J
BIOS
LE1
X9DRT-F
A
B
JSD1
C
P1-DIMMB1
P1-DIMMA1
CLOSE 1st
CPU1
Rev. 1.01A
P1-DIMMC1
P1-DIMMD1
Serial Link
PinDenitions
Pin# Denition
1Ground
2TX_P
3TX_N
4Ground
5RX_N
6RX_P
7Ground
A. I-SATA0 (3.0)
B. I-SATA1 (3.0)
C. I-SATA2 (2.0)
D. I-SATA3 (2.0)
E. I-SATA4 (2.0)
F. I-SATA5 (2.0)
Processor
#1
OPEN 1st
CPU2
CLOSE 1st
JF1
Processor
#2
OPEN 1st
P2-DIMMH1
Fan3
FPCTRL
J24
P2-DIMME1
P2-DIMMF1
Fan4
JPI2C1
Fan1
(4-Pin PWR)
JP8
J23
(20-Pin PWR)
P2-DIMMG1
2-43
Page 68
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
Notes
2-44
Page 69
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
Warning: Always disconnect the power cord before adding, changing or installing any
hardware components.
Before Power On
1. Make sure that there are no short circuits between the motherboard and
chassis.
2. Disconnect all ribbon/wire cables from the motherboard, including keyboard
and mouse cables.
3. Remove all add-on cards.
4. Install CPU 1 rst (-making sure it is fully seated), and connect the front panel
connectors to the motherboard.
No Power
1. Make sure that there are no short circuits between the motherboard and the
chassis.
2. Make sure that the ATX power connectors are properly connected.
3. Check that the 115V/230V switch on the power supply is properly set, if avail-
able.
4. Turn the power switch on and off to test the system, if applicable.
5. The battery on your motherboard may be old. Check to verify that it still sup-
plies ~3VDC. If it does not, replace it with a new one.
3-1
Page 70
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
No Video
1. If the power is on, but you have no video, remove all add-on cards and
cables.
2. Use the speaker to determine if any beep codes exist. Refer to Appendix A
for details on beep codes.
System Boot Failure
If the system does not display POST or does not respond after the power is turned
on, check the following:
1. Check for any error beeps from the motherboard speaker.
•If there is no error beep, try to turn on the system without any DIMM module
installed. If there is still no error beep, try to turn on the system again with only
one processor installed in CPU Socket#1. If there is still no error beep, replace
the motherboard.
•If there are error beeps, clear the CMOS setting by unplugging the power cord
and contacting both pads on the CMOS Clear Jumper (JBT1). (Refer to Sec-
tion 2-8 in Chapter 2.)
2. Remove all components from the motherboard, especially the DIMM mod-
ules. Make sure that the system's power is on, and memory error beeps are
activated.
3. Turn on the system with only one DIMM module installed. If the system boots,
check for bad DIMM modules or slots by following the procedure of memory-
error troubleshooting in this chapter.
LosingtheSystem’sSetupConguration
1. Make sure that you are using a high quality power supply. A poor quality
power supply may cause the system to lose the CMOS setup information.
Refer to Section 2-7 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still sup-
plies ~3VDC. If it does not, replace it with a new one.
3. If the steps indicated above do not x setup conguration problems, contact
your vendor for repairs.
3-2
Page 71
Chapter 3: Troubleshooting
Memory Errors
When a No_Memory_Beep_Code is issued by the system, check the following:
1. Make sure that the memory modules are compatible with the system and that
the DIMM modules are properly and fully installed. (For memory compatibility,
refer to the Memory Compatibility Chart posted on our website at http://www.
supermicro.com.)
2. Check if different speeds of DIMMs have been installed. It is strongly recom-
mended that you use the memory modules of the same speed and same type
for all DIMMs in the system.
3. Make sure that you are using the correct type of RDIMM/LRDIMM ECC or
UDIMM ECC/Non-ECC DDR3 DIMM modules recommended by the manufac-
turer.
4. Check for bad DIMM modules or slots by swapping a single module among
all memory slots and check the results.
5. Make sure that all memory modules are fully seated in their slots. Follow the
instructions given in Section 2-4 in Chapter 2.
6. Please follow the instructions given in the DIMM Population Tables listed in
Section 2-4 to install your memory modules.
When the System Becomes Unstable
A. The system becomes unstable during or after OS system installation
When the system becomes unstable during or after OS system installation, check
the following:
1. CPU/BIOS support: Make sure that your CPU is supported, and you have the
latest BIOS installed in your system.
2. Memory support: Make sure that the memory modules are supported by test-
ing the modules using memtest86 or a similar utility.
Note: Refer to the product page on our website at http://www.supermicro.
com for memory and CPU support and updates.
3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Re-
place the bad HDDs with good ones.
3-3
Page 72
X9DRT-F/-IBQF/-IBFF Motherboard User’s Manual
4. System cooling: Check system cooling to make sure that all cooling fans and
system fans work properly. Check Hardware Monitoring settings in the BIOS
to make sure that the CPU and System temperatures are within the normal
range. Also check the front panel Overheat LED, and make sure that the
Overheat LED is not on.
5. Adequate power supply: Make sure that the power supply provides adequate
power to the system. Make sure that all power connectors are connected.
Please refer to our website for more information on minimum power require-
ment.
6. Proper software support: Make sure that the correct disk drivers are used.
B. The system becomes unstable before or during OS installation
When the system becomes unstable before or during OS installation, check the
following:
1. Source of installation: Make sure that the devices used for installation are
working properly, including boot devices such as CD/DVD disc, CD/DVD-
ROM.
2. Cable connection: Check to make sure that all cables are connected and
working properly.
3. Using minimum conguration for troubleshooting: Remove all unnecessary
components (-starting with add-on cards rst), and use minimum congura-
tion (with a CPU and a memory module installed) to identify the problematic
areas. Refer to the steps listed in Section A above for proper troubleshooting
procedures.
4. Identifying bad components by isolating them: If necessary, remove a compo-
nent in question from the chassis, and test it in isolation to make sure that it
works properly. Replace a bad component with a good one.
5. Check and change one component at a time instead of changing several
items at the same time. This will help isolate and identify the problem.
6. To nd out if a component is good, swap the component with a new one to
see if the system will work properly. If so, then the old component is bad.
You can also install the component in question in another system. If the new
system works, the component is good and the old system has problems.
3-4
Page 73
Chapter 3: Troubleshooting
3-2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, please
note that as a motherboard manufacturer, Supermicro also sells motherboards
through its channels, so it is best to rst check with your distributor or reseller for
troubleshooting services. They should know of any possible problem(s) with the
specic system conguration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our website
(http://www.supermicro.com/) before contacting Technical Support.
2. BIOS upgrades can be downloaded from our website (http://www.supermicro.
com).
3. If you still cannot resolve the problem, include the following information when
contacting Supermicro for technical support:
•Motherboard model and PCB revision number
•BIOS release date/version (This can be seen on the initial display when your
system rst boots up.)
•System conguration
4. An example of a Technical Support form is on our website at (http://www.
supermicro.com).
•Distributors: For immediate assistance, please have your account number ready
when placing a call to our technical support department. We can be reached by
e-mail at support@supermicro.com.
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3-3 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Locate the onboard battery.
3. Using a tool such as a pen or a small screwdriver, push the battery lock out-
wards to unlock it. Once unlocked, the battery will pop out from the holder.
4. Remove the battery.
Proper Battery Disposal
Warning: Please handle used batteries carefully. Do not damage the battery in any
way; a damaged battery may release hazardous materials into the environment. Do
not discard a used battery in the garbage or a public landll. Please comply with the
regulations set up by your local hazardous waste management agency to dispose of
your used battery properly.
Battery Installation
1. To install an onboard battery, follow the steps 1 & 2 above and continue
below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until you hear a
click to ensure that the battery is securely locked.
Warning: When replacing a battery, be sure to only replace it with the same type.
OR
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3-4 Frequently Asked Questions
Question: What are the various types of memory that my motherboard can
support?
Answer: The motherboard supports RDIMM/LRDIMM ECC or UDIMM ECC/Non-
ECC DDR3 DIMM modules. To enhance memory performance, do not mix memory
modules of different speeds and sizes. Please follow all memory installation instruc-
tions given on Section 2-4 in Chapter 2.
Question: How do I update my BIOS?
It is recommended that you do not upgrade your BIOS if you are not experiencing
any problems with your system. Updated BIOS les are located on our website
at http://www.supermicro.com. Please check our BIOS warning message and the
information on how to update your BIOS on our website. Select your motherboard
model and download the BIOS le to your computer. Also, check the current BIOS
revision to make sure that it is newer than your BIOS before downloading. You can
choose from the zip le and the .exe le. If you choose the zip BIOS le, please
unzip the BIOS le onto a bootable USB device. Run the batch le using the format
AMI.bat lename.rom from your bootable USB device to ash the BIOS. Then, your
system will automatically reboot.
Warning: Do not shut down or reset the system while updating the BIOS to prevent
possible system boot failure!)
Note: The SPI BIOS chip used on this motherboard cannot be removed.
Send your motherboard back to our RMA Department at Supermicro for
repair. For BIOS Recovery instructions, please refer to the AMI BIOS
Recovery Instructions posted at http://www.supermicro.com.
Question: How do I handle the used batter y?
Answer: Please handle used batteries carefully. Do not damage the battery in any
way; a damaged battery may release hazardous materials into the environment. Do
not discard a used battery in the garbage or a public landll. Please comply with the
regulations set up by your local hazardous waste management agency to dispose
of your used battery properly. (Refer to Section 3-3 on Page 3-6.)
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3-5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required before
any warranty service will be rendered. You can obtain service by calling your ven-
dor for a Returned Merchandise Authorization (RMA) number. When returning the
motherboard to the manufacturer, the RMA number should be prominently displayed
on the outside of the shipping carton, and the shipping package is mailed prepaid
or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete. For faster service, You can also request
a RMA authorization online (http://www.supermicro.com/RmaForm/).
This warranty only covers normal consumer use and does not cover damages in-
curred in shipping or from failure due to the alternation, misuse, abuse or improper
maintenance of products.
During the warranty period, contact your distributor rst for any product problems.
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Chapter 4: AMI BIOS
Chapter 4
BIOS
4-1 Introduction
This chapter describes the AMI BIOS Setup utility for the X9DRT-F/-IBQF/-IBFF. It
also provides the instructions on how to navigate the AMI BIOS Setup utility screens.
The AMI ROM BIOS is stored in a Flash EEPROM and can be easily updated.
Starting BIOS Setup Utility
To enter the AMI BIOS Setup utility screens, press the <Del> key while the system
is booting up.
Note: In most cases, the <Del> key is used to invoke the AMI BIOS setup
screen. There are a few cases when other keys are used, such as <F3>,
<F4>, etc.
Each main BIOS menu option is described in this manual. The Main BIOS setup
menu screen has two main frames. The left frame displays all the options that can
be congured. Grayed-out options cannot be congured. Options in blue can be
congured by the user. The right frame displays the key legend. Above the key
legend is an area reserved for informational text. When an option is selected in
the left frame, it is highlighted in white. Often informational text will accompany it.
Note: The AMI BIOS has default informational messages built in. The
manufacturer retains the option to include, omit, or change any of these
informational messages.
The AMI BIOS Setup utility uses a key-based navigation system called "hot keys."
Most of the AMI BIOS setup utility "hot keys" can be used at any time during setup
navigation. These keys include <F3>, <F4>, <Enter>, <ESC>, arrow keys, etc.
Note 1: Options printed in Bold are default settings.
Note 2: <F3> is used to load optimal default settings. <F4> is used to save
the settings and exit the setup utility.
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HowToChangetheCongurationData
The conguration data that determines the system parameters may be changed by
entering the AMI BIOS Setup utility. This Setup utility can be accessed by pressing
<Delete> at the appropriate time during system boot.
Note: For AMI UEFI BIOS Recovery, please refer to the UEFI BIOS Re-
covery User Guide posted @http://www.supermicro.com/support/manuals/.
Starting the Setup Utility
Normally, the only visible Power-On Self-Test (POST) routine is the memory test.
As the memory is being tested, press the <Delete> key to enter the main menu of
the AMI BIOS Setup utility. From the main menu, you can access the other setup
screens. An AMI BIOS identication string is displayed at the left bottom corner of
the screen below the copyright message.
Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.
Flashing the wrong BIOS can cause irreparable damage to the system. In no event
shall the manufacturer be liable for direct, indirect, special, incidental, or consequential
damage arising from a BIOS update. If you have to update the BIOS, do not shut down
or reset the system while the BIOS is being updated to avoid possible boot failure.
4-2 Main Setup
When you rst enter the AMI BIOS Setup utility, you will enter the Main setup screen.
You can always return to the Main setup screen by selecting the Main tab on the
top of the screen. The Main BIOS Setup screen is shown below.
The AMI BIOS Main menu displays the following information:
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System Date/System Time
Use this option to change the system time and date. Highlight System Time or
System Date using the arrow keys. Enter new values through the keyboard and
press <Enter>. Press the <Tab> key to move between elds. The date must be
entered in Day MM/DD/YY format. The time is entered in HH:MM:SS format. (Note:
The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.).
Supermicro X9DRT
Version
This item displays the SMC version of the BIOS ROM used in this system.
Build Date
This item displays the date that the BIOS Setup utility was built.
Memory Information
Total Memory
This displays the amount of memory that is available in the system.
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4-3 AdvancedSetupCongurations
Select the Advanced tab to access the following submenu items.
Boot Features
Quiet Boot
This feature allows the user to select bootup screen display between POST mes-
sages and the OEM logo. Select Disabled to display the POST messages. Select
Enabled to display the OEM logo instead of the normal POST messages. The op-
tions are Enabled and Disabled.
AddOn ROM Display Mode
Use this item to set the display mode for the Option ROM. Select Keep Current to
use the current AddOn ROM Display setting. Select Force BIOS to use the Option
ROM display mode set by the system BIOS. The options are Force BIOS and
Keep Current.
Bootup Num-Lock
Use this feature to set the Power-on state for the Numlock key. The options are
Off and On.
Wait For 'F1' If Error
Select Enabled to force the system to wait until the 'F1' key is pressed if an error
occurs. The options are Disabled and Enabled.
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Chapter 4: AMI BIOS
Interrupt 19 Capture
Interrupt 19 is the software interrupt that handles the boot disk function. When this
item is set to Enabled, the ROM BIOS of the host adaptors will "capture" Interrupt 19
at bootup and allow the drives that are attached to these host adaptors to function
as bootable disks. If this item is set to Disabled, the ROM BIOS of the host adap-
tors will not capture Interrupt 19, and the drives attached to these adaptors will not
function as bootable devices. The options are Enabled and Disabled.
Re-try Boot
When set to Enabled, the BIOS will continuously retry to boot from the selected
boot type. The options are Disabled, Legacy Boot, and EFI Boot.
PowerConguration
Watch Dog Function
If enabled, the Watch Dog timer will allow the system to automatically reboot when
a non-recoverable error occurs that lasts for more than ve minutes. The options
are Enabled and Disabled.
Power Button Function
If this feature is set to Instant Off, the system will power off immediately as soon
as the user presses the power button. If this feature is set to 4 Seconds Override,
the system will power off when the user presses the power button for 4 seconds or
longer. The options are Instant Off and 4 Seconds Override.
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Stay Off for
the system power to remain off after a power loss. Select Power On for the system
power to be turned on after a power loss. Select Last State to allow the system
to resume its last state before a power loss. The options are Power On, Stay Off,
and Last State.
CPUConguration
This submenu displays the information of the CPU as detected by the BIOS. It also
allows the user to congure CPU settings.
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Socket 1 CPU Information, Socket 2 CPU Information
This submenu displays the following information regarding the CPUs installed in
Socket 1 and Socket 2.
•Type of CPU
•CPU Signature
•Microcode Patch
•CPU Stepping
•Maximum CPU Speed
•Minimum CPU Speed
•Processor Cores
•Intel HT (Hyper-Threading) Technology
•Intel VT-x Technology
•Intel SMX Technology
•L1 Data Cache
•L1 Code Cache
•L2 Cache
•L3 Cache
CPU Speed
This item displays the speed of the CPU installed in Socket 1/Socket 2.
64-bit
This item indicates if the CPU installed in Socket 1 or Socket 2 supports 64-bit
technology.
Clock Spread Spectrum
Select Enable to enable Clock Spectrum support, which will allow the BIOS to moni-
tor and attempt to reduce the level of Electromagnetic Interference caused by the
components whenever needed. The options are Disabled and Enabled.
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RTID(RecordTypesIDs)
This feature displays the total number of Record Type IDs for local and remote
pools. The options are Optimal and Alternate.
Hyper-threading
Select Enabled to support Intel Hyper-threading Technology to enhance CPU per-
formance. The options are Enabled and Disabled.
Active Processor Cores
Set to Enabled to use a processor's second core and above. (Please refer to Intel's
website for more information.) The options are All, 1, 2, 4, and 6.
Limit CPUID Maximum
This feature allows the user to set the maximum CPU ID value. Enable this function
to boot the legacy operating systems that cannot support processors with extended
CPUID functions. The options are Enabled and Disabled (for the Windows OS).
This feature allows the user to set the limit on the C-State package register.
The options are C0, C2, C6, and No Limit.
Energy/Performance Bias
Use this feature to select an appropriate fan setting to achieve maximum system
performance (with maximum cooling) or maximum energy efciency with maxi-
mum power saving). The fan speeds are controlled by the rmware management
via IPMI 2.0. The options are Performance, Balanced Performance, Balanced
Energy, and Energy Efcient.
Factory Long Duration Power Limit
This item displays the power limit (in watts) set by the manufacturer during which
long duration power is maintained.
Long Duration Power Limit
This item displays the power limit (in watts) set by the user during which long
duration power is maintained. The default setting is 0.
Factory Long Duration Maintained
This item displays the period of time (in seconds) set by the manufacturer during
which long duration power is maintained.
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Long Duration Maintained
This item displays the period of time (in seconds) during which long duration
power is maintained. The default setting is 0.
Recommended Short Duration Power Limit
This item displays the short duration power settings (in watts) recommended by
the manufacturer.
Short Duration Power Limit
This item displays the time period during which short duration power (in watts)
is maintained. The default setting is 0.
ChipsetConguration
North Bridge
This feature allows the user to congure the settings for the Intel North Bridge.
IntegratedIOConguration
Intel® VT-d
Select Enabled to enable Intel Virtualization Technology support for Direct I/O
VT-d by reporting the I/O device assignments to the VMM (Virtual Machine
Monitor) through the DMAR ACPI Tables. This feature offers fully-protected I/O
resource sharing across Intel platforms, providing greater reliability, security
and availability in networking and data-sharing. The options are Enabled and
Disabled.
Intel® I/OAT
Select Enabled to enable Intel I/OAT (I/O Acceleration Technology), which sig-
nicantly reduces CPU overhead by leveraging CPU architectural improvements
and freeing the system resource for other tasks. The options are Disabled and
Enabled.
DCA Support
When set to Enabled, this feature uses Intel's DCA (Direct Cache Access)
Technology to improve data transfer efciency. The default setting is Enabled.
IIO 1 PCIe Port Bifurcation Control
This submenu congures the following IO PCIe Port Bifurcation Control settings
for IIO 1 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.
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Port 1A Link Speed
Select GEN1 to enable PCI-Exp Generation 1 support for the port. Select GEN2
to enable PCI-Exp Generation 2 support for the port. Select GEN3 to enable
PCI-Exp Generation 3 support for the port. The options are GEN1, GEN2, and
GEN3.
Port 1B Link Speed
Select GEN1 to enable PCI-Exp Generation 1 support for the port. Select GEN2
to enable PCI-Exp Generation 2 support for the port. Select GEN3 to enable
PCI-Exp Generation 3 support for the port. The options are GEN1, GEN2, and
GEN3.
Port 2A Link Speed
Select GEN1 to enable PCI-Exp Generation 1 support for the port. Select GEN2
to enable PCI-Exp Generation 2 support for the port. Select GEN3 to enable
PCI-Exp Generation 3 support for the port. The options are GEN1, GEN2, and
GEN3.
IIO 2 PCIe Port Bifurcation Control
This submenu congures the following IO PCIe Port Bifurcation Control settings
for IIO 2 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.
QPIConguration
Current QPI Link Speed
This item displays the current status of the QPI Link.
Current QPI Link Frequency
This item displays the frequency of the QPI Link.
Isoc
Select Enabled to enable Isochronous support to meet QoS (Quality of Service)
requirements. This feature is especially important for virtualization technology.
The options are Enabled and Disabled.
QPI(QuickPathInterconnect)LinkSpeedMode
Use this feature to select data transfer speed for QPI Link connections. The
options are Fast and Slow.
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QPI Link Frequency Select
Use this feature to select the desired QPI frequency. The options are Auto, 6.4
GT/s, 7.2 GT/s, and 8.0 GT/s.
DIMMConguration
This section displays the following DIMM information.
Current Memory Mode
This item displays the current memory mode.
Current Memory Speed
This item displays the current memory speed.
Mirroring
This item displays if memory mirroring is supported by the motherboard. Memory
mirroring creates a duplicate copy of the data stored in the memory to enhance
data security.
Sparing
This item displays if memory sparing is supported by the motherboard. Memory
sparing enhances system performance.
DIMM Information
The status of the memory modules detected by the BIOS is displayed.
Memory Mode
When Independent is selected, all DIMMs are available to the operating system.
When Mirroring is selected, the motherboard maintains two identical copies of all
data in memory for data backup. When Lock Step is selected, the motherboard
uses two areas of memory to run the same set of operations in parallel. The
default setting is Independent.
DRAM RAPL Mode
RAPL (Running Average Power Limit) provides mechanisms to enforce power
consumption limits on supported processors The options are DRAM RAPL
MODE0 , DRAM RAPL MODE1, and Disabled.
DDR Speed
Use this feature to force a DDR3 memory module to run at a frequency other
than what is specied in the specication. The options are Auto, Force DDR3-
800, Force DDR3-1066, Force DDR3-1333, Force DDR3-1600 and Force SPD.
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Channel Interleaving
This feature selects from the different channel interleaving methods. The options
are Auto, 1 Way, 2 Way, 3, Way, and 4 Way.
Rank Interleaving
This feature allows the user to select a rank memory interleaving method. The
options are Auto, 1 Way, 2 Way, 4, Way, and 8 Way.
Patrol Scrub
Patrol Scrubbing is a process that allows the CPU to correct correctable memory
errors detected on a memory module and send the correction to the requestor
(the original source). When this item is set to Enabled, the IO hub will read and
write back one cache line every 16K cycles, if there is no delay caused by internal
processing. By using this method, roughly 64 GB of memory behind the IO hub
will be scrubbed every day. The options are Enabled and Disabled.
Demand Scrub
Demand Scrubbing is a process that allows the CPU to correct correctable
memory errors found on a memory module. When the CPU or I/O issues a
demand-read command, and the read data from memory turns out to be a
correctable error, the error is corrected and sent to the requestor (the original
source). Memory is updated as well. Select Enabled to use Demand Scrubbing
for ECC memory correction. The options are Enabled and Disabled.
Data Scrambling
Select Enabled to enable data scrambling to ensure data security and integrity.
The options are Disabled and Enabled.
Device Tagging
Select Enabled to support device tagging. The options are Disabled and En-
abled.
Thermal Throttling
Throttling improves reliability and reduces power consumption in the proces-
sor via automatic voltage control during processor idle states. The options are
Disabled and CLTT (Closed Loop Thermal Throttling).
SouthBridgeConguration
This feature allows the user to congure the settings for the Intel PCH chip.
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PCH Information
This feature displays the following PCH information.
Name: This item displays the name of the PCH chip.
Stepping: This item displays the status of the PCH stepping.
USB Devices: This item displays the USB devices detected by the BIOS.
All USB Devices
This feature enables all USB ports/devices. The options are Disabled and Enabled.