The information in this user’s manual has been carefully reviewed and is believed to be accurate.
The vendor assumes no responsibility for any inaccuracies that may be contained in this document,
and makes no commitment to update or to keep current the information in this manual, or to notify
any person or organization of the updates. Please Note: For the most up-to-date version of this
manual, please see our Website at www.supermicro.com.
Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product
described in this manual at any time and without notice. This product, including software and documentation, is the property of Supermicro and/or its licensors, and is supplied only under a license.
Any use or reproduction of this product is not allowed, except as expressly permitted by the terms
of said license.
IN NO EVENT WILL SUPER MICRO COMPUTER, INC. BE LIABLE FOR DIRECT, INDIRECT,
SPECIAL, INCIDENTAL, SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE
USE OR INABILITY TO USE THIS PRODUCT OR DOCUMENTATION, EVEN IF ADVISED OF
THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER MICRO COMPUTER, INC.
SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED OR USED
WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.
Any disputes arising between the manufacturer and the customer shall be governed by the laws of
Santa Clara County in the State of California, USA. The State of California, County of Santa Clara
shall be the exclusive venue for the resolution of any such disputes. Supermicro's total liability for
all claims will not exceed the price paid for the hardware product.
FCC Statement: This equipment has been tested and found to comply with the limits for a Class
A digital device pursuant to Part 15 of the FCC Rules. These limits are designed to provide
reasonable protection against harmful interference when the equipment is operated in a commercial
environment. This equipment generates, uses, and can radiate radio frequency energy and, if not
installed and used in accordance with the manufacturer’s instruction manual, may cause harmful
interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your
own expense.
California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate
warning applies only to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate
Material-special handling may apply. See www.dtsc.ca.gov/hazardouswaste/perchlorate”.
WARNING: Handling of lead solder materials used in this
product may expose you to lead, a chemical known to
the State of California to cause birth defects and other
reproductive harm.
Manual Revision 1.1c
Release Date: April 1, 2014
Unless you request and receive written permission from Super Micro Computer, Inc., you may not
copy any part of this document.
Information in this document is subject to change without notice. Other products and companies
referred to herein are trademarks or registered trademarks of their respective companies or mark
holders.
Speed (MT/s) and Voltage Validated by Slot per Channel (SPC) and DIMM Per
2 Slots Per Channel3 Slots Per Channel
1DPC2DPC1DPC2DPC3DPC
1.35V1.5V 1.35V1.5V1.35V 1.5V1.35V 1.5V1.35V 1.5V
1066,
1333,
1600,
1866
1066,
1333,
1600
1333,
1600
1066,
1333,
1600
Channel (DPC)
1066,
1066,
1333,
1333,
1600
1600,
1866
1066,
1333,
1600
1066,
1333,
1600
Intel E5-2600 Series Processor LRDIMM Memory Support
Memory
Capacity
Per DIMM
&
(See the Note
Below)
16GB 32GB10661066,
Speed (MT/s) and Voltage Validated by Slot per Channel (SPC) and DIMM Per
2 Slots Per Channel3 Slots Per Channel
1DPC2DPC1DPC2DPC3DPC
1.35V1.5V 1.35V1.5V1.35V 1.5V1.35V 1.5V1.35V 1.5V
10661066,
1333
1333
Channel (DPC)
1066 1066,
1333
10661066,
1333
10661066
10661066
QRx8
8GB16GB10661066,
(QDP)
Note: For detailed information on memory support and updates, please refer to the SMC Recommended Memory
List posted on our website at http://www.supermicro.com/support/resources/mem.cfm.
1333
10661066,
1333
106610661066106610661066
Other Important Notes and Restrictions
•For the memory modules to work properly, please install DIMM modules of the same
type, same speed and same operating frequency on the motherboard. Mixing of
RDIMMs, UDIMMs or LRDIMMs is not allowed. Do not install both ECC and Non-ECC
memory modules on the same motherboard.
•Using DDR3 DIMMs with different operating frequencies is not allowed. All channels
in a system will run at the lowest common frequency.
2-15
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
2-5 Motherboard Installation
All motherboards have standard mounting holes to t different types of chassis.
Make sure that the locations of all the mounting holes for both motherboard and
chassis match. Although a chassis may have both plastic and metal mounting fas-
teners, metal ones are highly recommended because they ground the motherboard
to the chassis. Make sure that the metal standoffs click in or are screwed in tightly.
Then use a screwdriver to secure the motherboard onto the motherboard tray.
Tools Needed
•Phillips Screwdriver
•Pan head screws (12 pieces)
•Standoffs (12 pieces, if needed)
Location of Mounting Holes
There are twelve (12) mounting holes on this motherboard indicated by the arrows.
USB 2/3
USB 0/1
LAN1/3
LAN2/4
JTPM1
IPMB
JPME2
JPG1
JBMC1
JSTBY1
J21
JI2C2
JI2C1
JL1
USB6/7
USB4/5
JWD1
I-SATA4
JPME1
I-SATA2
I-SATA0
J17
LEM1
COM2
CTRL
USB9
I-SATA5
I-SATA3
I-SATA1
JSD1
J18
BMC
CTRL
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
SAS
JBT1
XDP-PCH
PCH
JRK1
BIOS
JWP1
SAS4~7
SAS0~3
FANB
1
JPB1
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot3 PCI-E 3.0 x16
JP7
JP6
BIOS BOX
XDP-CPU
SP1
JOH1
JF2
FANA
JD1
LAN
CPU2 Slot5 PCI-E 3.0 x16
JBAT1
FAN4
1
LE2
SW1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
VGA
UID
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
FAN3
JF1
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMD3
LE1
CPU1
CPU2
IPMI_LAN
P1 DIMMB3
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN5
PHY
JPI2C1
JPW3
JPW2
JPW1
FAN1
Caution: 1) To avoid damaging the motherboard and its components,
please do not use a force greater than 8 lb/inch on each mounting screw
during motherboard installation. 2) Some components are very close to the
mounting holes. Please take precautionary measures to prevent damage
to these components when installing the motherboard to the chassis.
2-16
Chapter 2: Installation
Installing the Motherboard
1. Install the I/O shield into the chassis.
2. Locate the mounting holes on the motherboard.
3. Locate the matching mounting holes on the chassis. Align the mounting holes
on the motherboard against the mounting holes on the chassis.
4. Install standoffs in the chassis as needed.
5. Install the motherboard into the chassis carefully to avoid damaging mother-
board components.
6. Using the Phillips screwdriver, insert a Pan head #6 screw into a mounting
hole on the motherboard and its matching mounting hole on the chassis.
7. Repeat Step 5 to insert #6 screws into all mounting holes.
8. Make sure that the motherboard is securely placed in the chassis.
Note: Images displayed are for illustration only. Your chassis or compo-
nents might look different from those shown in this manual.
2-17
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
1
2
345
6
7
8
9
2-6 Control Panel Connectors and I/O Ports
The I/O ports are color coded in conformance with the PC 99 specication. See
the picture below for the colors and locations of the various I/O ports.
Back Panel Connectors and I/O Ports
USB 2/3
USB 0/1
LAN1/3
LAN2/4
VGA
LE2
SW1
UID
JPL1
BMC
CTRL
JPB1
LAN
CTRL
LEM1
JPG1
JBMC1
CPU1 Slot1 PCI-E 3.0 x16
JSTBY1
J21
COM2
JI2C2
JI2C1
JTPM1
SAS
CTRL
USB9
JBT1
JL1
USB6/7
USB4/5
XDP-PCH
IPMB
JWD1
JPME2
I-SATA4
I-SATA5
JPME1
JRK1
I-SATA3
I-SATA2
BIOS
I-SATA1
I-SATA0
JSD1
J18
SAS4~7
J17
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
PCH
JWP1
SAS0~3
FANB
FANA
JD1
1
JP7
JP6
SP1
JOH1
JBAT1
JF2
FAN4
1
CPU2 Slot5 PCI-E 3.0 x16
CPU2 Slot6 PCI-E 3.0 x8
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
JF1
Back Panel I/O Port Locations and Denitions
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
Alaways populate DIMMx1 first
LE1
COM1
FAN6
FAN5
IPMI_LAN
CPU2
CPU1
P1 DIMMB3
P1 DIMMB2
PHY
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
10
JPI2C1
JPW3
JPW2
JPW1
P1 DIMMA2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN1
11
12
1. COM Port 1 (Turquoise)
2. Back Panel USB Port 0
3. Back Panel USB Port 1
4. IPMI_Dedicated LAN
5. Back Panel USB Port 2
6. Back Panel USB Port 3
7. Gigabit LAN 1
8. Gigabit LAN 3
9. Gigabit LAN 2
10. Gigabit LAN 4
11. Back Panel VGA (Blue)
12. UID Switch
2-18
Chapter 2: Installation
COM1
COM2
COM1
COM2
2
1
123
Serial Ports
Two COM connections (COM1 &
COM2) are located on the motherboard.
COM1 is located on the Backplane I/O
panel. COM2, located close to CPU1
Slot1 PCI-E slot, provides front access
support. See the table on the right for
pin denitions.
Video Connection
A Video (VGA) port is located next
to USB 2/3 on the I/O backplane.
Refer to the board layout below for
the location.
Serial COM) Ports
Pin Denitions
Pin # DenitionPin # Denition
1DCD6DSR
2RXD7RT S
3TXD8CTS
4DTR9RI
5Ground10N/A
JPG1
J21
JTPM1
IPMB
JPME2
J17
BMC
CTRL
LEM1
JBMC1
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
JSTBY1
COM2
JI2C2
JI2C1
SAS
CTRL
USB9
JBT1
JL1
USB6/7
USB4/5
XDP-PCH
JWD1
I-SATA4
I-SATA5
JPME1
JRK1
I-SATA3
I-SATA2
BIOS
JWP1
I-SATA1
I-SATA0
JSD1
J18
SAS4~7
SAS0~3
FANB
JPB1
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
PCH
FANA
1
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU2 Slot5 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
LE2
SW1
UID
JPL1
CPU2 Slot6 PCI-E 3.0 x8
LAN2/4
VGA
P2 DIMME1
P2 DIMME3
P2 DIMME2
P2 DIMMF1
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
USB 2/3
USB 0/1
LAN1/3
COM1
FAN6
FAN5
IPMI_LAN
P2 DIMMF3
P2 DIMMF2
CPU2
CPU1
P1 DIMMB3
P1 DIMMB2
P1 DIMMB1
FAN2
PHY
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
JPI2C1
JPW3
JPW2
JPW1
P1 DIMMA2
P1 DIMMA1
P1 DIMMA3
FAN1
1. COM1
2. COM2
3. VGA
2-19
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
1
2
4
5
6
7
3
Universal Serial Bus (USB)
Four Universal Serial Bus ports
(USB 0/1, USB 2/3) are located on
the I/O back panel. In addition, two
USB headers, located close to the
Intel PCH chip, provides four front-
accessible USB connections (USB
4/5, USB 6/7). One Type A connec-
tor (USB9) also support front panel
USB connections. (Cables are not
included). See the tables on the right
for pin denitions.
Backplane USB
(USB 0/1, 2/3)
Pin Denitions
Pin# Denition
1+5V
2PO-
3PO+
4Ground
5NA
FP USB (4/5, 6/7)
Pin Denitions
USB 4, 6, 9
Pin # Denition
USB 5, 7
Pin # Denition
1+5V1+5V
2PO-2PO-
3PO+3PO+
4Ground 4Ground
5NC5Key
(NC= No connection)
1. Backpanel USB 0
2. BP USB 1
USB 2/3
USB 0/1
LAN1/3
LAN2/4
VGA
LE2
SW1
UID
JWP1
SAS0~3
JPB1
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
PCH
FANB
FANA
1
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU2 Slot5 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
P2 DIMME1
P2 DIMME2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
BMC
CTRL
LEM1
JPG1
JBMC1
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
JSTBY1
J21
COM2
JI2C2
JI2C1
JTPM1
SAS
CTRL
USB9
JBT1
JL1
USB6/7
USB4/5
XDP-PCH
IPMB
JWD1
JPME2
I-SATA4
I-SATA5
JPME1
JRK1
I-SATA3
I-SATA2
BIOS
I-SATA1
I-SATA0
JSD1
J18
SAS4~7
J17
COM1
FAN6
FAN5
IPMI_LAN
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMMF1
CPU2
PHY
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
3. BP USB 2
4. BP USB 3
5. FP USB 4/5
6. FP USB 6/7
7. FP USB 9
JPI2C1
CPU1
P1 DIMMB3
P1 DIMMB2
JPW3
JPW2
JPW1
P1 DIMMA2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN1
2-20
Chapter 2: Installation
1
2
345
Ethernet Ports
Four Gigabit Ethernet ports (LAN1/3,
LAN2/4) are located on the I/O back-
plane on the motherboard. In addition,
an IPMI_Dedicated LAN is located
above USB 0/1 ports on the back-
plane to provide KVM support for
IPMI 2.0. All these ports accept RJ45
type cables.
Note: Please refer to the
LED Indicator Section for
LAN LED information.
LAN Ports
Pin Denition
Pin# Denition
1P2V5SB10SGND
2TD0+11Act LED
3TD0-12P3V3SB
4TD1+13Link 100 LED (Yel-
5TD1-14Link 1000 LED
low, +3V3SB)
(Yellow, +3V3SB)
6TD2+15Ground
7TD2-16Ground
8TD3+17Ground
9TD3-18Ground
(NC: No Connection)
1. GLAN1
2. GLAN3
3. GLAN2
4. GLAN4
USB 2/3
USB 0/1
LAN1/3
LAN2/4
VGA
LE2
SW1
UID
JPL1
BMC
CTRL
JPB1
LAN
CTRL
LEM1
JPG1
JBMC1
CPU1 Slot1 PCI-E 3.0 x16
JSTBY1
J21
COM2
JI2C2
JI2C1
JTPM1
SAS
CTRL
USB9
JBT1
JL1
USB6/7
USB4/5
XDP-PCH
IPMB
JWD1
JPME2
I-SATA4
I-SATA5
JPME1
JRK1
I-SATA3
I-SATA2
BIOS
I-SATA1
I-SATA0
JSD1
J18
SAS4~7
J17
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
PCH
JWP1
SAS0~3
FANB
FANA
1
CPU2 Slot4 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
CPU2 Slot6 PCI-E 3.0 x8
CPU2 Slot5 PCI-E 3.0 x16
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
JF1
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
Alaways populate DIMMx1 first
LE1
COM1
FAN6
FAN5
IPMI_LAN
CPU2
CPU1
P1 DIMMB3
P1 DIMMB2
PHY
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
JPI2C1
JPW3
JPW2
JPW1
P1 DIMMA2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN1
5. IPMI_LAN
2-21
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
2
1
1
3
Unit Identier Switch
A Unit Identier (UID) Switch and two LED
Indicators are located on the motherboard.
The UID Switch is located next to the LAN
2/4 ports on the backplane. The Rear UID
LED (LE2) is located next to the UID Switch.
The Front Panel UID LED is located at pins
7/8 of the Front Control Panel at JF1. Con-
nect a cable to pin 8 on JF1 for Front Panel
UID LED indication. When you press the
UID switch, both Rear UID LED and Front
Panel UID LED Indicators will be turned on.
Press the UID switch again to turn off both
LED Indicators. These UID Indicators provide
easy identication of a system unit that may
be in need of service.
Note: UID can also be triggered via
IPMI on the motherboard. For more
information on IPMI, please refer to
the IPMI User's Guide posted on
our website @ http://www.super-
micro.com.
USB 2/3
USB 0/1
LAN1/3
LAN2/4
VGA
LE2
SW1
UID
JPL1
BMC
CTRL
JPB1
LAN
CTRL
LEM1
JPG1
JBMC1
CPU1 Slot1 PCI-E 3.0 x16
JSTBY1
J21
COM2
JI2C2
JI2C1
JTPM1
SAS
CTRL
USB9
JBT1
JL1
USB6/7
USB4/5
XDP-PCH
IPMB
JWD1
JPME2
I-SATA4
I-SATA5
JPME1
JRK1
I-SATA3
I-SATA2
BIOS
I-SATA1
I-SATA0
JSD1
J18
SAS4~7
J17
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
PCH
JWP1
SAS0~3
FANB
FANA
JD1
1
JP7
JP6
SP1
JOH1
JBAT1
JF2
FAN4
1
CPU2 Slot5 PCI-E 3.0 x16
CPU2 Slot6 PCI-E 3.0 x8
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
JF1
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
Alaways populate DIMMx1 first
LE1
COM1
FAN6
IPMI_LAN
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
CPU2
CPU1
P1 DIMMA2
P1 DIMMB3
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN5
PHY
JPI2C1
JPW3
JPW2
JPW1
FAN1
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
Ground
FP PWRLED
HDD LED
NIC1 Link LED
NIC2 Link LED
Power Fail LED
UID Switch
Pin# Denition
1Ground
2Ground
3Button In
4Ground
UID LED (LE2)
Color/State Status
BlueUnit Identied
1. UID Switch
2. Rear UID LED (LE2)
3. Front UID LED
1920
NMI
X
Ground
Ground
2
NIC1 Activity LED
Reset
PWR
1
X
3.3 V
ID_UID_SW/3/3V Stby
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Status
Reset Button
Power Button
2-22
Chapter 2: Installation
Front Control Panel
JF1 contains header pins for various buttons and indicators that are normally lo-
cated on a control panel at the front of the chassis. These connectors are designed
specically for use with Supermicro's server chassis. See the gure below for the
descriptions of the various control panel buttons and LED indicators. Refer to the
following section for descriptions and pin denitions.
USB 2/3
USB 0/1
LAN1/3
LAN2/4
JPB1
BIOS BOX
XDP-CPU
FANA
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU2 Slot5 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
BMC
CTRL
LEM1
JPG1
JBMC1
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
CPU1 Slot1 PCI-E 3.0 x16
JSTBY1
J21
COM2
JI2C2
JI2C1
JTPM1
SAS
CTRL
USB9
JBT1
JL1
USB6/7
USB4/5
XDP-PCH
IPMB
JPME2
PCH
JWD1
I-SATA4
I-SATA5
JPME1
JRK1
I-SATA3
I-SATA2
BIOS
JWP1
I-SATA1
I-SATA0
JSD1
J18
SAS4~7
SAS0~3
J17
FANB
1
VGA
LE2
SW1
UID
COM1
FAN6
IPMI_LAN
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
CPU2
CPU1
P1 DIMMA2
P1 DIMMB3
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN5
PHY
P2 DIMMG1
JPI2C1
JPW3
JPW2
JPW1
FAN1
Ground
X
FP PWRLED
HDD LED
NIC1 Link LED
NIC2 Link LED
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
Power Fail LED
Ground
Ground
JF1 Header Pins
1920
NMI
X
3.3 V
ID_UID_SW/3/3V Stby
NIC1 Activity LED
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset
PWR
2
1
2-23
Reset Button
Power Button
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
Front Control Panel Pin Denitions
NMI Button
The non-maskable interrupt button
header is located on pins 19 and 20
of JF1. Refer to the table on the right
for pin denitions.
Power LED
The Power LED connection is located
on pins 15 and 16 of JF1. Refer to the
table on the right for pin denitions.
NMI Button
Pin Denitions (JF1)
Pin# Denition
19Control
20Ground
Power LED
Pin Denitions (JF1)
Pin# Denition
153.3V
16PWR LED
A. NMI
B. PWR LED
2
1920
NMI
NIC1 Activity LED
Reset
PWR
1
A
X
3.3 V
ID_UID_SW/3/3V Stby
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset Button
Power Button
USB 2/3
USB 0/1
LAN1/3
LAN2/4
VGA
LE2
SW1
UID
PCH
SAS0~3
FANB
1
JPB1
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
JOH1
FANA
JD1
JP7
JP6
SP1
JF2
LAN
CTRL
CPU2 Slot5 PCI-E 3.0 x16
JBAT1
FAN4
1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
P2 DIMME1
P2 DIMME3
P2 DIMME2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
BMC
CTRL
LEM1
JPG1
JBMC1
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
JSTBY1
J21
COM2
JI2C2
JI2C1
JTPM1
SAS
CTRL
USB9
JBT1
JL1
USB6/7
USB4/5
XDP-PCH
IPMB
JWD1
JPME2
I-SATA4
I-SATA5
JPME1
JRK1
I-SATA3
I-SATA2
BIOS
JWP1
I-SATA1
I-SATA0
JSD1
J18
SAS4~7
J17
COM1
FAN6
FAN5
IPMI_LAN
P2 DIMMF3
P2 DIMMF2
P2 DIMMF1
CPU2
PHY
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
B
Ground
X
FP PWRLED
HDD LED
NIC1 Link LED
JPI2C1
NIC2 Link LED
CPU1
P1 DIMMB3
P1 DIMMB2
P1 DIMMB1
FAN2
JPW3
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
Power Fail LED
JPW2
JPW1
P1 DIMMA2
P1 DIMMA1
P1 DIMMA3
FAN1
Ground
Ground
2-24
Chapter 2: Installation
E
HDD LED
The HDD LED connection is located
on pins 13 and 14 of JF1. Attach a
cable here to indicate HDD activ-
ity. See the table on the right for pin
denitions.
NIC1/NIC2 LED Indicators
The NIC (Network Interface Control-
ler) LED connection for GLAN port 1 is
located on pins 11 and 12 of JF1, and
the LED connection for GLAN Port 2 is
on pins 9 and 10. Attach the NIC LED
cables here to display network activity.
Refer to the table on the right for pin
denitions.
HDD LED
Pin Denitions (JF1)
Pin# Denition
133.3V Standby
14HD Active
GLAN1/2 LED
Pin Denitions (JF1)
Pin# Denition
9NIC 2 Activity LED
10NIC 2 Link LED
11NIC 1 Activity LED
12NIC 1 Link LED
A. HDD LED
B. NIC1 Link LED
C. NIC1 Activity LED
D. NIC2 Link LED
E. NIC2 Activity LED
USB 2/3
USB 0/1
LAN1/3
LAN2/4
VGA
LE2
SW1
UID
PCH
SAS0~3
FANB
1
JPB1
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
JOH1
FANA
JD1
JP7
JP6
SP1
LAN
CTRL
JBAT1
JF2
FAN4
CPU2 Slot5 PCI-E 3.0 x16
1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
P2 DIMME1
P2 DIMME2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
BMC
CTRL
LEM1
JPG1
JBMC1
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
JSTBY1
J21
COM2
JI2C2
JI2C1
JTPM1
SAS
CTRL
USB9
JBT1
JL1
USB6/7
USB4/5
XDP-PCH
IPMB
JWD1
JPME2
I-SATA4
I-SATA5
JPME1
JRK1
I-SATA3
I-SATA2
BIOS
JWP1
I-SATA1
I-SATA0
JSD1
J18
SAS4~7
J17
COM1
FAN6
FAN5
IPMI_LAN
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMMF1
CPU2
PHY
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
B
JPI2C1
CPU1
P1 DIMMB3
P1 DIMMB2
JPW3
JPW2
JPW1
P1 DIMMA2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN1
Ground
FP PWRLED
HDD LED
A
NIC1 Link LED
NIC2 Link LED
Blue+ (OH/Fan Fail/
PWR FaiL/UID LED)
Power Fail LED
Ground
Ground
X
1920
Reset
PWR
2
1
NMI
X
3.3 V
ID_UID_SW/3/3V Stby
NIC1 Activity LED
C
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset Button
Power Button
2-25
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
Overheat (OH)/Fan Fail/PWR Fail/
UID LED
Connect an LED cable to pins 7 and
8 of Front Control Panel to use the
Overheat /Fan Fail/Power Fail and
UID LED connections. The Red LED
on pin 7 provides warnings of over-
heat, fan failure or power failure. The
Blue LED on pin 8 works as the front
panel UID LED indicator. The Red
LED takes precedence over the Blue
LED by default. Refer to the table on
the right for pin denitions.
Power Fail LED
The Power Fail LED connection is
located on pins 5 and 6 of JF1. Re-
fer to the table on the right for pin
denitions.
OH/Fan Fail/ PWR Fail/Blue_UID
LED Pin Denitions (JF1)
Pin# Denition
7Red_LED-Cathode/OH/Fan Fail/
Power Fail5.5V.SB
8Blue_UID LED
OH/Fan Fail/PWR Fail
LED Status (Red LED)
State Denition
OffNormal
OnOverheat
FlashingFan Fail
PWR Fail LED
Pin Denitions (JF1)
Pin# Denition
53.3V
6PWR Supply Fail
A. OH/Fail/PWR Fail LED (Red)/UID (Blue)
B. Blue LED Cathode
C. PWR Supply Fail
USB 2/3
USB 0/1
LAN1/3
LAN2/4
VGA
LE2
SW1
UID
PCH
SAS0~3
FANB
1
JPB1
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
FANA
JD1
CTRL
JP7
JP6
SP1
JOH1
JF2
LAN
CPU2 Slot5 PCI-E 3.0 x16
JBAT1
FAN4
1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
P2 DIMME1
P2 DIMME2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
BMC
CTRL
LEM1
JPG1
JBMC1
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
JSTBY1
J21
COM2
JI2C2
JI2C1
JTPM1
SAS
CTRL
USB9
JBT1
JL1
USB6/7
USB4/5
XDP-PCH
IPMB
JWD1
JPME2
I-SATA4
I-SATA5
JPME1
JRK1
I-SATA3
I-SATA2
BIOS
JWP1
I-SATA1
I-SATA0
JSD1
J18
SAS4~7
J17
COM1
FAN6
FAN5
IPMI_LAN
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMMF1
CPU2
PHY
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
Ground
X
FP PWRLED
HDD LED
NIC1 Link LED
JPI2C1
CPU1
P1 DIMMB3
P1 DIMMB2
JPW3
JPW2
JPW1
P1 DIMMA2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN1
NIC2 Link LED
Blue+ (OH/Fan Fail/
A
PWR FaiL/UID LED)
Power Fail LED
C
Ground
Ground
2
1920
NIC1 Activity LED
Reset
PWR
1
NMI
X
3.3 V
ID_UID_SW/3/3V Stby
NIC2 Activity LED
Red+ (Blue LED Cathode)
3.3V
Reset Button
Power Button
B
2-26
Chapter 2: Installation
Reset Button
The Reset Button connection is located
on pins 3 and 4 of JF1. Attach it to a
hardware reset switch on the computer
case. Refer to the table on the right for
pin denitions.
Power Button
The Power Button connection is located
on pins 1 and 2 of JF1. Momentarily
contacting both pins will power on/off
the system. This button can also be con-
gured to function as a suspend button
(with a setting in the BIOS - See Chapter
4). To turn off the power when the system
is in suspend mode, press the button for
4 seconds or longer. Refer to the table on
the right for pin denitions.
Reset Button
Pin Denitions (JF1)
Pin# Denition
3Reset
4Ground
Power Button
Pin Denitions (JF1)
Pin# Denition
1Signal
2Ground
A. Reset Button
B. PWR Button
2
1920
NMI
NIC1 Activity LED
NIC2 Activity LED
Reset
PWR
1
X
3.3 V
ID_UID_SW/3/3V Stby
Red+ (Blue LED Cathode)
3.3V
Reset Button
Power Button
A
B
USB 2/3
USB 0/1
LAN1/3
LAN2/4
VGA
LE2
SW1
UID
JWP1
SAS0~3
JPB1
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
PCH
FANB
FANA
1
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
CPU2 Slot5 PCI-E 3.0 x16
P2 DIMME1
P2 DIMME2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
BMC
CTRL
LEM1
JPG1
JBMC1
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
JSTBY1
J21
COM2
JI2C2
JI2C1
JTPM1
SAS
CTRL
USB9
JBT1
JL1
USB6/7
USB4/5
XDP-PCH
IPMB
JWD1
JPME2
I-SATA4
I-SATA5
JPME1
JRK1
I-SATA3
I-SATA2
BIOS
I-SATA1
I-SATA0
JSD1
J18
SAS4~7
J17
COM1
FAN6
FAN5
IPMI_LAN
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMMF1
CPU2
CPU1
P1 DIMMB3
P1 DIMMB2
P1 DIMMB1
FAN2
PHY
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
JPI2C1
Blue+ (OH/Fan Fail/
JPW3
PWR FaiL/UID LED)
JPW2
JPW1
P1 DIMMA2
P1 DIMMA1
P1 DIMMA3
FAN1
Ground
X
FP PWRLED
HDD LED
NIC1 Link LED
NIC2 Link LED
Power Fail LED
Ground
Ground
2-27
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
2-7 Connecting Cables
Power Connectors
A 24-pin main power supply connector(JPW1)
and two 8-pin CPU PWR connectors
(JPW2/3) are located on the motherboard.
These power connectors meet the SSI EPS
12V specication. These power connectors
must also be connected to your power
supply. See the table on the right for pin
denitions.
Warning: To provide adequate power supply to
the motherboard, be sure to connect the 24-pin
ATX PWR (JPW1) and two 8-pin PWR connec-
tors (JPW2, JPW3) to the power supply. Failure
to do so will void the manufacturer warranty on
your power supply and motherboard.
ATX Power 24-pin Connector
Pin Denitions
Pin# Denition Pin # Denition
13+3.3V1+3.3V
14-12V2+3.3V
15COM3COM
16PS_ON4+5V
17COM5COM
18COM6+5V
19COM7COM
20Res (NC)8PWR_OK
21+5V95VSB
22+5V10+12V
23+5V11+12V
24COM12+3.3V
12V 8-pin PWR Con-
nector
Pin Denitions
Pins Denition
1 through 4Ground
5 through 8+12V
(Required)
IPMB
JPME2
JPG1
J21
JTPM1
JL1
USB6/7
J17
JBMC1
JSTBY1
COM2
JI2C2
JI2C1
USB9
USB4/5
JWD1
I-SATA4
I-SATA5
JPME1
I-SATA3
I-SATA2
I-SATA1
I-SATA0
JSD1
J18
CTRL
LEM1
CPU1 Slot1 PCI-E 3.0 x16
SAS
CTRL
JBT1
XDP-PCH
JRK1
BIOS
SAS4~7
BMC
JPB1
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
JP7
JP6
BIOS BOX
XDP-CPU
PCH
JWP1
SP1
JOH1
JF2
SAS0~3
FANB
FANA
JD1
1
LAN
CTRL
CPU2 Slot5 PCI-E 3.0 x16
JBAT1
FAN4
1
LE2
JPL1
CPU2 Slot6 PCI-E 3.0 x8
SW1
UID
VGA
Alaways populate DIMMx1 first
P1 DIMMC1
P1 DIMMC2
FAN3
USB 2/3
LAN1/3
LAN2/4
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
CPU1
P1 DIMMD2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
LE1
JF1
USB 0/1
IPMI_LAN
CPU2
P1 DIMMB3
2-28
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
A. JPW1: 24-pin ATX
FAN5
PHY
PWR (Req'd)
B. JPW2: 8-pin Processor
PWR (Req'd)
C. JPW3: 8-pin Processor
PWR (Req'd)
JPI2C1
JPW3
C
JPW2
B
JPW1
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
A
FAN1
Chapter 2: Installation
FAN5
D
E
F
G
Fan Headers
This motherboard has eight system/CPU
fan headers (Fan 1~Fan 6, Fan A, Fan
B) on the motherboard. All these 4-pin
fans headers are backward compatible
with the traditional 3-pin fans. However,
fan speed control is available for 4-pin
fans only. The fan speeds are controlled
by Firmware Thermal Management via
IPMI 2.0. See the table on the right for
pin denitions.
Chassis Intrusion
A Chassis Intrusion header is located
at JL1 on the motherboard. Attach an
appropriate cable from the chassis to
inform you of a chassis intrusion when
the chassis is opened.
LAN2/4
VGA
LE2
SW1
UID
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU2 Slot5 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
P2 DIMME1
P2 DIMME2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
C
IPMB
JPME2
JPG1
J21
JTPM1
JL1
USB6/7
USB4/5
I-SATA4
JPME1
I-SATA2
I-SATA0
J17
LEM1
JBMC1
JSTBY1
COM2
JI2C2
JI2C1
USB9
I
JWD1
I-SATA5
I-SATA3
I-SATA1
JSD1
J18
BMC
CTRL
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
SAS
CTRL
JBT1
XDP-PCH
JRK1
BIOS
JWP1
SAS4~7
CPU1 Slot3 PCI-E 3.0 x16
PCH
SAS0~3
FANB
1
H
JPB1
BIOS BOX
XDP-CPU
FANA
Fan Header
Pin Denitions
Pin# Denition
1Ground
2+12V
3Tachometer
4Firmware Thermal
Management
Chassis Intrusion
Pin Denitions
Pin# Denition
1Intrusion Input
2Ground
USB 2/3
USB 0/1
LAN1/3
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMMF1
CPU2
IPMI_LAN
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
PHY
A. Fan 1
B. Fan 2
C. Fan 3
D. Fan 4
E. Fan 5
F. Fan 6
G. Fan A
H. Fan B
JPI2C1
I. Chassis Intrusion
CPU1
P1 DIMMA2
P1 DIMMB3
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
B
JPW3
JPW2
JPW1
FAN1
A
2-29
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
JPME2
IPMB
Internal Speaker
The Internal Speaker, located at SP1,
can be used to provide audible indica-
tions for various beep codes. See the
table on the right for pin denitions.
Refer to the layout below for the loca-
tions of the Internal Buzzer (SP1).
Power LED/Speaker
On JD1 header, pins 1-3 are used for
power LED indication, and pins 4-7
are for the speaker. See the tables
on the right for pin denitions. Please
note that the speaker connector
pins (4-7) are used with an external
speaker. If you wish to use the on-
board speaker, you should close pins
6-7 with a jumper.
Internal Buzzer (SP1)
Pin Denition
Pin# Denitions
Pin 1Pos. (+)Beep In
Pin 2Neg. (-)Alarm
PWR LED Connector
Pin Denitions
Speaker
Pin Setting Denition
Pin 1Anode (+)
Pin2 Cathode (-)
Pin3NA
Speaker Connector
Pin Settings
Pin Setting Denition
Pins 4-7 External Speaker
Pins 6-7 Internal Speaker
VGA
LE2
SW1
UID
BMC
CTRL
JPB1
LEM1
JPG1
JBMC1
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
CPU1 Slot1 PCI-E 3.0 x16
JSTBY1
J21
COM2
JI2C2
JI2C1
JTPM1
SAS
CTRL
USB9
JL1
USB6/7
USB4/5
JWD1
I-SATA4
I-SATA5
JPME1
I-SATA3
I-SATA2
I-SATA1
I-SATA0
JSD1
J18
J17
BIOS BOX
JBT1
XDP-CPU
XDP-PCH
PCH
JRK1
BIOS
JWP1
SAS4~7
SAS0~3
FANB
FANA
1
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU2 Slot5 PCI-E 3.0 x16
JP7
JP6
JBAT1
A
SP1
JOH1
JF2
FAN4
JD1
1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
CPU1
COM1
FAN6
IPMI_LAN
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
CPU2
P1 DIMMA2
P1 DIMMB3
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
USB 2/3
USB 0/1
LAN1/3
LAN2/4
A. Internal Speaker (Buzzer)
FAN5
B. PWR LED/Speaker
PHY
JPI2C1
JPW3
JPW2
JPW1
FAN1
B
2-30
Chapter 2: Installation
TPM Header/Port 80
A Trusted Platform Module/Port 80
header is located at JTPM1 to provide
TPM support and Port 80 connection.
Use this header to enhance system
performance and data security. See
the table on the right for pin deni-
tions.
TPM/Port 80 Header
Pin Denitions
Pin # DenitionPin # Denition
1LCLK2GND
3LFRAME#4<(KEY)>
5LRESET#6+5V (X)
7LAD 38LAD 2
9+3.3V10LAD1
11LAD012GND
13SMB_CLK414SMB_DAT4
15+3V_DUAL16SERIRQ
17GND18CLKRUN# (X)
19LPCPD#20LDRQ# (X)
IPMB
JPME2
JPG1
J21
JTPM1
JL1
J17
JBMC1
JSTBY1
COM2
JI2C2
JI2C1
A
USB9
USB6/7
USB4/5
JWD1
I-SATA4
I-SATA5
JPME1
I-SATA3
I-SATA2
I-SATA1
I-SATA0
JSD1
J18
CTRL
LEM1
CPU1 Slot1 PCI-E 3.0 x16
SAS
CTRL
JBT1
XDP-PCH
JRK1
BIOS
SAS4~7
BMC
JPB1
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
JP7
JP6
BIOS BOX
XDP-CPU
PCH
JWP1
SP1
JOH1
SAS0~3
FANB
FANA
JD1
1
LAN
CTRL
CPU2 Slot5 PCI-E 3.0 x16
JBAT1
JF2
FAN4
1
LE2
SW1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
UID
VGA
Alaways populate DIMMx1 first
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
FAN3
JF1
USB 2/3
LAN1/3
LAN2/4
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
CPU2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
CPU1
P1 DIMMD2
P1 DIMMD1
P1 DIMMD3
LE1
2-31
USB 0/1
IPMI_LAN
P1 DIMMB3
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
A. TPM/Port 80 Header
FAN5
PHY
JPI2C1
JPW3
JPW2
JPW1
FAN1
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
Power SMB (I2C) Connector
Power System Management Bus (I2C)
Connector (JPI2C1) monitors power
supply, fan and system temperatures.
See the table on the right for pin
denitions.
Overheat/Fan Fail LED
The JOH1 header is used to connect
an LED indicator to provide warnings
of chassis overheating and fan failure.
This LED will blink when a fan failure
occurs. Refer to the table on right for
pin denitions.
PWR SMB
Pin Denitions
Pin# Denition
1Clock
2Data
3PWR Fail
4Ground
5+3.3V
OH/Fan Fail LED
Status
State Message
SolidOverheat
Blinking Fan Fail
JTPM1
IPMB
JPME2
JPG1
JBMC1
JSTBY1
J21
COM2
JI2C2
JI2C1
JL1
USB6/7
USB4/5
JWD1
I-SATA4
JPME1
I-SATA2
I-SATA0
J17
LEM1
CPU1 Slot1 PCI-E 3.0 x16
SAS
CTRL
USB9
XDP-PCH
I-SATA5
JRK1
I-SATA3
BIOS
I-SATA1
JSD1
J18
SAS4~7
BMC
CTRL
JPB1
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
JBT1
XDP-CPU
PCH
B
JWP1
SAS0~3
FANB
FANA
1
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU2 Slot5 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
LE2
JPL1
CPU2 Slot6 PCI-E 3.0 x8
SW1
UID
VGA
Alaways populate DIMMx1 first
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
FAN3
JF1
USB 2/3
LAN1/3
LAN2/4
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
CPU2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
CPU1
P1 DIMMD2
P1 DIMMD1
P1 DIMMD3
LE1
2-32
IPMI_LAN
P1 DIMMB3
2
A. JPI
USB 0/1
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN5
PHY
JPI2C1
A
JPW3
JPW2
JPW1
FAN1
C1
B. OH LED
Chapter 2: Installation
T-SGPIO 1/2 Headers
Two SGPIO (Serial-Link General
Purpose Input/Output) headers are lo-
cated at J17/J18 on the motherboard.
These headers support Serial_Link
interface for onboard SATA connec-
tions. See the table on the right for
pin denitions.
DOM Power Connector
A power connector for SATA DOM
(Disk_On_Module) devices is located
at JSD1. Connect an appropriate
cable here to provide power support
for your DOM devices.
T-SGPIO
Pin Denitions
Pin# Denition Pin Denition
1NC2NC
3Ground4Data
5Load6Ground
7Clock8NC
Note: NC= No Connection
DOM PWR
Pin Denitions
Pin# Denition
1+5V
2Ground
3Ground
IPMB
JPME2
JPG1
J21
JTPM1
B
J17
A
JBMC1
JSTBY1
COM2
JI2C2
JI2C1
USB9
JL1
USB6/7
USB4/5
JWD1
I-SATA4
JPME1
I-SATA2
I-SATA0
J18
LEM1
CPU1 Slot1 PCI-E 3.0 x16
SAS
CTRL
XDP-PCH
I-SATA5
JRK1
I-SATA3
BIOS
I-SATA1
C
JSD1
SAS4~7
JBT1
BMC
CTRL
JPB1
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
PCH
JWP1
SAS0~3
FANB
FANA
1
CTRL
JP7
JP6
SP1
JOH1
JF2
JD1
LAN
CPU2 Slot5 PCI-E 3.0 x16
JBAT1
FAN4
1
LE2
SW1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
VGA
UID
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
FAN3
JF1
LAN2/4
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMD3
LE1
LAN1/3
CPU1
USB 2/3
CPU2
2-33
USB 0/1
IPMI_LAN
P1 DIMMB3
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN5
PHY
JPI2C1
JPW3
JPW2
JPW1
FAN1
A. T-SGPIO1
B. T-SGPIO2
C. DOM PWR
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
IPMB
A System Management Bus header for
IPMI 2.0 is located at IPMB. Connect the
appropriate cable here to use the IPMB
I2C connection on your system.
IPMB Header
Pin Denitions
Pin# Denition
1Data
2Ground
3Clock
4No Connection
IPMB
JPME2
JPG1
J21
JTPM1
JL1
J17
JBMC1
JSTBY1
COM2
JI2C2
JI2C1
USB9
USB6/7
USB4/5
A
JWD1
I-SATA4
I-SATA5
JPME1
I-SATA3
I-SATA2
I-SATA1
I-SATA0
JSD1
J18
CTRL
LEM1
CPU1 Slot1 PCI-E 3.0 x16
SAS
CTRL
JBT1
XDP-PCH
JRK1
BIOS
SAS4~7
BMC
JPB1
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
JP7
JP6
BIOS BOX
XDP-CPU
PCH
JWP1
SP1
JOH1
SAS0~3
FANB
FANA
JD1
1
LAN
CTRL
CPU2 Slot5 PCI-E 3.0 x16
JBAT1
JF2
FAN4
1
LE2
JPL1
CPU2 Slot6 PCI-E 3.0 x8
SW1
UID
VGA
Alaways populate DIMMx1 first
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
FAN3
JF1
USB 2/3
LAN1/3
LAN2/4
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
CPU2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
CPU1
P1 DIMMD2
P1 DIMMD1
P1 DIMMD3
LE1
2-34
USB 0/1
IPMI_LAN
P1 DIMMB3
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN5
PHY
JPI2C1
JPW3
JPW2
JPW1
FAN1
A. IPMB
2-8 Jumper Settings
Connector
Pins
Jumper
Cap
Setting
JRK1
JF1
JPI2C1
JPW3
JPW2
JPW1
JSD1
SP1
J18
J17
JBAT1
JP6
JP7
JI2C2
JI2C1
JL1
JOH1
FANB
FANA
FAN4
FAN3
FAN2
FAN6
FAN1
SW1
J21
JBT1
LEM1
JWP1
JPG1
JWD1
JPL1
USB4/5
JTPM1
XDP-PCH
BIOS BOX
SAS0~3
SAS4~7
I-SATA0
I-SATA1
P2 DIMMF3
P2 DIMMF1
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMME1
P2 DIMMG1
P2 DIMMH1
P2 DIMMG3
P2 DIMMG2
P2 DIMMH2
P2 DIMMH3
COM1
USB6/7
UID
IPMI_LAN
Alaways populate DIMMx1 first
P1 DIMMA2
P1 DIMMA1
P1 DIMMB3
P1 DIMMB2
P1 DIMMB1
P1 DIMMA3
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD2
P1 DIMMD3
I-SATA5
I-SATA4
I-SATA3
I-SATA2
LAN2/4
VGA
XDP-CPU
COM2
BMC
CTRL
LAN1/3
USB 0/1
JPME2
PHY
FAN5
BIOS
LAN
CTRL
PCH
LE1
X9DR3-LN4F+/X9DRi-LN4F+
Alaways populate DIMMx1 first
USB9
SAS
CTRL
USB 2/3
JSTBY1
IPMB
1
1
JD1
JF2
LE2
JPB1
JBMC1
Rev. 1.10
JPME1
CPU1
CPU2
CPU1 Slot1 PCI-E 3.0 x16
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU2 Slot6 PCI-E 3.0 x8
CPU2 Slot5 PCI-E 3.0 x16
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot3 PCI-E 3.0 x16
Chapter 2: Installation
Explanation of Jumpers
To modify the operation of the mother-
board, jumpers can be used to choose
between optional settings. Jumpers cre-
ate shorts between two pins to change
the function of the connector. Pin 1
is identied with a square solder pad
on the printed circuit board. See the
motherboard layout pages for jumper
locations.
Note: On two-pin jumpers,
"Closed" means the jumper
is on and "Open" means the
jumper is off the pins.
GLAN Enable/Disable
JPL1 enables or disables the GLAN
ports on the motherboard. See the
table on the right for jumper settings.
The default setting is Enabled.
A
3 2 1
3 2 1
Pin 1-2 short
GLAN Enable
Jumper Settings
Jumper Setting Denition
1-2Enabled (default)
2-3Disabled
A. GLAN1 Enable
2-35
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
CMOS Clear
JBT1 is used to clear CMOS. Instead of pins, this "jumper" consists of contact pads
to prevent accidental clearing of CMOS. To clear CMOS, use a metal object such
as a small screwdriver to touch both pads at the same time to short the connection.
Always remove the AC power cord from the system before clearing CMOS.
Note 1: For an ATX power supply, you must completely shut down the
system, remove the AC power cord, and then short JBT1 to clear CMOS.
Note 2: Be sure to remove the onboard CMOS Battery before you short
JBT1 to clear CMOS.
Note 3: Clearing CMOS will also clear all passwords.
Watch Dog Enable/Disable
Watch Dog (JWD1) is a system monitor that
can reboot the system when a software ap-
plication hangs. Close pins 1-2 to reset the
system if an application hangs. Close pins
2-3 to generate a non-maskable interrupt
signal for the application that hangs. See the
table on the right for jumper settings. Watch
Watch Dog
Jumper Settings
Jumper Setting Denition
Pins 1-2Reset (default)
Pins 2-3NMI
OpenDisabled
Dog must also be enabled in the BIOS.
IPMB
JPME2
JPG1
J21
JTPM1
J17
JBMC1
JSTBY1
COM2
JI2C2
JI2C1
USB9
JL1
USB6/7
USB4/5
B
JWD1
I-SATA4
JPME1
I-SATA2
I-SATA0
J18
LEM1
CPU1 Slot1 PCI-E 3.0 x16
SAS
CTRL
JBT1
XDP-PCH
I-SATA5
JRK1
I-SATA3
BIOS
I-SATA1
JSD1
SAS4~7
BMC
CTRL
JPB1
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
A
XDP-CPU
PCH
JWP1
SAS0~3
FANB
FANA
1
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU2 Slot5 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
LE2
JPL1
CPU2 Slot6 PCI-E 3.0 x8
SW1
UID
VGA
Alaways populate DIMMx1 first
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
FAN3
USB 2/3
LAN1/3
LAN2/4
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
CPU2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
CPU1
P1 DIMMD2
P1 DIMMD1
P1 DIMMD3
LE1
JF1
2-36
USB 0/1
IPMI_LAN
P1 DIMMB3
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
A. Clear CMOS
B. Watch Dog Enable
FAN5
PHY
JPI2C1
JPW3
JPW2
JPW1
FAN1
Chapter 2: Installation
VGA Enable
Jumper JPG1 allows the user to en-
able the onboard VGA connectors. The
default setting is 1-2 to enable the con-
nection. See the table on the right for
jumper settings.
BMC Enable
Jumper JPB1 allows you to enable the
embedded Winbond WPCM450R BMC
(Baseboard Management) Controller to
provide IPMI 2.0/KVM support on the
motherboard. See the table on the right
for jumper settings.
VGA Enable
Jumper Settings
Jumper Setting Denition
1-2Enabled (Default)
2-3Disabled
BMC Enable
Jumper Settings
Jumper Setting Denition
Pins 1-2BMC Enable
Pins 2-3Disabled
IPMB
JPME2
A
JTPM1
JPG1
JBMC1
JSTBY1
J21
JI2C2
JI2C1
JL1
USB6/7
USB4/5
JWD1
I-SATA4
JPME1
I-SATA2
I-SATA0
J17
LEM1
COM2
CTRL
USB9
I-SATA5
I-SATA3
I-SATA1
JSD1
J18
BMC
CTRL
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
SAS
JBT1
XDP-PCH
JRK1
BIOS
JWP1
SAS4~7
SAS0~3
B
JPB1
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
PCH
FANB
FANA
1
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU2 Slot5 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
LE2
JPL1
CPU2 Slot6 PCI-E 3.0 x8
SW1
UID
VGA
Alaways populate DIMMx1 first
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
FAN3
JF1
USB 2/3
LAN1/3
LAN2/4
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
CPU2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
CPU1
P1 DIMMD2
P1 DIMMD1
P1 DIMMD3
LE1
2-37
IPMI_LAN
P1 DIMMB3
USB 0/1
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN5
PHY
JPI2C1
JPW3
JPW2
JPW1
FAN1
A. VGA Enabled
B. BMC Enabled
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
Management Engine (ME) Recovery
Use jumper JPME1 to select ME Firm-
ware Recovery mode, which will limit
resource allocation for essential system
operation only in order to maintain nor-
mal power operation and management.
In the single operation mode, online
upgrade will be available via Recovery
mode. See the table on the right for
jumper settings.
Manufacture Mode Select
Close pins 2 and 3 of Jumper JPME2 to
bypass SPI ash security and force the
system to operate in the Manufacture
Mode, allowing the user to flash the
system rmware from a host server for
system setting modications. See the
table on the right for jumper settings.
ME Recovery
Jumper Settings
Jumper Setting Denition
1-2Normal (Default)
2-3ME Recovery
ME Mode Select
Jumper Settings
Jumper Setting Denition
1-2Normal (Default)
2-3Manufacture Mode
IPMB
JPME2
JPG1
JTPM1
J17
JBMC1
JSTBY1
J21
JI2C2
JI2C1
JL1
USB6/7
USB4/5
JWD1
B
I-SATA4
JPME1
I-SATA2
I-SATA0
LEM1
COM2
CTRL
USB9
I-SATA5
A
I-SATA3
I-SATA1
JSD1
J18
BMC
CTRL
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
SAS
JBT1
XDP-PCH
JRK1
BIOS
JWP1
SAS4~7
SAS0~3
JPB1
CPU2 Slot4 PCI-E 3.0 x16
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
PCH
FANB
FANA
1
CTRL
JP7
JP6
SP1
JOH1
JF2
JD1
LAN
CPU2 Slot5 PCI-E 3.0 x16
JBAT1
FAN4
1
LE2
JPL1
CPU2 Slot6 PCI-E 3.0 x8
SW1
UID
VGA
Alaways populate DIMMx1 first
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
FAN3
JF1
USB 2/3
LAN1/3
LAN2/4
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
CPU2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
CPU1
P1 DIMMD2
P1 DIMMD1
P1 DIMMD3
LE1
2-38
IPMI_LAN
P1 DIMMB3
USB 0/1
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN5
PHY
JPI2C1
JPW3
JPW2
JPW1
FAN1
A.JPME1
B.JPME2
2-9 Onboard LED Indicators
LAN 1/LAN 2
JTPM1
GLAN LEDs
The Gigabit LAN ports are located on the
IO Backplane on the motherboard. Each
Ethernet LAN port has two LEDs. The Yel-
low LED indicates activity. The Link LED
may be green, amber or off to indicate the
speed of the connection. See the tables
on the right for more information.
IPMI Dedicated LAN LEDs
In addition to the Gigabit Ethernet ports,
an IPMI Dedicated LAN is also located
above the Backplane USB ports 0/1 on the
motherboard. The amber LED on the right
indicates activity, while the green LED on
the left indicates the speed of the connec-
tion. See the table on the right for more
information.
Chapter 2: Installation
Link LED
Rear View (when facing the
rear side of the chassis)
GLAN Activity Indicator (Left)
LED Settings
Color Status Denition
YellowFlashingActive
GLAN Link Indicator
LED Settings
LED Color Denition
OffNo Connection or 10 Mbps
Green100 Mbps
Amber1 Gbps
IPMI LAN
Link LEDActivity LED
IPMI LAN Link LED (Left) &
Activity LED (Right)
Color/State Denition
Link (Left)Green: Solid100 Mbps
Activity (Right) Amber: Blinking Active
Activity LED
JPG1
JBMC1
JSTBY1
J21
COM2
JI2C2
JI2C1
USB9
JL1
USB6/7
USB4/5
JWD1
I-SATA4
JPME1
I-SATA2
I-SATA0
J18
J17
LEM1
CPU1 Slot1 PCI-E 3.0 x16
SAS
CTRL
XDP-PCH
I-SATA5
JRK1
I-SATA3
BIOS
I-SATA1
JSD1
SAS4~7
BMC
CTRL
JPB1
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
JBT1
XDP-CPU
PCH
JWP1
SAS0~3
FANB
1
CPU2 Slot4 PCI-E 3.0 x16
JP7
JP6
SP1
JOH1
FANA
JD1
LAN
CTRL
CPU2 Slot5 PCI-E 3.0 x16
JBAT1
JF2
FAN4
1
LE2
JPL1
CPU2 Slot6 PCI-E 3.0 x8
SW1
UID
VGA
Alaways populate DIMMx1 first
P1 DIMMC1
FAN3
LAN1/3
LAN2/4
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
CPU1
P1 DIMMD2
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
LE1
JF1
USB 2/3
USB 0/1
COM1
FAN6
IPMI_LAN
P2 DIMMG3
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
CPU2
P1 DIMMA2
P1 DIMMB3
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN5
PHY
P2 DIMMG2
P2 DIMMG1
JPI2C1
JPW3
JPW2
JPW1
FAN1
A. LAN1/2 LEDs
B. LAN3/4 LEDs
C. IPMI LAN LEDs
C
B
A
2-39
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
Onboard Power LED
An Onboard Power LED is located at LE1
on the motherboard. When this LED is on,
the system is on. Be sure to turn off the
system and unplug the power cord before
removing or installing components. See
the table on the right for more information.
Rear UID LED
The rear UID LED is located at LE2 on
the rear of the motherboard. This LED
is used in conjunction with the rear UID
switch to provide easy identication of a
system that might be in need of service.
Refer to UID Switch on page 2-17 for
more information.
LAN2/4
VGA
LE2
SW1
UID
JPG1
J21
JTPM1
JL1
USB6/7
USB4/5
J17
LEM1
JBMC1
JSTBY1
COM2
JI2C2
JI2C1
USB9
JWD1
I-SATA4
I-SATA5
JPME1
I-SATA3
I-SATA2
I-SATA1
I-SATA0
JSD1
J18
BMC
CTRL
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
SAS
CTRL
JBT1
XDP-PCH
JRK1
BIOS
JWP1
SAS4~7
JPB1
CPU1 Slot3 PCI-E 3.0 x16
PCH
SAS0~3
FANB
1
BIOS BOX
XDP-CPU
FANA
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU2 Slot5 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
B
P2 DIMME1
P2 DIMME2
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
Onboard PWR LED Indicator (LE1)
LED Settings
LED Color Status
OffSystem Off (PWR cable
not connected)
GreenSystem On
Green:
Flashing
Quickly
ACPI S1 State
UID LED
Status
Color/State Status
BlueUnit Identied
USB 2/3
USB 0/1
LAN1/3
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMMF1
CPU1
A
CPU2
IPMI_LAN
P1 DIMMB3
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
JPI2C1
JPW3
JPW2
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
JPW1
FAN1
FAN5
PHY
A. PWR LED
B. Rear UID LED
2-40
Chapter 2: Installation
BMC Heartbeat LED
A BMC Hear tbeat LED is located at LEM1
on the motherboard. When LEM1 is blink-
ing, BMC functions normally. See the
table at right for more information.
LAN2/4
VGA
LE2
SW1
UID
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU2 Slot5 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
P2 DIMME1
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
IPMB
JPME2
A
JPG1
JBMC1
JSTBY1
J21
JI2C2
JI2C1
JTPM1
JL1
USB6/7
USB4/5
JWD1
I-SATA4
JPME1
I-SATA2
I-SATA0
J17
LEM1
COM2
CTRL
USB9
I-SATA5
I-SATA3
I-SATA1
JSD1
J18
BMC
CTRL
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
SAS
JBT1
XDP-PCH
JRK1
BIOS
JWP1
SAS4~7
SAS0~3
JPB1
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
PCH
FANB
FANA
1
BMC Heartbeat LED
Status
Color/State Denition
Green:
Blinking
BMC: Normal
A. BMC Heartbeat LED
USB 2/3
USB 0/1
LAN1/3
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
CPU1
CPU2
IPMI_LAN
P1 DIMMB3
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
FAN5
PHY
JPI2C1
JPW3
JPW2
JPW1
FAN1
2-41
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
D
E
F
G
2-10 Serial ATA Connections
Serial ATA (SATA) Ports
There are six Serial ATA Ports (I-SATA0~I-SATA
5) located on the motherboard, including two
SATA3 ports (I-SATA0/1) and four SATA2 ports
(I-SATA2~5). These por ts provide serial-link signal
connections, which are faster than the connections
of Parallel ATA. See the table on the right for pin
denitions.
SCU Ports
Eight Storage Control Unit (SCU) SAS/SATA2 Ports
(SCU 0~3, 4~7) are located on the X9DR3-LN4F+,
and four SCU SATA2 ports (SCU 0~3) are on the
X9DRi-LN4F+ to provide serial link connections.
These por ts are supported by the Intel PCH chip.
See the table on the right for pin denitions.
Note: For more information on SATA HostRAID conguration, please refer
to the Intel SATA HostRAID User's Guide posted on our website @ http://
www.supermicro.com.
USB 2/3
LAN1/3
LAN2/4
VGA
LE2
SW1
UID
BMC
CTRL
CPU1 Slot2 PCI-E 3.0 x4 (in X8 slot)
CPU1 Slot1 PCI-E 3.0 x16
SAS
JBT1
XDP-PCH
JRK1
BIOS
JWP1
SAS4~7
SAS0~3
H
JPB1
CPU1 Slot3 PCI-E 3.0 x16
BIOS BOX
XDP-CPU
PCH
FANB
FANA
1
LEM1
JPG1
JBMC1
JSTBY1
J21
COM2
JI2C2
JI2C1
JTPM1
CTRL
USB9
JL1
USB6/7
USB4/5
IPMB
JWD1
JPME2
I-SATA4
I-SATA5
JPME1
I-SATA3
I-SATA2
C
I-SATA1
I-SATA0
A
JSD1
J18
J17
B
LAN
CTRL
CPU2 Slot4 PCI-E 3.0 x16
CPU2 Slot5 PCI-E 3.0 x16
JP7
JP6
JBAT1
SP1
JOH1
JF2
FAN4
JD1
1
JPL1
CPU2 Slot6 PCI-E 3.0 x8
P2 DIMME1
P2 DIMMF3
P2 DIMMF2
P2 DIMME3
P2 DIMME2
P2 DIMMF1
Alaways populate DIMMx1 first
X9DR3-LN4F+/X9DRi-LN4F+
Rev. 1.10
CPU1
Alaways populate DIMMx1 first
P1 DIMMD2
P1 DIMMC1
P1 DIMMC2
P1 DIMMC3
P1 DIMMD1
P1 DIMMD3
FAN3
LE1
JF1
CPU2
USB 0/1
IPMI_LAN
P1 DIMMB3
SATA/SCU
Pin Denitions
Pin# Denition
1Ground
2TX_P
3TX_N
4Ground
5RX_N
6RX_P
7Ground
COM1
FAN6
P2 DIMMG3
P2 DIMMG2
P2 DIMMH1
P2 DIMMH2
P2 DIMMH3
P2 DIMMG1
FAN5
PHY
A. I-SATA0
B. I-SATA1
C. I-SATA2
D. I-SATA3
E. I-SATA4
F. I-SATA5
G. SCU 0~3:
X9DRi-LN4F+
H. SCU 4~7
(SCU 0~3, 4~7:
JPI2C1
X9DR3-LN4F+)
JPW3
JPW2
P1 DIMMA2
P1 DIMMB2
P1 DIMMB1
P1 DIMMA1
P1 DIMMA3
FAN2
JPW1
FAN1
2-42
Chapter 3: Troubleshooting
Chapter 3
Troubleshooting
3-1 Troubleshooting Procedures
Use the following procedures to troubleshoot your system. If you have followed all
of the procedures below and still need assistance, refer to the ‘Technical Support
Procedures’ and/or ‘Returning Merchandise for Service’ section(s) in this chapter.
Warning: Always disconnect the power cord before adding, changing or installing any
hardware components.
Before Power On
1. Make sure that there are no short circuits between the motherboard and
chassis.
2. Disconnect all ribbon/wire cables from the motherboard, including keyboard
and mouse cables.
3. Remove all add-on cards.
4. Install CPU 1 rst (-making sure it is fully seated), and connect the front panel
connectors to the motherboard.
No Power
1. Make sure that they are no short circuits between the motherboard and the
chassis.
2. Make sure that the ATX power connectors are properly connected.
3. Check that the 115V/230V switch on the power supply is properly set, if avail-
able.
4. Turn the power switch on and off to test the system, if applicable.
5. The battery on your motherboard may be old. Check to verify that it still sup-
plies ~3VDC. If it does not, replace it with a new one.
3-1
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
No Video
1. If the power is on, but you have no video, remove all add-on cards and
cables.
2. Use the speaker to determine if any beep codes exist. Refer to Appendix A
for details on beep codes.
System Boot Failure
If the system does not display POST or does not respond after the power is turned
on, check the following:
1. Check for any error beeps from the motherboard speaker.
•If there is no error beep, try to turn on the system without any DIMM module
installed. If there is still no error beep, try to turn on the system again with only
one processor installed in CPU Socket#1. If there is still no error beep, replace
the motherboard.
•If there are error beeps, clear the CMOS setting by unplugging the power cord
and contacting both pads on the CMOS Clear Jumper (JBT1). (Refer to Sec-
tion 2-8 in Chapter 2.)
2. Remove all components from the motherboard, especially the DIMM mod-
ules. Make sure that the system's power is on, and memory error beeps are
activated.
3. Turn on the system with only one DIMM module installed. If the system boots,
check for bad DIMM modules or slots by following the procedure of memory-
error troubleshooting in this chapter.
Losing the System’s Setup Conguration
1. Make sure that you are using a high quality power supply. A poor quality
power supply may cause the system to lose the CMOS setup information.
Refer to Section 1-6 for details on recommended power supplies.
2. The battery on your motherboard may be old. Check to verify that it still sup-
plies ~3VDC. If it does not, replace it with a new one.
3. If the steps indicated above do not x setup conguration problems, contact
your vendor for repairs.
3-2
Chapter 3: Troubleshooting
Memory Errors
When a No_Memory_Beep_Code is issued by the system, check the following:
1. Make sure that the memory modules are compatible with the system and that
the DIMM modules are properly and fully installed. (For memory compatibility,
refer to the Memory Compatibility Chart posted on our website at http://www.
supermicro.com.)
2. Check if different speeds of DIMMs have been installed. It is strongly recom-
mended that you use the memory modules of the same speed and same type
for all DIMMs in the system.
3. Make sure that you are using the correct type of DDR3 DIMM modules rec-
ommended by the manufacturer.
4. Check for bad DIMM modules or slots by swapping a single module among
all memory slots and check the results.
5. Make sure that all memory modules are fully seated in their slots. Follow the
instructions given in Section 2-4 in Chapter 2.
6. Please follow the instructions given in the DIMM Population Tables listed in
Section 2-4 to install your memory modules.
When the System Becomes Unstable
A. The system becomes unstable during or after OS system installation
When the system becomes unstable during or after OS system installation, check
the following:
1. CPU/BIOS support: Make sure that your CPU is supported, and you have the
latest BIOS installed in your system.
2. Memory support: Make sure that the memory modules are supported by test-
ing the modules using memtest86 or a similar utility.
Note: Refer to the product page on our website at http://www.supermicro.
com for memory and CPU support and updates.
3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Re-
place the bad HDDs with good ones.
4. System cooling: Check system cooling to make sure that all cooling fans and
system fans work properly. Check Hardware Monitoring settings in the BIOS
3-3
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
to make sure that the CPU and System temperatures are within the normal
range. Also check the front panel Overheat LED, and make sure that the
Overheat LED is not on.
5. Adequate power supply: Make sure that the power supply provides adequate
power to the system. Make sure that all power connectors are connected.
Please refer to our website for more information on minimum power require-
ment.
6. Proper software support: Make sure that the correct disk drivers are used.
B. The system becomes unstable before or during OS installation
When the system becomes unstable before or during OS installation, check the
following:
1. Source of installation: Make sure that the devices used for installation are
working properly, including boot devices such as CD/DVD disc, CD/DVD-
ROM.
2. Cable connection: Check to make sure that all cables are connected and
working properly.
3. Using minimum conguration for troubleshooting: Remove all unnecessary
components (-starting with add-on cards rst), and use minimum congura-
tion (with a CPU and a memory module installed) to identify the problematic
areas. Refer to the steps listed in Section A above for proper troubleshooting
procedures.
4. Identifying bad components by isolating them: If necessary, remove a compo-
nent in question from the chassis, and test it in isolation to make sure that it
works properly. Replace a bad component with a good one.
5. Check and change one component at a time instead of changing several
items at the same time. This will help isolate and identify the problem.
6. To nd out if a component is good, swap the component with a new one to
see if the system will work properly. If so, then the old component is bad.
You can also install the component in question in another system. If the new
system works, the component is good and the old system has problems.
3-4
Chapter 3: Troubleshooting
3-2 Technical Support Procedures
Before contacting Technical Support, please take the following steps. Also, please
note that as a motherboard manufacturer, Supermicro also sells motherboards
through its channels, so it is best to rst check with your distributor or reseller for
troubleshooting services. They should know of any possible problem(s) with the
specic system conguration that was sold to you.
1. Please go through the ‘Troubleshooting Procedures’ and 'Frequently Asked
Question' (FAQ) sections in this chapter or see the FAQs on our website
(http://www.supermicro.com/) before contacting Technical Support.
2. BIOS upgrades can be downloaded from our website (http://www.supermicro.
com).
3. If you still cannot resolve the problem, include the following information when
contacting Supermicro for technical support:
•Motherboard model and PCB revision number
•BIOS release date/version (This can be seen on the initial display when your
system rst boots up.)
•System conguration
4. An example of a Technical Support form is on our website at (http://www.
supermicro.com).
•Distributors: For immediate assistance, please have your account number ready
when placing a call to our technical support department. We can be reached by
e-mail at support@supermicro.com.
3-5
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
3-3 Battery Removal and Installation
Battery Removal
To remove the onboard battery, follow the steps below:
1. Power off your system and unplug your power cable.
2. Locate the onboard battery.
3. Using a tool such as a pen or a small screwdriver, push the battery lock out-
wards to unlock it. Once unlocked, the battery will pop out from the holder.
4. Remove the battery.
Proper Battery Disposal
Warning: Please handle used batteries carefully. Do not damage the battery in any
way; a damaged battery may release hazardous materials into the environment. Do
not discard a used battery in the garbage or a public landll. Please comply with the
regulations set up by your local hazardous waste management agency to dispose of
your used battery properly.
Battery Installation
1. To install an onboard battery, follow the steps 1 & 2 above and continue
below:
2. Identify the battery's polarity. The positive (+) side should be facing up.
3. Insert the battery into the battery holder and push it down until you hear a
click to ensure that the battery is securely locked.
Warning: When replacing a battery, be sure to only replace it with the same type.
3-6
Chapter 3: Troubleshooting
3-4 Frequently Asked Questions
Question: What are the various types of memory that my motherboard can
support?
Answer: The motherboard supports Registered/LRDIMM ECC or UDIMM ECC/
Non-ECC DDR3 DIMM modules. To enhance memory performance, do not mix
memory modules of different speeds and sizes. Please follow all memory installa-
tion instructions given on Section 2-4 in Chapter 2.
Question: How do I update my BIOS?
It is recommended that you do not upgrade your BIOS if you are not experiencing
any problems with your system. Updated BIOS les are located on our website
at http://www.supermicro.com. Please check our BIOS warning message and the
information on how to update your BIOS on our website. Select your motherboard
model and download the BIOS le to your computer. Also, check the current BIOS
revision to make sure that it is newer than your BIOS before downloading. You can
choose from the zip le and the .exe le. If you choose the zip BIOS le, please
unzip the BIOS le onto a bootable USB device. Run the batch le using the format
AMI.bat lename.rom from your bootable USB device to ash the BIOS. Then, your
system will automatically reboot.
Warning: Do not shut down or reset the system while updating the BIOS to prevent
possible system boot failure!)
Note: The SPI BIOS chip used on this motherboard cannot be removed.
Send your motherboard back to our RMA Department at Supermicro for
repair. For BIOS Recovery instructions, please refer to the AMI BIOS
Recovery Instructions posted at http://www.supermicro.com.
Question: How do I handle the used battery?
Answer: Please handle used batteries carefully. Do not damage the battery in any
way; a damaged battery may release hazardous materials into the environment. Do
not discard a used battery in the garbage or a public landll. Please comply with the
regulations set up by your local hazardous waste management agency to dispose
of your used battery properly. (Refer to Section 3-3 on Page 3-6.)
3-7
X9DR3-LN4F+/X9DRi-LN4F+ Motherboard User’s Manual
3-5 Returning Merchandise for Service
A receipt or copy of your invoice marked with the date of purchase is required before
any warranty service will be rendered. You can obtain service by calling your ven-
dor for a Returned Merchandise Authorization (RMA) number. When returning the
motherboard to the manufacturer, the RMA number should be prominently displayed
on the outside of the shipping carton, and the shipping package is mailed prepaid
or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete. For faster service, you can also request
a RMA authorization online (http://www.supermicro.com/RmaForm/).
This warranty only covers normal consumer use and does not cover damages in-
curred in shipping or from failure due to the alternation, misuse, abuse or improper
maintenance of products.
During the warranty period, contact your distributor rst for any product problems.
3-8
Chapter 4: AMI BIOS
Chapter 4
BIOS
4-1 Introduction
This chapter describes the AMI BIOS setup utility for the X9DR3-LN4F+/X9DRiLN4F+. It also provides the instructions on how to navigate the AMI BIOS setup
utility screens. The AMI ROM BIOS is stored in a Flash EEPROM and can be
easily updated.
Starting BIOS Setup Utility
To enter the AMI BIOS setup utility screens, press the <Del> key while the system
is booting up.
Note: In most cases, the <Del> key is used to invoke the AMI BIOS setup
screen. There are a few cases when other keys are used, such as <F3>,
<F4>, etc.
Each main BIOS menu option is described in this manual. The Main BIOS setup
menu screen has two main frames. The left frame displays all the options that can
be congured. Grayed-out options cannot be congured. Options in blue can be
congured by the user. The right frame displays the key legend. Above the key
legend is an area reserved for a text message. When an option is selected in the
left frame, it is highlighted in white. Often a text message will accompany it.
Note: The AMI BIOS has default text messages built in. The manufacturer
retains the option to include, omit, or change any of these text mes-
sages.
The AMI BIOS setup utility uses a key-based navigation system called "hot keys."
Most of the AMI BIOS setup utility "hot keys" can be used at any time during setup
navigation. These keys include <F3>, <F4>, <Enter>, <ESC>, arrow keys, etc.
Note 1: Options printed in Bold are default settings.
Note 2: <F3> is used to load optimal default settings. <F4> is used to save
the settings and exit the setup utility.
How To Change the Conguration Data
The conguration data that determines the system parameters may be changed by
entering the AMI BIOS setup utility. This setup utility can be accessed by pressing
<F2> at the appropriate time during system boot.
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Note: For AMI UEFI BIOS Recovery, please refer to the UEFI BIOS Re-
covery User Guide posted @http://www.supermicro.com/support/manuals/.
Starting the Setup Utility
Normally, the only visible Power-On Self-Test (POST) routine is the memory test.
As the memory is being tested, press the <F2> key to enter the main menu of
the AMI BIOS setup utility. From the main menu, you can access the other setup
screens. An AMI BIOS identication string is displayed at the left bottom corner of
the screen below the copyright message.
Warning: Do not upgrade the BIOS unless your system has a BIOS-related issue.
Flashing the wrong BIOS can cause irreparable damage to the system. In no event
shall the manufacturer be liable for direct, indirect, special, incidental, or consequential
damage arising from a BIOS update. If you have to update the BIOS, do not shut down
or reset the system while the BIOS is being updated to avoid possible boot failure.
4-2 Main Setup
When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen.
You can always return to the Main setup screen by selecting the Main tab on the
top of the screen. The Main BIOS Setup screen is shown below.
The AMI BIOS main menu displays the following information:
System Date
This item displays the system date in Day MM/DD/YY format (e.g. Wed 10/12/2011).
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System Time
This item displays the system time in HH:MM:SS format (e.g. 15:32:52).
Supermicro X9DRi-LN4+/X9DR3-LN4+
Version
This item displays the SMC version of the BIOS ROM used in this system.
Build Date
This item displays the date that the BIOS setup utility was built.
Memory Information
Total Memory
This displays the amount of memory that is available in the system.
4-3 Advanced Setup Congurations
Use the arrow keys to select Advanced Setup and press <Enter> to access the
following submenu items.
Boot Features
Quiet Boot
Use this feature to select bootup screen display between POST messages and
the OEM logo. Select Disabled to display the POST messages. Select Enabled
to display the OEM logo instead of the normal POST messages. The options are
Enabled and Disabled.
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AddOn ROM Display Mode
Use this item to set the display mode for the Option ROM. Select Keep Current to
use the current AddOn ROM Display setting. Select Force BIOS to use the Option
ROM display mode set by the system BIOS. The options are Force BIOS and
Keep Current.
Bootup Num-Lock
Use this feature to set the Power-on state for the Numlock key. The options are
Off and On.
Wait For 'F1' If Error
Select Enabled to force the system to wait until the <F1> key is pressed if an error
occurs. The options are Disabled and Enabled.
Interrupt 19 Capture
Interrupt 19 is the software interrupt that handles the boot disk function. When this
item is set to Enabled, the ROM BIOS of the host adaptors will "capture" Interrupt 19
at bootup and allow the drives that are attached to these host adaptors to function
as bootable disks. If this item is set to Disabled, the ROM BIOS of the host adap-
tors will not capture Interrupt 19, and the drives attached to these adaptors will not
function as bootable devices. The options are Enabled and Disabled.
Re-try Boot
If this item is enabled, the BIOS will automatically reboot the system from a speci-
ed boot device after its initial boot failure. The options are Disabled, Legacy
Boot, and EFI Boot.
Power Conguration
Watch Dog Function
If enabled, the Watch Dog timer will allow the system to reboot when it is inactive
for more than 5 minutes. The options are Enabled and Disabled.
Power Button Function
If this feature is set to Instant Off, the system will power off immediately as soon
as the user presses the power button. If this feature is set to 4 Seconds Override,
the system will power off when the user presses the power button for 4 seconds or
longer. The options are Instant Off and 4 Seconds Override.
Restore on AC Power Loss
Use this feature to set the power state after a power outage. Select Power-Off for
the system power to remain off after a power loss. Select Power-On for the system
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Chapter 4: AMI BIOS
power to be turned on after a power loss. Select Last State to allow the system to
resume its last state before a power loss. The options are Power-On, Power-Off
and Last State.
CPU Conguration
This submenu displays the information of the CPU as detected by the BIOS. It also
allows the user to conguration CPU settings.
Socket 1 CPU Information/Socket 2 CPU Information
This submenu displays the following information regarding the CPUs installed
in Socket 1/ Socket 2.
•Type of CPU
•CPU Signature
•Microcode Patch
•CPU Stepping
•Maximum CPU Speed
•Minimum CPU Speed
•Processor Cores
•Intel HT (Hyper-Threading) Technology
•Intel VT-x Technology
•Intel SMX Technology
•L1 Data Cache
•L1 Code Cache
•L2 Cache
•L3 Cache
CPU Speed
This item displays the speed of the CPU installed in Socket 1/Socket 2.
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64-bit
This item indicates if the CPU installed in Socket 1 or Socket 2 supports 64-bit
technology.
Clock Spread Spectrum
Select Enable to enable Clock Spectrum support, which will allow the BIOS to moni-
tor and attempt to reduce the level of Electromagnetic Interference caused by the
components whenever needed. The options are Disabled and Enabled.
RTID (Record Types IDs)
This feature displays the total number of Record Type IDs for local and remote
pools. The options are Optimal and Alternate.
Hyper-threading
Select Enabled to support Intel Hyper-threading Technology to enhance CPU per-
formance. The options are Enabled and Disabled.
Active Processor Cores
Set to Enabled to use a processor's second core and above. (Please refer to Intel's
website for more information.) The options are All, 1 and 2.
Limit CPUID Maximum
Use this feature to set the maximum CPU ID value. Enable this function to boot
the legacy operating systems that cannot support processors with extended CPUID
functions. The options are Enabled and Disabled (for the Windows OS).
Execute-Disable Bit Capability (Available if supported by the OS & the CPU)
Select Enabled to enable the Execute Disable Bit which will allow the processor
to designate areas in the system memory where an application code can execute
and where it cannot, thus preventing a worm or a virus from ooding illegal codes
to overwhelm the processor or damage the system during an attack. The default is
Enabled. (Refer to Intel and Microsoft Web sites for more information.)
Intel® AES-NI
Select Enable to use the Intel Advanced Encryption Standard (AES) New Instruc-
tions (NI) to ensure data security. The options are Enabled and Disabled.
MLC Streamer Prefetcher (Available when supported by the CPU)
If set to Enabled, the MLC (Mid-Level Cache) Streamer prefetcher will prefetch
streams of data and instructions from the main memory to the L2 cache to improve
CPU performance. The options are Disabled and Enabled.
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MLC Spatial Prefetcher (Available when supported by the CPU)
If set to Enabled, the MLC (Mid-Level Cache) Spatial prefetcher will prefetch the
both cache lines for 128 bytes as comprised. If set to Disabled, the MLC (Mid-Level
Cache) Spatial prefetcher will prefetch the adjacent cache line for 64 bytes. The
options are Disabled and Enabled.
DCU Streamer Prefetcher (Available when supported by the CPU)
Select Enabled to support Data Cache Unite (DCU) prefetch to speed up data
accessing and processing in the DCU to enhance CPU performance. The options
are Disabled and Enabled.
DCU IP Prefetcher
Select Enabled for DCU (Data Cache Unit) IP Prefetcher support, which will prefetch
IP addresses to improve network connectivity and system performance. The options
are Enabled and Disabled.
Intel® Virtualization Technology (Available when supported by the CPU)
Select Enabled to suppor t Intel Virtualization Technology, which will allow one
platform to run multiple operating systems and applications in independent parti-
tions, creating multiple "virtual" systems in one physical computer. The options
are Enabled and Disabled.
Note: If there is any change to this setting, you will need to power off and
restart the system for the change to take effect. Please refer to Intel’s
website for detailed information.)
CPU Power Management Conguration
This submenu allows the user to congure the following CPU Power Management
settings.
Power Technology
Select Energy Efciency to support power-saving mode. Select Custom to cus-
tomize system power settings. Select Disabled to disable power-saving settings.
The options are Disabled, Energy Efciency, and Custom. If the option is set
to Custom, the following items will display:
EIST (Available when Power Technology is set to Custom)
EIST (Enhanced Intel SpeedStep Technology) allows the system to au-
tomatically adjust processor voltage and core frequency to reduce power
consumption and heat dissipation. The options are Disabled (GV3 Disabled),
and Enabled (GV3 Enabled). (Note: GV3 is Intel Speedstep support used
on older platforms.)Please refer to Intel’s website for detailed information.)
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Turbo Mode (Available when Power Technology is set to Custom)
Select Enabled to use the Turbo Mode to boost system performance. The
options are Enabled and Disabled.
C1E (Available when Power Technology is set to Custom)
Select Enabled to enable Enhanced C1 Power State to boost system per-
formance. The options are Enabled and Disabled.
CPU C3 Report (Available when Power Technology is set to Custom)
Select Enabled to allow the BIOS to report the CPU C3 State (ACPI C2) to
the operating system. During the CPU C3 State, the CPU clock generator
is turned off. The options are Enabled and Disabled.
CPU C6 Report (Available when Power Technology is set to Custom)
Select Enabled to allow the BIOS to report the CPU C6 State (ACPI C3) to
the operating system. During the CPU C6 State, the power to all cache is
turned off. The options are Enabled and Disabled.
CPU C7 Report (Available when Power Technology is set to Custom)
Select Enabled to allow the BIOS to report the CPU C7 State (ACPI C3) to
the operating system. CPU C7 State is a processor-specic low C-State.
The options are Enabled and Disabled.
Package C-State limit (Available when Power Technology is set to
Custom)
This feature allows the user to set the limit on the C-State package register.
The options are C0, C2, C6, and No Limit.
Energy/Performance Bias
Use this feature to select an appropriate fan setting to achieve maximum
system performance (with maximum cooling) or maximum energy efciency
with maximum power saving). The fan speeds are controlled by the rm-
ware management via IPMI 2.0. The options are Performance, Balanced
Performance, Balanced Energy, and Energy Efcient.
Factory Long Duration Power Limit
This item displays the power limit set by the manufacturer during which long
duration power is maintained.
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Long Duration Power Limit
This item displays the power limit set by the manufacturer during which long
duration power is maintained.
Factory Long Duration Maintained (Available when Power Technology
is set to Custom)
This item displays the period of time set by the manufacturer during which
long duration power is maintained.
Long Duration Maintained
This item displays the period of time during which long duration power is
maintained.
Recommended Short Duration Power
This item displays the short duration power settings recommended by the
manufacturer.
Short Duration Power Limit
This item displays the time period during which short duration power is
maintained.
Chipset Conguration
North Bridge
This feature allows the user to congure the settings for the Intel North Bridge.
Integrated IO Conguration
Intel VT-d
Select Enabled to enable Intel Virtualization Technology support for Direct I/O
VT-d by reporting the I/O device assignments to the VWM (Virtual Working
Memory) through the DMAR ACPI Tables. This feature offers fully-protected
I/O resource sharing across Intel platforms, providing greater reliability, security
and availability in networking and data-sharing. The options are Enabled and
Disabled.
Ageing Timer Rollover
Use this feature to congure the Ageing timer setting. Use the default setting
to comply with the BIOS setting. The options are Disabled, 32 us, 128 us, and
512 us.
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Intel I/OAT
The Intel I/OAT (I/O Acceleration Technology) signicantly reduces CPU over-
head by leveraging CPU architectural improvements, freeing the system resource
for other tasks. The options are Disabled and Enabled.
DCA Support
Select Enabled to use Intel's DCA (Direct Cache Access) Technology to improve
data transfer efciency. The options are Enabled and Disabled.
MMCFG (Memory Mapped Conguration) BASE
This item allows the user to set the default PCI MMIO base address. The lower
the MMIO base address is, the less available the system memory is in a 32-bit
OS. The default setting is [0x80000000].
IIO 1 PCIe Port Bifurcation Control
This submenu congures the following IO PCIe Port Bifurcation Control settings
for IIO 1 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.
Uplink Link Speed
This feature allows the user to select target link speed. The options are Gen1
(Generation 1), Gen2 and Gen3.
CPU1 Slot2 PCI-E 3.0 x4 Link Speed
This feature allows the user to set the PCI-Exp bus speed for the slot specied
above. The options are Gen1 (Generation 1), Gen2 and Gen3.
CPU1 Slot3 PCI-E 3.0 x16 Link Speed
This feature allows the user to set the PCI-Exp bus speed for the slot specied
above. The options are Gen1 (Generation 1), Gen2 and Gen3.
CPU1 Slot1 PCI-E 3.0 x16 Link Speed
This feature allows the user to set the PCI-Exp bus speed for the slot specied
above. The options are Gen1 (Generation 1), Gen2 and Gen3.
IIO 2 PCIe Port Bifurcation Control
This submenu congures the following IO PCIe Port Bifurcation Control settings
for IIO 2 PCIe ports to determine how the available PCI-Express lanes to be
distributed between the PCI-Exp. Root Ports.
CPU2 Slot6 PCI-E 3.0 x8 Link Speed
This feature allows the user to set the PCI-Exp bus speed for the slot specied
above. The options are Gen1 (Generation 1), Gen2 and Gen3.
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CPU2 Slot5 PCI-E 3.0 x 16 Link Speed
This feature allows the user to set the PCI-Exp bus speed for the slot specied
above. The options are Gen1 (Generation 1), Gen2 and Gen3.
CPU2 Slot4 PCI-E 3.0 x 16 Link Speed
This feature allows the user to set the PCI-Exp bus speed for the slot specied
above. The options are Gen1 (Generation 1), Gen2 and Gen3.
QPI Conguration
Current QPI Link
This item displays the current status of the QPI Link.
Current QPI Frequency
This item displays the frequency of the QPI Link.
Isoc
Select Enabled to enable Ischronous support to meet QoS (Quality of Service)
requirements. This feature is especially important for virtualization technology.
The options are Enabled and Disabled.
QPI (Quick Path Interconnect) Link Speed Mode
Use this feature to select data transfer speed for QPI Link connections. The
options are Fast and Slow.
QPI Link Frequency Select
Use this feature to select the desired QPI frequency. The options are Auto, 6.4
GT/s, 7.2 GT/s, and 8.0 GT/s.
DIMM Conguration
This section displays the following DIMM information.
Current Memory Mode
This item displays the current memory mode.
Current Memory Speed
This item displays the current memory speed.
Mirroring
This item displays if memory mirroring is supported by the motherboard. Memory
mirroring creates a duplicate copy of the data stored in the memory to enhance
data security.
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Sparing
This item displays if memory sparing is supported by the motherboard. Memory