Supermicro X11QPH+ User Manual

X11QPH+

USER’S MANUAL

Revision 1.0

The information in this user’s manual has been carefully reviewed and is believed to be accurate. The vendor assumes
no responsibility for any inaccuracies that may be contained in this document, and makes no commitment to update
or to keep current the information in this manual, or to notify any person or organization of the updates. Please Note:

For the most up-to-date version of this manual, please see our website at www.supermicro.com.

Super Micro Computer, Inc. ("Supermicro") reserves the right to make changes to the product described in this manual
at any time and without notice. This product, including software and documentation, is the property of Supermicro and/
or its licensors, and is supplied only under a license. Any use or reproduction of this product is not allowed, except
as expressly permitted by the terms of said license.

IN NO EVENT WILL Super Micro Computer, Inc. BE LIABLE FOR DIRECT, INDIRECT, SPECIAL, INCIDENTAL,
SPECULATIVE OR CONSEQUENTIAL DAMAGES ARISING FROM THE USE OR INABILITY TO USE THIS PRODUCT
OR DOCUMENTATION, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGES. IN PARTICULAR, SUPER
MICRO COMPUTER, INC. SHALL NOT HAVE LIABILITY FOR ANY HARDWARE, SOFTWARE, OR DATA STORED
OR USED WITH THE PRODUCT, INCLUDING THE COSTS OF REPAIRING, REPLACING, INTEGRATING,
INSTALLING OR RECOVERING SUCH HARDWARE, SOFTWARE, OR DATA.

Any disputes arising between manufacturer and customer shall be governed by the laws of Santa Clara County in the
State of California, USA. The State of California, County of Santa Clara shall be the exclusive venue for the resolution
of any such disputes. Supermicro's total liability for all claims will not exceed the price paid for the hardware product.

FCC Statement: This equipment has been tested and found to comply with the limits for a Class A digital device
pursuant to Part 15 of the FCC Rules. These limits are designed to provide reasonable protection against harmful
interference when the equipment is operated in a commercial environment. This equipment generates, uses, and can
radiate radio frequency energy and, if not installed and used in accordance with the manufacturer’s instruction manual,
may cause harmful interference with radio communications. Operation of this equipment in a residential area is likely
to cause harmful interference, in which case you will be required to correct the interference at your own expense.

California Best Management Practices Regulations for Perchlorate Materials: This Perchlorate warning applies only
to products containing CR (Manganese Dioxide) Lithium coin cells. “Perchlorate Material-special handling may apply.
See www.dtsc.ca.gov/hazardouswaste/perchlorate”.

WARNING: Handling of lead solder materials used in this product may expose you to lead, a
chemical known to the State of California to cause birth defects and other reproductive harm.

The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment,
nuclear facilities or systems, aircraft, aircraft devices, aircraft/emergency communication devices or other critical

systems whose failure to perform be reasonably expected to result in signicant injury or loss of life or catastrophic

property damage. Accordingly, Supermicro disclaims any and all liability, and should buyer use or sell such products
for use in such ultra-hazardous applications, it does so entirely at its own risk. Furthermore, buyer agrees to fully
indemnify, defend and hold Supermicro harmless for and against any and all claims, demands, actions, litigation, and
proceedings of any kind arising out of or related to such ultra-hazardous use or sale.

Manual Revision 1.0

Release Date: July 26, 2017

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this

document. Information in this document is subject to change without notice. Other products and companies referred

to herein are trademarks or registered trademarks of their respective companies or mark holders.

Copyright © 2017 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

Preface

About This Manual

This manual is written for system integrators, IT technicians and knowledgeable end users.
It provides information for the installation and use of the X11QPH+ motherboard.

About This Motherboard

The Super X11QPH+ motherboard supports four Intel® Xeon 81xx/61xx/51xx series
processors (Socket P0) with the TDP (Thermal Design Power) of up to 205W, and three UPI
(Ultra Path Interconnect) support of up to 10.4 GT/s*. With the Intel C621 PCH built-in, this
motherboard supports up to 16 PCI-E 3.0 slots(in 4U chassis) or up to 11 PCI-E 3.0 slots
(in 2U chassis) using WIO/UIO/other riser cards, 14 SATA 3.0 connections, and up to 6 TB
of DDR4 3DS LRDIMM/LRDIMM/RDIMM ECC 2666 MHz (max) memory in 48 DIMM slots.
The X11QPH+ offers maximum performance, system cooling, and IO expendability currently
available on the market. This motherboard is optimized for virtualization, datacenter, and

nancial applications, and is ideal for use in the 4-way system with 24x SAS and 4x hybrid

NMVe support. This motherboard is intended to be installed and serviced by professional
technicians only. For processor/memory updates, please refer to our website at http://www.
supermicro.com/products/.

* UPI/memory speeds are dependent on the processors installed in your system.

Chapter 1 describes the features, specications and performance of the motherboard, and

provides detailed information on the Intel C621 PCH chip.

Chapter 2 provides hardware installation instructions. Read this chapter when installing the
processor, memory modules and other hardware components into the system.

If you encounter any problems, see Chapter 3, which describes troubleshooting procedures
for video, memory and system setup stored in the CMOS.

Chapter 4 includes an introduction to the BIOS, and provides detailed information on running
the CMOS Setup utility.

Appendix A provides BIOS Error Beep Codes.

Appendix B lists software program installation instructions.

Appendix C provides standardized warning statements.

Appendix D contains UEFI BIOS Recovery instructions.

3

Super X11QPH+ User's Manual

Conventions Used in the Manual

Special attention should be given to the following symbols for proper installation and to prevent

damage done to the components or injury to yourself:

Warning! Indicates important information given to prevent equipment/property damage or per-

sonal injury.

Important: Important information given to ensure proper system installation or to
relay safety precautions.

Note: Additional Information given to differentiate various models or provides infor­mation for correct system setup.

4

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Contacting Supermicro

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Website: www.supermicro.nl

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website: www.supermicro.com.tw

5

Super X11QPH+ User's Manual

Table of Contents

Chapter 1 Introduction

1.2 Processor and Chipset Overview .......................................................................................19

1.3 Special Features ................................................................................................................19

1.4 System Health Monitoring ..................................................................................................20

1.5 ACPI Features ....................................................................................................................20

1.6 Power Supply .....................................................................................................................21

1.7 Super I/O ............................................................................................................................21

1.8 Advanced Power Management ..........................................................................................21

Intel® Intelligent Power Node Manager (IPNM).................................................................21

Management Engine (ME) ................................................................................................22

Chapter 2 Installation

2.1 Static-Sensitive Devices .....................................................................................................23

2.2 Motherboard Installation .....................................................................................................24

2.3 Processor and Heatsink Installation ...................................................................................26

The Intel 81xx/61xx/51xx series Processors ....................................................................26

Overview of the Processor Socket Assembly ...................................................................27

Overview of the Processor Heatsink Module (PHM) ........................................................28

Attaching the Non-F Model Processor to the Narrow Processor Clip to Create the

Processor Package Assembly ...........................................................................................29

Attaching the Non-F Model Processor Package Assembly to the Heatsink to Form the

Processor Heatsink Module (PHM) ...................................................................................30

Preparing the CPU Socket for Installation ........................................................................31

Removing the Dust Cover from the CPU Socket .............................................................31

Installing the Processor Heatsink Module (PHM) ............................................................32

Removing the Processor Heatsink Module (PHM) from the Motherboard .......................33

2.4 Memory Support and Installation .......................................................................................34

Memory Support ................................................................................................................34

DIMM Population Requirements for the 81xx/61xx/51xx series Processors ....................35

DIMM Installation ..............................................................................................................38

DIMM Removal .................................................................................................................38

2.5 Rear I/O Ports ....................................................................................................................39

2.6 Front Control Panel ............................................................................................................43

6

Table of Contents

2.7 Connectors .........................................................................................................................48

Power Supply Unit Connectors .........................................................................................48

Fan Headers .....................................................................................................................49

2.7 Jumper Settings .................................................................................................................54

How Jumpers Work ...........................................................................................................54

2.8 LED Indicators ....................................................................................................................60

Chapter 3 Troubleshooting

3.1 Troubleshooting Procedures ..............................................................................................63

3.2 Technical Support Procedures ...........................................................................................67

3.3 Frequently Asked Questions ..............................................................................................68

3.4 Battery Removal and Installation .......................................................................................69

Battery Removal ................................................................................................................69

Proper Battery Disposal ....................................................................................................69

Battery Installation .............................................................................................................69

3.5 Returning Merchandise for Service ....................................................................................70

Chapter 4 BIOS

4.1 Introduction .........................................................................................................................71

4.2 Main Setup .........................................................................................................................72

4.3 Advanced Setup Congurations .........................................................................................74

4.4 Event Logs .......................................................................................................................101

4.5 IPMI ..................................................................................................................................103

4.6 Security Settings ..............................................................................................................106

4.7 Boot Settings ....................................................................................................................109

4.8 Save & Exit .......................................................................................................................112

Appendix A BIOS POST Codes

Appendix B Software Installation

B.1 Installing Software Programs ...........................................................................................11 6

B.2 SuperDoctor® 5 .................................................................................................................117

Appendix C Standardized Warning Statements

Battery Handling ..............................................................................................................118

Product Disposal .............................................................................................................120

Appendix D UEFI BIOS Recovery

7

Super X11QPH+ User's Manual

Notes

8

Chapter 1: Introduction

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader. Supermicro
boards are designed to provide you with the highest standards in quality and performance.

In addition to the motherboard and chassis, several important parts that are included with the
system are listed below. If anything listed is damaged or missing, please contact your retailer.

This motherboard was designed to be used with an SMCI-proprietary chassis as an integrated
server platform. There will be no shipping package included in the shipment.

Important Links

For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.

• Supermicro product manuals: http://www.supermicro.com/support/manuals/

• Product drivers and utilities: ftp://ftp.supermicro.com

• Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm

• If you have any questions, please contact our support team at: [e-mail]

This manual may be periodically updated without notice. Please check the Supermicro website

for possible updates to the manual revision level.

9

Super X11QPH+ User's Manual

Figure 1-1. X11QPH+ Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB revision

available at the time of publication of the manual. The motherboard you received may
or may not look exactly the same as the graphics shown in this manual.

10

Chapter 1: Introduction

JL1

JPME1

P2_DIMMC1

USB0/1

JUSB2

JTPM1

P2_DIMMB1

P2_DIMMC2

P2_DIMMA1

P2_DIMMB2

P2_DIMMA2

Figure 1-2. X11QPH+ Motherboard Layout

(not drawn to scale)

SXB1A

FAN10

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

WIO X8 (PCI-E 3.0)

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

FAN9

JWD1

VGA

JPG1

UID

JUIDB1

LED1

BMC

BMC_HB
_LED1

CPLD

JBT1

PCH

P2_DIMMD2

P2_DIMMD1

COM1

BIOS

J17

S-SATA4

JSD1

P2_DIMME2

P2_DIMME1

P2_DIMMF2

IPMI_LAN

S-SATA5

JSD2

P2_DIMMF1

USB 2/3(3.0)

JUSB3

I-SATA4~7

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMC1

P1_DIMMC2

JSTBY1

USB 4(3.0)

JBAT1

P1_DIMMB2

P1_DIMMB1

J21

SXB3A

J22

SXB3B

P1_DIMMA1

P1_DIMMA2

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

SXB3C

PSU2

J25

J12VSB

P1_DIMMF2

P1_DIMMD2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

P1_DIMMF1

PSU1

J24

JPWR1

JPWR2

GPU POWER

JPWR3

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

PCI-E 3.0 (RSC -56 Lanes)

J26

J27

CPU3_PORT3 CPU3_PORT1

SXB4B

P3_DIMMF2

P3_DIMME1

P3_DIMMF1

P3_DIMMD1

P3_DIMME2

FAN6

P3_DIMMD2

FAN5

CPU2

BIOS
LICENSE

CPU3

FAN4

JITP1

P3_DIMMA1

P3_DIMMA2

IPMI CODE

BAR CODE

P3_DIMMB1

P3_DIMMB2

P3_DIMMC2

P3_DIMMC1

P4_DIMMF1

P4_DIMMF2

P4_DIMME1

P4_DIMME2

X11QPH+

REV.1.01

P4_DIMMD2

P4_DIMMD1

FAN3

CPU4

CPU1

FAN2

FAN1

P4_DIMMA2

P4_DIMMA1

P4_DIMMB2

P4_DIMMB1

FAN7

P4_DIMMC2

P4_DIMMC1

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

CPU4_PORT1

PCI-E 3.0 (RSC -48 Lanes)

CPU4_PORT3

J29

CPU4_PORT2

SXB5BSXB5A

J30

Note: Components not documented are for internal testing only.

11

Super X11QPH+ User's Manual

GPU POWER

Quick Reference

WIO x8
SXB1A

BMC_HB_LED

JL1

JPME1

USB0/1

JTPM1

JRK1
JPME2

JF1

LED2

FAN8

SXB4A

PCI-E 3.0

RSC56LNs

WIO 2x16

S-SATA0-3

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

PCI-E 3.0 (RSC -56 Lanes)

J26

J27

JPG1

JWD1

SXB1B

JBT1

JSD2

JSD1

I-SATA0-3

SXB1C

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

J19

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

CPU2_PORT2CPU2_PORT1

J20

CPU2

BIOS
LICENSE

CPU3

VGA

FAN10

FAN9

SXB1A

FAN10

FAN9

CPU2_PORT3

JWD1

WIO X8 (PCI-E 3.0)

SXB2

SXB1B

SXB1C

VGA

JPG1

JITP1

JUIDB1

LED1

COM1

COM1

UID

JUIDB1

LED1

BMC

BMC_HB
_LED1

CPLD

BIOS

JBT1

PCH

P2_DIMME2

P2_DIMMD2

P2_DIMMD1

J17

S-SATA4

JSD1

P2_DIMME1

P2_DIMMF2

IPMI CODE

BAR CODE

IPMI_LAN

S-SATA5

JSD2

P2_DIMMF1

IPMI_LAN

USB2/3(3.0)

USB 2/3(3.0)

JUSB3

J17

JSTBY1

I-SATA4~7

JUSB1

USB 4(3.0)

JBAT1

I-SATA0~3S-SATA0~3

P1_DIMMB2

P1_DIMMA1

P1_DIMMC1

P1_DIMMB1

P1_DIMMC2

S-SATA4

S-SATA5

I-SATA4-7

J21

USB4

CPU1_PORT3

SXB3A

Ultra IOx40

Ultra IO X40

JBT1

J22

SXB3B

CPU1_PORT1

SXB3C

P1_DIMMA2

CPU1_PORT2

J23

SXB3C

X11QPH+

REV.1.01

JSTBY1

SXB3A

SXB3B

PSU2

PSU2

CPU1

CPU4

12VSB PWR

PSU1

J12VSB

P1_DIMMF2

P1_DIMME1

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMB1

J25

P1_DIMMD2

P1_DIMMD1

P1_DIMME2

P4_DIMMC2

P4_DIMMC1

J24

JPWR1

JPWR2

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

FAN7

CPU4_PORT1

PCI-E 3.0 (RSC -48 Lanes)

CPU4_PORT3

J29

JPWR1

JPWR2

JPWR3

JPWR4

JPWR5

JPWR6

JPWR7

FAN7

SXB5A

PCI-E 3.0

RSC48LNs

GPU PWR

Back Panel PWR

CPU3_PORT3 CPU3_PORT1

SXB4B

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

FAN5

SXB4B

P3_DIMMF2

P3_DIMMF1

FAN5FAN6

Notes:

• See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel con-

nections.

• " " indicates the location of Pin 1.

• Jumpers/LED indicators not indicated are used for testing only.

• Please refer to the table on Page 1-3 to see model variations.

• Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do

not install the onboard battery upside down to avoid possible explosion.

FAN4

P3_DIMMA1

P3_DIMMA2

P3_DIMMB1

P3_DIMMB2

P3_DIMMC2

P3_DIMMC1

P4_DIMMF1

P4_DIMME1

P4_DIMMF2

P4_DIMMD1

P4_DIMME2

P4_DIMMD2

FAN3

FAN2

FAN4 FAN3 FAN2

12

FAN1

FAN1

CPU4_PORT2

SXB5B

SXB5BSXB5A

J30

Chapter 1: Introduction

Quick Reference Table

Jumper Description Default Setting

J17 Power-Failure Throttling Enable Pins 1-2 (Normal)

JBT1 CMOS Clear Open (Normal)

JPG1 VGA Enable/Disable Pins 1-2 (Enabled)

JPME1 Manufacturing Mode Select Pins 1-2 (Normal)

JWD1 Watch Dog Enable Pins 1-2 (Reset)

Connector Description

JBAT1 Onboard COMOS battery

COM1 Backplane COM port

FAN1-FAN10 System/CPU fan headers (FAN 1- FAN 10)

IPMI_LAN Dedicated IPMI LAN port

J12VSB 12V standby power connector

JF1 Front control panel header

JL1 Chassis Intrusion header

JPWR1-JPWR4 12V 8-pin power connectors 1-4 for use of onboard GPU devices

JPWR5-JPWR7 12V 8-pin power connectors 5-7 for use of back panel devices

JRK1 Onboard RAID Key header

JSD1/JSD2 SATA DOM power connectors for onboard SATA devices

JSTBY1 Onboard 5V standby power header

JTPM1 Trusted Platform Module/Port 80 connector

SXB1A/SXB1B/SXB1C WIO 2x16 (PCI-E 3.0) slot (for CPU2 Port1/ CPU2 Port2) (J18/J19/J20)

SXB2 WIO x8 (PCI-E 3.0) slot (for CPU2 Port3)

SXB3A/SXB3B/SXB3C Ultra IO x40 slot (for CPU1 Port3/CPU1 Port1/CPU1 Port2) (J21/J22/J23)

SXB4A/SXB4B

SXB5A/SXB5B

I-SATA0-3, I-SATA4-7 SATA 3.0 ports 0-3 & 4-7 supported by Intel® PCH

S-SATA0-3 S-SATA 3.0 ports 0-3 supported by Intel® SCU

S-SATA4/5 S-SATA 3.0 ports 4/5 with power-pins built in with support of Super DOM (Device-On-Module)

PCI-E 3.0 riser card slot with support of 56 lanes (for CPU2 Port3/CPU3 Port2/CPU3 Port3/ CPU3

Port1) (J26/J27)

PCI-E 3.0 riser card slot with support of 48 lanes (for CPU4 Port1/CPU4 Port3/CPU4 Port2) (J29/

J30)

USB0/1 (JUSB2) Universal Serial Bus (USB) header for two USB 2.0 connections for front access support

USB2/3 (JUSB3) Back panel USB 3.0 ports 2/3

USB4 (JUSB1) Type A USB 3.0 header

PSU1/PSU2 (J24/J25) Power Supply Unit (PSU) 1/ Power Supply Unit 2 for system use

UID (JUIDB1) Unit Identier (UID) switch

VGA VGA port

13

Super X11QPH+ User's Manual

LED Description Status

BMC_HB_LED1 BMC Heartbeat LED Blinking Green: BMC Normal

LED1 UID LED Solid Blue: Unit Identied

LED2 Onboard Power LED Solid Green: Power On

14

Chapter 1: Introduction

Motherboard Features

Motherboard Features

CPU

• Quad Intel Xeon 81xx/61xx/51xx series processors (P0); each processor supports Intel® UltaPath Interconnect (UPI) of

up to 10.4 GT/s

Note: All CPUs need to be installed for full access to the PCI-E slots, DIMM slots, and onboard controllers. Refer

to the block diagram on page 18 to determine which slots or devices may be affected.

Memory

• Integrated memory controller supports up to 6TB of DDR4 3DS LRDIMM/LRDIMM/RDIMM ECC (288-pin) 2666/2400/2133

MHz modules in 48 slots

DIMM Size

• Up to 128 GB at 1.2V

Note 1: Memory speed support depends on the processors used in the system.

Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/

motherboard.

Chipset

• Intel C621 PCH

Expansion Slots

WIO 2x16 (PCI-E 3.0) slot (for CPU2 Port1/ CPU2 Port2) (J18/J19/J20)

WIO x8 (PCI-E 3.0) slot (for CPU2 Port3)

Ultra IO x40 slot (for CPU1 Port3/CPU1 Port1/CPU1 Port2) (J21/J22/J23)

PCI-E 3.0 riser card slot with support of 56 lanes (for CPU2 Port3/CPU3 Port2/CPU3 Port3/ CPU3 Port1) (J26/J27)

PCI-E 3.0 riser card slot with support of 48 lanes (for CPU4 Port1/CPU4 Port3/CPU4 Port2) (J29/J30)

Network

• One (1) IPMI_dedicated_LAN located on the rear IO backpanel

BaseBoard Management Controller (BMC)

• ASpeed AST 2500 (A2) Baseboard Controller (BMC) supports IPMI 2.0

Graphics

• Graphics controller via ASpeed AST 2500 (A2) BMC

I/O Devices

• Serial (COM) Port • One (1) Fast UART 16550 port on the I/O back panel

• SATA 3.0

• RAID (PCH)

• Eight (8) SATA 3.0 ports supported by Intel PCH (I-SATA 0-3, 4-7)

• Four (4) S-SATA 3.0 connections (S-SATA 0-3) supported by Intel SCU

• Two (4) S-SATA 3.0 with power-pins built with support of SuperDOM devices

(S-SATA4/S-SATA5)

• RAID 0, 1, 5, 10

15

Super X11QPH+ User's Manual

Motherboard Features

Peripheral Devices

• Two (2) USB 3.0 ports on the rear I/O panel (USB 2/3)

• One (1) internal USB 2.0 header with two (2) USB connections on the motherboard for front access (USB 0/1)

• One (1) Type A USB 3.0 connector for front access (USB 4)

BIOS

• 32 MB SPI AMI BIOS

• ACPI 3.0/4.0, USB keyboard, Plug-and-Play (PnP), SPI dual/quad speed support, riser-card auto detection support, Serial

Peripheral Interface (SPI), and SMBIOS 2.7 or later

Power Management

• Main switch override mechanism

• Power-on mode for AC power recovery

• Intel® Intelligent Power Node Manager 3.0 (available when the Supermicro Power Manager [SPM] is installed and a

special power supply is used

• Management Engine (ME)

®

SM Flash UEFI BIOS

System Health Monitoring

• Onboard voltage monitoring for +3.3V, 3.3V standby, +5V, +5V standby, +12V, CPU core, memory, chipset, BMC, PCH,

and battery voltages

• CPU/system overheat LED and control

• CPU Thermal Trip support

• Status monitor for speed control

• Status monitor for on/off control

• CPU Thermal Design Power (TDP) support of up to 145W (See Note 1 on next page.)

Fan Control

• Fan status monitoring via IPMI connections

• Dual cooling zone

• Low-noise fan speed control

• Pulse Width Modulation (PWM) fan control

System Management

• Trusted Platform Module (TPM) support

• PECI (Platform Environment Control Interface) 2.0 support

• UID (Unit Identication)/Remote UID

• System resource alert via SuperDoctor® 5

• SuperDoctor® 5, Watch Dog, NMI

• Chassis intrusion header and detection

LED Indicators

• CPU/Overheating

• Fan Failure

• UID/remote UID

• BMC Heartbeat LED

Dimensions

• 20.57" (L) x 16.80" (W) (522.48 mm x 462.72 mm)

16

Chapter 1: Introduction

Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and
heatsink cooling restrictions. For proper thermal management, please check the chas-

sis and heatsink specications for proper CPU TDP sizing.

Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Con­guration User's Guide available at http://www.supermicro.com/support/manuals/.

Note 3: It is strongly recommended that you change BMC log-in information upon initial
system power-on. The manufacture default username is ADMIN and the password is

ADMIN. For proper BMC conguration, please refer to http://www.supermicro.com/
products/info/les/IPMI/Best_Practices_BMC_Security.pdf

17

Super X11QPH+ User's Manual

Figure 1-3.

System Block Diagram

X32 WIO

CPU2 PE2x16

CPU2 PE1 x16

X2

DDR4 DIMM

X56 RISER

CPU2 PE3 x8

CPU3 PE3 x16

CPU3 PE2 x16

CPU3 PE1 x16

X2

DDR4 DIMM

X8 WIO in X16 Slot

CPU2 PE3x8

PCI-E x16 SLOT

SYSTEM
BIOS

CPU2 PE3 x8 *2

X2

X2

DDR4 DIMM

DDR4 DIMM

X2

X2

DDR4 DIMM

DDR4 DIMM

JCOM1

COM

DDR4

JTPM1

TPM header

CPU2 PE1 x16

CPU2 PE2 x16

UPI

UPI1

JVGA1

VGA CONN

AST2500A2

BMC/HWM/SIO

SPI

PE1PE2PE3 DMI

CPU2

UP2

UPI2

CPU3

PE1PE2PE3

RTL 8211F

eSPI

USB[7]

PE[5]

SPI

PCH DMI-to-CPU1

UPI1UP0

UPI0

X2

DMI

eSPI

PCH

DMI

X2

X2

DDR4 DIMM

DDR4 DIMM

X2

DDR4 DIMM

DDR4 DIMM

JLAN1

JLAN1

Dedicated
LAN Connector

SATA

USB

PEUP

CPU1 PE3 x8

X2

DDR4 DIMM

UPI

UPI

X2

DDR4 DIMM

SATA x14

USB

X2

X2

DDR4 DIMM

X2

X2

DDR4 DIMM

DDR4 DIMM

SSATA0, gen3

SSATA1, gen3
SSATA2, gen3
SSATA3, gen3

SSATA4, gen3

SSATA5, gen3
SATA0, gen3
SATA1, gen3
SATA2, gen3
SATA3, gen3

SATA4, gen3

SATA4, gen3
SATA6, gen3

SATA7, gen3

JUSB4

1
0

USB3.0
USB2.0 1,2

X2

DDR4 DIMM

DDR4 DIMM

X2

DDR4 DIMM

X40 ULTRA IO

DOM
DOM

REAR

2,3

CPU1 PE3 x16

CPU1 PE2 x16

CPU1 PE3 x8 *2

PE1 PE2 PE3 DMI

CPU1

UPI0 UPI1

UPI2

UPI1 UPI0

UPI2

CPU4

PE2PE3

CPU1 PE3 x8

CPU1 PE1 x16

CPU1 PE2 x16

JUSB2

HDR 2X5

4,5 USB2.0

CPU1 DMI-to-PCH

UPI

DMI

PE1

JUSB1

TYPE-A

3USB3.0
3USB2.0

X2

CPU4 PE3 x16

CPU4 PE2 x16

CPU4 PE1 x16

X2

X2

DDR4 DIMM

DDR4 DIMM

X48 RISER

X2

DDR4 DIMM

DDR4 DIMM

X2

DDR4 DIMM

X2

DDR4 DIMM

CPU3 PE3 x16

CPU3 PE2 x16

CPU3 PE1 x16

Note: This is a general block diagram and may not exactly represent the features on

your motherboard. See the previous pages for the actual specications of your moth­erboard.

18

CPU4 PE2 x16

CPU4 PE3 x16

CPU4 PE1 x16

Chapter 1: Introduction

1.2 Processor and Chipset Overview

Built upon the functionality and capability of the Intel Xeon 81xx/61xx/51xx series processors
(Socket P0) and the Intel C621 chipset, the X11QPH+ motherboard provides superb system

performance, efcient power management, and a rich feature set based on cutting edge

technology to address the needs of next-generation computer users. With support of Intel®
UltaPath Interconnect (UPI) of up to 10.4 GT/s, and Intel® AVX-512 new instructions, this
motherboard offers an innovative solution with maximum system performance to meet the
ongoing demands of High Performance Computing (HPC) platforms. This motherboard is
optimized for general purpose server use.

The Intel Xeon 81xx/61xx/51xx series processor and the Intel C621 chipset support the
following features:

• Intel® AVX-512 support with memory bandwidth increase to 6 channels (x1.5 from the pre-

vious generation) and memory capacity increase to1536 GB of DDR4 memory maximum.)

• High availability interconnect between multiple nodes

• Rich set of available IOs, full exibility in usage model, and software stack

• Dedicated subsystems for customer innovation

• Integrated solution for real-time compression, streaming write & read performance in-

creases from gen-to-gen

• Hot plug and enclosure management with Intel Volume Management Device (Intel VMD)

• Single standard server development (Accelerate NFV transition) consolidating application,

control, and data plane workloads, reducing total platform investment needs

Note: Node Manager 3.0 support is dependent on the power supply used in the system.

1.3 Special Features

This section describes the health monitoring features of the X11QPH+ motherboard. The
motherboard has an onboard System Hardware Monitor chip that supports system health
monitoring.

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must press the power switch to turn it back on), or
for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.

19

Super X11QPH+ User's Manual

1.4 System Health Monitoring

This section describes the health monitoring features of the X11QPH+ motherboard. The
motherboard has an onboard Baseboard Management Controller (AST 2500) that supports
system health monitoring. Once a voltage becomes unstable, a warning is given or an error

message is sent to the screen. The user can adjust the voltage thresholds to dene the

sensitivity of the voltage monitor.

Onboard Voltage Monitors

The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage
becomes unstable, it will give a warning or send an error message to the screen. Users can

adjust the voltage thresholds to dene the sensitivity of the voltage monitor. Real time readings

of these voltage levels are all displayed in BIOS.

Fan Status Monitor with Firmware Control

The system health monitor embedded in the BMC chip can check the RPM status of the
cooling fans. The CPU and chassis fans are controlled via lPMI.

Environmental Temperature Control

System Health sensors in the BMC monitor the temperatures and voltage settings of onboard
processors and the system in real time via the IPMI interface. Whenever the temperature of

the CPU or the system exceeds a user-dened threshold, system/CPU cooling fans will be

turned on to prevent the CPU or the system from overheating.

Note: To avoid possible system overheating, please be sure to provide adequate air-

ow to your system.

System Resource Alert

This feature is available when used with SuperDoctor 5®. SuperDoctor 5 is used to notify the

user of certain system events. For example, you can congure SuperDoctor 5 to provide you

with warnings when the system temperature, CPU temperatures, voltages and fan speeds

go beyond a predened range.

1.5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes
a exible and abstract hardware interface that provides a standard way to integrate power

management features throughout a computer system including its hardware, operating system
and application software. This enables the system to automatically turn on and off peripherals
such as network cards, hard disk drives and printers.

20

Chapter 1: Introduction

In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play and an operating system-independent

interface for conguration control. ACPI leverages the Plug and Play BIOS data structures

while providing a processor architecture-independent implementation that is compatible with
Windows 2012/R2 operating systems.

1.6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable
operation. It is even more important for processors that have high CPU clock rates. In areas

where noisy power transmission is present, you may choose to install a line lter to shield

the computer from noise. It is recommended that you also install a power surge protector to
help avoid problems caused by power surges.

1.7 Super I/O

The Super I/O includes a data separator, write pre-compensation circuitry, decode logic, data
rate selection, a clock generator, drive interface control logic, and interrupt and DMA logic. The
wide varieties of functions that are integrated onto the Super I/O greatly reduce the number

of components required for interfacing with oppy disk drives.

The Super I/O provides functions that comply with ACPI (Advanced Conguration and Power

Interface), which includes support of legacy and ACPI power management through a SMI
or SCI function pin. It also features auto power management to reduce power consumption.

The IRQs, DMAs and I/O space resources of the Super I/O can be exibly adjusted to meet

ISA PnP requirements, which support ACPI and APM (Advanced Power Management).

1.8 Advanced Power Management

The following new advanced power management features are supported by the motherboard.

Intel® Intelligent Power Node Manager (IPNM)

Available when the Supermicro Power Manager (SPM) is installed, Intel's Intelligent Power
Node Manager (IPNM) provides your system with real-time thermal control and power

management for maximum energy efciency. Although IPNM Specication Version 2.0/3.0

is supported by the BMC (Baseboard Management Controller), your system must also have

IPNM-compatible Management Engine (ME) rmware installed to use this feature.

Note: Support for IPNM 2.0/3.0 support is dependent on the power supply used in
the system.

21

Super X11QPH+ User's Manual

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the IOH (I/O Hub), provides
Server Platform Services (SPS) to your system. The services provided by SPS are different
from those provided by the ME on client platforms.

22

Chapter 2: Installation

Chapter 2

Installation

2.1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging
your motherboard and your system, it is important to handle it very carefully. The following

measures are generally sufcient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic bag.

• Handle the board by its edges only; do not touch its components, peripheral chips, memory

modules or gold contacts.

• When handling chips or modules, avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in use.

• For grounding purposes, make sure that your chassis provides excellent conductivity be-

tween the power supply, the case, the mounting fasteners and the motherboard.

• Use only the correct type of CMOS onboard battery as specied by the manufacturer. Do

not install the CMOS battery upside down, which may result in a possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.

23

Super X11QPH+ User's Manual

2.2 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis. Make sure

that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that
the metal standoffs click in or are screwed in tightly.

Tools Needed

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

P2_DIMMA2

P2_DIMMA1

SXB1A

FAN10

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

WIO X8 (PCI-E 3.0)

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

CPU2

BIOS
LICENSE

Philips Screwdriver (1)

JPG1

JITP1

BMC_HB
_LED1

CPLD

UID

JUIDB1

LED1

BMC

JBT1

PCH

P2_DIMMD2

P2_DIMMD1

BIOS

COM1

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

IPMI_LAN

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

USB 2/3(3.0)

JUSB3

I-SATA4~7

I-SATA0~3S-SATA0~3

P1_DIMMC1

P1_DIMMC2

JUSB1

JSTBY1

USB 4(3.0)

P1_DIMMB2

P1_DIMMB1

VGA

FAN9

JWD1

SXB3A

SXB3B

JBAT1

P1_DIMMA1

P1_DIMMA2

X11QPH+

REV.1.01

J21

J22

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

SXB3C

PSU2

CPU1

J25

P1_DIMMD2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

Philips Screws (15)

PSU1

P4_DIMMC2

P4_DIMMB1

J24

FAN7

P4_DIMMC1

CPU4_PORT1

JPWR1

JPWR2

GPU POWER

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

J12VSB

P1_DIMMF2

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PCI-E 3.0 (RSC -56 Lanes)

J26

J27

CPU3_PORT3 CPU3_PORT1

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

FAN5

SXB4B

P3_DIMMF2

P3_DIMMF1

Location of Mounting Holes

Notes: 1) To avoid damaging the motherboard and its components, please do not use

a force greater than 8 lb/inch on each mounting screw during motherboard installation.

2) Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the motherboard to
the chassis.

CPU3

PCI-E 3.0 (RSC -48 Lanes)

CPU4_PORT3

CPU4

J29

CPU4_PORT2

FAN4

P3_DIMMA1

P3_DIMMA2

P3_DIMMB1

P3_DIMMB2

P3_DIMMC2

P3_DIMMC1

P4_DIMMF1

P4_DIMME1

P4_DIMMF2

P4_DIMMD1

P4_DIMME2

P4_DIMMD2

FAN3

FAN1

FAN2

SXB5BSXB5A

J30

24

Chapter 2: Installation

Installing the Motherboard

1. Install the I/O shield into the back of the chassis.

2. Locate the mounting holes on the motherboard. See the previous page for the location.

3. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.

6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on
the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed in this manual are for illustration only. Your chassis or
components might look different from those shown in this manual.

25

Super X11QPH+ User's Manual

2.3 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on the label area of the CPU or CPU socket. Also,

improper CPU installation or socket misalignment can cause serious damage to the CPU or motherboard which may result in RMA

repairs. Please read and follow all instructions thoroughly before installing your CPU and heatsink.

Notes:

• Always connect the power cord last, and always remove it before adding, removing, or

changing any hardware components. Please note that the processor and heatsink should

be assembled together rst to form the Processor Heatsink Module (PHM), and then install

the entire PHM into the CPU socket.

• When you receive a motherboard without a processor pre-installed, make sure that the

plastic CPU socket cap is in place and that none of the socket pins are bent; otherwise,
contact your retailer immediately.

• Refer to the Supermicro website for updates on CPU support.

• Please follow the instructions given in the ESD Warning section on the rst page of this

chapter before handling, installing, or removing system components.

The Intel 81xx/61xx/51xx series Processors

Note: The 81xx/61xx/51xx series processors contain two models: the F model proces-

sors and the Non-F model processors. However, only the non-F model processors are
supported by this motherboard.

(*Only the non-F model CPU is supported by this

Note: All graphics, drawings, and pictures shown in this manual are for illustration only.

The components that came with your machine may or may not look exactly the same
as those shown in this manual.

Intel Processor (Non-F Model)

motherboard.)

26

Chapter 2: Installation

Overview of the Processor Socket Assembly

The processor socket assembly contains 1) the Intel 81xx/61xx/51xx series processor (See
the notes below), 2) the narrow processor clip, 3) the dust cover, and 4) the CPU socket.

1. The 81xx/61xx/51xx series processor

(The 81xx/61xx/51xx series Processor)-(Non-F Model Only)

2. Narrow processor clip (the plastic processor package carrier used for the CPU)

3. Dust Cover

4. CPU Socket

(for the non-F Model)

Notes: 1. Be sure to cover the CPU socket with the dust cover when the CPU is not

installed. 2. Please use the non-F model processors on this motherboard.

27

Super X11QPH+ User's Manual

Overview of the Processor Heatsink Module (PHM)

The Processor Heatsink Module (PHM) contains 1) a heatsink, 2) a narrow processor clip,
and 3) the 81xx/61xx/51xx series processor (*non-F model only).

1. Heatsink

2. Narrow processor clip

3. Intel Processor

Processor Heatsink Module (PHM)

28

Chapter 2: Installation

A

Allow Notch B to
latch on to CPU

Attaching the Non-F Model Processor to the Narrow Processor
Clip to Create the Processor Package Assembly

To properly install the CPU into the narrow processor clip, please follow the steps below.

1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor
clip. Also locate notch B and notch C on the processor clip.

2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.

3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of
the narrow processor clip. Once they are aligned, carefully insert the CPU into the
processor clip by sliding notch B of the CPU into notch B of the processor clip, and

sliding notch C of the CPU into notch C of the processor clip.

4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor package
assembly is created.

Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.

CPU (Upside Down)
w/CPU LGA Lands up

Align Notch B of the CPU
and Notch B of the Processor Clip

Align CPU Pin 1

C

Align Notch C of the CPU
and Notch C of the Processor Clip

B

Allow Notch C to
latch on to CPU

A

Pin 1

C

C

B

CPU/Heatsink Package
(Upside Down)

B

A

Processor Package Carrier (w/CPU mounted

on the Processor Clip)

29

Super X11QPH+ User's Manual

Attaching the Non-F Model Processor Package Assembly to the
Heatsink to Form the Processor Heatsink Module (PHM)

After you have made a processor package assembly by following the instructions on the
previous page, please follow the steps below to mount the processor package assembly onto
the heatsink to create the Processor Heatsink Module (PHM).

1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.

With your index nger pressing against the screw at this triangular corner, carefully hold

and turn the heatsink upside down with the thermal-grease side facing up. Remove the

protective thermal lm if present, and apply the proper amount of the thermal grease

as needed. (Skip this step if you have a new heatsink because the necessary thermal
grease is pre-applied in the factory.)

2. Holding the processor package assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of the
processor carrier assembly ("a" in the graphic). Note a larger hole and plastic mounting
clicks located next to the hollow triangle. Also locate another set of mounting clicks and
a larger hole at the diagonal corner
of the same (reverse) side of the
processor carrier assembly ("b" in
the graphic).

3. With the back of heatsink and
the reverse side of the processor
package assembly facing up, align
the triangular corner on the heatsink
("A" in the graphic) against the
mounting clips next to the hollow
triangle ("a") on the processor
package assembly.

4. Also align the triangular corner ("B")
at the diagonal side of the heatsink
with the corresponding clips on the
processor package assembly ("b").

Triangle on the CPU

Triangle on the
Processor Clip

Non-Fabric CPU and Processor Clip

(Upside Down)

b

d

B

a

D

Heatsink

(Upside Down)

A

On Locations of (C, D), the notches

snap onto the heat sink’s

B

c

C

mounting holes

5. Once the mounting clips on the
processor package assembly
are properly aligned with the
corresponding holes on the back
of heatsink, securely attach the
heatsink to the processor package
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the processor
heatsink module (PHM).

30

D

A

On Locations (A, B), the notches
snap onto the heatsink’s sides

C

Make sure Mounting

Notches snap into place

Chapter 2: Installation

Preparing the CPU Socket for Installation

This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket
contains 1) a dust cover, 2) a socket bracket, 3) the CPU (P0) socket, and 4) a back plate.
These components are pre-installed on the motherboard before shipping.

CPU Socket w/Dust Cover On

Removing the Dust Cover from the CPU Socket

Remove the dust cover from the CPU socket, exposing the CPU socket and socket pins as
shown on the illustration below.

Note: Do not touch the socket pins to avoid damaging them, causing the CPU to
malfunction.

Dusk Cover

Remove the dust cover from

the CPU socket. Do not

touch the socket pins!

Socket Pins

CPU Socket

31

Super X11QPH+ User's Manual

Installing the Processor Heatsink Module (PHM)

1. Once you have assembled the processor heatsink module (PHM) by following the
instructions listed on page 29 or page 30, you are ready to install the processor heatsink
module (PHM) into the CPU socket on the motherboard. To install the PHM into the
CPU socket, follow the instructions below.

2. Locate the triangle (pin 1) on the CPU socket, and locate the triangle (pin 1) at the

corner of the PHM that is closest to "1." (If you have difculty locating pin 1 of the PHM,

turn the PHM upside down. With the LGA-lands side facing up, you will note the hollow
triangle located next to a screw at the corner. Turn the PHM right side up, and you will
see a triangle marked on the processor clip at the same corner of hollow triangle.)

3. Carefully align pin 1 (the triangle) on the the PHM against pin 1 (the triangle) on the
CPU socket.

4. Once they are properly aligned, insert the two diagonal oval holes on the heatsink into
the guiding posts.

5. Using a T30 Torx-bit screwdriver, install four screws into the mounting holes on the
socket to securely attach the PHM onto the motherboard starting with the screw marked

"1" (in the sequence of 1, 2, 3, and 4).

Note: Do not use excessive force when tightening the screws to avoid damaging the
LGA-lands and the processor.

Oval C

Use a torque

Oval D

Large Guiding Post

T30 Torx Driver

of 12 lbf

#4

#1

#2

Small Guiding Post

Printed Triangle

Mounting the Processor Heatsink Module

into the CPU socket (on the motherboard)

#3

Tighten the screws in the

sequence of 1, 2, 3, 4 (top 3 quarter view)

32

Chapter 2: Installation

Removing the Processor Heatsink Module (PHM) from the
Motherboard

Before removing the processor heatsink module (PHM), unplug power cord from the power
outlet.

1. Using a T30 Torx-bit screwdriver, turn the screws on the PHM counterclockwise to

loosen them from the socket, starting with screw marked #4 (in the sequence of 4, 3, 2,

1).

2. After all four screws are removed, wiggle the PHM gently and pull it up to remove it
from the socket.

Note: To properly remove the processor heatsink module, be sure to loosen and re-

move the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.

#1

Removing the screws in
the sequence of 4, 3, 2, 1

#4

#2

#3

Printed Triangle on Motherboard

CPU Socket

After removing the screws,

lift the Processor Heatsink
Module off the CPU socket.

33

Super X11QPH+ User's Manual

2.4 Memory Support and Installation

Note: Check the Supermicro website for recommended memory modules.

Important: Exercise extreme care when installing or removing DIMM modules to pre-

vent any damage.

Memory Support

The motherboard supports up to 6TB of DDR4 3DS LRDIMM/LRDIMM/RDIMM ECC (288­pin) 2666/2400/2133 MHz modules in 48 slots. Populating these DIMM modules with a pair
of memory modules of the same type and size will result in interleaved memory, which will
improve memory performance.

Notes: 1. Be sure to use the memory modules of the same type and speed on the
motherboard. Mixing of memory modules of different types and speeds is not allowed.

2. When installing memory modules, be sure to populate the rst DIMM module on
the blue memory slot, which is the rst memory slot of a memory channel, and then
populate the second DIMM in the black slot if 2DPC memory conguration is used. 3.

Using unbalanced memory topology by populating two DIMMs in one channel while
populating one DIMM in another channel will result in reduced memory performance.

4. Memory speed is dependent on the type of processors used in your system. 5.
Using unbalanced memory topology such as populating two DIMMs in one channel
while populating one DIMM in another channel on the same motherboard will result in

reduced memory performance.

DDR4 Memory Support (for 2-Slot Per-Channel Conguration)

Ranks

DIMM Capacity

Type

RDIMM SRx4 8 GB 16 GB 2666 2666

RDIMM SRx8 4 GB 8 GB 2666 2666

RDIMM DRx8 8 GB 16 GB 2666 2666

RDIMM DRx4 16 GB 32 GB 2666 2666

RDIMM 3Ds QRX4 N/A 2H-64GB 2666 2666

RDIMM 3Ds 8RX4 N/A 4H-128GB 2666 2666

LRDIMM QRx4 32 GB 64 GB 2666 2666

LRDIMM 3Ds

Per

DIMM

and Data

Width

QRX4 N/A 2H-64GB 2666 2666

8Rx4 N/A 4H-128 GB 2666 2666

(GB)

4 Gb 8 Gb 1.2 V 1.2 V

Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)

2 Slots per Channel

1DPC (1-DIMM per Channel) 2DPC (2-DIMM per Channel)

DDR4 Memory Support (for 1-Slot Per-Channel Conguration)

Ranks

DIMM Capacity

Type

RDIMM SRx4 8 GB 16 GB 2666

RDIMM SRx8 4 GB 8 GB 2666

RDIMM DRx8 8 GB 16 GB 2666

RDIMM DRx4 16 GB 32 GB 2666

RDIMM 3Ds QRX4 N/A 2H-64GB 2666

RDIMM 3Ds 8RX4 N/A 4H-128GB 2666

LRDIMM QRx4 32 GB 64 GB 2666

LRDIMM 3Ds

Per

DIMM

and Data

Width

QRX4 N/A 2H-64GB 2666

8Rx4 N/A 4H-128 GB 2666

(GB)

4 Gb 8 Gb 1.2 V

Speed (MT/s); Voltage (V); Slots per Channel (SPC) and DIMMs per Channel (DPC)

1 Slot per Channel

1DPC (1-DIMM per Channel)

34

Chapter 2: Installation

DIMM Population Requirements for the 81xx/61xx/51xx series
Processors

For optimal memory performance, follow the tables below when populating memory modules.

Key Parameters for DIMM Congurations

Parameters Possible Values

Number of Channels 1, 2, 3, 4, 5, or 6

Number of DIMMs per Channel 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)

DIMM Type RDIMM (w/ECC), LRDIMM, 3DS-LRDIMM

DIMM Construction • non-3DS RDIMM Raw Cards: A/B (2RX4), C (1RX4),

D (1RX8), E (2RX8)

• 3DS RDIMM Raw Cards: A/B (4RX4)

• non-3DS LRDIMM Raw Cards: D/E (4RX4)

• 3DS LRDIMM Raw Cards: A/B (8RX4)

General Population Requirements

DIMM Mixing Rules

• Please populate all memory modules with DDR4 DIMMs only.

• X4 and X8 DIMMs can be mixed in the same channel.

• Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across different channels, and across

different sockets.

• Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across different channels, and across

different sockets.

Mixing of DIMM Types within a Channel

DIMM Types RDIMM LRDIMM 3DS LRDIMM

RDIMM Allowed Not Allowed Not Allowed

LRDIMM Not Allowed Allowed Not Allowed

3DS LRDIMM Not Allowed NotAllowed Allowed

35

Super X11QPH+ User's Manual

(DDR4 Only) Socket Level Population Requirements

• There should be at least one DDR4 DIMM per socket.

• If only one DIMM is populated in a channel, then populate it in the slot furthest away from CPU.

• Always populate DIMMs with a higher electrical loading in DIMM0 followed by DIMM1.

(DDR4 Only) Memory Populations with Possible Mixes

DDR4 RDIMM DIMM0/DIMM1

Within

IMC

DIMM

Popula-

tion

3DS LRDIMM or 3DS RDIMM DIMM0/DIMM1 Cong. Set A Possible Mixes

Within IMC

DIMM Popu-

DDR0 x8, None, x8, x8 x4, None, x4, x4 x8, x4, or x4, x8 Single Rank, None

DDR1 None or same as

DDR2 None or same as

lation

Cong. Set A

DDR1 (excludes

DIMM 1 in 5DIMM

congurations)

(DDR4 Only) Memory Populations with Possible Mixes

DDR0 x4, None, x4, x4 Quad Rank, None

DDR1 None or same as DDR0

DDR2 None or same as DDR1

DDR4 Socket Level Minimum Population Requirements

DDR0

DIMM0/DIMM1

Cong. Set B

None or same as

DDR0

None or same as

DDR1 (excludes

DIMM 1 in 5DIMM

congurations)

DIMM0/DIMM1 Con-

g. Set C

None or same as

DDR0

None or same as

DDR1 (excludes DIMM

1 in 5DIMM congura-

tions)

Cannot mix 3DS LRDIMM and RDIMM

Possible Mixes

DIMM0/DIMM1

Single Rank, Single Rank

Dual Rank, Single Rank,

Dual Rank, None

Dual Rank, Dual Rank,

Single Rank, Single Rank

DIMM0/DIMM1

Quad Rank, Quad Rank

LRDIMMs DIMM0/DIMM1 Possible Mixes

Within IMC

DIMM Popu-

lation

DIMM Population

within an IMC

(Note: Uniformly

populate with x8
DRAMs DIMMs)

DIMM Population

within an IMC

(Note: Non-equal

in rank pair of x8

DIMMs)

(DDR4 Only) Memory Populations with Possible Mixes

DIMM0/DIMM1

DDR0 x4, None, x4, x4 Quad Rank, None

DDR1 None or same as DDR0

DDR2 None or same as DDR1

Quad Rank, Quad Rank

Note: Requirements
*Match DIMM types installed across DDR

channels within an IMC

*Always populate iMC0 rst

(DDR4 Only) 2SPC Memory Conguration with x8 DIMMs

Total # of

DIMMs

1 x8 DIMM Must be installed on iMC0 DDR Channel 0 1 N/A

2 x8 DIMMs DDR0: Populate with 1 DIMM

3 x8 DIMMs DDR0: Populate with 1 DIMM

4 x8 DIMMs DDR0: Populate with 2 DIMMs

5 x8 DIMMs DDR Channel 0, 1, 2: DIMM0 is populated with identi-

DDR Channel 0, 1: DIMM1 is populated with identical

6 x8 DIMMs Populate 2 DIMMs per DDR channel x SVLS

1 pair of

DIMMs

2 pairs of

DIMMs

3 pairs of

DIMMs

2 pairs+1
(5DIMMs)

DDR1: Populate the second DIMM (for best perfor-

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate with identical DIMMs as DDR0

DDR2: DIMM0 is populated with identical DIMM as

DDR Channel Number

DDR1: Populate identically as DDR0

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR1: Populate identically as DDR0

cal DIMMs,

DIMMs

DDR0: Populate with 1 DIMM

mance)

DDR1: Populate identically as DDR0

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR1

of Ranks

>1 SVLS

1 N/A

>1 SVLS

1 N/A

>1 SVLS

x SVLS

>1 SVLS

1 N/A

>1 SVLS

1 N/A

>1 SVLS

x SVLS

>1 SVLS

Virtual

Lock Step

36

DIMM Popula­tion within an

IMC

Note: Uniformly

populate with x4

DRAMs/DIMMs

Chapter 2: Installation

(DDR4 Only) 2SPC Memory Conguration with x4 DIMMs

Total # of

DIMMs

1 x4 DIMM Must be installed on iMC0 DDR Channel 0 1 Y, only Bank VLS

2 x4 DIMMs DDR0: Populate with 1 DIMM

3 x4 DIMMs DDR0: Populate with 1 DIMM

4 x4 DIMMs DDR0: Populate with 2 DIMMs

5 x4 DIMMs DDR Channel 0, 1, 2: DIMM0 is populated with identi-

DDR Channel 0, 1: DIMM1 is populated with identical

6 x4 DIMMs Populate 2 DIMMs per DDR channel x Y

DDR Channel Number

DDR1: Populate identically as DDR0

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR1: Populate identically as DDR0

cal DIMMs,

DIMMs

of Ranks

Adaptive Virtual

Lock Step

>1 Y

1 Y, only Bank VLS

>1 Y

1 Y, only Bank VLS

>1 Y

x Y

>1 Y

DIMM Popula­tion within an

IMC

Note: Non-

equal in rank

pair of x4

DIMMs)

1 pair of

DIMMs

2 pairs of

DIMMs

3 pairs of

DIMMs

2 pairs+1
(5DIMMs)

DDR0: Populate with 1 DIMM

DDR1: Populate the second DIMM (for best perfor-

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate identically as DDR0

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate identically as DDR0
DDR2: Populate identically as DDR1

DDR0: Populate with 1 pair of non-equal rank DIMMs

DDR1: Populate with identical DIMMs as DDR0

DDR2: DIMM0 is populated with identical DIMM as

mance)

DDR1

>1 Y

>1 Y

x Y

>1 Y

(DDR4 Only) 2SPC Memory Conguration with x8/x4 DIMMs Mixed

DDR4 RDIMM Total # of DIMMs DDR Channel ADDC/SDDC

DIMM Popula­tion within an

IMC

1 pair of x8, x4 DDR0: Populate with 1 DIMM

2 pairs of x8, x4 Populate with 1 pair of DIMMs on DDR0,

3 pairs of x8, x4 A pair of DIMMs on DDR0, and identical pair on

DDR1: Populate the second DIMM (for best perfor-

mance)

and identical pair on DDR1

DDR1, and DDR2

Features

No

No

No

37

Super X11QPH+ User's Manual

BIOS
LICENSE

IPMI CODE

BAR CODE

X11QPH+

REV.1.01

S-SATA5

S-SATA4

JPWR4

JPWR1

JPWR2

JPWR3

JTPM1

P4_DIMMB2

P4_DIMMA2

P3_DIMMF2

P1_DIMME2

P1_DIMMD2

P4_DIMMB1

P4_DIMMA1

P1_DIMME1

P1_DIMMD1

JPWR5

JPWR6

JPWR7

JUSB1

JSD1

JSD2

JUIDB1

JBAT1

J22

J18

LED1

LED2

JITP1

FAN10

FAN9

FAN8

FAN6

FAN7

FAN5

FAN4

FAN2

FAN3

FAN1

JPCIE1

J21

J24

J25

J20

J23

J19

JUSB3

J26

J27

J17

JPG1

JWD1

JPME1

JL1

JBT1

JRK1

JUSB2

BMC_HB
_LED1

JF1

JSTBY1

P3_DIMMF1

P3_DIMMD2

P3_DIMMD1

P3_DIMME2

P3_DIMME1

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

P2_DIMMD2

P2_DIMMD1

P2_DIMME2

P2_DIMME1

P2_DIMMF2

P2_DIMMF1

P1_DIMMF2

P1_DIMMF1

P4_DIMMC2

P4_DIMMC1

P4_DIMME1

P4_DIMMF1

P4_DIMME2

P4_DIMMF2

P4_DIMMD1

P4_DIMMD2

P3_DIMMB2

P3_DIMMA2

P3_DIMMB1

P3_DIMMA1

P3_DIMMC2

P3_DIMMC1

BIOS

J29

J30

PCH

BMC

CPU2_PORT3

CPLD

CPU2

SXB1C

CPU3

CPU4

SXB2

SXB1B

SXB1A

SXB4A

SXB4B

USB0/1

CPU1_PORT2

SXB3C

CPU1_PORT1

SXB3B

VGA

UID

COM1

I-SATA0~3S-SATA0~3

I-SATA4~7

USB 4(3.0)

USB 2/3(3.0)

IPMI_LAN

CPU2_PORT2CPU2_PORT1

CPU1

BACKPLANE POWER

GPU POWER

P1_DIMMB1

P1_DIMMC1

P1_DIMMB2

P1_DIMMC2

P1_DIMMA1

P1_DIMMA2

WIO 2x16 (PCI-E 3.0)

PCI-E 3.0 (RSC -56 Lanes)

PCI-E 3.0 (RSC -48 Lanes)

Ultra IO X40

PSU2

PSU1

J12VSB

SXB5BSXB5A

CPU2_PORT3 CPU3_PORT2

CPU3_PORT3 CPU3_PORT1

CPU4_PORT2

CPU4_PORT1

CPU4_PORT3

CPU1_PORT3

SXB3A

WIO X8 (PCI-E 3.0)

DIMM Installation

1. Insert DIMM modules in the following
order: P1-DIMMA1, P1-DIMMA2,
then P1-DIMMB1, DIMMB2. For the
system to work properly, please use
memory modules of the same type
and speed on the motherboard.

2. Push the release tabs outwards on
both ends of the DIMM slot to unlock
it.

3. Align the key of the DIMM module
with the receptive point on the
memory slot.

4. Align the notches on both ends of
the module against the receptive
points on the ends of the slot.

5. Use two thumbs together to press
the notches on both ends of the
module straight down into the slot
until the module snaps into place.

6. Press the release tabs to the lock
positions to secure the DIMM module
into the slot.

DIMM Removal

Reverse the steps above to remove the
DIMM modules from the motherboard.

Notches

Release Tabs

Press both notches

straight down into

the memory slot.

38

Chapter 2: Installation

GPU POWER

PCI-E 3.0 (RSC -56 Lanes)

2.5 Rear I/O Ports

See Figure 2-2 below for the locations and descriptions of the various I/O ports on the rear
of the motherboard.

COM1

VGA

SXB1A

FAN10

FAN9

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

JWD1

JPG1

WIO X8 (PCI-E 3.0)

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

CPU2

BIOS
LICENSE

SXB1C

J20

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

BMC_HB
_LED1

CPLD

P2_DIMMD2

JITP1

UID

LED1

JUIDB1

BMC

BIOS

JBT1

PCH

P2_DIMMD1

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

IPMI_LAN

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

I-SATA4~7

P1_DIMMC1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMB1

P1_DIMMC2

JSTBY1

USB 4(3.0)

P1_DIMMB2

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

J21

SXB3A

J22

SXB3B

P1_DIMMA2

SXB3C

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

PSU2

P1_DIMMD2

CPU1

J25

P1_DIMMF2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

J12VSB

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMC2

P4_DIMMB1

FAN7

P4_DIMMC1

CPU4_PORT1

J24

JPWR1

JPWR2

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

CPU3

J26

J27

CPU3_PORT3 CPU3_PORT1

P3_DIMMF2

P3_DIMMF1

P3_DIMME2

P3_DIMME1

P3_DIMMD1

FAN6

P3_DIMMD2

FAN4

P3_DIMMA1

P3_DIMMA2

P3_DIMMB1

P3_DIMMC2

FAN5

P3_DIMMB2

P3_DIMMC1

P4_DIMMF1

P4_DIMMF2

P4_DIMME1

P4_DIMME2

P4_DIMMD1

SXB4B

P4_DIMMD2

CPU4

FAN1

FAN3

FAN2

Back panel I/O Port Locations and Denitions

2

1 543

Back Panel I/O Ports

No. Description No. Description

1. USB 2 (USB 3.0) 4. COM1

2. USB 3 (USB 3.0) 5. UID Switch

3. IPMI_LAN 6. VGA

6

PCI-E 3.0 (RSC -48 Lanes)

CPU4_PORT3

J29

CPU4_PORT2

SXB5BSXB5A

J30

39

Super X11QPH+ User's Manual

PCI-E 3.0 (RSC -56 Lanes)

VGA Port

The onboard VGA port is located next to the UID switch on the I/O back panel. Use this
connection for VGA display.

Serial Port

There is one COM port (COM1) next to the IPMI_LAN on the I/O back panel. The COM port

provides serial communication support. See the table below for pin denitions.

COM Port

Pin Denitions

Pin# Denition Pin# Denition

1 DCD 6 DSR

2 RXD 7 RTS

3 TXD 8 CTS

4 DTR 9 RI

5 Ground 10 N/A

1

2

COM1

VGA

SXB1A

FAN10

FAN9

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

JWD1

JPG1

WIO X8 (PCI-E 3.0)

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

J26

J27

CPU3_PORT3 CPU3_PORT1

P3_DIMMF2

P3_DIMMF1

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

SXB4B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

FAN5

FAN4

LED1

BMC_HB
_LED1

CPLD

P2_DIMMD2

JITP1

P3_DIMMA2

UID

JUIDB1

BMC

JBT1

PCH

P2_DIMMD1

P3_DIMMA1

BIOS

P3_DIMMB2

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

P3_DIMMB1

P3_DIMMC2

IPMI_LAN

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

P3_DIMMC1

I-SATA4~7

P1_DIMMC1

P4_DIMMF1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMB1

P1_DIMMC2

P4_DIMME1

P4_DIMMF2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P4_DIMME2

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

P4_DIMMD1

J21

SXB3A

J22

SXB3B

P1_DIMMA2

SXB3C

P4_DIMMD2

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

1. VGA Port

2. COM1

PSU2

P1_DIMMD2

CPU1

CPU4

FAN3

J25

P1_DIMME1

P1_DIMMD1

P1_DIMME2

FAN1

FAN2

J12VSB

P1_DIMMF2

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMC2

P4_DIMMB1

J24

FAN7

P4_DIMMC1

CPU4_PORT1

CPU4_PORT3

CPU4_PORT2

J29

J30

JPWR1

JPWR2

GPU POWER

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

PCI-E 3.0 (RSC -48 Lanes)

SXB5BSXB5A

2

1

40

Chapter 2: Installation

PCI-E 3.0 (RSC -56 Lanes)

Universal Serial Bus (USB) Ports

There are two USB 3.0 ports (USB2/3) on the I/O back panel. A USB header that supports two
USB 2.0 connections (USB0/1) are also located on the motherboard to provide front access
support. USB4, a Type A USB header, offers front USB 3.0 support. Connect USB cables to
these USB connections for USB access. Cables are not included.

Back Panel USB 2/3 (3.0)

Pin Denitions

Pin# Denition Pin# Denition

A1 VBUS B1 Power

A2 D- B2 USB_N

A3 D+ B3 USB_P

A4 GND B4 GND

A5 Stda_SSRX- B5 USB3_RN

A6 Stda_SSRX+ B6 USB3_RP

A7 GND B7 GND

A8 Stda_SSTX- B8 USB3_TN

A9 Stda_SSTX+ B9 USB3_TP

COM1

VGA

UID

SXB1A

JUIDB1

LED1

FAN10

FAN9

CPU2_PORT3

WIO X8 (PCI-E 3.0)

SXB2

SXB1B

SXB1C

BMC

J17

BMC_HB

JWD1

JPG1

_LED1

CPLD

BIOS

JBT1

PCH

P2_DIMME2

P2_DIMMD2

P2_DIMMD1

P2_DIMME1

IPMI CODE

JITP1

BAR CODE

J19

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

CPU2_PORT2CPU2_PORT1

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

1

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

BIOS
LICENSE

J20

CPU2

IPMI_LAN

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

I-SATA4~7

P1_DIMMC1

2

3

USB 2/3(3.0)

JUSB3

4

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMC2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P1_DIMMB1

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

J21

SXB3A

J22

SXB3B

P1_DIMMA2

SXB3C

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

Front Panel USB 0/1 (2.0)

Pin Denitions

Pin# Denition Pin# Denition

1 VUBS 2 VUBS

3 USB_N 4 USB_N

5 USB_P 6 USB_P

7 Ground 8 Ground

9 Key 10 No Connection

Type A USB 4 (3.0)

Pin Denitions

Pin# Denition Pin# Denition

1 VBUS 5 SSRX-

2 USB_N 6 SSRX+

3 USB_P 7 GND

4 Ground 8 SSTX-

9 SSTX+

1. USB 0/1 (2.0)

2. USB 2 (3.0)

PSU2

P1_DIMMD2

CPU1

J25

P1_DIMMF2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

J12VSB

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMC2

P4_DIMMB1

FAN7

P4_DIMMC1

CPU4_PORT1

J24

JPWR1

JPWR2

JPWR3

JPWR4

JPWR5

JPWR6

JPWR7

GPU POWER

BACKPLANE POWER

3. USB 3 (3.0)

4. Type A USB4 (3.0)

CPU3

J26

J27

CPU3_PORT3 CPU3_PORT1

P3_DIMMF2

P3_DIMMF1

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

FAN5

FAN4

P3_DIMMA1

P3_DIMMA2

P3_DIMMB1

P3_DIMMC2

P3_DIMMB2

SXB4B

P3_DIMMC1

P4_DIMMF1

P4_DIMME1

P4_DIMMF2

P4_DIMMD1

P4_DIMME2

P4_DIMMD2

PCI-E 3.0 (RSC -48 Lanes)

CPU4_PORT3

CPU4

FAN1

FAN3

FAN2

3

J29

CPU4_PORT2

SXB5BSXB5A

2

J30

41

Super X11QPH+ User's Manual

Unit Identier Switch/UID LED Indicator

A Unit Identier (UID) switch (UID) and a rear UID LED Indicator (LED1) are located on the

I/O back panel. When you press the UID switch, the UID LED indicator will be turned on.

Press the UID switch again to turn off the LED. The UID Indicator provides easy identication

of a system unit that may be in need of service.

Note: UID can also be triggered via IPMI on the motherboard. For more information
on IPMI, please refer to the IPMI User's Guide posted on our website at http://www.
supermicro.com.

UID Switch

Pin Denitions

Pin# Denition

1 Ground

Color Status

Blue: On Unit Identied

UID LED

Pin Denitions

2 Ground

3 Button In

4 Button In

IPMI_LAN Port

An IPMI-dedicated LAN that supports GbE LAN is located next to USB 2/3 ports on
the backplane. The IPMI_LAN is supported by the Aspeed AST2500 BMC (Baseboard
Management Controller). This port accept a RJ45 type cable. Please refer to the LED Indicator
Section for IPMI_LAN LED information.

2 1

COM1

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

PCI-E 3.0 (RSC -56 Lanes)

J26

J27

CPU3_PORT3 CPU3_PORT1

SXB4B

P3_DIMMF2

P3_DIMME1

P3_DIMMF1

P2_DIMMA1

P2_DIMMB2

P3_DIMMD1

P3_DIMME2

P2_DIMMA2

FAN6

P3_DIMMD2

FAN5

SXB1A

J19

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

VGA

FAN10

FAN9

CPU2_PORT3

JWD1

WIO X8 (PCI-E 3.0)

FAN4

JPG1

JITP1

UID

JUIDB1

LED1

BMC

BMC_HB
_LED1

CPLD

PCH

P2_DIMMD2

P3_DIMMA1

P3_DIMMA2

BIOS

JBT1

P2_DIMMD1

P3_DIMMB2

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

P3_DIMMB1

P3_DIMMC2

IPMI_LAN

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

P3_DIMMC1

USB 2/3(3.0)

I-SATA4~7

I-SATA0~3S-SATA0~3

P1_DIMMC1

P4_DIMMF1

JUSB3

JUSB1

P1_DIMMB1

P1_DIMMC2

P4_DIMME1

P4_DIMMF2

JSTBY1

USB 4(3.0)

JBAT1

P1_DIMMB2

P4_DIMME2

J21

SXB3A

J22

SXB3B

P1_DIMMA1

P1_DIMMA2

X11QPH+

REV.1.01

P4_DIMMD2

P4_DIMMD1

SXB3C

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

FAN3

1. UID

2. UID LED (on the motherboard)

3. IPMI LAN

PSU2

P1_DIMMD2

CPU1

CPU4

J25

P1_DIMME1

P1_DIMMD1

P1_DIMME2

FAN1

FAN2

J12VSB

P1_DIMMF2

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMC2

P4_DIMMB1

J24

FAN7

P4_DIMMC1

CPU4_PORT1

CPU4_PORT3

CPU4_PORT2

J29

J30

JPWR1

JPWR2

GPU POWER

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

PCI-E 3.0 (RSC -48 Lanes)

SXB5BSXB5A

3

1

42

Chapter 2: Installation

2.6 Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located on a

control panel at the front of the chassis. These connectors are designed specically for use
with Supermicro chassis. See the gure below for the descriptions of the front control panel

buttons and LED indicators.

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

PCI-E 3.0 (RSC -56 Lanes)

J26

J27

P2_DIMMA2

SXB1A

FAN10

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

WIO X8 (PCI-E 3.0)

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

COM1

VGA

FAN9

JWD1

JPG1

JITP1

UID

LED1

BMC

BMC_HB
_LED1

CPLD

P2_DIMMD2

JUIDB1

BIOS

JBT1

PCH

P2_DIMMD1

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

IPMI_LAN

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

USB 2/3(3.0)

I-SATA4~7

I-SATA0~3S-SATA0~3

P1_DIMMC1

JUSB3

JUSB1

P1_DIMMB1

P1_DIMMC2

JSTBY1

USB 4(3.0)

P1_DIMMB2

SXB3A

SXB3B

JBAT1

P1_DIMMA1

P1_DIMMA2

X11QPH+

REV.1.01

J22

J21

J23

SXB3C

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

PSU2

P1_DIMMD2

CPU1

CPU4

J25

J12VSB

P1_DIMMF2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMC2

P4_DIMMB1

FAN7

P4_DIMMC1

CPU4_PORT1

CPU4_PORT3

J24

J29

JPWR1

JPWR2

GPU POWER

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

PCI-E 3.0 (RSC -48 Lanes)

CPU3_PORT3 CPU3_PORT1

SXB4B

P3_DIMMF2

P3_DIMMF1

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

FAN5

FAN4

P3_DIMMA1

P3_DIMMA2

P3_DIMMB1

P3_DIMMB2

P3_DIMMC2

P3_DIMMC1

P4_DIMMF1

P4_DIMMF2

P4_DIMME1

P4_DIMME2

P4_DIMMD2

P4_DIMMD1

FAN3

FAN1

FAN2

CPU4_PORT2

SXB5BSXB5A

J30

Figure 2-3. JF1 Header Pins

1 2

PWR

Reset

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

3.3V

X

NMI

19

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

X

Ground

20

43

Super X11QPH+ User's Manual

Power Button

The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both

pins will power on/off the system. This button can also be congured to function as a suspend

button (with a setting in the BIOS - see Chapter 4). To turn off the power when the system
is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for

pin denitions.

Power Button

Pin Denitions (JF1)

Pins Denition

1 Signal

2 Ground

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Attach it to a hardware reset

switch on the computer case to reset the system. Refer to the table below for pin denitions.

Reset Button

Pin Denitions (JF1)

Pins Denition

3 Reset

4 Ground

1 2

PWR

1

Reset

2

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

1. PWR Button

2. Reset Button

3.3V Stby

3.3V

X

NMI

19

HDD LED

PWR LED

X

Ground

20

44

Chapter 2: Installation

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below

for pin denitions.

Power Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 PWR Supply Fail

Fan Fail and UID LED

Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the Overheat/Fan
Fail LED connections. The LED on pin 8 provides warnings of overheat or fan failure. Refer

to the tables below for pin denitions.

PWR

Reset

OH/Fan Fail Indicator

Status

State Denition

Off Normal

On Overheat

Flashing Fan Fail

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

1 2

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

OH/Fan Fail LED

Pin Denitions (JF1)

Pin# Denition

7 Blue LED

8 OH/Fan Fail LED

1. Power Fail LED

2. OH/Fan Fail LED

1

2

3.3V Stby

3.3V

X

NMI

19

20

HDD LED

PWR LED

X

Ground

45

Super X11QPH+ User's Manual

NIC1/NIC2 (LAN1/LAN2)

The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins
11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to

display network activity. Refer to the table below for pin denitions.

LAN1/LAN2 LED

Pin Denitions (JF1)

Pin# Denition

9 NIC 2 Activity LED

11 NIC 1 Activity LED

HDD LED

The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to

show hard drive activity status. Refer to the table below for pin denitions.

PWR

Reset

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

1 2

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

Pin Denitions (JF1)

Pins Denition

13 3.3V Stdby

14 HDD Active

1. NIC2 LED

2. NIC1 LED

3. HDD LED

1

2

3.3V Stby

3.3V

X

NMI

19

20

HDD LED

PWR LED

X

Ground

3

46

Chapter 2: Installation

Power LED

The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below

for pin denitions.

Power LED

Pin Denitions (JF1)

Pins Denition

15 3.3V

16 PWR LED

NMI Button

The non-maskable interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer

to the table below for pin denitions.

NMI Button

Pin Denitions (JF1)

Pins Denition

19 Control

20 Ground

1 2

PWR

Power Button

Reset

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

3.3V

NMI

2

X

19

20

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

X

Ground

1. PWR LED

2. NMI

1

47

Super X11QPH+ User's Manual

2.7 Connectors

Power Supply Unit Connectors

Power Supply Unit Connectors

Two main power supply unit connectors (PSU1/PSU2) are located on J24/J25 on the
motherboard. Connect these connectors to your power supply to provide power to your
system. See the layout drawing below for the locations of PSU1 and PSU2.

12V 8-pin CPU Power Connectors

In addition to the main power supply units, there are seven 8-pin 12V DC power connectors
located on the motherboard. Four of these 8-pin power connectors (JPWR1-JPWR4) are
used for GPU devices, and the remaining three (JPWR5-JPWR7) are used for backplane
devices. Additionally, J12VSB, located between PSU1/PSU2, provides 12V standby power

to the system. Refer to the table below for pin denitions.

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

PCI-E 3.0 (RSC -56 Lanes)

J26

J27

P2_DIMMA1

P2_DIMMB2

P2_DIMMA2

SXB1A

J19

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

GPU Power (JPWR1-4)

Pin Denitions

Pin# Denition

1 - 4 Ground

5 - 8 +12V

COM1

VGA

FAN10

FAN9

CPU2_PORT3

JWD1

WIO X8 (PCI-E 3.0)

JPG1

LED1

BMC_HB
_LED1

CPLD

P2_DIMMD2

JITP1

UID

JUIDB1

BMC

PCH

P2_DIMMD1

IPMI_LAN

J17

BIOS

S-SATA4

S-SATA5

JBT1

I-SATA4~7

JSD2

JSD1

P2_DIMME2

P2_DIMMF1

P2_DIMME1

P2_DIMMF2

IPMI CODE

BAR CODE

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMC1

P1_DIMMC2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P1_DIMMB1

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

J21

SXB3A

J22

SXB3B

P1_DIMMA2

SXB3C

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

Back Panel Power (JPWR5-8)

Pin Denitions

Pin# Denition

1 - 4 Ground

5 - 6 +12V

7 - 8 +5V

1. PSU1

2. PSU2

3. JPWR1

4. JPWR2

10

2

PSU2

P1_DIMMD2

CPU1

CPU4

J25

P1_DIMMF2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

J12VSB

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

1

PSU1

P4_DIMMC2

P4_DIMMB1

FAN7

P4_DIMMC1

CPU4_PORT1

CPU4_PORT3

J24

J29

JPWR1

3

JPWR2

GPU POWER

4

JPWR3

5

JPWR4

6

JPWR5

BACKPLANE POWER

7

JPWR6

8

JPWR7

9

PCI-E 3.0 (RSC -48 Lanes)

5. JPWR3

6. JPWR4

7. JPWR5

8. JPWR6

9. JPWR7

10. 12V Standby

CPU3_PORT3 CPU3_PORT1

P3_DIMMF2

P3_DIMMF1

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

FAN5

FAN4

P3_DIMMA1

P3_DIMMA2

P3_DIMMB1

P3_DIMMC2

P3_DIMMB2

P3_DIMMC1

SXB4B

P4_DIMMF1

P4_DIMMF2

P4_DIMME1

P4_DIMME2

P4_DIMMD2

P4_DIMMD1

CPU4_PORT2

FAN1

FAN3

FAN2

SXB5BSXB5A

J30

48

Chapter 2: Installation

VGA

COM1

Fan Headers

Onboard Fan Header

This motherboard has ten fan headers (FAN1~FAN10) used for CPU/system cooling. These
are all 4-pin fan headers, which are backward compatible with a traditional 3-pin fan. The
onboard fan speed is controlled by Thermal Management (via Hardware Monitoring) in the
BIOS. Please use all 4-pin fans on the motherboard for better thermal management and
system cooling.

Fan Header

Pin Denitions

Pin# Denition

1 Ground (Black)

2 +12V (Red)

3 Tachometer

4 PWM Control

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

8

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

PCI-E 3.0 (RSC -56 Lanes)

J26

J27

CPU3_PORT3 CPU3_PORT1

SXB4B

P3_DIMMF2

P3_DIMME1

P3_DIMMF1

P2_DIMMA1

P2_DIMMB2

P3_DIMMD1

P3_DIMME2

P2_DIMMA2

6

FAN6

P3_DIMMD2

FAN5

5

SXB1A

10

J19

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

FAN10

FAN9

CPU2_PORT3

JWD1

WIO X8 (PCI-E 3.0)

FAN4

4

9

BMC_HB

JPG1

_LED1

CPLD

P2_DIMMD2

JITP1

P3_DIMMA2

UID

JUIDB1

LED1

BMC

PCH

P2_DIMMD1

P3_DIMMA1

BIOS

JBT1

P3_DIMMB2

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

P3_DIMMB1

P3_DIMMC2

IPMI_LAN

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

P3_DIMMC1

USB 2/3(3.0)

I-SATA4~7

I-SATA0~3S-SATA0~3

P1_DIMMC1

P4_DIMMF1

JUSB3

JUSB1

P1_DIMMB1

P1_DIMMC2

P4_DIMME1

P4_DIMMF2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P4_DIMME2

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

P4_DIMMD1

J21

SXB3A

J22

SXB3B

P1_DIMMA2

SXB3C

P4_DIMMD2

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

3

1. FAN1

2. FAN2

3. FAN3

4. FAN4

5. FAN5

PSU2

P1_DIMMD2

CPU1

CPU4

FAN3

J25

P1_DIMME1

P1_DIMMD1

P1_DIMME2

FAN1

FAN2

2

J12VSB

P1_DIMMF2

P1_DIMMF1

P4_DIMMA2

1

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMC2

P4_DIMMB1

7

FAN7

P4_DIMMC1

CPU4_PORT1

CPU4_PORT3

CPU4_PORT2

J24

J29

J30

JPWR1

JPWR2

GPU POWER

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

PCI-E 3.0 (RSC -48 Lanes)

SXB5BSXB5A

6. FAN6

7. FAN7

8. FAN8

9. FAN9

10. FAN10

49

Super X11QPH+ User's Manual

TPM Header

The JTPM1 header is used to connect a Trusted Platform Module (TPM)/Port 80, which is
available from a third-party vendor. TPM/Port 80 is a security device which supports encryption
and authentication in hard drives. It allows the motherboard to deny access if the TPM
associated with the hard drive is not installed in the system. See the layout drawing below
for the location of JTPM1.

RAID Key Header

A RAID Key header is located at JRK1 on the motherboard. The RAID key is used to support
onboard SATA connections.

JL1

JPME1

1

JRK1

2

JF1

CPU2_PORT3 CPU3_PORT2

PCI-E 3.0 (RSC -56 Lanes)

J26

CPU3_PORT3 CPU3_PORT1

USB0/1

JTPM1

LED2

SXB4A

J27

SXB4B

P2_DIMMC1

JUSB2

P3_DIMMF1

P2_DIMMB1

P2_DIMMC2

FAN8

P3_DIMMF2

P3_DIMME1

P2_DIMMA1

P2_DIMMB2

P3_DIMMD1

P3_DIMME2

P2_DIMMA2

FAN6

P3_DIMMD2

FAN5

SXB1A

FAN10

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

VGA

FAN9

JWD1

JPG1

WIO X8 (PCI-E 3.0)

JITP1

FAN4

UID

JUIDB1

LED1

BMC

BMC_HB
_LED1

CPLD

PCH

P2_DIMMD2

P2_DIMMD1

P3_DIMMA1

P3_DIMMA2

BIOS

JBT1

P3_DIMMB2

COM1

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

P3_DIMMB1

IPMI_LAN

S-SATA4

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

P3_DIMMC2

P3_DIMMC1

S-SATA5

I-SATA4~7

P1_DIMMC1

P4_DIMMF1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMB1

P1_DIMMC2

P4_DIMME1

P4_DIMMF2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P4_DIMME2

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

P4_DIMMD1

J21

SXB3A

J22

SXB3B

P1_DIMMA2

SXB3C

P4_DIMMD2

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

1. TPM/Port 80 Header

2. RAID Key Header

PSU2

P1_DIMMD2

CPU1

CPU4

FAN3

J25

P1_DIMME1

P1_DIMMD1

P1_DIMME2

FAN1

FAN2

J12VSB

P1_DIMMF2

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMB1

P4_DIMMC2

P4_DIMMC1

J24

JPWR1

JPWR2

JPWR3

JPWR4

JPWR5

JPWR6

JPWR7

FAN7

CPU4_PORT1

PCI-E 3.0 (RSC -48 Lanes)

CPU4_PORT3

J29

CPU4_PORT2

SXB5BSXB5A

J30

GPU POWER

BACKPLANE POWER

50

Chapter 2: Installation

Standby Power

The Standby Power header is located at JSTBY1 on the motherboard. You must have a card
with a Standby Power connector and a cable to use this feature. Refer to the table below

for pin denitions.

Standby Power

Pin Denitions

Pin# Denition

1 +5V Standby

2 Ground

3 No Connection

Chassis Intrusion

A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to

the table below for pin denitions.

Chassis Intrusion

Pin Denitions

Pin# Denition

1 Intrusion Input

2 Ground

JL1

JPME1

2

USB0/1

JRK1

JF1

LED2

CPU2_PORT3 CPU3_PORT2

PCI-E 3.0 (RSC -56 Lanes)

J26

CPU3_PORT3 CPU3_PORT1

JUSB2

JTPM1

SXB4A

J27

SXB4B

P2_DIMMC2

P2_DIMMC1

FAN8

P3_DIMMF2

P3_DIMMF1

P2_DIMMB2

P2_DIMMB1

P3_DIMME2

P3_DIMME1

P2_DIMMA2

P2_DIMMA1

P3_DIMMD1

FAN6

P3_DIMMD2

FAN5

SXB1A

J19

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

VGA

FAN10

FAN9

CPU2_PORT3

JWD1

WIO X8 (PCI-E 3.0)

FAN4

BMC_HB

JPG1

_LED1

CPLD

P2_DIMMD2

JITP1

P3_DIMMA2

UID

JUIDB1

LED1

BMC

PCH

P2_DIMMD1

P3_DIMMA1

BIOS

JBT1

P3_DIMMB2

COM1

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

P3_DIMMB1

IPMI_LAN

S-SATA4

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

P3_DIMMC2

P3_DIMMC1

S-SATA5

I-SATA4~7

P1_DIMMC1

P4_DIMMF1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMB1

P1_DIMMC2

P4_DIMME1

P4_DIMMF2

1

JSTBY1

USB 4(3.0)

P1_DIMMB2

P4_DIMME2

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

P4_DIMMD1

J21

SXB3A

J22

SXB3B

P1_DIMMA2

P4_DIMMD2

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

SXB3C

1. Standby Power

2. Chassis Intrusion

PSU2

P1_DIMMD2

CPU1

CPU4

FAN3

J25

P1_DIMMF2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

FAN1

FAN2

J12VSB

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMC2

P4_DIMMB1

FAN7

P4_DIMMC1

CPU4_PORT1

CPU4_PORT3

CPU4_PORT2

J24

J29

J30

JPWR1

JPWR2

GPU POWER

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

PCI-E 3.0 (RSC -48 Lanes)

SXB5BSXB5A

51

Super X11QPH+ User's Manual

GPU POWER

PCI-E 3.0 (RSC -56 Lanes)

SATA Power Connectors

The SATA power connectors at JSD1 and JSD2 provide 5V power to onboard SATA devices.

Refer to the table below for pin denitions.

SATA Power

Pin Denitions

Pin# Denition

1 5V

2 Ground

3 Ground

COM1

VGA

SXB1A

FAN10

FAN9

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

JWD1

JPG1

WIO X8 (PCI-E 3.0)

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

J26

J27

CPU3_PORT3 CPU3_PORT1

P3_DIMMF2

P3_DIMMF1

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

SXB4B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

FAN5

FAN4

LED1

BMC_HB
_LED1

CPLD

P2_DIMMD2

JITP1

P3_DIMMA2

UID

JUIDB1

BMC

BIOS

JBT1

PCH

P2_DIMMD1

P3_DIMMA1

P3_DIMMB2

1

P2_DIMME2

J17

JSD1

P2_DIMME1

P2_DIMMF2

IPMI CODE

BAR CODE

P3_DIMMB1

P3_DIMMC2

IPMI_LAN

S-SATA4

JSD2

P3_DIMMC1

S-SATA5

I-SATA4~7

2

P2_DIMMF1

P1_DIMMC1

P4_DIMMF1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMC2

P4_DIMMF2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P1_DIMMB1

P4_DIMME1

P4_DIMME2

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

P4_DIMMD1

J21

SXB3A

J22

SXB3B

P1_DIMMA2

P4_DIMMD2

J23

SXB3C

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

FAN3

PSU2

CPU1

CPU4

J25

P1_DIMMD2

P1_DIMMD1

P1_DIMME2

FAN2

J12VSB

P1_DIMMF2

P1_DIMME1

P1_DIMMF1

FAN1

P4_DIMMA2

P4_DIMMA1

PSU1

P4_DIMMB2

P4_DIMMB1

P4_DIMMC2

P4_DIMMC1

J24

JPWR1

JPWR2

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

FAN7

CPU4_PORT1

PCI-E 3.0 (RSC -48 Lanes)

CPU4_PORT3

J29

CPU4_PORT2

SXB5BSXB5A

J30

1. JSD1

2. JSD2

52

Chapter 2: Installation

VGA

COM1

I-SATA 3.0 and S-SATA 3.0 Ports

The X11QPH+ has eight I-SATA 3.0 ports (I-SATA0-3, I-SATA4-7) and six S-SATA (S-SATA0-3,
S-SATA4, S-SATA5) on the motherboard. The I-SATA ports are supported by the Intel C621
chipset, and the S-SATA ports are supported by Intel SCU. S-SATA4/S-SATA5 can be used
with Supermicro SuperDOMs which are yellow SATA DOM connectors with power pins built in,

and do not require external power cables. Supermicro SuperDOMs are backward-compatible

with regular SATA HDDs or SATA DOMs that need external power cables. All these SATA ports
provide serial-link signal connections, which are faster than the connections of Parallel ATA.

SATA 3.0 Port

Pin Denitions

Pin# Signal

1 Ground

2 SATA_TXP

3 SATA_TXN

4 Ground

5 SATA_RXN

6 SATA_RXP

7 Ground

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

PCI-E 3.0 (RSC -56 Lanes)

J26

J27

CPU3_PORT3 CPU3_PORT1

SXB4B

P3_DIMMF2

P3_DIMME1

P3_DIMMF1

P2_DIMMA1

P2_DIMMB2

P3_DIMMD1

P3_DIMME2

P2_DIMMA2

FAN6

P3_DIMMD2

FAN5

SXB1A

J19

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

FAN10

FAN9

CPU2_PORT3

JWD1

WIO X8 (PCI-E 3.0)

FAN4

BMC_HB

JPG1

_LED1

CPLD

JITP1

P3_DIMMA2

UID

JUIDB1

LED1

BMC

PCH

P2_DIMMD2

P2_DIMMD1

P3_DIMMA1

BIOS

JBT1

P3_DIMMB2

J17

4

3

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

P3_DIMMB1

IPMI_LAN

S-SATA4

JSD2

JSD1

P2_DIMMF2

P3_DIMMC2

P3_DIMMC1

5

S-SATA5

I-SATA4~7

P2_DIMMF1

P1_DIMMC1

P4_DIMMF1

USB 2/3(3.0)

JUSB3

JUSB1

2

I-SATA0~3S-SATA0~3

P1_DIMMB1

P1_DIMMC2

P4_DIMME1

P4_DIMMF2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P4_DIMME2

JBAT1

1

P1_DIMMA1

X11QPH+

REV.1.01

P4_DIMMD1

J21

SXB3A

J22

SXB3B

P1_DIMMA2

SXB3C

P4_DIMMD2

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

1. I-SATA0-3

2. I-SATA4-7

3. S-SATA0-3

4. S-SATA4

5. S-SATA5

PSU2

P1_DIMMD2

CPU1

CPU4

FAN3

J25

P1_DIMME1

P1_DIMMD1

P1_DIMME2

FAN1

FAN2

J12VSB

P1_DIMMF2

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMC2

P4_DIMMB1

FAN7

P4_DIMMC1

CPU4_PORT1

CPU4_PORT3

CPU4_PORT2

J24

JPWR1

JPWR2

GPU POWER

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

PCI-E 3.0 (RSC -48 Lanes)

J29

SXB5BSXB5A

J30

53

Super X11QPH+ User's Manual

2.7 Jumper Settings

How Jumpers Work

To modify the operation of the motherboard, jumpers can be used to choose between optional
settings. Jumpers create shorts between two pins to change the function of the connector.

Pin 1 is identied with a square solder pad on the printed circuit board. See the diagram

at right for an example of jumping pins 1 and 2. Refer to the motherboard layout page for
jumper locations.

Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the
jumper is off the pins.

Connector

Pins

Jumper

Setting

3 2 1

3 2 1

54

Chapter 2: Installation

COM1

GPU POWER

PCI-E 3.0 (RSC -56 Lanes)

CMOS Clear

JBT1 is used to clear CMOS, which will also clear any passwords. Instead of pins, this jumper
consists of contact pads to prevent accidentally clearing the contents of CMOS.

To Clear CMOS

1. First power down the system and unplug the power cord(s).

2. Remove the cover of the chassis to access the motherboard.

3. Remove the onboard battery from the motherboard.

4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds.

5. Remove the screwdriver (or shorting device).

6. Replace the cover, reconnect the power cord(s), and power on the system.

Note: Clearing CMOS will also clear all passwords.

Do not use the PW_ON connector to clear CMOS.

VGA

SXB1A

FAN10

FAN9

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

JWD1

JPG1

BIOS
LICENSE

WIO X8 (PCI-E 3.0)

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

CPU2

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

BMC_HB
_LED1

CPLD

P2_DIMMD2

JITP1

UID

JUIDB1

LED1

BMC

PCH

BIOS

JBT1

P2_DIMMD1

J17

1

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

IPMI_LAN

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

I-SATA4~7

P1_DIMMC1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMB1

P1_DIMMC2

JSTBY1

USB 4(3.0)

P1_DIMMB2

JBAT1

P1_DIMMA1

X11QPH+

SXB3A

J22

SXB3B

P1_DIMMA2

REV.1.01

J21

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

PSU2

CPU1_PORT2

P1_DIMMD2

J23

SXB3C

CPU1

J25

P1_DIMMF2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

J12VSB

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMB1

P4_DIMMC2

P4_DIMMC1

J24

FAN7

CPU4_PORT1

JPWR1

JPWR2

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

JBT1 contact pads

1. Clear CMOS

CPU3

J26

J27

CPU3_PORT3 CPU3_PORT1

P3_DIMMF2

P3_DIMMF1

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

FAN5

FAN4

P3_DIMMA1

P3_DIMMA2

P3_DIMMB1

P3_DIMMC2

P3_DIMMB2

SXB4B

P3_DIMMC1

P4_DIMMF1

P4_DIMME1

P4_DIMMF2

P4_DIMMD1

P4_DIMME2

P4_DIMMD2

PCI-E 3.0 (RSC -48 Lanes)

CPU4

FAN1

FAN3

FAN2

CPU4_PORT3

J29

CPU4_PORT2

SXB5BSXB5A

J30

55

Super X11QPH+ User's Manual

GPU POWER

PCI-E 3.0 (RSC -56 Lanes)

Power-Failure Throttling Enable/Disable

The Power-Failure Throttling jumper is located at J17. Close pins 1-2 of J17 to enable power
throttling feature. The default setting is the close pins 2-3 for normal operation. See the jumper
setting table below.

Power-Failure Throttling

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Normal

1. Power-Failure Throttling

COM1

VGA

SXB1A

FAN10

FAN9

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

JWD1

JPG1

WIO X8 (PCI-E 3.0)

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

BIOS
LICENSE

SXB1C

J20

CPU2

CPU3

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

J26

J27

BMC_HB
_LED1

CPLD

P2_DIMMD2

JITP1

UID

JUIDB1

LED1

BMC

PCH

BIOS

JBT1

P2_DIMMD1

1

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

IPMI_LAN

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

I-SATA4~7

P1_DIMMC1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMB1

P1_DIMMC2

JSTBY1

USB 4(3.0)

P1_DIMMB2

JBAT1

P1_DIMMA1

X11QPH+

SXB3A

J22

SXB3B

P1_DIMMA2

REV.1.01

J21

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

PSU2

CPU1_PORT2

P1_DIMMD2

J23

SXB3C

CPU1

CPU4

J25

P1_DIMMF2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

J12VSB

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMB1

P4_DIMMC2

P4_DIMMC1

J24

JPWR1

JPWR2

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

FAN7

CPU4_PORT1

PCI-E 3.0 (RSC -48 Lanes)

CPU4_PORT3

J29

Enable

CPU3_PORT3 CPU3_PORT1

P3_DIMMF2

P3_DIMMF1

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

FAN5

FAN4

P3_DIMMA1

P3_DIMMA2

P3_DIMMB1

P3_DIMMC2

P3_DIMMB2

SXB4B

P3_DIMMC1

P4_DIMMF1

P4_DIMME1

P4_DIMMF2

P4_DIMMD1

P4_DIMME2

P4_DIMMD2

CPU4_PORT2

FAN1

FAN3

FAN2

SXB5BSXB5A

J30

56

Chapter 2: Installation

GPU POWER

PCI-E 3.0 (RSC -56 Lanes)

Management Engine (ME) Recovery

Use jumper JPME1 to select ME Firmware Recovery mode, which will limit resource
allocation for essential system operation only in order to maintain normal power operation
and management. In the single operation mode, online upgrade will be available via Recovery
mode. See the table below for jumper settings.

Manufacturer Mode

Jumper Settings

Jumper Setting Denition

Pins 1-2 Normal

Pins 2-3 ME Recovery

COM1

VGA

SXB1A

FAN10

FAN9

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

JWD1

JPG1

WIO X8 (PCI-E 3.0)

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

1

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

J26

J27

CPU3_PORT3 CPU3_PORT1

P3_DIMMF2

P3_DIMMF1

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

SXB4B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

FAN5

FAN4

LED1

BMC_HB
_LED1

CPLD

P2_DIMMD2

JITP1

P3_DIMMA2

UID

JUIDB1

BMC

JBT1

PCH

P2_DIMMD1

P3_DIMMA1

BIOS

P2_DIMME2

P3_DIMMB1

P3_DIMMB2

J17

JSD1

P2_DIMME1

P2_DIMMF2

IPMI CODE

BAR CODE

P3_DIMMC2

IPMI_LAN

S-SATA4

JSD2

P3_DIMMC1

S-SATA5

I-SATA4~7

P2_DIMMF1

P1_DIMMC1

P4_DIMMF1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMB1

P1_DIMMC2

P4_DIMME1

P4_DIMMF2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P4_DIMME2

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

P4_DIMMD1

J21

SXB3A

J22

SXB3B

P1_DIMMA2

SXB3C

P4_DIMMD2

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

FAN3

PSU2

CPU1

CPU4

J25

P1_DIMMD2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

FAN1

FAN2

J12VSB

P1_DIMMF2

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMC2

P4_DIMMB1

FAN7

P4_DIMMC1

CPU4_PORT1

CPU4_PORT3

CPU4_PORT2

J24

J29

J30

JPWR1

JPWR2

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

PCI-E 3.0 (RSC -48 Lanes)

SXB5BSXB5A

1. ME Recovery

57

Super X11QPH+ User's Manual

VGA

COM1

PCI-E 3.0 (RSC -56 Lanes)

Watch Dog

JWD1 controls the Watch Dog function. Watch Dog is a monitor that can reboot the system
when a software application hangs. Jumping pins 1-2 will cause Watch Dog to reset the
system if an application hangs. Jumping pins 2-3 will generate a non-maskable interrupt
signal for the application that hangs. Watch Dog must also be enabled in BIOS. The default
setting is Reset.

Note: When Watch Dog is enabled, the user needs to write their own application
software to disable it.

Watch Dog

Jumper Settings

Jumper Setting Denition

Pins 1-2 Reset

Pins 2-3 NMI

Open Disabled

IPMI_LAN

BIOS

JBT1

P3_DIMMB2

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

P3_DIMMB1

P3_DIMMC2

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

P3_DIMMC1

I-SATA4~7

P1_DIMMC1

P4_DIMMF1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMC2

P4_DIMMF2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P1_DIMMB1

P4_DIMME1

P4_DIMME2

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

P4_DIMMD1

J21

SXB3A

J22

SXB3B

P1_DIMMA2

SXB3C

P4_DIMMD2

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

FAN3

1. Watch Dog

PSU2

P1_DIMMD2

CPU1

CPU4

J25

P1_DIMME1

P1_DIMMD1

P1_DIMME2

FAN1

FAN2

J12VSB

P1_DIMMF2

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMC2

P4_DIMMB1

FAN7

P4_DIMMC1

CPU4_PORT1

CPU4_PORT3

CPU4_PORT2

J24

J29

J30

JPWR1

JPWR2

GPU POWER

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

PCI-E 3.0 (RSC -48 Lanes)

SXB5BSXB5A

UID

SXB1A

JUIDB1

LED1

FAN10

FAN9

CPU2_PORT3

WIO X8 (PCI-E 3.0)

SXB2

SXB1B

SXB1C

BMC

1

BMC_HB

JWD1

JPG1

_LED1

CPLD

PCH

P2_DIMMD2

P2_DIMMD1

JITP1

FAN4

P3_DIMMA1

P3_DIMMA2

J19

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

CPU2_PORT2CPU2_PORT1

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

J26

J27

CPU3_PORT3 CPU3_PORT1

SXB4B

P3_DIMMF2

P3_DIMMD1

P3_DIMME2

P3_DIMME1

P3_DIMMF1

FAN6

P3_DIMMD2

J20

CPU2

BIOS
LICENSE

CPU3

FAN5

58

Chapter 2: Installation

GPU POWER

PCI-E 3.0 (RSC -56 Lanes)

VGA Enable/Disable

JPG1 allows you to enable or disable the VGA port, which is supported by the onboard BMC
controller. The default setting is Enabled.

VGA Enable/Disable

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Disabled

COM1

VGA

SXB1A

FAN10

FAN9

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

JWD1

JPG1

WIO X8 (PCI-E 3.0)

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

J26

J27

CPU3_PORT3 CPU3_PORT1

P3_DIMMF2

P3_DIMMF1

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

SXB4B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

FAN5

FAN4

LED1

BMC_HB
_LED1

CPLD

P2_DIMMD2

JITP1

P3_DIMMA2

UID

JUIDB1

BMC

1

BIOS

JBT1

PCH

P2_DIMMD1

P3_DIMMA1

J17

P2_DIMME2

P3_DIMMB1

P3_DIMMB2

S-SATA4

JSD1

P2_DIMME1

P2_DIMMF2

IPMI CODE

BAR CODE

P3_DIMMC2

IPMI_LAN

S-SATA5

JSD2

P2_DIMMF1

P3_DIMMC1

I-SATA4~7

P1_DIMMC1

P4_DIMMF1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMB1

P1_DIMMC2

P4_DIMME1

P4_DIMMF2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P4_DIMME2

JBAT1

P1_DIMMA1

X11QPH+

P4_DIMMD1

J21

SXB3A

J22

SXB3B

P1_DIMMA2

REV.1.01

P4_DIMMD2

SXB3C

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

PSU2

P1_DIMMD2

CPU1

CPU4

FAN3

J25

P1_DIMMF2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

FAN1

FAN2

J12VSB

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMB1

P4_DIMMC2

P4_DIMMC1

J24

JPWR1

JPWR2

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

FAN7

CPU4_PORT1

PCI-E 3.0 (RSC -48 Lanes)

CPU4_PORT3

J29

CPU4_PORT2

SXB5BSXB5A

J30

1. JPG1

59

Super X11QPH+ User's Manual

2.8 LED Indicators

IPMI_LAN LEDs

An IPMI-dedicated LAN, supported by
the onboard Baseboard Management
controller, is located on the I/O back panel.
The amber LED on the right indicates
activity, while the green LED on the left
indicates the speed of the connection. See
the table at right for more information.

IPMI LAN

Link LED

Activity LED

IPMI LAN Link LED (Left) &

Activity LED (Right)

Color State Denition

Link (Left) Green: Solid 1 Gbps

Activity (Right) Amber:

Blinking

Active

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

PCI-E 3.0 (RSC -56 Lanes)

J26

J27

CPU3_PORT3 CPU3_PORT1

SXB4B

P3_DIMMF2

P3_DIMME1

P3_DIMMF1

P2_DIMMA1

P2_DIMMB2

P3_DIMMD1

P3_DIMME2

P2_DIMMA2

FAN6

P3_DIMMD2

FAN5

SXB1A

J19

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

VGA

FAN10

FAN9

CPU2_PORT3

JWD1

WIO X8 (PCI-E 3.0)

FAN4

BMC_HB

JPG1

_LED1

CPLD

P2_DIMMD2

JITP1

P3_DIMMA2

UID

JUIDB1

LED1

BMC

PCH

P3_DIMMA1

BIOS

JBT1

P2_DIMMD1

P3_DIMMB2

COM1

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

P3_DIMMB1

P3_DIMMC2

1

IPMI_LAN

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

P3_DIMMC1

USB 2/3(3.0)

JUSB3

I-SATA4~7

I-SATA0~3S-SATA0~3

P1_DIMMC1

P4_DIMMF1

JUSB1

P1_DIMMB1

P1_DIMMC2

P4_DIMME1

P4_DIMMF2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P4_DIMME2

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

P4_DIMMD1

J21

SXB3A

J22

SXB3B

P1_DIMMA2

SXB3C

P4_DIMMD2

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

FAN3

1. IPMI LAN LEDs

PSU2

P1_DIMMD2

CPU1

CPU4

J25

P1_DIMME1

P1_DIMMD1

P1_DIMME2

FAN1

FAN2

J12VSB

P1_DIMMF2

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMB1

P4_DIMMC2

P4_DIMMC1

J24

JPWR1

JPWR2

GPU POWER

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

FAN7

CPU4_PORT1

PCI-E 3.0 (RSC -48 Lanes)

CPU4_PORT3

J29

CPU4_PORT2

SXB5BSXB5A

J30

1

60

Chapter 2: Installation

VGA

COM1

GPU POWER

PCI-E 3.0 (RSC -56 Lanes)

BMC Heartbeat LED

BMC_HB_LED1 is the BMC heartbeat LED. When the LED is blinking green, BMC is
functioning normally. See the table below for the LED status.

Onboard Power LED Indicator

LED Color Denition

Green:

Blinking

BMC Normal

Onboard Power LED

The Onboard Power LED is located at LED2 on the motherboard. When this LED is on, the
system is on. Be sure to turn off the system and unplug the power cord before removing or
installing components. Refer to the table below for more information.

Onboard Power LED Indicator

LED Color Denition

System Off

Off

(power cable not

connected)

Green System On

IPMI_LAN

BIOS

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

I-SATA4~7

P1_DIMMC1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMB1

P1_DIMMC2

JSTBY1

USB 4(3.0)

P1_DIMMB2

JBAT1

P1_DIMMA1

X11QPH+

SXB3A

J22

SXB3B

P1_DIMMA2

REV.1.01

1. BMC Heartbeat LED

2. Onboard Power LED

J21

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

PSU2

CPU1_PORT2

P1_DIMMD2

J23

SXB3C

CPU1

J25

P1_DIMMF2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

J12VSB

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMB1

P4_DIMMC2

P4_DIMMC1

J24

FAN7

CPU4_PORT1

JPWR1

JPWR2

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

UID

SXB1A

JUIDB1

LED1

FAN10

FAN9

CPU2_PORT3

WIO X8 (PCI-E 3.0)

SXB2

SXB1B

SXB1C

BMC

1

BMC_HB

JWD1

JPG1

_LED1

CPLD

JBT1

PCH

P2_DIMMD2

P2_DIMMD1

JITP1

J19

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

CPU2_PORT2CPU2_PORT1

P2_DIMMA2

P2_DIMMA1

P2_DIMMB2

P2_DIMMB1

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

BIOS
LICENSE

J20

CPU2

CPU3

J26

J27

CPU3_PORT3 CPU3_PORT1

P3_DIMMF2

P3_DIMMF1

P3_DIMME2

P3_DIMME1

P3_DIMMD2

P3_DIMMD1

FAN6

FAN5

FAN4

P3_DIMMA1

P3_DIMMA2

P3_DIMMB1

P3_DIMMC2

P3_DIMMB2

SXB4B

P3_DIMMC1

P4_DIMMF1

P4_DIMME1

P4_DIMMF2

P4_DIMMD1

P4_DIMME2

P4_DIMMD2

PCI-E 3.0 (RSC -48 Lanes)

CPU4

FAN1

FAN3

FAN2

CPU4_PORT3

J29

CPU4_PORT2

SXB5BSXB5A

J30

61

Super X11QPH+ User's Manual

Unit ID LED

A rear UID LED indicator (LED1) is located near the UID switch on the I/O back panel. This

UID indicator provides easy identication of a system.unit that may need service.

UID LED

LED Indicator

LED Color Denition

Blue: On Unit Identied

P2_DIMMC2

P2_DIMMC1

JL1

JPME1

USB0/1

JUSB2

JTPM1

JRK1

JF1

LED2

FAN8

SXB4A

CPU2_PORT3 CPU3_PORT2

PCI-E 3.0 (RSC -56 Lanes)

J26

J27

CPU3_PORT3 CPU3_PORT1

SXB4B

P3_DIMMF2

P3_DIMME1

P3_DIMMF1

P2_DIMMB2

P2_DIMMB1

P3_DIMME2

P2_DIMMA2

P2_DIMMA1

P3_DIMMD2

P3_DIMMD1

1

COM1

VGA

SXB1A

FAN10

FAN9

J19

CPU2_PORT3

JPCIE1

WIO 2x16 (PCI-E 3.0)

J18

JWD1

JPG1

WIO X8 (PCI-E 3.0)

SXB2

CPU2_PORT2CPU2_PORT1

SXB1B

SXB1C

J20

CPU2

BIOS
LICENSE

CPU3

FAN6

FAN5

FAN4

LED1

BMC_HB
_LED1

CPLD

P2_DIMMD2

JITP1

P3_DIMMA2

UID

JUIDB1

BMC

BIOS

JBT1

PCH

P2_DIMMD1

P3_DIMMA1

P3_DIMMB2

J17

P2_DIMME2

P2_DIMME1

IPMI CODE

BAR CODE

P3_DIMMB1

P3_DIMMC2

IPMI_LAN

S-SATA4

S-SATA5

JSD2

JSD1

P2_DIMMF1

P2_DIMMF2

P3_DIMMC1

I-SATA4~7

P1_DIMMC1

P4_DIMMF1

USB 2/3(3.0)

JUSB3

JUSB1

I-SATA0~3S-SATA0~3

P1_DIMMC2

P4_DIMMF2

JSTBY1

USB 4(3.0)

P1_DIMMB2

P1_DIMMB1

P4_DIMME1

P4_DIMME2

JBAT1

P1_DIMMA1

X11QPH+

REV.1.01

P4_DIMMD1

J21

SXB3A

J22

SXB3B

P1_DIMMA2

SXB3C

P4_DIMMD2

CPU1_PORT3

Ultra IO X40

CPU1_PORT1

CPU1_PORT2

J23

PSU2

P1_DIMMD2

CPU1

CPU4

FAN3

J25

P1_DIMMF2

P1_DIMME1

P1_DIMMD1

P1_DIMME2

FAN1

FAN2

J12VSB

P1_DIMMF1

P4_DIMMA2

P4_DIMMB2

P4_DIMMA1

PSU1

P4_DIMMC2

P4_DIMMB1

FAN7

P4_DIMMC1

CPU4_PORT1

CPU4_PORT3

CPU4_PORT2

J24

J29

J30

JPWR1

JPWR2

GPU POWER

JPWR3

JPWR4

JPWR5

BACKPLANE POWER

JPWR6

JPWR7

PCI-E 3.0 (RSC -48 Lanes)

SXB5BSXB5A

1. UID LED

62

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing or installing any non hot-swap hardware components.

Before Power On

1. Check that the power LED on the motherboard is on.

2. Make sure that the power connector is connected to your power supply.

3. Make sure that no short circuits exist between the motherboard and chassis.

4. Disconnect all cables from the motherboard, including those for the keyboard and
mouse.

5. Remove all add-on cards.

6. Install a CPU, a heatsink*, and connect the internal speaker and the power LED to the
motherboard. Check all jumper settings as well. (Make sure that the heatsink is fully
seated.)

7. Use the correct type of onboard CMOS battery (CR2032) as recommended by the
manufacturer. To avoid possible explosion, do not install the CMOS battery upside down.

No Power

1. Make sure that no short circuits exist between the motherboard and the chassis.

2. Verify that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and off to test the system.

5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

63

Super X11QPH+ User's Manual

No Video

1. If the power is on but you have no video, remove all the add-on cards and cables.

2. Use the speaker to determine if any beep codes exist. Refer to Appendix A for details on
beep codes.

Note: If you are a system integrator, VAR or OEM, a POST diagnostics card is recom­mended. For I/O port 80h codes, refer to Appendix B.

System Boot Failure

If the system does not display POST (Power-On-Self-Test) or does not respond
after the power is turned on, check the following:

1. Check for any error beep from the motherboard speaker.

• If there is no error beep, try to turn on the system without DIMM modules installed. If there

is still no error beep, replace the motherboard.

• If there are error beeps, clear the CMOS settings by unplugging the power cord and

contacting both pads on the CMOS Clear Jumper (JBT1). Refer to chapter 2.

2. Remove all components from the motherboard, especially the DIMM modules. Make
sure that system power is on and that memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system boots, check for
bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure
in this Chapter.

Memory Errors

1. Make sure that the DIMM modules are properly and fully installed.

2. Conrm that you are using the correct memory. Also, it is recommended that you use
the same memory type and speed for all DIMMs in the system. See Section 2.4 for
memory details.

3. Check for bad DIMM modules or slots by swapping modules between slots and noting
the results.

4. Check the power supply voltage 115V/230V switch.

64

Chapter 3: Troubleshooting

Losing the System's Setup Conguration

1. Make sure that you are using a high quality power supply. A poor quality power supply
may cause the system to lose the CMOS setup information. Refer to Section 1.5 for
details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the setup conguration problem, contact your vendor for
repairs.

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the following:

1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.

Note: Refer to the product page on our website at http:\\www.supermicro.com for
memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.

4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.

5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.

6. Proper software support: Make sure that the correct drivers are used.

B. If the system becomes unstable before or during OS installation, check the following:

1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD/DVD and CD/DVD-ROM.

2. Cable connection: Check to make sure that all cables are connected and working
properly.

65

Super X11QPH+ User's Manual

3. Using the minimum conguration for troubleshooting: Remove all unnecessary

components (starting with add-on cards rst), and use the minimum conguration (but

with a CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.

4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.

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Chapter 3: Troubleshooting

3.2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, note that as a

motherboard manufacturer, we do not sell directly to end-users, so it is best to rst check with

your distributor or reseller for troubleshooting services. They should know of any possible

problem(s) with the specic system conguration that was sold to you.

1. Please review the ‘Troubleshooting Procedures’ and 'Frequently Asked Questions'
(FAQs) sections in this chapter or see the FAQs on our website before contacting
Technical Support.

2. BIOS upgrades can be downloaded from our website. Note: Not all BIOS can be

ashed depending on the modications to the boot block code.

3. If you still cannot resolve the problem, include the following information when contacting
us for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your system rst

boots up)

• System conguration

An example of a Technical Support form is posted on our website.

Distributors: For immediate assistance, please have your account number ready when
contacting our technical support department by e-mail.

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3.3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: This motherboard supports up to 6 TB of DDR4 3DS LRDIMM/LRDIMM/RDIMM ECC

(288-pin) 2666/2400/2133 MHz modules in 48 slots. See Section 2.4 for details on installing
memory.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website at http://www.

supermicro.com. Please check our BIOS warning message and the information on how to

update your BIOS on our website. Select your motherboard model and download the BIOS

le to your computer. Also, check the current BIOS revision to make sure that it is newer
than your BIOS before downloading. You can choose from the zip le and the .exe le. If
you choose the zip BIOS le, please unzip the BIOS le onto a bootable USB device. Run
the batch le using the format FLASH.BAT lename.rom from your bootable USB device to
ash the BIOS. Then, your system will automatically reboot.

Question: Why can't I turn off the power using the momentary power on/off switch?

Answer: The instant power off function is controlled in BIOS by the Power Button Mode

setting. When the On/Off feature is enabled, the motherboard will have instant off capabilities
as long as the BIOS has control of the system. When the Standby or Suspend feature is

enabled or when the BIOS is not in control such as during memory count (the rst screen

that appears when the system is turned on), the momentary on/off switch must be held for
more than four seconds to shut down the system. This feature is required to implement the
ACPI features on the motherboard.

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Chapter 3: Troubleshooting

3.4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Locate the onboard battery as shown below.

3. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.

4. Remove the battery.

Proper Battery Disposal

Please handle used batteries carefully. Do not damage the battery in any way; a damaged
battery may release hazardous materials into the environment. Do not discard a used battery

in the garbage or a public landll. Please comply with the regulations set up by your local

hazardous waste management agency to dispose of your used battery properly.

Battery Installation

1. To install an onboard battery, follow the steps 1 & 2 above and continue below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.

Important: When replacing a battery, be sure to only replace it with the same type.

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3.5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service will be rendered. You can obtain service by calling your vendor for a Returned
Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton and mailed
prepaid or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete.

For faster service, RMA authorizations may be requested online (http://www.supermicro.com/

support/rma/).

This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failure due to the alteration, misuse, abuse or improper maintenance of
products.

During the warranty period, contact your distributor rst for any product problems.

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Chapter 4: BIOS

Chapter 4

BIOS

4.1 Introduction

This chapter describes the AMIBIOS™ Setup utility for theX11QPH+ motherboard. The BIOS

is stored on a chip and can be easily upgraded using a ash program.

Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual

Download area of our website for any changes to BIOS that may not be reected in

this manual.

Starting the Setup Utility

To enter the BIOS setup utility, press the <Delete> key while the system is booting up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.

The Main BIOS screen has two main frames. The left frame displays all the options that can

be congured. “Grayed-out” options cannot be congured. The right frame displays the key

legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that BIOS has default text messages built in. We retain the option to include, omit, or
change any of these text messages.) Settings printed in Bold are the default values.

A "" indicates a submenu. Highlighting such an item and pressing the <Enter> key will
open the list of settings within that submenu.

The BIOS setup utility uses a key-based navigation system called hot keys. Most of these

hot keys (<F1>, <F10>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time during
the setup navigation process.

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4.2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can

always return to the Main setup screen by selecting the Main tab on the top of the screen. The
Main BIOS setup screen is shown below. The following Main menu items will be displayed:

System Date/System Time

Use this feature to change the system date and time. Highlight System Date or System
Time using the arrow keys on the keyboard. Press the <Tab> key or the arrow keys to move

between elds. The date must be entered in Day MM/DD/YYYY format. The time is entered

in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.
The date's default value is 01/01/2014 after RTC reset.

Supermicro X11QPH+

BIOS Version

This item displays the version of the BIOS ROM used in the system.

Build Date

This item displays the date when the version of the BIOS ROM used in the system was built.

CPLD Version

This item displays the version of the CPLD (Complex-Programmable Logical Device) used

in the system.

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Chapter 4: BIOS

Memory Information

Total Memory

This item displays the total size of memory available in the system.

Memory Speed

This item displays the default speed of the memory modules installed in the system.

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Super X11QPH+ User's Manual

4.3 Advanced Setup Congurations

Use the arrow keys to select the Advanced submenu and press <Enter> to access the
submenu items:

Warning: Take Caution when changing the Advanced settings. An incorrect value, an incorrect

DRAM frequency, or an incorrect BIOS timing setting may cause the system to malfunction.

When this occurs, restore the setting to the manufacture default setting.



Boot Feature

Quiet Boot

Use this feature to select the screen between displaying POST messages or the OEM logo
at bootup. Select Disabled to display the POST messages. Select Enabled to display the
OEM logo instead of the normal POST messages. The options are Enabled and Disabled.

Note: POST message is always displayed regardless of the setting of this item.

Option ROM Messages

Use this feature to set the display mode for the Option ROM. Select Keep Current to use
the current AddOn ROM display setting. Select Force BIOS to use the Option ROM display

mode set by the system BIOS. The options are Force BIOS and Keep Current.

Bootup NumLock State

Use this feature to set the Power-on state for the Numlock key. The options are Off and On.

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Chapter 4: BIOS

Wait For 'F1' If Error

Select Enabled to force the system to wait until the 'F1' key is pressed if an error occurs. The
options are Disabled and Enabled.

Interrupt 19 Trap Capture

Interrupt 19 is the software interrupt that handles the boot disk function. When this item is

set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup

immediately and allow the drives that are attached to these host adaptors to function as

bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not

capture Interrupt 19 immediately and allow the drives attached to these adaptors to function
as bootable devices at bootup. The options are Immediate and Postponed.

Re-try Boot

When EFI (Expansible Firmware Interface) Boot is selected, the system BIOS will automatically
reboot the system from an EFI boot device after an initial boot failure. Select Legacy Boot to
allow the BIOS to automatically reboot the system from a Legacy boot device after an initial
boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Power Conguration

Watch Dog Function

Select Enabled to allow the Watch Dog timer to reboot the system when it is inactive for more

than 5 minutes. The options are Enabled and Disabled.

Power Button Function

This feature controls how the system shuts down when the power button is pressed. Select 4
Seconds Override for the user to power off the system after pressing and holding the power
button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon
as the user presses the power button. The options are 4 Seconds Override and Instant Off.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Power-Off for
the system power to remain off after a power loss. Select Power-On for the system

power to be turned on after a power loss. Select Last State to allow the system

to resume its last power state before a power loss. The options are Power-On,
Stay-Off and Last State.

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Super X11QPH+ User's Manual



CPU Conguration

Warning: Setting the wrong values in the features below may cause the system to malfunction.



Processor Conguration

The following CPU information will be displayed:

• Processor BSP Revision

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• Processor 1 Version/ Processor 2 Version/Processor 3 Version/Processor 4 Version

Hyper-Threading (ALL)

Select Enable to use Intel Hyper-Threading Technology to enhance CPU performance. The

options are Enable and Disable.

Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enable to enable Execute Disable Bit support which will allow the processor to
designate areas in the system memory where an application code can execute and where

it cannot, thus preventing a worm or a virus from ooding illegal codes to overwhelm the

processor, damaging the system during a virus attack. The options are Enable and Disable.

(Refer to Intel and Microsoft websites for more information.)

Intel Virtualization Technology

Select Enable to use Intel Virtualization Technology which will allow the I/O device assignments
to be directly reported to the VMM (Virtual Memory Management) through the DMAR ACPI
tables. This feature offers fully-protected I/O resource-sharing across the Intel platforms,
providing the user with greater reliability, security and availability in networking and data-

sharing. The settings are Enable and Disable.

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.
The options are Unlock/Enable and Unlock/Disable.

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Hardware Prefetcher (Available when supported by the CPU)

If this feature is set to Enable, the hardware prefetcher will prefetch streams of data and
instructions from the main memory to the Level 2 (L2) cache to improve CPU performance.
The options are Disable and Enable.

Adjacent Cache Prefetch (Available when supported by the CPU)

Select Enable for the CPU to prefetch both cache lines for 128 bytes as comprised. Select
Disable for the CPU to prefetch both cache lines for 64 bytes. The options are Disable and

Enable.

Note: Please power off and reboot the system for the changes you've made to take

effect. Please refer to Intel’s website for detailed information.

DCU Streamer Prefetcher (Available when supported by the CPU)

If this feature is set to Enable, the DCU (Data Cache Unit) streamer prefetcher will prefetch
data streams from the cache memory to the DCU (Data Cache Unit) to speed up data
accessing and processing for CPU performance enhancement. The options are Disable and

Enable.

DCU IP Prefetcher

If this feature is set to Enable, the IP prefetcher in the DCU (Data Cache Unit) will prefetch
IP addresses to improve network connectivity and system performance. The options are

Enable and Disable.

LLC Prefetch

If this feature is set to Enable, LLC (hardware cache) prefetching on all threads will be
supported. The options are Disable and Enable.

Extended APIC (Extended Advanced Programmable Interrupt Controller)

Based on the Intel Hyper-Threading technology, each logical processor (thread) is assigned
256 APIC IDs (APIDs) in 8-bit bandwidth. When this feature is set to Enable, the APIC ID
will be expanded from 8 bits to 16 bits to provide 512 APIDs to each thread to enhance CPU

performance. The options are Disable and Enable.

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are Enable and Disable.

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Super X11QPH+ User's Manual

Advanced Power Management Conguration

CPU P State Control

SpeedStep (PStates)

EIST (Enhanced Intel SpeedStep Technology) allows the system to automatically adjust

processor voltage and core frequency in an effort to reduce power consumption and heat

dissipation. Please refer to Intel’s website for detailed information. The options are Disable
and Enable.

EIST PSD Function (Available when SpeedStep is set to Enable)

Use this feature to congure the processor's P-State coordination settings. During a P-State,
the voltage and frequency of the processor will be reduced when it is in operation. This
makes the processor more energy efcient, resulting in further energy gains. The options

are HW_ALL, SW_ALL and SW-ANY.

Turbo Mode (Available when SpeedStep is set to Enable)

Select Enable for processor cores to run faster than the frequency specied by the

manufacturer. The options are Disable and Enable.

Hardware PM (Power Management) State Control

Hardware P-States

If this feature is set to Disable, hardware will choose a P-state setting for the system based
on an OS request. If this feature is set to Native Mode, hardware will choose a P-state

setting based on OS guidance. If this feature is set to Native Mode with No Legacy Support,

the BIOS will choose a P-state setting independently without OS guidance. The options

are Disable, Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.

CPU C State Control

Autonomous Core C-State

Select Enable to support Autonomous Core C-State control which will allow the processor
core to control its C-State setting automatically and independently. The options are Enable

and Disable.

CPU C6 Report

Select Enable to allow the BIOS to report the CPU C6 state (ACPI C3) to the operating

system. During the CPU C6 state, power to all caches is turned off. The options are Auto,
Enable, and Disable.

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Chapter 4: BIOS

Enhanced Halt State (C1E)

Select Enable to enable "Enhanced Halt State" support, which will signicantly reduce the

CPU's power consumption by minimizing CPU's clock cycles and reduce voltage during a
"Halt State." The options are Disable and Enable.

Package C State Control

Package C State

Use this feature to set the limit on the C-State package register. The options are C0/1 state,
C2 state, C6 (non-Retention) state, C6 (Retention) state, No Limit, and Auto.

Chipset Conguration

Warning: Setting the wrong values in the following sections may cause the system to malfunc­tion.

North Bridge

This feature allows the user to congure the settings for the Intel North Bridge.

UPI (Ultra Path Interconnect) Conguration

This section displays the following UPI General Conguration information:

• Number of CPU

• Number of IIO

• Current UPI Link Speed

• Current UPI Link Frequency

• UPI Global MMIO Low Base/Limit

• UPI Global MMIO High Base/Limit

• UPI PCI-E Conguration Base/Size

Degrade Precedence

Use this feature to select the degrading precedence option for Ultra Path Interconnect
connections. Select Topology Precedent to degrade UPI features if system options are in

conict. Select Feature Precedent to degrade UPI topology if system options are in conict.

The options are Topology Precedence and Feature Precedence.

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Link L0p Enable

Select Enable to enable Link L0p. The options are Disable, Enable, and Auto.

Link L1 Enable

Select Enable to enable Link L1 (Level 1 link). The options are Disable, Enable, and Auto.

IO Directory Cache

Select Enable for the IODC (I/O Directory Cache) to generate snoops instead of generating
memory lockups for remote IIO (InvIToM) and/or WCiLF (Cores). Select Auto for the IODC to

generate snoops (instead of memory lockups) for WCiLF (Cores). The options are Disable,

Auto, Enable for Remote InvItoM Hybrid Push, InvItoM AllocFlow, Enable for Remote
InvItoM Hybrid AllocNonAlloc, and Enable for Remote InvItoM and Remote WViLF.

Isoc Mode

Select Enable to enable Isochronous support to meet QoS (Quality of Service) requirements.

This feature is especially important for Virtualization Technology. The options are Disable,
Enable, and Auto.

Memory Conguration

Enforce POR

Select POR to enforce POR restrictions for DDR4 memory frequency and voltage

programming. The options are POR and Disable.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory modules. The

options are Auto, 1866, 2000, 2133, 2200, 2400, 2600, and 2666.

Data Scrambling for NVDIMM

Select Enable to enable data scrambling for onboard NVDIMM memory to enhance system
performance and security. The options are Auto, Disable, and Enable.

Data Scrambling for DDR4

Select Enable to enable data scrambling for DDR4 memory to enhance system performance

and security. The options are Auto, Disable, and Enable.

tCCD_L Relaxation

If this feature is set to Enable, SPD (Serial Presence Detect) will override tCCD_L ("Column

to Column Delay-Long", or “Command to Command Delay-Long” on the column side.) If
this feature is set to Disable, tCCD_L will be enforced based on the memory frequency.

The options are Enable, Disable, and Auto.

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Chapter 4: BIOS

Enable ADR

Select Enable for ADR (Automatic Diagnostic Repository) support to enhance memory

performance. The options are Enable and Disable.

Memory Topology

This item displays the information of onboard memory modules as detected by the
BIOS.

• P1 DIMMA1/DIMMA2/DIMMB1/DIMMB2/DIMMC1/DIMMC2/DIMMD1/DIMMD2/

DIMME1/DIMME2/DIMMF1/DIMMF2

• P2 DIMMA1/DIMMA2/DIMMB1/DIMMB2/DIMMC1/DIMMC2/DIMMD1/DIMMD2/

DIMME1/DIMME2/DIMMF1/DIMMF2

• P3 DIMMA1/DIMMA2/DIMMB1/DIMMB2/DIMMC1/DIMMC2/DIMMD1/DIMMD2/

DIMME1/DIMME2/DIMMF1/DIMMF2

• P4 DIMMA1/DIMMA2/DIMMB1/DIMMB2/DIMMC1/DIMMC2/DIMMD1/DIMMD2/

DIMME1/DIMME2/DIMMF1/DIMMF2

Memory RAS (Reliability_Availability_Serviceability) Conguration

Use this submenu to congure the following Memory RAS settings.

Static Virtual Lockstep Mode

Select Enable to support Static Virtual Lockstep mode to enhance memory performance.
The options are Enable and Disable.

Mirror Mode

Use this feature to congure the mirror mode settings for all 1LM/2LM memory modules

installed in the system which will create a duplicate copy of data stored in the memory to
increase memory security, but it will reduce the memory capacity into half. The options are

Disable, Mirror Mode 1LM, and Mirror Mode 2LM.

Memory Rank Sparing

Select Enable to support memory-rank sparing to optimize memory performance. The

options are Enable and Disable.

Note: This item will not be available when memory mirror mode is enabled.

Correctable Error Threshold

Use this item to enter the threshold value for correctable memory errors. The default setting
is 10.

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Super X11QPH+ User's Manual

SDDC Plus One

Select Enable for SDDC (Single Device Data Correction) Plus One support, which will
increase the reliability and serviceability of your system memory. The options are Enable
and Disable.

ADDDC (Adaptive Double Device Data Correction) Sparing

Select Enable for ADDDC sparing support to enhance memory performance. The options
are Enable and Disable.

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors

detected in a memory module and send the corrections to the requestor (the original

source). When this item is set to Enable, the IO hub will read and write back one cache line

every 16K cycles if there is no delay caused by internal processing. By using this method,
roughly 64 GB of memory behind the IO hub will be scrubbed every day. The options are

Enable and Disable.

Patrol Scrub Interval

Use this item to specify the number of hours (between 0 to 24) required for the system to

complete a full patrol scrubbing. Enter 0 for patrol scrubbing to be performed automatically.
The default setting is 24.

Note: This item is hidden when Patrol Scrub item is set to Disable.

IIO Conguration

EV DFX (Device Function On-Hide) Features

When this feature is set to Enable, the EV_DFX Lock Bits that are located in a processor
will always remain clear during electric tuning. The options are Disable and Enable.

CPU1 Conguration/CPU2 Conguration

IOU0 (IIO PCIe Br1)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (IIO PCIe Br2)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (IIO PCIe Br3)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (IIO PCIe Br4)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x16 and Auto.

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MCP1 (IIO PCIe Br5)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x16 and Auto.

Socket 0 PCI-E Br0D00F0 - Port 0/DMI (Available for CPU 1 Conguration

only)

Link Speed

This feature congures the link speed of a PCI-E port specied by the user. The options
are Auto, Gen 1 (Generation 1) (2.5 GT/s), Gen 2 (Generation 2) (5 GT/s), and Gen 3
(Generation 3) (8 GT/s)

The following information will be displayed as well:

• PCI-E Port Link Status

• PCI-E Port Link Max

• PCI-E Port Link Speed

PCI-E Port Max (Maximum) Payload Size (Available for CPU 1 Conguration only)

Select Auto for the system BIOS to automatically set the maximum payload value for a

PCI-E device specied by to user to enhance system performance. The options are Auto,
128B, and 256B.

Socket2 Conguration

IOU0 (IIO PCIe Br1)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (IIO PCIe Br2)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (IIO PCIe Br3)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (IIO PCIe Br4)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x16 and Auto.

MCP1 (IIO PCIe Br5)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x16 and Auto.

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PCI-E Completion Timeout Disable

Select Enable to enable PCI-E Completion Timeout support. The options are Enable and
Disable.

PCI-E Completion Timeout Value

This feature allows the user to set the PCI-E Completion Timeout value. The default setting

is 260ms to 900ms.

Sck2 (Socket 2) RP (Root-Port) Correctable Err (Errors)

Select Enable to enable interrupt on correctable errors occur on a root port. The default
setting is Disable.

Sck2 (Socket 2) RP (Root-Port) NonFatal Uncorrectable Err (Errors)

Select Enable to enable interrupt on non-fatal, un-correctable errors occur on a root port.

The default setting is Disable.

Sck2 (Socket 2) RP (Root-Port) Fatal Uncorrectable Err (Errors)

Select Enable to enable interrupt on fatal un-correctable errors occur on a root port. The

default setting is Disable.

Socket3 Conguration

IOU0 (IIO PCIe Br1)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (IIO PCIe Br2)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (IIO PCIe Br3)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (IIO PCIe Br4)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x16 and Auto.

MCP1 (IIO PCIe Br5)

This feature congures the PCI-E Bifuraction setting for a PCI-E port specied by the user.

The options are x16 and Auto.

PCI-E Completion Timeout Disable

Select Enable to enable PCI-E Completion Timeout support. The options are Enable and
Disable.

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PCI-E Completion Timeout Value

This feature allows the user to set the PCI-E Completion Timeout value. The default setting

is 260ms to 900ms.

Sck3 (Socket 3) RP (Root-Port) Correctable Err (Errors)

Select Enable to enable interrupt on correctable errors occur on a root port. The default
setting is Disable.

Sck3 (Socket 3) RP (Root-Port) NonFatal Uncorrectable Err (Errors)

Select Enable to enable interrupt on non-fatal, un-correctable errors occur on a root port.

The default setting is Disable.

Sck3 (Socket 3) RP (Root-Port) Fatal Uncorrectable Err (Errors)

Select Enable to enable interrupt on fatal un-correctable errors occur on a root port. The

default setting is Disable.

IOAT Conguration

Sck2 (Socket 2) IOAT Conguration/Sck2 (Socket 2) IOAT

Conguration

DCA
Select Enable to enable DAC support. The default setting is Disable.

DMA (Direct Memory Access)
Select Enable to enable DMA support. The default setting is Enable.

No Snoop
Select Enable to enable No Snoop support. The default setting is Disable.

Disable TPH (TLP Processing Hint)

TPH is used for data-tagging with a destination ID and a few important attributes. It can

send critical data to a particular cache without writing through to memory. Select No in this

item for TLP Processing Hint support, which will allow a "TPL request" to provide "hints"

to help optimize the processing of each transaction occurred in the target memory space.

The options are Yes and No.

Prioritize TPH (TLP Processing Hint)

Select Yes to prioritize the TPL requests that will allow the "hints" to be sent to help facilitate

and optimize the processing of certain transactions in the system memory. The options are
Enable and Disable.

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Relaxed Ordering

Select Enable to enable Relaxed Ordering support which will allow certain transactions to
violate the strict-ordering rules of PCI and to be completed prior to other transactions that
have already been enqueued. The options are Disable and Enable.

Intel® VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology support for Direct I/O VT-d by reporting
the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR
ACPI tables. This feature offers fully-protected I/O resource sharing across Intel platforms,
providing greater reliability, security and availability in networking and data-sharing. The

options are Enable and Disable.

Interrupt Remapping

Select Enable for Interrupt Remapping support to enhance system performance. The

options are Enable and Disable.

PassThrough DMA

Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)

to enhance system performance. The options are Enable and Disable.

ATS

Select Enable to enable ATS (Address Translation Services) support for the Non-Iscoh VT-d

engine to enhance system performance. The options are Enable and Disable.

Posted Interrupt

Select Enable to support VT_D Posted Interrupt which will allow external interrupts to be

sent directly from a direct-assigned device to a client machine in non-root mode to improve
virtualization efciency by simplifying interrupt migration and lessening the need of physical

interrupts. The options are Enable and Disable.

Coherency Support (Non-Isoch)

Select Enable for the Non-Iscoh VT-d engine to pass through DMA (Direct Memory Access)

to enhance system performance. The options are Enable and Disable.

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Intel® VMD Technology

Intel® VMD for Onboard NVMe

Intel® VMD for Volume Management D

Select Enable to enable Intel Volume Management Device Technology in the stack.
The default setting is Disable.

Onboard NVMe Mode
Select Enable to enable onboard NVME mode support. The default setting is Disable.

Intel® VMD Technology

Intel® VMD for CPU2 Slot6

Intel® VMD for Volume Management D

Select Enable to enable Intel Volume Management Device Technology in the stack.
The default setting is Disable.

Intel® VMD for CPU2 Slot6

Select Enable to enable Intel Volume Management Device Technology in the slot speci­ed above. The default setting is Disable.

Intel® VMD for Volume Management D

Select Enable to enable Intel Volume Management Device Technology in the stack.
The default setting is Disable.

Intel® VMD for Volume Management Device on Socket 2/Intel® VMD for
Volume Management Device on Socket 3

VMD Cong. (Conguration) for PStack0/VMD Cong. for PStack1/ VMD
Cong. for PStack2

Intel® VMD for Volume Management D

Select Enable to enable Intel Volume Management Device Technology in the stack.
The default setting is Disable.

IIO-PCIE Express Global Options

PCIe Hot Plug

Select Enable to enable hot-plugging support which will allow the user to change the

components of the system without powering off the system. The default setting is Dis­able.

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PCI-E Completion Timeout (Global)

Select Yes to disable the PCI-E Completion Time-out settings. The options are Yes,
No, and Per-Port.

South Bridge

The following South Bridge information will display:

• USB Module Version

• USB Devices

Legacy USB Support

Select Enabled to support onboard legacy USB devices. Select Auto to disable legacy support
if there are no legacy USB devices present. Select Disable to have all USB devices available
for EFI applications only. The options are Enabled, Disabled and Auto.

XHCI Hand-Off

This is a work-around solution for operating systems that do not support XHCI (Extensible
Host Controller Interface) hand-off. The XHCI ownership change should be claimed by the

XHCI driver. The options are Enabled and Disabled.

Port 60/64 Emulation

Select Enabled for I/O port 60h/64h emulation support, which in turn, will provide complete

legacy USB keyboard support for the operating systems that do not support legacy USB
devices. The options are Enabled and Disabled.

Port 61h Bit-4 Emulation

Select Enabled for I/O Port 61h-Bit 4 emulation support to enhance system performance. The

options are Enabled and Disabled.

Install Windows 7 USB Support

Select Enabled to install the Windows 7 USB utility to support legacy USB devices for Windows
7 systems. The options are Enabled and Disabled.

Server ME (Management Engine) Conguration

This feature displays the following system ME conguration settings.

Open (Operational) Firmware Version

Backup Firmware Version

Recovery Firmware Version

ME Firmware Status #1/ME Firmware Status #2

Current State

Error Code

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

(PCH) SATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA
devices that are supported by the Intel PCH chip and displays the following items:

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel PCH chip.
The options are Enable and Disable.

Congure SATA as (Available when the item above: SATA Controller is set to

enabled)

Select AHCI to congure a SATA drive specied by the user as an AHCI drive. Select RAID
to congure a SATA drive specied by the user as a RAID drive. The options are AHCI and
RAID. (Note: This item is hidden when the SATA Controller item is set to Disabled.)

SATA HDD Unlock

Select Enable to unlock SATA HDD password in the OS. The options are Enable and Disable.

SATA/sSATA RAID Boot Select (Available when the item "Congure SATA as" is set

to "RAID")

This feature allows the user to decide which controller should be used for system boot. The
options are None, SATA Controller, sSATA Controller, and Both.

Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of

I/O inactivity, and will return the link to an active state when I/O activity resumes. The options

are Enable and Disable.

SATA RAID Option ROM/UEFI Driver (Available when the item "Congure SATA as"

is set to "RAID")

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

SATA Port 0 - SATA Port 7

Hot Plug

Select Enable to support Hot-plugging for the device installed on a selected SATA port

which will allow the user to replace the device installed in the slot without shutting down
the system. The options are Enable and Disable.

Spin Up Device

On an edge detect from 0 to 1, set this item to allow the SATA device installed on the SATA

port specied by the user to start a COMRESET initialization. The options are Enable and

Disable.

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SATA Device Type

Use this item to specify if the device installed on the SATA port selected by the user should
be connected to a Solid State drive or a Hard Disk Drive. The options are Hard Disk Drive
and Solid State Drive.



(PCH) sSATA Conguration

When this submenu is selected, AMI BIOS automatically detects the presence of the sSATA
devices that are supported by the PCH sSATA controller and displays the following items:

sSATA Controller

This item enables or disables the onboard sSATA controller supported by the Intel SCU. The
options are Enable and Disable.

Congure sSATA as

Select AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select RAID
to congure an sSATA drive specied by the user as a RAID drive. The options are AHCI
and RAID. (Note: This item is hidden when the sSATA Controller item is set to Disabled.)

SATA HDD Unlock

Select Enable to unlock sSATA HDD password in the OS. The options are Enable and Disable.

SATA/sSATA RAID Boot Select (Available when the item "Congure SATA as" is set

to "RAID")

This feature allows the user to decide which controller should be used for system boot. The
options are None, SATA Controller, sSATA Controller, and Both.

Support Aggressive Link Power Management

When this item is set to Enable, the sSATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of

I/O inactivity, and will return the link to an active state when I/O activity resumes. The options

are Disable and Enable.

sSATA RAID Option ROM/UEFI Driver (Available when the item "Congure SATA as"

is set to "RAID")

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

sSATA Port 0 - sSATA Port 5

Hot Plug

Select Enable to support Hot-plugging for the device installed on an sSATA port selected by

the user which will allow the user to replace the device installed in the slot without shutting
down the system. The options are Disable and Enabled.

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Spin Up Device

On an edge detect from 0 to 1, set this item to allow the sSATA device installed on the

sSATA port specied by the user to start a COMRESET initialization. The options are

Enable and Disable.

sSATA Device Type

Use this item to specify if the device installed on the sSATA port specied by the user

should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard
Disk Drive and Solid State Drive.

PCIe/PCI/PnP Conguration

The following PCI information will be displayed:

• PCI Bus Driver Version

• PCI Devices Common Settings:

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.

The options are Enabled and Disabled.

SR-IOV Support (Available if the system supports Single-Root Virtualization)

Select Enabled for Single-Root IO Virtualization support. The options are Enabled and
Disabled.

MMIO High Base

Use this feature to select the base memory size according to memory-address mapping for
the IO hub. The base memory size must be between 4032G to 4078G. The options are 56T,

40T, 24T, 16T, 4T, and 1T.

MMIO High Granularity Size

Use this feature to select the high memory size according to memory-address mapping for
the IO hub. The options are 1G, 4G, 16G, 64G, 256G, and 1024G.

PCI PERR/SERR Support

Use this feature to enable or disable the runtime event for SERR (System Error)/ PERR (PCI/
PCI-E Parity Error). The options are Disabled and Enabled.

Maximum Read Request

Select Auto for the system BIOS to automatically set the maximum size for a read request
for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256
Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

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MMCFG Base

This feature determines the lowest MMCFG (Memory-Mapped Conguration) base assigned
to PCI devices. The options are 1G, 1.5G, 1.75G. 2G, 2.25G, and 3G.

VGA Priority

This feature selects the graphics device to be used as the primary video display for system
boot. The options are Auto, Onboard and Offboard.

Onboard Video Option ROM/RSC-R2UW-4E8Option ROM/RSC-R1UW-E8ROption
ROM/AOC-2UR68-m2TSOption ROM/RSC-S2-66Option ROM/Front Ultra Option ROM

Use this feature to select the Onboard Video Option ROM type. The options are Disabled,

Legacy and EFI.



Network Stack Conguration

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied Extensible

Firmware Interface) for network stack support. The options are Enabled and Disabled.

*If "Network Stack" is set to Enabled, the following items will display:

Ipv4 PXE Support

Select Enabled to enable Ipv4 PXE boot support. If this feature is disabled, it will not create
the Ipv4 PXE boot option. The options are Disabled and Enabled.

Ipv4 HTTP Support

Select Enabled to enable Ipv4 HTTP boot support. If this feature is disabled, it will not create
the Ipv4 HTTP boot option. The options are Enabled and Disabled.

Ipv6 PXE Support

Select Enabled to enable Ipv6 PXE boot support. If this feature is disabled, it will not create
the Ipv6 PXE boot option. The options are Disabled and Enabled.

Ipv6 HTTP Support

Select Enabled to enable Ipv6 HTTP boot support. If this feature is disabled, it will not create
the Ipv6 HTTP boot option. The options are Enabled and Disabled.

PXE Boot Wait Time

Use this feature to select the wait time to press the <ESC> key to abort the PXE boot. The
default is 0.

Media Detect Time

Use this feature to select the wait time in seconds for the BIOS ROM to detect the LAN media

(Internet connection or LAN port). The default is 1.

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

Super IO Conguration

Super IO Chip AST2500



Serial Port 1 Conguration

Serial Port

Select Enabled to enable the onboard serial port specied by the user. The options are

Enabled and Disabled.

Device Settings

This feature displays the base I/O port address and the Interrupt Request address of a
serial port specied by the user.

Note: This item is hidden when Serial Port 1 is set to Disabled.

Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial
Port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a
serial port specied.

The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9,
10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10,
11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).



Serial Port 2 Conguration

Serial Port

Select Enabled to enable the onboard serial port specied by the user. The options are

Enabled and Disabled.

Device Settings

This feature displays the base I/O port address and the Interrupt Request address of a serial
port specied by the user.

Note: This item is hidden when Serial Port 1 is set to Disabled.

Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial
Port 2. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to a
serial port specied. The options for Serial Port 2 are Auto, (IO=2F8h; IRQ=3), (IO=3F8h;

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IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3,
4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

Serial Port 2 Attribute

Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redirection.
The options are COM and SOL.



Serial Port Console Redirection

COM 1 Console Redirection

Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client

machine to be connected to a host machine at a remote site for networking. The options are
Enabled and Disabled.

*If the item above set to Enabled, the following items will become available for conguration:



Console Redirection Settings (for COM1)

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.

Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key

support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use

UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console Redirection.

Make sure that the same speed is used in the host computer and the client computer. A

lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are

7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

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Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer

is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.

The options are Enabled and Disabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and

Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection

for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal

emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.

Redirection After BIOS Post

Use this feature to enable or disable legacy Console Redirection after BIOS POST. When
the option-Bootloader is selected, legacy Console Redirection is disabled before booting
the OS. When the option-Always Enable is selected, legacy Console Redirection remains

enabled upon OS bootup. The options are Always Enable and Bootloader.

COM2/SOL (Serial-Over-LAN)

Console Redirection (for COM2/SOL)

Select Enabled to use the SOL port for Console Redirection. The options are Enabled and
Disabled.

*If the item above set to Enabled, the following items will become available for user's
conguration:

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

Console Redirection Settings (for SOL/COM2)

Use this feature to specify how the host computer will exchange data with the client
computer, which is the remote computer used by the user.

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.

Select VT100 to use the ASCII Character set. Select VT100+ to add color and function key

support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to use

UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console Redirection.

Make sure that the same speed is used in the host computer and the client computer. A

lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are

7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer
is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The

options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.

The options are Enabled and Disabled.

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Chapter 4: BIOS

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and

Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection

for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal

emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.

Redirection After BIOS Post

Use this feature to enable or disable legacy Console Redirection after BIOS POST
(Power-On Self-Test). When this feature is set to Bootloader, legacy Console Redirection

is disabled before booting the OS. When this feature is set to Always Enable, legacy
Console Redirection remains enabled upon OS boot. The options are Always Enable and
Bootloader.



Legacy Console Redirection Settings

Legacy Console Redirection Settings

Use the feature to select the COM port to display redirection of Legacy OS and Legacy

OPROM messages. The default setting is COM1.

Serial Port for Out-of-Band Management/Windows Emergency Management
Services (EMS)

The submenu allows the user to congure Console Redirection settings to support Out-of-

Band Serial Port management.

Console Redirection (for EMS)

Select Enabled to use a COM port selected by the user for EMS Console Redirection. The

options are Disabled and Enabled.

*If the item above set to Enabled, the following items will become available for user's
conguration:

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EMS Console Redirection Settings

Out-of-Band Management Port

The feature selects a serial port in a client server to be used by the Windows Emergency
Management Services (EMS) to communicate with a remote host server. The options are

COM1 (Console Redirection) and COM2/SOL (Console Redirection).

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.

Select VT100 to use the ASCII character set. Select VT100+ to add color and function

key support. Select ANSI to use the extended ASCII character set. Select VT-UTF8 to use

UTF8 encoding to map Unicode characters into one or more bytes. The options are ANSI,
VT100, VT100+, and VT-UTF8.

Bits Per Second

This feature sets the transmission speed for a serial port used in Console Redirection.

Make sure that the same speed is used in both host computer and the client computer. A

lower transmission speed may be required for long and busy lines. The options are 9600,
19200, 57600, and 115200 (bits per second).

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop data-sending when the receiving buffer
is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The

options are None, Hardware RTS/CTS, and Software Xon/Xoff.

The setting for each these features is displayed:

Data Bits, Parity, Stop Bits



ACPI Settings

Use this feature to congure Advanced Conguration and Power Interface (ACPI) power

management settings for your system.

NUMA Support (Available when the OS supports this feature)

Select Enabled to enable Non-Uniform Memory Access support to enhance system perfor-

mance. The options are Enabled and Disabled.

WHEA Support

Select Enabled to support the Windows Hardware Error Architecture (WHEA) platform and
provide a common infrastructure for the system to handle hardware errors within the Windows
OS environment to reduce system crashes and to enhance system recovery and health
monitoring. The options are Enabled and Disabled.

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High Precision Timer

Select Enabled to activate the High Precision Event Timer (HPET) that produces periodic

interrupts at a much higher frequency than a Real-time Clock (RTC) does in synchronizing

multimedia streams, providing smooth playback and reducing the dependency on other

timestamp calculation devices, such as an x86 RDTSC Instruction embedded in the CPU.
The High Performance Event Timer is used to replace the 8254 Programmable Interval Timer.

The options are Enabled and Disabled.

Trusted Computing (Available when a TPM device is installed

and detected by the BIOS)

When a TPM (Trusted-Platform Module) device is detected in your machine, the following

information will be displayed.

• TPM2.0 Device Found

• Vendor

• Firmware Version

Security Device Support

If this feature and the TPM jumper (JPT1) on the motherboard are both enabled, the onboard
security (TPM) device will be enabled in the BIOS to enhance data integrity and system

security. Please note that the OS will not show the security device. Neither TCG EFI protocol

nor INT1A interaction will be made available for use. If you have made changes on the setting
on this item, be sure to reboot the system for the change to take effect. The options are
Disable and Enable. If this option is set to Enable, the following screen and items will display:

• Active PCR Banks

• Available PCR Banks

Pending Operation

Use this feature to schedule a TPM-related operation to be performed by a security (TPM)
device at the next system boot to enhance system data integrity. Your system will reboot to

carry out a pending TPM operation. The options are None and TPM Clear.

Note: Your system will reboot to carry out a pending TPM operation.

Platform Hierarchy (for TPM Version 2.0 and above)

Select Enabled for TPM Platform Hierarchy support which will allow the manufacturer to utilize

the cryptographic algorithm to dene a constant key or a xed set of keys to be used for

initial system boot. This early boot code is shipped with the platform and is included in the

list of "public keys". During system boot, the platform rmware uses this trusted public key

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Super X11QPH+ User's Manual

to verify a digital signature in an attempt to manage and control the security of the platform

rmware used in a host system via a TPM device. The options are Enabled and Disabled.

Storage Hierarchy

Select Enabled for TPM Storage Hierarchy support that is intended to be used for non-privacy-

sensitive operations by the platform owner such as an IT professional or the end user. Storage
Hierarchy has an owner policy and an authorization value, both of which can be set and are

held constant (-rarely changed) through reboots. This hierarchy can be cleared or changed

independently of the other hierarchies. The options are Enabled and Disabled.

Endorsement Hierarchy

Select Enabled for Endorsement Hierarchy support, which contains separate controls to

address the user's privacy concerns because the primary keys in this hierarchy are certied

by the TPM or a manufacturer to be constrained to an authentic TPM device that is attached

to an authentic platform. A primary key can be an encrypted, and a certicate can be created
using TPM2_ ActivateCredential. It allows the user to independently enable "ag, policy, and

authorization value" without involving other hierarchies. A user with privacy concerns can
disable the endorsement hierarchy while still using the storage hierarchy for TPM applications
and permitting the platform software to use the TPM. The options are Enabled and Disabled.

PH (Platform Hierarchy) Randomization (for TPM Version 2.0 and above)

Select Enabled for Platform Hierarchy Randomization support, which is used only during the

platform developmental stage. This feature cannot be enabled in the production platforms.
The options are Disabled and Enabled.

TXT Support

Select Enabled to enable Intel Trusted Execution Technology (TXT) support to enhance
system security and data integrity. The options are Disabled and Enabled.

Note 1: If the option for this item (TXT Support) is set to Enabled, be sure to disable

EV DFX (Device Function On-Hide) support for the system to work properly. (EV DFX
is under "IIO Conguration" in the "Chipset/North Bridge" submenu).

Note 2: For more information on TPM, please refer to the TPM manual at http://www.
supermicro.com/manuals/other.

Intel® Virtual RAID on CPU

When this submenu is selected and the RAID devices are detected, the BIOS screen displays

the following items:

Intel® VROC with VMD Technology 5.1.0.1006

100