Supermicro X11DSF-E User Manual

X11DSF-E

USER’S MANUAL

Revision 1.0a

The information in this user’s manual has been carefully reviewed and is believed to be accurate. The vendor assumes no

!

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the information in this manual, or to notify any person or organization of the updates. Please Note: For the most up-to-date

version of this manual, please see our website at www.supermicro.com.

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to www.P65Warnings.ca.gov.

The products sold by Supermicro are not intended for and will not be used in life support systems, medical equipment, nuclear
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Manual Revision 1.0a

Release Date: Sep 3, 2018

Unless you request and receive written permission from Super Micro Computer, Inc., you may not copy any part of this document.

Information in this document is subject to change without notice. Other products and companies referred to herein are trademarks

or registered trademarks of their respective companies or mark holders.

Copyright © 2018 by Super Micro Computer, Inc.
All rights reserved.

Printed in the United States of America

Preface

Preface

About This Manual

This manual is written for system integrators, IT technicians, and knowledgeable end users.
It provides information for the installation and use of the X11DSF-E motherboard.

About This Motherboard

The X11DSF-E motherboard supports dual Intel® Xeon 81xx/61xx/51xx/41xx/31xx series
processors (Socket P) with a TDP (Thermal Design Power) of up to 205W, and three UltraPath
Interconnect (UPI) of up to 10.4 GT/s (Note below). With the Intel C627 PCH built-in, this
motherboard supports up to 3TB of 3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM/NV-DIMM
DDR4 ECC 2666/2400/2133 MHz memory in 24 memory slots, and comes equipped with
six SATA 3.0 ports, thirty-two possible NVMe slots (32x NVMe from PCI-E switch + 4x M.2
from PCH), and M.3 support. The cutting-edge X11DSF-E offers highly versatile SATA and

NVMe options, with an array of exible PCI-E solutions. This motherboard is optimized for

storage-intensive systems, high-perfomance platforms, and demanding workloads. Please
note that this motherboard is intended to be installed and serviced by professional technicians
only. For processor/memory updates, please refer to our website at http://www.supermicro.
com/products/.

Note: UPI/memory speeds are dependent on the processors installed in your system.

Manual Organization

Chapter 1 describes the features, specications and performance of the motherboard, and

provides detailed information on the Intel C627 chipset.

Chapter 2 provides hardware installation instructions. Read this chapter when installing the
processor, memory modules, and other hardware components into the system.

If you encounter any problems, see Chapter 3, which describes troubleshooting procedures
for video, memory, and system setup stored in the CMOS.

Chapter 4 includes an introduction to the BIOS, and provides detailed information on running
the CMOS Setup utility.

Appendix A provides BIOS Error Beep Codes.

Appendix B lists software program installation instructions.

Appendix C lists standardized warning statements in various languages.

Appendix D provides UEFI BIOS Recovery instructions.

3

Super X11DSF User's Manual

Contacting Supermicro

Headquarters

Address: Super Micro Computer, Inc.

980 Rock Ave.

San Jose, CA 95131 U.S.A.

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

Website: www.supermicro.com

Europe

Address: Super Micro Computer B.V.

Het Sterrenbeeld 28, 5215 ML

's-Hertogenbosch, The Netherlands

Tel: [phone]

Fax: [phone]

Email: [e-mail] (General Information)

[e-mail] (Technical Support)

[e-mail] (Customer Support)

Website: www.supermicro.nl

Asia-Pacic

Address: Super Micro Computer, Inc.

3F, No. 150, Jian 1st Rd.

Zhonghe Dist., New Taipei City 235

Taiwan (R.O.C)

Tel: [phone]

Fax: [phone]

Email: [e-mail]

Website: www.supermicro.com.tw

4

Preface

Table of Contents

Chapter 1 Introduction

1.2 Processor and Chipset Overview .......................................................................................17

1.3 Special Features ................................................................................................................17

1.4 System Health Monitoring ..................................................................................................18

1.5 ACPI Features ....................................................................................................................19

1.6 Power Supply .....................................................................................................................19

1.7 Super I/O ............................................................................................................................19

1.8 Advanced Power Management ..........................................................................................20

Chapter 2 Installation

2.1 Static-Sensitive Devices .....................................................................................................21

2.2 Motherboard Installation .....................................................................................................22

2.3 Processor and Heatsink Installation ...................................................................................24

2.4 Memory Support and Installation .......................................................................................32

2.5 Rear I/O Ports ....................................................................................................................37

2.6 Front Control Panel ............................................................................................................42

2.7 Connectors .........................................................................................................................47

2.8 Jumper Settings .................................................................................................................54

2.9 LED Indicators ....................................................................................................................60

Chapter 3 Troubleshooting

3.1 Troubleshooting Procedures ..............................................................................................63

3.2 Technical Support Procedures ...........................................................................................67

3.3 Frequently Asked Questions ..............................................................................................68

3.4 Battery Removal and Installation .......................................................................................69

3.5 Returning Merchandise for Service ....................................................................................70

Chapter 4 BIOS

4.1 Introduction .........................................................................................................................71

4.2 Main Setup .........................................................................................................................72

4.3 Advanced Setup Congurations .........................................................................................74

4.4 Event Logs ........................................................................................................................107

4.5 IPMI ...................................................................................................................................109

4.7 Boot .................................................................................................................................115

4.8 Save & Exit .......................................................................................................................117

5

Super X11DSF User's Manual

Appendix A BIOS Codes

A.1 BIOS Error POST (Beep) Codes .....................................................................................119

Appendix B Software Installation

B.1 Installing Software Programs ...........................................................................................121

B.2 SuperDoctor® 5 .................................................................................................................122

Appendix C Standardized Warning Statements

Appendix D UEFI BIOS Recovery

D.1 Overview ...........................................................................................................................126

D.2 Recovering the UEFI BIOS Image ...................................................................................126

D.3 Recovering the Main BIOS Block with a USB Device .....................................................127

6

Chapter 1: Introduction

Chapter 1

Introduction

Congratulations on purchasing your computer motherboard from an industry leader.
Supermicro motherboards are designed to provide you with the highest standards in quality
and performance.

1.1 Checklist

This motherboard was designed to be used in an SMCI-proprietary chassis only as a part of
an integrated, complete system solution. It is not to be sold as an independent, stand-alone
product; therefore, no shipping package will be included in the shipment.

Important Links

For your system to work properly, please follow the links below to download all necessary
drivers/utilities and the user’s manual for your server.

• Supermicro product manuals: http://www.supermicro.com/support/manuals/

• Product drivers and utilities: http://www.supermicro.com/wftp

• Product safety info: http://www.supermicro.com/about/policies/safety_information.cfm

• If you have any questions, please contact our support team at: [e-mail]

This manual may be periodically updated without notice. Please check the Supermicro website
for possible updates to the manual revision level.

7

Super X11DSF-E User's Manual

Figure 1-1. X11DSF-E Motherboard Image

Note: All graphics shown in this manual were based upon the latest PCB revision avail-

able at the time of publication of the manual. The components in the motherboard you
received may or may not look exactly the same as the graphics shown in this manual.

8

Figure 1-2. X11DSF-E Motherboard Layout

SAN MAC

MAC CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

BAR CODE

BIOS LICENSE

IPMI CODE

B37 B1

CPU2 PCI-E 3.0 X32

USB7(3.0)

CN4

CN5

CN6

CN2

U1

CPU1

U1

CPU2

JPWR1

JPWR2

FAN8FAN7

FAN5 FAN4FAN3

FAN2FAN1

FAN6

JUIDB2

JBT1

LED1

LEDM1

CN1

CN3

JUSB3

JSDCARD1

JTPM1

JL1

SXB1A

PSU1

PSU2

JF1

JPL1

JPG1

JPB1

JPME2

JWD1

JPQAT

JSD1

JSD2

JUSBA1

JGPW4

JGPW3

JGPW2

JGPW1

JIPMILAN

JLAN1JLAN2

JRK1

JUSB1

JVGA1

JCOM1

JSW0

JSW1

LED6

BT1

JS1

JP5

LED3

LED2

CPU1 PCI-E 3.0 X32

(3.0)

CPU2 SXB1C

CPU1 SXB1B

PCI-E 3.0 X4PCH SLOT2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PCH SLOT3 PCI-E 3.0 X4

USB2/3

USB4/5

USB0/1(2.0)

S-SATA0

S-SATA1

I-SATA 0~7

P2-DIMMC2 P2-DIMMC1

PCI-E 3.0 X16

PCI-E 3.0 X16

(not drawn to scale)

Chapter 1: Introduction

Note: Components not documented are for internal testing only.

9

Super X11DSF-E User's Manual

SAN MAC

MAC CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

BAR CODE

BIOS LICENSE

IPMI CODE

B37 B1

CPU2 PCI-E 3.0 X32

USB7(3.0)

CN4

CN5

CN6

CN2

U1

CPU1

U1

CPU2

JPWR1

JPWR2

FAN8FAN7

FAN5 FAN4FAN3

FAN2FAN1

FAN6

JUIDB2

JBT1

LED1

LEDM1

CN1

CN3

JUSB3

JSDCARD1

JTPM1

JL1

SXB1A

PSU1

PSU2

JF1

JPL1

JPG1

JPB1

JPME2

JWD1

JPQAT

JSD1

JSD2

JUSBA1

JGPW4

JGPW3

JGPW2

JGPW1

JIPMILAN

JLAN1JLAN2

JRK1

JUSB1

JVGA1

JCOM1

JSW0

JSW1

LED6

BT1

JS1

JP5

LED3

LED2

CPU1 PCI-E 3.0 X32

(3.0)

CPU2 SXB1C

CPU1 SXB1B

PCI-E 3.0 X4PCH SLOT2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PCH SLOT3 PCI-E 3.0 X4

USB2/3

USB4/5

USB0/1(2.0)

S-SATA0

S-SATA1

I-SATA 0~7

P2-DIMMC2 P2-DIMMC1

PCI-E 3.0 X16

PCI-E 3.0 X16

Quick Reference

PCI-E 3.0 x32

SXB1C

SXB1A

LEDM1

JSDCARD1

SXB1B

JPQAT

JPWR1

JBT1

LED3

LED2

SP1

JPB1

JCOM1

VGA

JUSB1

LAN2 LAN1

IPMI_LAN

JUIDB2

LED1

JPG1

JPL1

JP5

JWD1

JPME2

JS1

USB5/6

S-SATA4

S-SATA5

JSW0

PCI-E 3.0 x32

JRK1

LED6

JTPM1

JUSBA1

JSD2

BT1

JSD1

PSU2

PSU1

JPWR2

JGPW1

JUSB3

JF1

FAN6

FAN5

JGPW3

FAN4

FAN3

JL1

JGPW2

FAN1

FAN2

Notes:

JGPW4

FAN7

FAN8

• See Chapter 2 for detailed information on jumpers, I/O ports, and JF1 front panel connections.

• " " indicates the location of Pin 1.

• Jumpers/LED indicators not indicated are used for testing only.

• Use only the correct type of onboard CMOS battery as specied by the manufacturer. Do not install the onboard

battery upside down to avoid possible explosion.

• For your system to work properly, please use add-on cards or devices that are compatible with the PCI-standard

on the PCI-E slots.

10

Chapter 1: Introduction

Quick Reference Table

Jumper Description Default Setting

JBT1 CMOS Clear Open (Normal)

JPB1 BMC Enable/Disable Pins 1-2 (Enabled)

JPG1 VGA Enable/Disable Pins 1-2 (Enabled)

JPQAT1 QAT Enable/Disable Pins 2-3 (Disabled)

when JPQAT1 is Enabled:

JPQAT2 QAT Enable/Disable

JPL1 GLAN Enable/Disable Pins 1-2 (Enabled)

JP5 Hold power button before BMC ready

JPME2 Manufacturing Mode Pins 1-2 (Normal)

JWD1 Watch Dog Timer Enable Pins 1-2 (Reset)

LED Description Status

LED1 UID LED Solid Blue: Unit Identied

LED6 CPLD Heartbeat LED Blinking Green: Normal

LEDM1 BMC Heartbeat LED Blinking Green: Normal

Pins 1-2 x16 Uplink

Pins 2-3 x8 Uplink (Disabled)

Pins 1-2 (Enabled)

Pins 2-3 (Disabled)

Connector Description

BT1 Onboard CMOS battery

FAN1 ~ FAN8 System/CPU fan headers (FAN1: CPU Fan)

JCOM1 COM port

JIPMILAN IPMI-Dedicated LAN port

JS1 (I-SATA0 ~I-SATA7) SATA 3.0 ports supported by Intel PCH

JF1 Front Control Panel header

JGPW1 - JGPW4 Power connectors used for GPU and VGA devices

JIPMB1 System Management Bus header for IPMI 2.0

JL1 Chassis intrusion header

JRK1 Intel RAID key header for NVMe Solid State Devices (SSD)

JSDCARD1 SD card socket

JSD1 - JSD2 SATA Disk-on-module (DOM) power connectors

JSW0/JSW1 Switch 1/2 I²C

JTPM1 TPM/PORT80 Trusted Platform Module/Port 80 connector

JUIDB2 Unit Identier (UID) switch

JUSB3 USB4/5 (3.0) Internal USB header for two USB 3.0 connections (USB4/5)

JUSB1 USB2/3 (3.0) USB 3.0 rear port (USB2/3)

USB0/1 USB 2.0 header

JUSBA1 Type A USB 3.0 header

PSU1 Power Supply Unit 1

11

Super X11DSF-E User's Manual

Connector Description

PSU2 Power Supply Unit 2

S-SATA0/S-SATA1 (Powered) SATA connectors with power-pins built-in with support of SuperDOMs

SXB1A WIO Left Riser slot (see note below)

SXB1B WIO Right Riser slot (see note below)

SXB1C Ultra Riser slot (see note below)

CN1-CN6

JLAN1/JLAN2 10G LAN ports 1 and 2

JVGA1 VGA port

PCI-E x32 Tray Cable connector interface (GPU, NVMe, M.3, or Ruler down device) (see note

below)

Note: To avoid interference with other components, please be sure to use an add-on
card that is fully compliant with the PCI Standards on a PCI slot.

12

Chapter 1: Introduction

Motherboard Features

Motherboard Features

CPU

• Dual Intel 81xx/61xx/51xx/41xx/31xx series processors (Socket P); each processor supports Socket P and 3 Intel UltraPath

Interconnect (UPI) of up to 10.4 G/s

Note: Both CPUs need to be installed for full access to the PCI-E slots, DIMM slots, and onboard controllers. Refer

to the block diagram on page 18 to determine which slots or devices may be affected.

Memory

• The X11DSF supports up to 3TB of 3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM/NV-DIMM DDR4 ECC 2666/2400/2133

MHz memory in 24 memory slots.

DIMM Size

• Up to 128GB at 1.2V

Note 1: Memory speed support depends on the processors used in the system.

Note 2: For the latest CPU/memory updates, please refer to our website at http://www.supermicro.com/products/

motherboard.

Chipset

• Intel® C627

Expansion Slots

• 2 PCI-E x32 Tray cable connector interface (GPU, NVMe, M.3 or Ruler down device support)

• 1 PCI-E 3.0 (x16 + x16 or x16 + QAT) left riser card support

• 1 PCI-E 3.0 x4 and 1 PCI-E x4 from PCH

Network

• Dual 10GBase-T Ethernet ports with Intel X550

BaseBoard Management Controller (BMC)

• ASpeed AST 2500 Baseboard Management Controller (BMC) supports IPMI 2.0

• One (1) dedicated IPMI LAN located on the rear IO backpanel

Graphics

• Graphics controller via ASpeed AST2500

I/O Devices

• Serial (COM) Port • One (1) serial-port header

• Total of 10 SATA 3 ports:

• SATA 3.0

• Eight (8) SATA 3.0 (JS1)

• Two (2) SATA 3.0 SuperDOM connectors (S-SATA0, S-SATA1)

Note: The table above is continued on the next page.

13

Super X11DSF-E User's Manual

Motherboard Features

Peripheral Devices

• Two (2) USB 3.0 ports on the rear I/O panel (USB 3/4)

• One (1) internal USB 2.0 header with (2) USB connections for front access (USB0/1)

• One (1) internal USB header supports two USB 3.0 connections (USB5/USB6)

BIOS

• 256 Mb SPI AMI BIOS

• ACPI 3.0 or later, PCI F/W 3.0, SMBIOS 2.7 or later

Power Management

• ACPI power management (S4, S5)

• Power-on mode for AC power recovery

• Power button override mechanism

System Health Monitoring

• Onboard voltage monitoring for +1.8V, +3.3V, +5V, +/-12V, +3.3V Stdby, +12V Stdby, VBAT, HT, Memory, PCH Temp,

System Temp, Memory Temp

• 5 CPU (# of switching-phase voltage regulator)

• CPU/system overheat LED and control

• CPU Thermal Trip support

• PECI / TSI

• CPU Thermal Design Power (TDP) support of up to 205W

®

SM Flash UEFI BIOS

Fan Control

• Eight 4-pin fan headers

• Fan speed control

System Management

• Trusted Platform Module (TPM) support

• Watch Dog / Non-maskable interrupt

• RoHS

• BMC SD Card Slot

• Chassis intrusion header and detection (JL1)

14

Motherboard Features

LED Indicators

• CPU/Overheating

• Power/Suspend-state indicator

• Fan Failure

• UID/Remote UID

• HDD Activity

• LAN Activity

Dimensions

• 15.59" (L) x 16.73" (W) (395.98 mm x 424.94 mm)

Note 1: The CPU maximum thermal design power (TDP) is subject to chassis and
heatsink cooling restrictions. For proper thermal management, please check the chas-

sis and heatsink specications for proper CPU TDP sizing.

Chapter 1: Introduction

Note 2: For IPMI conguration instructions, please refer to the Embedded IPMI Con­guration User's Guide available at http://www.supermicro.com/support/manuals/.

Note 3: It is strongly recommended that you change BMC log-in information upon initial
system power-on. The manufacture default username is ADMIN and the password is

ADMIN. For proper BMC conguration, please refer to http://www.supermicro.com/
products/info/les/IPMI/Best_Practices_BMC_Security.pdf

15

Super X11DSF-E User's Manual

DDR4 DIM

DDR4 DIM

DDR4 DIM

DDR4 DIM

DDR4 DIM

DDR4 DIM

DDR4 DIM

DDR4 DIM

DDR4 DIM

DDR4 DIM

DDR4 DIM

DDR4 DIM

Figure 1-3.

System Block Diagram

LAN1

LAN2

NCSI

MUX

M

VGA LAN

SPI

MUX

SPI

PE[5]

UPLINK

#1

#2

H

M

VGA

32MB
BMC

SPI
FLASH

64MB

SPI

BIOS

FLASH

WIO

Intel X550

x16 x16

x16

PCI-E

X32

x16

CABLE

X4

PE1 PE2 UPI0PE3 UPI1

DMI

UPI2

CPU 1

SocketID 01

#1

#2

M

M

#2

#2

M

K

L

M

#1

#1

TPM
Header

Upper Lower

PCI-E

x16

UPI

#1

#2

G

PCH

J

BMC

AST2500

HWM

USB2.0
[5-10, 12-13]
USB3.0
[1-4,6]

#1

#2

DDR4

UART

LPC/eSPIPE

USBSPI

USB2.0 [7]

LPC/eSPI

PE[0..3]

PE[6..9]

Uplink X8
/iSATA[0-7]

sSATA [4, 5]

DMI

10.4G/11.2G T/s

Polarity Inversion

M

DDR4

SLOT2

SLOT3

JS1

I-SATA0~7

S-SATA5

S-SATA4

#1

M

TYPE-A

E

IPMI LAN
RJ45

port 1-2, 5-6port 7

FRONT

#1

#2

M

FRONT

D

PE1 PE2 PE3

HSSIHSSI

DMI

CPU 0

SocketID 00

x16

PCI-E

X32

x16

CABLE

UPI2

UPI1

UPI

UPI0

#1

#2

A

B

M

#1

#1

#2

#2#2

M

M

C

PHY
RTL8211F

COM1

port 3-4

REAR

#1

#2

M

F

Note: This is a general block diagram and may not exactly represent the features on

your motherboard. See the previous pages for the actual specications of your moth­erboard.

16

Chapter 1: Introduction

1.2 Processor and Chipset Overview

Built upon the functionality and capability of the Intel Xeon 81xx/61xx/51xx/41xx/31xx series
processors (Socket P) and the Intel C627 chipset, the X11DSF-E motherboard provides
superb system performance, scalable storage solutions, and a rich feature set based on
cutting edge technology to address the needs of next-generation computer users. With the
support of three Intel® UltraPath Interconnect (UPI) of up to 10.4 G/s, new Intel® AVX-512
instructions, and Intel® QuickAssist Technology, this motherboard offers an innovative solution
with maximum system performance to meet the ongoing demands of High Performance
Computing (HPC) platforms. This motherboard is optimized for HFT servers, big data
environments, and CPU encoding/decoding servers and rendering servers. The Intel Xeon
81xx/61xx/51xx/41xx/31xx series processor and the Intel C627 chipset support the following
features:

• Intel® AVX-512 support with memory bandwidth increase to 6 channels

• High availability interconnect between multiple nodes

• Rich set of available IOs, full exibility in usage model, and software stack

• Dedicated subsystems for customer innovation

• Integrated solution for real-time compression, streaming write & read performance in-

creases from gen-to-gen

• Hot plug and enclosure management with Intel Volume Management Device (Intel VMD)

• Single standard server development (Accelerate NFV transition) consolidating application,

control, and data plane workloads, reducing total platform investment needs

1.3 Special Features

This section describes the health monitoring features of the X11DSF-E motherboard. The
motherboard has an onboard System Hardware Monitor chip that supports system health
monitoring.

Recovery from AC Power Loss

The Basic I/O System (BIOS) provides a setting that determines how the system will respond
when AC power is lost and then restored to the system. You can choose for the system to
remain powered off (in which case you must press the power switch to turn it back on), or
for it to automatically return to the power-on state. See the Advanced BIOS Setup section
for this setting. The default setting is Last State.

17

Super X11DSF-E User's Manual

1.4 System Health Monitoring

This section describes the health monitoring features of the X11DSF-E motherboard. The
motherboard has an onboard ASpeed AST2500 Baseboard Management Controller (BMC)
that supports system health monitoring. Once a voltage becomes unstable, a warning is
given or an error message is sent to the screen. The user can adjust the voltage thresholds

to dene the sensitivity of the voltage monitor.

Onboard Voltage Monitors

The onboard voltage monitor will continuously scan crucial voltage levels. Once a voltage
becomes unstable, it will give a warning or send an error message to the screen. Users can

adjust the voltage thresholds to dene the sensitivity of the voltage monitor. Real time readings

of these voltage levels are all displayed in IPMI.

Fan Status Monitor with Firmware Control

The system health monitor embedded in the BMC chip can check the RPM status of the
cooling fans. The CPU and chassis fans are controlled via lPMI.

Environmental Temperature Control

System Health sensors in the BMC monitor the temperatures and voltage settings of onboard
processors and the system in real time via the IPMI interface. Whenever the temperature of

the CPU or the system exceeds a user-dened threshold, system/CPU cooling fans will be

turned on to prevent the CPU or the system from overheating.

Note: To avoid possible system overheating, please be sure to provide adequate air-

ow to your system.

System Resource Alert

This feature is available when used with SuperDoctor 5®. SuperDoctor 5 is used to notify the

user of certain system events. For example, you can congure SuperDoctor 5 to provide you

with warnings when the system temperature, CPU temperatures, voltages and fan speeds

go beyond a predened range.

18

Chapter 1: Introduction

1.5 ACPI Features

ACPI stands for Advanced Conguration and Power Interface. The ACPI specication denes
a exible and abstract hardware interface that provides a standard way to integrate power

management features throughout a computer system including its hardware, operating system
and application software. This enables the system to automatically turn on and off peripherals
such as network cards, hard disk drives and printers.

In addition to enabling operating system-directed power management, ACPI also provides a
generic system event mechanism for Plug and Play and an operating system-independent

interface for conguration control. ACPI leverages the Plug and Play BIOS data structures

while providing a processor architecture-independent implementation that is compatible with
Windows 2012/2012R2 and 2016 operating systems.

1.6 Power Supply

As with all computer products, a stable power source is necessary for proper and reliable
operation, especially for processors that have high CPU clock rates.

1.7 Super I/O

The Super I/O (ASpeed AST2500 chip) provides a high-speed, 16550 compatible serial
communication port (UART), which supports serial infrared communication. The UART
includes send/receive FIFO, a programmable baud rate generator, complete modem control
capability, and a processor interrupt system. The UART provides legacy speed with baud
rate of up to 115.2 Kbps as well as an advanced speed with baud rates of 250 K, 500 K, or
1 Mb/s, supporting higher speed modems.

The Super I/O provides functions that comply with ACPI (Advanced Conguration and Power

Interface), which includes support of legacy and ACPI power management through a SMI
or SCI function pin. It also features auto power management to reduce power consumption.

19

Super X11DSF-E User's Manual

1.8 Advanced Power Management

The following new advanced power management features are supported by the motherboard.

Intel® Intelligent Power Node Manager (IPNM)

Intel's Intelligent Power Node Manager (IPNM) provides your system with real-time thermal

control and power management for maximum energy efciency. Although IPNM Specication

Version 2.0/3.0 is supported by the BMC (Baseboard Management Controller), your system

must also have IPNM-compatible Management Engine (ME) rmware installed to use this

feature.

Note: Support for IPNM 2.0/3.0 support is dependent on the power supply used in
the system.

Management Engine (ME)

The Management Engine, which is an ARC controller embedded in the IOH (I/O Hub), provides
Server Platform Services (SPS) to your system. The services provided by SPS are different
from those provided by the ME on client platforms.

Intel® QuickAssist Technology

Built upon the architecture of Intel 81xx/61xx/51xx/41xx/31xx processors and the Intel C627
chipset, the X11DSF-E supports Intel® QuickAssist Technology (Intel QAT), which offers

high-prole security and compression acceleration to standard server platforms in a software­dened infrastructure.

By eliminating unneeded roadblocks, Intel QAT accelerates computation-intensive operations;
provides a software-enabled foundation for security, authentication and compression; and

signicantly increases performance and efciency across applications and platforms, including

cryptography, symmetric encryption and authentication, asymmetric encryption, digital
signature, pattern matching, and lossless data compression.

With Intel QuickAssist Technology built in, the X11DSF is optimized for the use and deployment

of integrated accelerators in networking and security applications, and efciently meets the

complex demands of High-Performance Computing (HPC), Virtualization, storage, and big
data platforms.

20

Chapter 2: Installation

Chapter 2

Installation

2.1 Static-Sensitive Devices

Electrostatic Discharge (ESD) can damage electronic com ponents. To avoid damaging your
motherboard and your system, it is important to handle them very carefully. The following

measures are generally sufcient to protect your equipment from ESD.

Precautions

• Use a grounded wrist strap designed to prevent static discharge.

• Touch a grounded metal object before removing the board from the antistatic bag.

• Handle the board by its edges only; do not touch its components, peripheral chips, memory

modules, or gold contacts.

• When handling chips or modules avoid touching their pins.

• Put the motherboard and peripherals back into their antistatic bags when not in use.

• For grounding purposes, make sure that your chassis provides excellent conductivity be-

tween the power supply, the case, the mounting fasteners, and the motherboard.

• Use only the correct type of CMOS onboard battery as specied by the manufacturer. Do

not install the CMOS battery upside down as it may result in a possible explosion.

Unpacking

The motherboard is shipped in antistatic packaging to avoid static damage. When unpacking
the motherboard, make sure that the person handling it is static protected.

21

Super X11DSF-E User's Manual

2.2 Motherboard Installation

All motherboards have standard mounting holes to t different types of chassis. Make sure

that the locations of all the mounting holes for both the motherboard and the chassis match.
Although a chassis may have both plastic and metal mounting fasteners, metal ones are
highly recommended because they ground the motherboard to the chassis. Make sure that
the metal standoffs click in or are screwed in tightly.

Phillips Screwdriver (1)

Tools Needed

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

SXB1A

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JCOM1

PCI-E 3.0 X4PCH SLOT2

BAR CODE

Phillips Screws (14)

JVGA1

JPB1

JPG1

JUSB1

LEDM1

USB2/3

JSDCARD1

JBT1

LED3

LED2

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

LED6

JPQAT

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JLAN1JLAN2

BT1

USB4/5

(3.0)

I-SATA 0~7

JS1

CN4

B37 B1

CN6

CN5

JIPMILAN

PCH SLOT3 PCI-E 3.0 X4

JPL1

JP5

JWD1

JRK1

JPME2

JTPM1

S-SATA1

JUSBA1
USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

Standoffs (14)

Only if Needed

JUIDB2

LED1

S-SATA0

JSD1

JSD2

JSW0

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

JF1

PSU2

U1

FAN5 FAN4FAN3

FAN6

JGPW3

CPU2

U1

JL1

FAN2FAN1

JGPW2

JGPW4

CPU1

FAN8FAN7

Location of Mounting Holes

Notes: 1) To avoid damaging the motherboard and its components, please do not use

a force greater than 8 lb/inch on each mounting screw during motherboard installation.

2) Some components are very close to the mounting holes. Please take precautionary
measures to avoid damaging these components when installing the motherboard to
the chassis.

22

Chapter 2: Installation

Installing the Motherboard

1. Install the I/O shield into the back of the chassis if needed.

2. Locate the mounting holes on the motherboard. See the previous page for the location.

3. Locate the matching mounting holes on the chassis. Align the mounting holes on the
motherboard against the mounting holes on the chassis.

4. Install standoffs in the chassis as needed.

5. Install the motherboard into the chassis carefully to avoid damaging other motherboard
components.

6. Using the Phillips screwdriver, insert a Phillips head #6 screw into a mounting hole on
the motherboard and its matching mounting hole on the chassis.

7. Repeat Step 5 to insert #6 screws into all mounting holes.

8. Make sure that the motherboard is securely placed in the chassis.

Note: Images displayed in this manual are for illustration only. Your chassis or com­ponents might look different from those shown in this manual.

23

Super X11DSF-E User's Manual

2.3 Processor and Heatsink Installation

Warning: When handling the processor package, avoid placing direct pressure on the label

area of the CPU or CPU socket. Also, improper CPU installation or socket misalignment can
cause serious damage to the CPU or motherboard which may result in RMA repairs. Please
read and follow all instructions thoroughly before installing your CPU and heatsink.

Notes:

• Always connect the power cord last and always remove it before adding, removing, or

changing any hardware components. Please note that the processor and heatsink should

be assembled together rst to form the Processor Heatsink Module (PHM), and then install

the entire PHM into the CPU socket.

• When you receive a motherboard without a processor pre-installed, make sure that the

plastic CPU socket cap is in place and that none of the socket pins are bent. Otherwise,
please contact your retailer immediately.

• Refer to the Supermicro website for updates on CPU support.

• Please follow the instructions given in the ESD Warning section on the rst page of this

chapter before handling, installing, or removing system components.

The 81xx/61xx/51xx/41xx/31xx Series Processor

Note: The Intel 81xx/61xx/51xx/41xx/31xx processors contain two models-the F model

processors and the Non-F model processors. This motherboard support Non-F pro­cessors only.

81xx/61xx/51xx/41xx/31xx Processor

Note: All graphics, drawings, and pictures shown in this manual are for illustration only.

The components that came with your machine may or may not look exactly the same
as those shown in this manual.

24

Chapter 2: Installation

Overview of the Processor Socket Assembly

The processor socket assembly contains 1) the Intel 81xx/61xx/51xx/41xx/31xx Processor,

2) the narrow processor clip, 3) the dust cover, and 4) the CPU socket.

1. The 81xx/61xx/51xx/41xx/31xx Processor

81xx/61xx/51xx/41xx/31xx Processor

2. Narrow processor clip (the plastic processor package carrier used for the CPU)

3. Dust Cover

4. CPU Socket

Note: Be sure to cover the CPU socket with the dust cover when the CPU is not in-

stalled.

25

Super X11DSF-E User's Manual

Overview of the Processor Heatsink Module (PHM)

The Processor Heatsink Module (PHM) contains 1) a heatsink, 2) a narrow processor clip,
and 3) 81xx/61xx/51xx/41xx/31xx processor.

1. Heatsink

2. Narrow processor clip

3. The 81xx/61xx/51xx/41xx/31xx Processor

Processor Heatsink Module (PHM)

(Bottom View)

26

Chapter 2: Installation

A

Allow Notch C to

Attaching the Processor to the Narrow Processor Clip to Create
the Processor Package Assembly

To properly install the CPU into the narrow processor clip, please follow the steps below.

1. Locate pin 1 (notch A), which is the triangle located on the top of the narrow processor
clip. Also locate notch B and notch C on the processor clip.

2. Locate pin 1 (notch A), which is the triangle on the substrate of the CPU. Also, locate
notch B and notch C on the CPU as shown below.

3. Align pin 1 (the triangle on the substrate) of the CPU with pin 1 (the triangle) of
the narrow processor clip. Once they are aligned, carefully insert the CPU into the
processor clip by sliding notch B of the CPU into notch B of the processor clip, and
sliding notch C of the CPU into notch C of the processor clip.

4. Examine all corners of the CPU to ensure that it is properly seated on the processor
clip. Once the CPU is securely attached to the processor clip, the processor package
assembly is created.

Note: Please exercise extreme caution when handling the CPU. Do not touch the
CPU LGA-lands to avoid damaging the LGA-lands or the CPU. Be sure to wear ESD
gloves when handling components.

CPU (Upside Down)
w/CPU LGA Lands up

Align Notch B of the CPU
and Notch B of the Processor Clip

Align CPU Pin 1

C

Align Notch C of the CPU
and Notch C of the Processor Clip

B

A

Pin 1

C

B

CPU/Heatsink Package
(Upside Down)

latch on to CPU

C

A

B

Allow Notch B to
latch on to CPU

Processor Package Carrier (w/CPU mounted

on the Processor Clip)

27

Super X11DSF-E User's Manual

Attaching the Processor Package Assembly to the Heatsink to
Form the Processor Heatsink Module (PHM)

After you have made a processor package assembly by following the instructions on the
previous page, please follow the steps below to mount the processor package assembly onto
the heatsink to create the Processor Heatsink Module (PHM).

1. Locate "1" on the heatsink label and the triangular corner next to it on the heatsink.

With your index nger pressing against the screw at this triangular corner, carefully hold

and turn the heatsink upside down with the thermal-grease side facing up. Remove the

protective thermal lm if present, and apply the proper amount of thermal grease as

needed. (Skip this step if you have a new heatsink because the thermal grease is pre­applied in the factory.)

2. Holding the processor package assembly at the center edge, turn it upside down. With
the thermal-grease side facing up, locate the hollow triangle located at the corner of
the processor carrier assembly ("a" in the graphic). Note the larger hole and plastic
mounting clicks located next to the hollow triangle. Locate another set of mounting clicks
and a larger hole at the diagonal
corner of the same (reverse) side of
the processor carrier assembly ("b"
in the graphic).

3. With the back of the heatsink and
the reverse side of the processor
package assembly facing up, align
the triangular corner on the heatsink
("A" in the graphic) against the
mounting clips next to the hollow
triangle ("a") on the processor
package assembly.

4. Align the triangular corner ("B") at
the diagonal side of the heatsink
with the corresponding clips on the
processor package assembly ("b").

Triangle on the CPU

Triangle on the
Processor Clip

Non-Fabric CPU and Processor Clip

(Upside Down)

b

d

B

a

D

Heatsink

(Upside Down)

A

On Locations of (C, D), the notches

snap onto the heat sink’s

B

c

C

mounting holes

5. Once the mounting clips on the
processor package assembly
are properly aligned with the
corresponding holes on the back
of the heatsink, securely attach the
heatsink to the processor package
assembly by snapping the mounting
clips at the proper places on the
heatsink to create the Processor /
Heatsink Module (PHM).

28

D

A

On Locations (A, B), the notches
snap onto the heatsink’s sides

C

Make sure Mounting

Notches snap into place

Chapter 2: Installation

Preparing the CPU Socket for Installation

This motherboard comes with the CPU socket pre-assembled in the factory. The CPU socket
contains 1) a dust cover, 2) a socket bracket, 3) the CPU (P0) socket, and 4) a back plate.
These components are pre-installed on the motherboard before shipping.

CPU Socket w/Dust Cover On

Removing the Dust Cover from the CPU Socket

Remove the dust cover from the CPU socket, exposing the CPU socket and socket pins as
shown on the illustration below.

Note: Do not touch the socket pins to avoid damaging them, causing the CPU to
malfunction.

Dusk Cover

Remove the dust cover from

the CPU socket. Do not

touch the socket pins!

Socket Pins

CPU Socket

29

Super X11DSF-E User's Manual

Installing the Processor Heatsink Module (PHM)

1. Once you have assembled the Processor Heatsink Module (PHM) by following the
instructions listed on page 29, you are ready to install the module into the CPU socket
on the motherboard. To install the PHM into the CPU socket, follow the instructions
below.

2. Locate the triangle (pin 1) on the CPU socket, and locate the triangle (pin 1) at the

corner of the PHM that is closest to "1." (If you have difculty locating pin 1 of the PHM,

turn the PHM upside down. With the LGA-lands side facing up, you will note the hollow
triangle located next to a screw at the corner. Turn the PHM right side up, and you will
see a triangle marked on the processor clip at the same corner of hollow triangle.)

3. Carefully align pin 1 (the triangle) on the the PHM against pin 1 (the triangle) on the
CPU socket.

4. Once they are properly aligned, insert the two diagonal oval holes on the heatsink into
the guiding posts.

5. Using a T30 Torx-bit screwdriver, install four screws into the mounting holes on the
socket to securely attach the PHM onto the motherboard starting with the screw marked

"1" (in the sequence of 1, 2, 3, and 4).

Note: To avoid damaging the LGA-lands and the processor, do not use excessive
force when tightening the screws.

Oval C

Use a torque

Oval D

Large Guiding Post

T30 Torx Driver

of 12 lbf

#4

#1

#2

Small Guiding Post

Printed Triangle

Mounting the Processor Heatsink Module

into the CPU socket (on the motherboard)

#3

Tighten the screws in the

sequence of 1, 2, 3, 4 (top 3 quarter view)

30

Chapter 2: Installation

Removing the Processor Heatsink Module (PHM) from the
Motherboard

Before removing the Processor Heatsink Module (PHM), unplug power cord from the power
outlet.

1. Using a T30 Torx-bit screwdriver, turn the screws on the PHM counterclockwise to

loosen them from the socket, starting with screw marked #4 (in the sequence of 4, 3, 2,

1).

2. After all four screws are removed, wiggle the PHM gently and pull it up to remove it
from the socket.

Note: To properly remove the processor heatsink module, be sure to loosen and re-

move the screws on the PHM in the sequence of 4, 3, 2, 1 as shown below.

#1

Removing the screws in
the sequence of 4, 3, 2, 1

#4

#2

#3

Printed Triangle on Motherboard

CPU Socket

After removing the screws,

lift the Processor Heatsink
Module off the CPU socket.

31

Super X11DSF-E User's Manual

2.4 Memory Support and Installation

Note: Check the Supermicro website for recommended memory. Exercise extreme

care when installing or removing DIMM modules to prevent any damage.

Memory Support

The X11DSF-E supports up to 3TB of 3DS LRDIMM/LRDIMM/3DS RDIMM/RDIMM/NV-DIMM
DDR4 ECC 2666/2400/2133 MHz memory in 24 memory slots. Populating these DIMM
modules with a pair of memory modules of the same type and size will result in interleaved
memory, which will improve memory performance.

Memory Installation Sequence

Memory modules for this motherboard are populated using the "Fill First" method. The blue

memory slot of each channel is considered the "rst DIMM module" of the channel, and the

black slot, the second module of the channel. When installing memory modules, be sure to

populate the blue memory slots rst and then populate the black slots. To maximize memory

capacity and performance, please populate all DIMM slots on the motherboard, including all
blue slots and black slots.

General Memory Population Requirements

1. Be sure to use the memory modules of the same type and speed on the motherboard.
Mixing of memory modules of different types and speeds is not allowed.

2. Using unbalanced memory topology such as populating two DIMMs in one channel while
populating one DIMM in another channel on the same motherboard will result in reduced
memory performance.

DDR4 Memory Support (for 2-Slot Per-Channel Conguration)

Speed (MT/s); Voltage (V); Slots per Channel

(SPC) and DIMMs per Channel (DPC)

Type

RDIMM SRx4 8 GB 16 GB 2666 2666

RDIMM SRx8 4 GB 8 GB 2666 2666

RDIMM DRx8 8 GB 16 GB 2666 2666

RDIMM DRx4 16 GB 32 GB 2666 2666

RDIMM 3Ds QRX4 N/A 2H-64GB 2666 2666

RDIMM 3Ds 8RX4 N/A 4H-128GB 2666 2666

LRDIMM QRx4 32 GB 64 GB 2666 2666

LRDIMM

3Ds

Ranks Per DIMM and

Data Width

QRX4 N/A 2H-64GB 2666 2666

8Rx4 N/A 4H-128 GB 2666 2666

DIMM Capacity (GB)

1DPC (1-DIMM per

Channel)

4 Gb 8 Gb 1.2 V 1.2 V

2 Slots per Channel

2DPC (2-DIMM per Channel)

32

Chapter 2: Installation

DIMM Population Guidelines for Optimal Performance

For optimal memory performance, follow the instructions listed in the tables below when
populating memory modules.

Key Parameters for DIMM Conguration

Key Parameters for DIMM Congurations

Parameters Possible Values

Number of Channels 1, 2, 3, 4, 5, or 6

Number of DIMMs per Channel 1DPC (1 DIMM Per Channel) or 2DPC (2 DIMMs Per Channel)

DIMM Type RDIMM (w/ECC), 3DS RDIMM, LRDIMM, 3DS LRDIMM

DIMM Construction • non-3DS RDIMM Raw Cards: A/B (2Rx4), C (1Rx4), D (1Rx8), E (2Rx8)

• 3DS RDIMM Raw Cards: A/B (4Rx4)

• non-3DS LRDIMM Raw Cards: D/E (4Rx4)

• 3DS LRDIMM Raw Cards: A/B (8Rx4)

DIMM Mixing Guidelines

General DIMM Mixing Guidelines

• All DIMMs must be all DDR4 DIMMs.

• x4 and x8 DIMMs can be mixed in the same channel.

• Mixing of LRDIMMs and RDIMMs is not allowed in the same channel, across different

channels, and across different sockets.

• Mixing of non-3DS and 3DS LRDIMM is not allowed in the same channel, across

different channels, and across different sockets.

Mixing of DIMM Types within a Channel

DIMM Types RDIMM LRDIMM 3DS LRDIMM

RDIMM Allowed Not Allowed Not Allowed

LRDIMM Not Allowed Allowed Not Allowed

3DS LRDIMM Not Allowed Not Allowed Allowed

DIMM Mixing Rules

33

Super X11DSF-E User's Manual

Memory Population for the X11DSF-E Motherboard with 24 DIMM Slots
Onboard

Note: Unbalanced memory conguration decreases memory performance and is not

recommended for Supermicro motherboards.

Memory Population Table for the X11DP Motherboard w/24 DIMM Slots Onboard

When 1 CPU is used: Memory Population Sequence

1 CPU & 1 DIMM CPU1: P1-DIMMA1

1 CPU & 2 DIMMs CPU1: P1-DIMMA1/P1-DIMMD1

1 CPU & 3 DIMMs CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1

1 CPU & 4 DIMMs CPU1: P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1

1 CPU & 5 DIMMs

(Unbalanced: not recom-

mended)

1 CPU & 6 DIMM CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1

1 CPU & 7 DIMMs

(Unbalanced: not recom-

mended)

1 CPU & 8 DIMMs CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1

1 CPU & 9 DIMMs

(Unbalanced: not recom-

mended)

1 CPU & 10 DIMMs

(Unbalanced: not recom-

mended)

1 CPU & 11 DIMMs

(Unbalanced: not recom-

mended)

1 CPU & 12 DIMMs

When 2 CPUs are used: Memory Population Sequence

2 CPUs & 2 DIMMs

2 CPUs & 4 DIMMs

2 CPUs & 6 DIMMs

2 CPUs & 8 DIMMs

2 CPUs & 10 DIMMs

2 CPUs & 12 DIMMs

2 CPUs & 14 DIMMs

2 CPUs & 16 DIMMs

2 CPUs & 18 DIMMs

2 CPUs & 20 DIMMs

2 CPUs & 22 DIMMs

(Unbalanced: not recom-

mended)

2 CPUs & 24 DIMMs

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1

CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD1/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD1/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1

CPU1: P1-DIMMA1
CPU2: P2-DIMMA1

CPU1: P1-DIMMA1/P1-DIMMD1
CPU2: P2-DIMMA1/P2-DIMMD1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1

CPU1: P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1
CPU2: P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
CPU2: P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMB1/P1-DIMMA1/P1-DIMMD1/P1-DIMME1/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1
CPU2: P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/
P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMB1/P2-DIMMA1/P2-DIMMD1/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/P1-DIMMD2/P1-DIMMD1/
P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1
CPU2: P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMC2/P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/
P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1/P2-DIMMF1

CPU1: P1-DIMMC1/P1-DIMMC2/P1-DIMMB1/P1-DIMMB2/P1-DIMMA1/P1-DIMMA2/
P1-DIMMD2/P1-DIMMD1/P1-DIMME2/P1-DIMME1/P1-DIMMF2/P1-DIMMF1
CPU2: P2-DIMMC1/P2-DIMMC2/P2-DIMMB1/P2-DIMMB2/P2-DIMMA1/P2-DIMMA2/
P2-DIMMD2/P2-DIMMD1/P2-DIMME2/P2-DIMME1/P2-DIMMF2/P2-DIMMF1

34

Chapter 2: Installation

P1-DIMMA2

P1-DIMMB2

P1-DIMMC2

P2-DIMMA2

P2-DIMMB2

P2-DIMMC2

Note: Please refer to the memory population table on the previous page for memory
population.

P2-DIMMA1

P2-DIMMB1

P2-DIMMC1

P1-DIMMA1

P1-DIMMC1

P1-DIMMB1

P2-DIMMF1

P2-DIMME1

P2-DIMMF2

P2-DIMMD1

P2-DIMMD2

P2-DIMME2

CPU2

Pin 1

U1

CPU1

P1-DIMMF1

P1-DIMME1

P1-DIMMF2

P1-DIMMD1

P1-DIMMD2

P1-DIMME2

Pin 1

U1

CPU1

35

Super X11DSF-E User's Manual

DIMM Installation

1. Follow the instructions given in the
memory population guidelines listed in the
previous section to install memory modules
on your motherboard. For the system
to work properly, please use memory
modules of the same type and speed on
the motherboard. (See the Note below.)

2. Push the release tabs outwards on both
ends of the DIMM slot to unlock it.

3. Align the key of the DIMM module with the
receptive point on the memory slot.

4. Align the notches on both ends of the
module against the receptive points on the
ends of the slot.

5. Use two thumbs together to press on both
ends of the module straight down into the
slot until the module snaps into place.

CN1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1P1-DIMMD2

JGPW4

LED6

JS1

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JGPW3

JUIDB2

LED1

JIPMILAN

JLAN1JLAN2

PCH SLOT3 PCI-E 3.0 X4

JPL1

JP5

JWD1

BT1

JRK1

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

S-SATA0

S-SATA1

JSD1

JSD2

CN4

JUSBA1
USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

JSW0

B37 B1

CN6

CN5

PSU2

CPU2

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

U1

PSU1

JGPW1

USB0/1(2.0)

P2-DIMMC2 P2-DIMMC1

JUSB3

JF1

JL1

FAN2FAN1

JGPW2

JVGA1

JPB1

JPG1

JCOM1

SXB1A

CPU1 SXB1B

PCI-E 3.0 X16

CPU2 SXB1C

PCI-E 3.0 X16

JPWR1

CPU1

FAN8FAN7

JUSB1

LEDM1

USB2/3

PCI-E 3.0 X4PCH SLOT2

JSDCARD1

JBT1

LED3

LED2

JPQAT

BAR CODE

X11DSF-E
REV:1.00

IPMI CODE

DESIGNED IN USA

MAC CODE

SAN MAC

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2P1-DIMMC1

U1

FAN5 FAN4FAN3

FAN6

Notches

6. Press the release tabs to the lock positions
to secure the DIMM module into the slot.

Release Tabs

Press both notches

straight down into

the memory slot.

DIMM Module Removal

Press the release tabs on both ends of the
DIMM socket to release the DIMM module from
the socket as shown in the drawing on the right.

Warnings: 1. Please do not use excessive force when pressing the release tabs on the ends
of the DIMM socket to avoid causing any damage to the DIMM module or the DIMM socket.

2. Please handle DIMM modules with care. Carefully follow all the instructions given on Page
1 of this chapter to prevent ESD-related damages to your memory modules or components.

36

Chapter 2: Installation

2.5 Rear I/O Ports

See Figure 2-2 below for the locations and descriptions of the various I/O ports on the rear
of the motherboard.

BT1

(3.0)

I-SATA 0~7

CN4

B37 B1

CN5

JIPMILAN

JPL1

JP5

JWD1

JPME2

JTPM1

USB4/5

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

PCH SLOT3 PCI-E 3.0 X4

JRK1

S-SATA1

JSD2

JUIDB2

LED1

S-SATA0

JSW0

JSD1

PSU2

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

SXB1A

PCI-E 3.0 X4PCH SLOT2

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JVGA1

JPB1

JCOM1

LEDM1

BAR CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

JPG1

JUSB1

USB2/3

JSDCARD1

JBT1

LED3

LED2

JLAN1JLAN2

LED6

JPQAT

JS1

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

U1

FAN5 FAN4 FAN3

FAN6

JGPW4

CPU1

FAN8FAN7

1 32

Back Panel I/O Ports

No. Description No. Description

1. Unit Identier Switch (UID) 5. USB3

2. IPMI LAN 6. USB4

3. JLAN1 7. VGA

4. JLAN2

JGPW3

4

JF1

CPU2

U1

JL1

FAN2FAN1

JGPW2

76

5

37

Super X11DSF-E User's Manual

Serial Port

There is one COM connector (JCOM1) near the I/O back panel, next to the IPMI LAN
connector. The COM connector provides serial communication support. See the table below

for pin denitions.

VGA Port

The VGA connector (JVGA) is located below the JSIOM slot and next to JTPM1 connector.
Use this connection for VGA display.

2

JLAN1JLAN2

BT1

CN4

B37 B1

CN5

JIPMILAN

JPL1

JP5

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

JUSBA1
USB7(3.0)

CPU2 PCI-E 3.0 X32

CN6

JWD1

S-SATA1

JPWR2

JUIDB2

LED1

PCH SLOT3 PCI-E 3.0 X4

JRK1

S-SATA0

JSD2

JSW0

JSD1

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

1. JCOM1

2. JVGA

PSU2

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

SXB1A

PCI-E 3.0 X4PCH SLOT2

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JVGA1

JPB1

JCOM1

1

LEDM1

BAR CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

JPG1

JUSB1

USB2/3

JSDCARD1

LED3

JBT1

LED2

LED6

JPQAT

JS1

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JGPW4

FAN8FAN7

CPU1

U1

FAN5 FAN4FAN3

FAN6

JGPW3

JF1

CPU2

U1

JL1

FAN2FAN1

JGPW2

38

Chapter 2: Installation

Universal Serial Bus (USB) Ports

There are two USB 3.0 ports (USB3/4) located on the rear IO panel, and two internal USB

3.0 ports (USB5/6) located above JUSBA1 for front access. There are also two USB 2.0 ports
(USB0/1) located at JUSB3 for front access. USB header JUSBA1 is a Type A USB header
and is located next to JPWR2. This header also provides one USB 3.0 (USB7) connection
for front access.

Type A JUSBA1 (3.0)

Front Panel USB4/5 (3.0)

Pin Denitions

Pin# Denition Pin# Denition

1

VBUS 19 Power

2

Stda_SSRX- 18 USB3_RN

3

Stda_SSRX+ 17 USB3_RP

4

GND 16 GND

5

Stda_SSTX- 15 USB3_TN

6

Stda_SSTX+ 14 USB3_TP

7

GND 13 GND

8

D- 12 USB_N

9

D+ 11 USB_P

10 x

Pin# Denition Pin# Denition

1 VBUS 5 SSRX-

2 USB_N 6 SSRX+

3 USB_P 7 GND

4 Ground 8 SSTX-

Pin Denitions

9 SSTX+

Back Panel USB 2/3 (3.0)

Pin Denitions

Pin# Denition Pin# Denition

A1 VBUS B1 Power

A2 D- B2 USB_N

A3 D+ B3 USB_P

A4 GND B4 GND

A5 Stda_SSRX- B5 USB3_RN

A6 Stda_SSRX+ B6 USB3_RP

A7 GND B7 GND

A8 Stda_SSTX- B8 USB3_TN

A9 Stda_SSTX+ B9 USB3_TP

Front Panel USB 0/1 (2.0)

Pin Denitions

Pin# Denition Pin# Denition

1 +5V 2 +5V

3 USB_N 4 USB_N

5 USB_P 6 USB_P

7 Ground 8 Ground

9 Key 10 NC

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

CPU1

SXB1A

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JCOM1

PCI-E 3.0 X4PCH SLOT2

BAR CODE

JVGA1

JPB1

JPG1

LEDM1

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

U1

1

JUSB1

USB2/3

JSDCARD1

JBT1

LED3

LED2

JPQAT

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JUIDB2

LED1

JIPMILAN

JLAN1JLAN2

PCH SLOT3 PCI-E 3.0 X4

JPL1

JP5

JWD1

LED6

BT1

JRK1

JPME2

JTPM1

USB4/5

(3.0)

3

I-SATA 0~7

JS1

CN4

B37 B1

CN5

S-SATA1

JUSBA1
USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

2

S-SATA0

JSD1

JSD2

JSW0

PSU2

CPU2

1. USB2/3 (3.0)

2. JUSBA1

3. JUSB3 (USB4/5)

4. USB0/1 (2.0)

PSU1

JGPW1

USB0/1(2.0)

P2-DIMMC2 P2-DIMMC1

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

U1

JUSB3

4

JF1

JL1

JGPW4

FAN8FAN7

FAN5 FAN4FAN3

FAN6

JGPW3

FAN2FAN1

JGPW2

39

Super X11DSF-E User's Manual

19

20

1 2

Unit Identier Switch/UID LED Indicator

A Unit Identier (UID) switch and a rear UID LED (LED1) are located on the I/O back panel.

A front UID switch is located on pins 7 & 8 of the front panel control (JF1). When you press
the front or the rear UID switch, both front and rear UID LEDs will be turned on. Press the

UID switch again to turn off the LED indicators. The UID indicators provide easy identication

of a system that may be in need of service. (Note: UID can also be triggered via IPMI on
the motherboard. For more information, please refer to the IPMI User's Guide posted on our
website at http://www.supermicro.com.)

UID Switch

Pin Denitions

Pin# Denition

1 Ground

2 Ground

3 Button In

4 Button In

CPU1 PCI-E 3.0 X32

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

JGPW1

USB0/1(2.0)

JUSB3

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

x

Ground

Power Button

UID LED

Pin Denitions

Color Status

Blue: On Unit Identied

PWR

Reset

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

1

JVGA1

JPB1

JPG1

JCOM1

SXB1A

PCI-E 3.0 X4PCH SLOT2

CPU1 SXB1B

PCI-E 3.0 X16

CPU2 SXB1C

PCI-E 3.0 X16

CN1

JPWR1

IPMI CODE

MAC CODE

SAN MAC

BAR CODE

CN3

CN2

LEDM1

USB2/3

JSDCARD1

LED3

LED2

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

JUSB1

JBT1

JPQAT

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

LED6

JUIDB2

LED1

JIPMILAN

JLAN1JLAN2

PCH SLOT3 PCI-E 3.0 X4

JPL1

JP5

JWD1

BT1

JRK1

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

JS1

CN4

B37 B1

CN5

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

S-SATA0

S-SATA1

JSD1

JSD2

JSW0

3.3V Stby

x

NMI

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

PSU2

JF1

CPU1

JGPW4

FAN8FAN7

U1

FAN5 FAN4FAN3

FAN6

JGPW3

CPU2

U1

JL1

FAN2FAN1

JGPW2

40

Chapter 2: Installation

Ethernet Ports

An IPMI-dedicated LAN that supports GbE LAN is located on the backplane. All Ethernet ports
accept RJ45 type cables. Please refer to the LED Indicator Section for LAN LED information.

1

BT1

(3.0)

I-SATA 0~7

CN4

B37 B1

CN5

JIPMILAN

JPL1

JP5

JWD1

JPME2

JTPM1

USB4/5

S-SATA1

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

JUIDB2

LED1

PCH SLOT3 PCI-E 3.0 X4

JRK1

S-SATA0

JSD2

JSW0

1. IPMI LAN

JSD1

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

PSU2

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

SXB1A

PCI-E 3.0 X4PCH SLOT2

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JVGA1

JPB1

JCOM1

LEDM1

BAR CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

JPG1

JUSB1

USB2/3

JSDCARD1

JBT1

LED3

LED2

JLAN1JLAN2

LED6

JPQAT

JS1

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JGPW4

FAN8FAN7

CPU1

U1

FAN5 FAN4FAN3

FAN6

JGPW3

JF1

CPU2

U1

JL1

FAN2FAN1

JGPW2

41

Super X11DSF-E User's Manual

1 2

2.6 Front Control Panel

JF1 contains header pins for various buttons and indicators that are normally located on a

control panel at the front of the chassis. These connectors are designed specically for use
with Supermicro chassis. See the gure below for the descriptions of the front control panel

buttons and LED indicators.

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

SXB1A

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JCOM1

PCI-E 3.0 X4PCH SLOT2

BAR CODE

JVGA1

JPB1

JPG1

JUSB1

LEDM1

USB2/3

JSDCARD1

JBT1

LED3

LED2

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

LED6

JPQAT

JS1

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JLAN1JLAN2

BT1

CN4

B37 B1

CN5

JIPMILAN

JPL1

JP5

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

JUSBA1
USB7(3.0)

CPU2 PCI-E 3.0 X32

CN6

JWD1

S-SATA1

JPWR2

JUIDB2

LED1

PCH SLOT3 PCI-E 3.0 X4

JRK1

S-SATA0

JSD2

JSW0

JSD1

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

PSU2

JGPW4

FAN8FAN7

CPU1

U1

FAN5 FAN4FAN3

FAN6

JGPW3

Figure 2-3. JF1 Header Pins

PWR

Reset

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

3.3V Stby

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

JF1

CPU2

U1

JL1

FAN2FAN1

JGPW2

NMI

x

x

Ground

19

20

42

Chapter 2: Installation

1 2

Power Button

The Power Button connection is located on pins 1 and 2 of JF1. Momentarily contacting both

pins will power on/off the system. This button can also be congured to function as a suspend

button (with a setting in the BIOS - see Chapter 4). To turn off the power when the system
is in suspend mode, press the button for 4 seconds or longer. Refer to the table below for

pin denitions.

Power Button

Pin Denitions (JF1)

Pins Denition

1 Signal

2 Ground

Reset Button

The Reset Button connection is located on pins 3 and 4 of JF1. Use a cable to connect the
two pins to a hardware reset switch on the computer case to reset the system. Refer to the

table below for pin denitions.

1

2

PWR

Reset

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

Reset Button

Pin Denitions (JF1)

Pins Denition

3 Reset

4 Ground

Ground

Ground

Power Fail LED

OH/Fan Fail LED

1. PWR Button

NIC2 Active LED

2. Reset Button

NIC1 Active LED

HDD LED

3.3V Stby

x

NMI

19

PWR LED

x

Ground

20

43

Super X11DSF-E User's Manual

1 2

Power Fail LED

The Power Fail LED connection is located on pins 5 and 6 of JF1. Refer to the table below

for pin denitions.

Power Fail LED

Pin Denitions (JF1)

Pin# Denition

5 3.3V

6 PWR Supply Fail

Fan Fail and UID LED

Connect an LED cable to pins 7 and 8 of the Front Control Panel to use the Overheat/Fan
Fail LED connections. The LED on pin 8 provides warnings of overheat or fan failure. Refer

to the tables below for pin denitions.

PWR

Reset

OH/Fan Fail Indicator

State Denition

Off Normal

On Overheat

Flashing Fan Fail

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

Status

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

OH/Fan Fail LED

Pin Denitions (JF1)

Pin# Denition

7 Blue LED

8 OH/Fan Fail LED

1

2

1. Power Fail LED

2. OH/Fan Fail LED

3.3V Stby

NMI

PWR LED

x

x

Ground

19

20

44

Chapter 2: Installation

1 2

NIC1/NIC2 (LAN1/LAN2)

The NIC (Network Interface Controller) LED connection for LAN port 1 is located on pins
11 and 12 of JF1, and LAN port 2 is on pins 9 and 10. Attach the NIC LED cables here to

display network activity. Refer to the table below for pin denitions.

LAN1/LAN2 LED

Pin Denitions (JF1)

Pin# Denition

9 NIC 2 Activity LED

11 NIC 1 Activity LED

HDD LED

The HDD LED connection is located on pins 13 and 14 of JF1. Attach a cable to pin 14 to

show hard drive activity status. Refer to the table below for pin denitions.

PWR

Reset

Power Button

Reset Button

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

3.3V

HDD LED

Pin Denitions (JF1)

Pins Denition

13 3.3V Stdby

14 HDD Active

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

1

2

1. NIC2 LED

2. NIC1 LED

3. HDD LED

3

3.3V Stby

x

NMI

19

PWR LED

x

Ground

20

45

Super X11DSF-E User's Manual

1 2

Power LED

The Power LED connection is located on pins 15 and 16 of JF1. Refer to the table below

for pin denitions.

Power LED

Pin Denitions (JF1)

Pins Denition

15 3.3V

16 PWR LED

NMI Button

The Non-Maskable Interrupt (NMI) button header is located on pins 19 and 20 of JF1. Refer

to the table below for pin denitions.

NMI Button

Pin Denitions (JF1)

Pins Denition

19 Control

20 Ground

PWR

Reset

Power Button

Reset Button

3.3V

UID LED

3.3V Stby

3.3V Stby

3.3V Stby

3.3V Stby

x

2

NMI

19

20

Ground

Ground

Power Fail LED

OH/Fan Fail LED

NIC2 Active LED

NIC1 Active LED

HDD LED

PWR LED

x

Ground

1. PWR LED

2. NMI

1

46

Chapter 2: Installation

2.7 Connectors

Power Connectors

SMCI-Proprietary Power Connectors

Two SMCI-proprietary Power Supply Unit connectors, located at PSU1/PSU2, provide main
power to your system. Please note that these power connectors are reserved for Supermicro
system use only.

GPU Power Connectors

JGPW1~4 are 8-pin power connectors used for onboard GPU (Graphics Processing Unit)
and video devices. Connect appropriate power cables here to provide power to your GPU/
VGA devices

12V 8-pin Power

Pin Denitions

Pin# Denition

1 - 4 Ground

5 - 8 +12V

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

JGPW4

FAN8FAN7

JVGA1

JPB1

JPG1

JCOM1

SXB1A

PCI-E 3.0 X4PCH SLOT2

CPU1 SXB1B

PCI-E 3.0 X16

CPU2 SXB1C

PCI-E 3.0 X16

BAR CODE

IPMI CODE

MAC CODE

SAN MAC

CPU1

FAN5 FAN4FAN3

FAN6

LEDM1

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

U1

JUSB1

USB2/3

JSDCARD1

JBT1

LED3

LED2

JPQAT

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JGPW3

JUIDB2

LED1

1. PSU1

JIPMILAN

JLAN1JLAN2

PCH SLOT3 PCI-E 3.0 X4

JPL1

JP5

JWD1

LED6

BT1

JRK1

JPME2

JTPM1

2. PSU2

3. JGPW1

4. JGPW2

5. JGPW3

USB4/5

(3.0)

I-SATA 0~7

JS1

CN4

B37 B1

CN5

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

S-SATA0

S-SATA1

JSD1

JSD2

JSW0

1

PSU2

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

CPU2

U1

FAN2FAN1

6. JGPW4

2

PSU1

JGPW1

USB0/1(2.0)

P2-DIMMC2 P2-DIMMC1

JUSB3

JF1

JL1

JGPW2

3

4

56

47

Super X11DSF-E User's Manual

Headers

Onboard Fan Header

This motherboard has eight headers (FAN1~8). All these 4-pin fan headers are backward­compatible with traditional 3-pin fans. However, onboard fan speed control is available only
when all 4-pin fans are used on the motherboard. Fan speed control is supported by Thermal

Management via IPMI 2.0 interface. See the table below for pin denitions.

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

JGPW4

FAN8FAN7

JVGA1

JPB1

JPG1

JCOM1

SXB1A

PCI-E 3.0 X4PCH SLOT2

CPU1 SXB1B

PCI-E 3.0 X16

CPU2 SXB1C

PCI-E 3.0 X16

BAR CODE

IPMI CODE

MAC CODE

SAN MAC

CPU1

FAN5 FAN4 FAN3

FAN6

LEDM1

JSDCARD1

LED3

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

U1

USB2/3

JUSB1

JBT1

LED2

JPQAT

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JGPW3

JUIDB2

LED1

JIPMILAN

JLAN1JLAN2

PCH SLOT3 PCI-E 3.0 X4

JPL1

JP5

JWD1

LED6

BT1

JRK1

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

JS1

CN4

B37 B1

CN5

S-SATA1

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

S-SATA0

JSD1

JSD2

JSW0

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

PSU2

Fan Header

Pin Denitions

Pin# Denition

1 Ground (Black)

2 +12V (Red)

3 Tachometer

4 PWM Control

1. FAN 1

2. FAN 2

3. FAN 3

JF1

4. FAN 4

CPU2

U1

5. FAN 5

6. FAN 6

7. FAN 7

8. FAN 8

FAN2FAN1

JL1

JGPW2

56 4 3

48

2 18 7

Chapter 2: Installation

TPM Header

The Trusted Platform Module (TPM)/Port 80 is located at JTPM1 and is available from
SMCI (optional). A TPM/Port 80 connector is a security device that supports encryption and
authentication in hard drives. It allows the motherboard to deny access if the TPM associated

with the hard drive is not installed in the system. See the table below for pin denitions.

TPM/Port 80 Header

Pin Denitions

Pin # Denition Pin # Denition

1 +3.3V 2 SPI_CS#

3 RESET# 4 SPI_MISO

5 SPI_CLK 6 GND

7 SPI_MOSI 8

9 +3.3V Stdby 10 SPI_IRQ

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

CPU1

SXB1A

PCI-E 3.0 X4PCH SLOT2

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JVGA1

JPB1

JCOM1

LEDM1

BAR CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

U1

JUIDB2

BT1

(3.0)

I-SATA 0~7

CN4

B37 B1

CN5

JIPMILAN

JPL1

JP5

JWD1

JPME2

JTPM1

USB4/5

S-SATA1

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

LED1

PCH SLOT3 PCI-E 3.0 X4

JRK1

1

S-SATA0

JSD2

JSW0

1. TPM/Port 80 Header

JSD1

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

JF1

PSU2

CPU2

U1

JPG1

JUSB1

USB2/3

JSDCARD1

JBT1

LED3

LED2

JLAN1JLAN2

LED6

JPQAT

JS1

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JGPW4

FAN8FAN7

FAN5 FAN4FAN3

FAN6

JGPW3

49

FAN2FAN1

JL1

JGPW2

Super X11DSF-E User's Manual

RAID Key Header

A RAID key header is located at JRK1 on the motherboard and is used to support onboard
NVMe devices.

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

JGPW4

FAN8FAN7

JVGA1

JPB1

JPG1

JCOM1

SXB1A

PCI-E 3.0 X4PCH SLOT2

CPU1 SXB1B

PCI-E 3.0 X16

CPU2 SXB1C

PCI-E 3.0 X16

BAR CODE

IPMI CODE

MAC CODE

SAN MAC

CPU1

U1

FAN5 FAN4 FAN3

FAN6

LEDM1

USB2/3

JSDCARD1

LED3

LED2

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

JUSB1

JBT1

JPQAT

BIOS LICENSE

JSW1

JGPW3

JIPMILAN

JLAN1JLAN2

JPL1

JP5

JWD1

LED6

BT1

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

JS1

S-SATA1

CN4

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

B37 B1

CN6

CN5

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JUIDB2

LED1

PCH SLOT3 PCI-E 3.0 X4

JRK1

JSD2

JSW0

1

1. RAID Key

S-SATA0

JSD1

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

FAN2FAN1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

JF1

JL1

JGPW2

PSU2

CPU2

U1

50

Chapter 2: Installation

Chassis Intrusion

A Chassis Intrusion header is located at JL1 on the motherboard. Attach the appropriate cable
from the chassis to inform you of a chassis intrusion when the chassis is opened. Refer to

the table below for pin denitions.

Chassis Intrusion

Pin Denitions

Pin# Denition

1 Intrusion Input

2 Ground

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

CPU1

SXB1A

PCI-E 3.0 X4PCH SLOT2

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JVGA1

JPB1

JCOM1

LEDM1

BAR CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

U1

JUIDB2

JLAN1JLAN2

BT1

CN4

B37 B1

CN5

JIPMILAN

JPL1

JP5

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

JUSBA1

USB7(3.0)

CPU2 PCI-E 3.0 X32

CN6

JWD1

S-SATA1

JPWR2

LED1

PCH SLOT3 PCI-E 3.0 X4

JRK1

S-SATA0

JSD2

JSW0

1. Chassis Intrusion

JSD1

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

JF1

PSU2

CPU2

U1

JPG1

JUSB1

USB2/3

JSDCARD1

LED3

JBT1

LED2

LED6

JPQAT

JS1

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JGPW4

FAN8FAN7

FAN5 FAN4FAN3

FAN6

JGPW3

51

FAN2FAN1

JL1

1

JGPW2

Super X11DSF-E User's Manual

NVMe Slots (PCI-E 3.0 x32)

There are two PCI-E 3.0 x32 slots with Tray Cable Connector Interface connections on the
motherboard. These slots offer 32 NVMe connections which support 36 M.3 (32 NVMe M.3
+ 4 SATA M.3) connections, or GPU devices.

1

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

SXB1A

PCI-E 3.0 X4PCH SLOT2

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JVGA1

JPB1

JCOM1

LEDM1

BAR CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

JUIDB2

JIPMILAN

JPL1

JP5

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

JUSBA1

USB7(3.0)

CPU2 PCI-E 3.0 X32

CN6

JWD1

JRK1

S-SATA1

JPWR2

2

LED1

PCH SLOT3 PCI-E 3.0 X4

S-SATA0

JSD2

JSW0

1. CPU1 PCI-E 3.0 x32

2. CPU2 PCI-E 3.0 x32

JSD1

PSU2

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

JF1

JPG1

JUSB1

USB2/3

JSDCARD1

JBT1

LED3

LED2

LED6

JPQAT

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JLAN1JLAN2

BT1

JS1

CN4

B37 B1

CN5

JGPW4

FAN8FAN7

CPU1

U1

FAN5 FAN4FAN3

FAN6

JGPW3

52

CPU2

U1

JL1

FAN2FAN1

JGPW2

Chapter 2: Installation

I-SATA 3.0 and S-SATA 3.0 Ports

The X11DSF-E has eight SATA 3.0 ports located at JS1, and two SATA DOM (S-SATA0,
S-SATA1) ports. These SATA ports provide a serial-link signal connection which is faster than
a Parallel ATA connection.

SATA 3.0 Port

Pin Denitions

Pin# Signal

1 Ground

2 SATA_TXP

3 SATA_TXN

4 Ground

5 SATA_RXN

6 SATA_RXP

7 Ground

SXB1A

JIPMILAN

JUIDB2

LED1

PCH SLOT3 PCI-E 3.0 X4

JVGA1

JPB1

JPG1

JCOM1

LEDM1

JUSB1

USB2/3

JLAN1JLAN2

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

JGPW4

FAN8FAN7

PCI-E 3.0 X4PCH SLOT2

CPU1 SXB1B

PCI-E 3.0 X16

CPU2 SXB1C

PCI-E 3.0 X16

BAR CODE

IPMI CODE

MAC CODE

SAN MAC

CPU1

U1

FAN5 FAN4FAN3

FAN6

JSDCARD1

JBT1

LED3

LED2

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

JPQAT

1

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JGPW3

JPL1

JP5

JWD1

LED6

BT1

JRK1

JPME2

JTPM1

USB4/5

(3.0)

23

I-SATA 0~7

JS1

CN4

B37 B1

CN5

S-SATA1

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

S-SATA0

JSD1

JSD2

JSW0

PSU2

CPU2

1. JS1

2. S-SATA0

3. S-SATA1

PSU1

P2-DIMMC2 P2-DIMMC1

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

U1

FAN2FAN1

JGPW1

USB0/1(2.0)

JUSB3

JF1

JL1

JGPW2

53

Super X11DSF-E User's Manual

2.8 Jumper Settings

How Jumpers Work

Jumpers are used to modify the operation of the motherboard by creating shorts between
two pins to change the function of the connector. In this case, jumpers can be used to

choose between optional settings. Pin 1 is identied with a square solder pad on the printed

circuit board. See the diagram at right for an example of jumping pins 1 and 2. Refer to the
motherboard layout page for jumper locations.

Note: On two-pin jumpers, "Closed" means the jumper is on and "Open" means the
jumper is off the pins.

Connector

Pins

Jumper

Setting

3 2 1

3 2 1

54

Chapter 2: Installation

CMOS Clear

JBT1 is used to clear CMOS and will also clear any passwords. Instead of pins, this jumper
consists of contact pads to prevent accidentally clearing the contents of CMOS.

To Clear CMOS

1. First power down the system and unplug the power cord(s).

2. Remove the cover of the chassis to access the motherboard.

3. Remove the onboard battery from the motherboard.

4. Short the CMOS pads with a metal object such as a small screwdriver for at least four
seconds.

5. Remove the screwdriver (or shorting device).

6. Replace the cover, reconnect the power cord(s), and power on the system.

Note: Clearing CMOS will also clear all passwords.

Do not use the PW_ON connector to clear CMOS.

JLAN1JLAN2

BT1

(3.0)

I-SATA 0~7

CN4

B37 B1

CN5

JIPMILAN

JPL1

JP5

JWD1

JPME2

JTPM1

USB4/5

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

PCH SLOT3 PCI-E 3.0 X4

JRK1

S-SATA1

JUIDB2

LED1

S-SATA0

JSD1

JSD2

JSW0

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

SXB1A

PCI-E 3.0 X4PCH SLOT2

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JVGA1

JPB1

JCOM1

LEDM1

BAR CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

JPG1

JUSB1

USB2/3

JSDCARD1

LED3

JBT1

LED2

1

JPQAT

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

LED6

JS1

JBT1 contact pads

1. Clear CMOS

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

JF1

PSU2

JGPW4

FAN8FAN7

CPU1

U1

FAN5 FAN4FAN3

FAN6

JGPW3

55

CPU2

U1

JL1

FAN2FAN1

JGPW2

Super X11DSF-E User's Manual

Intel® QuickAssist Technology (QAT) Enable/Disable

The X11DSF-E supports Intel® QuickAssist Technology (Intel QAT), which offers high-prole
security and compression acceleration to standard server platforms in a software-dened

infrastructure. JPQAT1 is used to enable or disable QAT support. JPQAT2 (with JPQAT1
Enabled) allows the user to select the desired link. See the table below for jumper settings.

QAT Enable/Disable

Jumper Settings

JPQAT1 JPQAT2

0 0 x16 to RSC-X-66

0 1 No Connection

1 0

1 1 x16 to PCH QAT

Setting 1-2: 1 (Enabled)

Setting 2-3: 0 (Disabled)

x8 to PCH QAT, x8 to

RSC-X-66

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

CPU1

SXB1A

PCI-E 3.0 X16

PCI-E 3.0 X16

PCI-E 3.0 X4PCH SLOT2

IPMI CODE

MAC CODE

SAN MAC

JCOM1

BAR CODE

JVGA1

JPB1

JPG1

LEDM1

JSDCARD1

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

U1

JUSB1

USB2/3

JBT1

LED3

LED2

JPQAT

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JUIDB2

LED1

JIPMILAN

JLAN1JLAN2

PCH SLOT3 PCI-E 3.0 X4

JPL1

JP5

JWD1

LED6

BT1

JRK1

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

JS1

CN4

B37 B1

CN5

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

S-SATA0

S-SATA1

JSD1

JSD2

JSW0

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

U1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

JF1

PSU2

CPU2

JGPW4

FAN8FAN7

FAN5 FAN4FAN3

FAN6

JGPW3

56

FAN2FAN1

JL1

JGPW2

Chapter 2: Installation

VGA Enable/Disable

JPG1 allows you to enable or disable the VGA port using the onboard graphics controller.
The default setting is Enabled.

VGA Enable/Disable

Jumper Settings

Jumper Setting Denition

Pins 1-2 Enabled

Pins 2-3 Disabled

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

CPU1

SXB1A

PCI-E 3.0 X4PCH SLOT2

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JVGA1

JPB1

JCOM1

LEDM1

BAR CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

U1

JUIDB2

JLAN1JLAN2

BT1

CN4

B37 B1

CN5

JIPMILAN

JPL1

JP5

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

JUSBA1
USB7(3.0)

CPU2 PCI-E 3.0 X32

CN6

JWD1

S-SATA1

JPWR2

LED1

PCH SLOT3 PCI-E 3.0 X4

JRK1

S-SATA0

JSD2

JSW0

1. VGA Enable/Disable

JSD1

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

JF1

PSU2

CPU2

U1

JPG1

JUSB1

USB2/3

1

JSDCARD1

LED3

JBT1

LED2

LED6

JPQAT

JS1

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JGPW4

FAN8FAN7

FAN5 FAN4FAN3

FAN6

JGPW3

57

FAN2FAN1

JL1

JGPW2

Super X11DSF-E User's Manual

Manufacturing Mode Select

Close JPME2 to bypass SPI ash security and force the system to use the Manufacturing
Mode, which will allow you to ash the system rmware from a host server to modify system

settings. See the table below for jumper settings.

Manufacturing Mode Select

Jumper Settings

Jumper Setting Denition

Pins 1-2 Normal (Default)

Pins 2-3 Manufacturing Mode

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

JGPW4

FAN8FAN7

JVGA1

JPB1

JPG1

JCOM1

SXB1A

PCI-E 3.0 X4PCH SLOT2

CPU1 SXB1B

PCI-E 3.0 X16

CPU2 SXB1C

PCI-E 3.0 X16

BAR CODE

IPMI CODE

MAC CODE

SAN MAC

CPU1

FAN5 FAN4FAN3

FAN6

LEDM1

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

U1

JUSB1

USB2/3

JSDCARD1

JBT1

LED3

LED2

JPQAT

BIOS LICENSE

JSW1

JGPW3

JIPMILAN

JLAN1JLAN2

JPL1

JP5

JWD1

LED6

BT1

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

JS1

CN4

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

B37 B1

CN6

CN5

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

PCH SLOT3 PCI-E 3.0 X4

JRK1

S-SATA1

JUIDB2

LED1

1. Manufacturing Mode Select

1

S-SATA0

JSD1

JSD2

JSW0

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

U1

FAN2FAN1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

JF1

JL1

JGPW2

PSU2

CPU2

58

Chapter 2: Installation

Watch Dog Timer

The Watch Dog function is a monitor controlled by the JWD1 that can reboot the system
when a software application hangs. It must be enabled in BIOS, where the default is set to
Reset. In the case an application hangs, jumping pins 1-2 will cause Watch Dog to reset the
system while jumping pins 2-3 will generate a non-maskable interrupt signal.

Watch Dog

Jumper Settings

Jumper Setting Denition

Pins 1-2 Reset

Pins 2-3 NMI

Open Disabled

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

CPU1

SXB1A

PCI-E 3.0 X4PCH SLOT2

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JVGA1

JPB1

JCOM1

LEDM1

BAR CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

U1

JUIDB2

JLAN1JLAN2

1

CN4

B37 B1

CN5

BT1

USB4/5

(3.0)

I-SATA 0~7

CN6

JIPMILAN

JPL1

JP5

JWD1

JPME2

JTPM1

S-SATA1

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

LED1

PCH SLOT3 PCI-E 3.0 X4

JRK1

S-SATA0

JSD2

JSW0

1. Watch Dog

JSD1

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

JF1

PSU2

CPU2

U1

JPG1

JUSB1

USB2/3

JSDCARD1

LED3

JBT1

LED2

LED6

JPQAT

JS1

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JGPW4

FAN8FAN7

FAN5 FAN4FAN3

FAN6

JGPW3

59

FAN2FAN1

JL1

JGPW2

Super X11DSF-E User's Manual

2.9 LED Indicators

IPMI-Dedicated LAN LEDs

An IPMI-dedicated LAN is located on the I/O Backplane of the motherboard. The amber
LED on the right indicates activity, while the green LED on the left indicates the speed of the
connection. See the tables at right for more information.

IPMI LAN

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

SXB1A

PCI-E 3.0 X16

PCI-E 3.0 X16

MAC CODE

SAN MAC

1. IPMI LAN LEDs

JVGA1

JPB1

JPG1

JCOM1

PCI-E 3.0 X4PCH SLOT2

BAR CODE

IPMI CODE

JUSB1

LEDM1

USB2/3

JSDCARD1

JBT1

LED3

LED2

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

JPQAT

JLAN1JLAN2

LED6

JS1

CN4

BIOS LICENSE

B37 B1

JSW1

CN5

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

BT1

(3.0)

I-SATA 0~7

CN6

1

JIPMILAN

JPL1

JP5

JWD1

JPME2

JTPM1

USB4/5

S-SATA1

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

JUIDB2

LED1

PCH SLOT3 PCI-E 3.0 X4

JRK1

JSD2

Link LED

Activity LED

IPMI LAN Link LED (Left) &

Activity LED (Right)

Color State Denition

Link (Left) Green: Solid 100 Mbps

Activity (Right) Amber:

Active

Blinking

1

S-SATA0

JSD1

JSW0

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

PSU2

JF1

CPU1

JGPW4

FAN8FAN7

U1

FAN5 FAN4FAN3

FAN6

JGPW3

CPU2

U1

JL1

FAN2FAN1

JGPW2

60

Chapter 2: Installation

BMC Heartbeat LED

LEDM1 is the BMC heartbeat LED. When the LED is blinking green, BMC is functioning
normally. See the table below for the LED status.

Onboard Power LED Indicator

LED Color Denition

Green:

Blinking

BMC Normal

Onboard Power LED

The Onboard Power LED is located at LED2 on the motherboard. When this LED is on, the
system is also on. Be sure to turn off the system and unplug the power cord before removing
or installing components. Refer to the table below for more information.

Onboard Power LED Indicator

LED Color Denition

Off System Off

Green System On

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

JGPW4

FAN8FAN7

JVGA1

JPB1

JPG1

JCOM1

SXB1A

JUSB1

LEDM1

USB2/3

1

PCI-E 3.0 X4PCH SLOT2

CPU1 SXB1B

PCI-E 3.0 X16

CPU2 SXB1C

PCI-E 3.0 X16

BAR CODE

IPMI CODE

MAC CODE

SAN MAC

CPU1

FAN5 FAN4FAN3

FAN6

2

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

U1

JSDCARD1

JBT1

LED3

LED2

JPQAT

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JGPW3

JUIDB2

LED1

JIPMILAN

JLAN1JLAN2

PCH SLOT3 PCI-E 3.0 X4

JPL1

JP5

JWD1

LED6

BT1

JRK1

JPME2

JTPM1

USB4/5

(3.0)

I-SATA 0~7

JS1

CN4

B37 B1

CN5

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

S-SATA0

S-SATA1

JSD1

JSD2

JSW0

1. BMC Heartbeat LED

2. Onboard Power LED

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

U1

FAN2FAN1

PSU1

P2-DIMMC2 P2-DIMMC1

PSU2

CPU2

JGPW1

USB0/1(2.0)

JUSB3

JF1

JL1

JGPW2

61

Super X11DSF-E User's Manual

Unit ID LED

A rear UID LED indicator at LE1 is located near the UID switch on the I/O back panel. This

UID indicator provides easy identication of a system.unit that may need service.

1

UID SWITCH

UID LED

CN1

JPWR1

CPU1 PCI-E 3.0 X32

CN3

CN2

P1-DIMMF1 P1-DIMMF2 P1-DIMME2P1-DIMME1 P1-DIMMD1 P1-DIMMD2

CPU1 SXB1B

CPU2 SXB1C

CPU1

SXB1A

PCI-E 3.0 X4PCH SLOT2

PCI-E 3.0 X16

PCI-E 3.0 X16

IPMI CODE

MAC CODE

SAN MAC

JVGA1

JPB1

JCOM1

LEDM1

BAR CODE

X11DSF-E
REV:1.00

DESIGNED IN USA

P1-DIMMA2 P1-DIMMA1 P1-DIMMB1P1-DIMMB2 P1-DIMMC2 P1-DIMMC1

U1

JUIDB2

1

JIPMILAN

LED1

PCH SLOT3 PCI-E 3.0 X4

UID LED

JPG1

JUSB1

USB2/3

JLAN1JLAN2

LED Indicator

JPL1

JSDCARD1

JBT1

LED3

LED2

LED6

JPQAT

BIOS LICENSE

JSW1

P2-DIMMF1 P2-DIMME1P2-DIMMF2 P2-DIMME2 P2-DIMMD1 P2-DIMMD2

JS1

BT1

(3.0)

I-SATA 0~7

CN4

B37 B1

CN5

JP5

JWD1

JPME2

JTPM1

USB4/5

S-SATA1

JUSBA1

USB7(3.0)

JPWR2

CPU2 PCI-E 3.0 X32

CN6

JRK1

S-SATA0

JSD2

JSW0

LED Color Denition

Blue: On Unit Identied

1. UID LED

JSD1

PSU2

CPU2

U1

P2-DIMMA2 P2-DIMMB2P2-DIMMA1 P2-DIMMB1

PSU1

P2-DIMMC2 P2-DIMMC1

JGPW1

USB0/1(2.0)

JUSB3

JF1

JGPW4

FAN8FAN7

FAN5 FAN4FAN3

FAN6

JGPW3

62

FAN2FAN1

JL1

JGPW2

Chapter 3: Troubleshooting

Chapter 3

Troubleshooting

3.1 Troubleshooting Procedures

Use the following procedures to troubleshoot your system. If you have followed all of the
procedures below and still need assistance, refer to the ‘Technical Support Procedures’ and/
or ‘Returning Merchandise for Service’ section(s) in this chapter. Always disconnect the AC
power cord before adding, changing or installing any non hot-swap hardware components.

Before Power On

1. Check that the power LED on the motherboard is on.

2. Make sure that the power connector is connected to your power supply.

3. Make sure that no short circuits exist between the motherboard and chassis.

4. Disconnect all cables from the motherboard, including those for the keyboard and
mouse.

5. Remove all add-on cards.

6. Install a CPU, a heatsink*, and connect the internal speaker and the power LED to the
motherboard. Check all jumper settings as well. (Make sure that the heatsink is fully
seated.)

7. Use the correct type of onboard CMOS battery as recommended by the manufacturer.
To avoid possible explosion, do not install the CMOS battery upside down.

No Power

1. Make sure that no short circuits exist between the motherboard and the chassis.

2. Verify that all jumpers are set to their default positions.

3. Check that the 115V/230V switch on the power supply is properly set.

4. Turn the power switch on and off to test the system.

5. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

63

Super X11DSF-E User's Manual

No Video

1. If the power is on but you have no video, remove all the add-on cards and cables.

2. Use the speaker to determine if any beep codes exist. Refer to Appendix A for details on
beep codes.

System Boot Failure

If the system does not display POST (Power-On-Self-Test) or does not respond after the
power is turned on, check the following:

1. Check for any error beep from the motherboard speaker.

• If there is no error beep, try to turn on the system without DIMM modules installed. If there

is still no error beep, replace the motherboard.

• If there are error beeps, clear the CMOS settings by unplugging the power cord and con-

tacting both pads on the CMOS Clear Jumper (JBT1). Refer to chapter 2.

2. Remove all components from the motherboard, especially the DIMM modules. Make
sure that system power is on and that memory error beeps are activated.

3. Turn on the system with only one DIMM module installed. If the system boots, check for
bad DIMM modules or slots by following the Memory Errors Troubleshooting procedure
in this Chapter.

Memory Errors

1. Make sure that the DIMM modules are properly and fully installed.

2. Conrm that you are using the correct memory. Also, it is recommended that you use
the same memory type and speed for all DIMMs in the system. See Section 2.4 for
memory details.

3. Check for bad DIMM modules or slots by swapping modules between slots and noting
the results.

4. Check the power supply voltage 115V/230V switch.

64

Chapter 3: Troubleshooting

Losing the System's Setup Conguration

1. Make sure that you are using a high quality power supply. A poor quality power supply
may cause the system to lose the CMOS setup information. Refer to Section 1.6 for
details on recommended power supplies.

2. The battery on your motherboard may be old. Check to verify that it still supplies
~3VDC. If it does not, replace it with a new one.

3. If the above steps do not x the setup conguration problem, contact your vendor for
repairs.

When the System Becomes Unstable

A. If the system becomes unstable during or after OS installation, check the following:

1. CPU/BIOS support: Make sure that your CPU is supported and that you have the latest
BIOS installed in your system.

2. Memory support: Make sure that the memory modules are supported by testing the
modules using memtest86 or a similar utility.

Note: Refer to the product page on our website at http://www.supermicro.com for
memory and CPU support and updates.

3. HDD support: Make sure that all hard disk drives (HDDs) work properly. Replace the
bad HDDs with good ones.

4. System cooling: Check the system cooling to make sure that all heatsink fans and CPU/
system fans, etc., work properly. Check the hardware monitoring settings in the IPMI
to make sure that the CPU and system temperatures are within the normal range. Also
check the front panel Overheat LED and make sure that it is not on.

5. Adequate power supply: Make sure that the power supply provides adequate power to
the system. Make sure that all power connectors are connected. Please refer to our
website for more information on the minimum power requirements.

6. Proper software support: Make sure that the correct drivers are used.

B. If the system becomes unstable before or during OS installation, check the following:

1. Source of installation: Make sure that the devices used for installation are working
properly, including boot devices such as CD.

2. Cable connection: Check to make sure that all cables are connected and working
properly.

65

Super X11DSF-E User's Manual

3. Using the minimum conguration for troubleshooting: Remove all unnecessary

components (starting with add-on cards rst), and use the minimum conguration (but

with a CPU and a memory module installed) to identify the trouble areas. Refer to the
steps listed in Section A above for proper troubleshooting procedures.

4. Identifying bad components by isolating them: If necessary, remove a component in
question from the chassis, and test it in isolation to make sure that it works properly.
Replace a bad component with a good one.

5. Check and change one component at a time instead of changing several items at the
same time. This will help isolate and identify the problem.

6. To nd out if a component is good, swap this component with a new one to see if the
system will work properly. If so, then the old component is bad. You can also install the
component in question in another system. If the new system works, the component is
good and the old system has problems.

66

Chapter 3: Troubleshooting

3.2 Technical Support Procedures

Before contacting Technical Support, please take the following steps. Also, note that as a

motherboard manufacturer, we do not sell directly to end-users, so it is best to rst check with

your distributor or reseller for troubleshooting services. They should know of any possible

problem(s) with the specic system conguration that was sold to you.

1. Please review the ‘Troubleshooting Procedures’ and 'Frequently Asked Questions'
(FAQs) sections in this chapter or see the FAQs on our website before contacting
Technical Support.

2. BIOS upgrades can be downloaded from our website. Note: Not all BIOS can be

ashed depending on the modications to the boot block code.

3. If you still cannot resolve the problem, include the following information when contacting
us for technical support:

• Motherboard model and PCB revision number

• BIOS release date/version (this can be seen on the initial display when your system rst

boots up)

• System conguration

An example of a Technical Support form is posted on our website.

Distributors: For immediate assistance, please have your account number ready when
contacting our technical support department by e-mail.

67

Super X11DSF-E User's Manual

3.3 Frequently Asked Questions

Question: What type of memory does my motherboard support?

Answer: The X11DSF-E motherboard supports up to 3TB of 3DS LRDIMM/LRDIMM/3DS

RDIMM/RDIMM/NV-DIMM DDR4 ECC 2666/2400/2133 MHz memory in 24 memory slots See
Section 2.4 for details on installing memory.

Question: How do I update my BIOS?

Answer: It is recommended that you do not upgrade your BIOS if you are not experiencing

any problems with your system. Updated BIOS les are located on our website at http://www.

supermicro.com. Please check our BIOS warning message and the information on how to

update your BIOS on our website. Select your motherboard model and download the BIOS

le to your computer. Also, check the current BIOS revision to make sure that it is newer
than your BIOS before downloading. You can choose from the zip le and the .exe le. If
you choose the zip BIOS le, please unzip the BIOS le onto a bootable USB device. Run
the batch le using the format FLASH.BAT lename.rom from your bootable USB device to
ash the BIOS. Then, your system will automatically reboot.

Question: Why can't I turn off the power using the momentary power on/off switch?

Answer: The instant power off function is controlled in BIOS by the Power Button mode

setting. When the On/Off feature is enabled, the motherboard will have instant off capabilities
as long as the BIOS has control of the system. When the Standby or Suspend feature is

enabled or when the BIOS is not in control such as during memory count (the rst screen

that appears when the system is turned on), the momentary on/off switch must be held for
more than four seconds to shut down the system. This feature is required to implement the
ACPI features on the motherboard.

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3.4 Battery Removal and Installation

Battery Removal

To remove the onboard battery, follow the steps below:

1. Power off your system and unplug your power cable.

2. Using a tool such as a pen or a small screwdriver, push the battery lock outwards to
unlock it. Once unlocked, the battery will pop out from the holder.

3. Remove the battery.

Proper Battery Disposal

Please handle used batteries carefully. Do not damage the battery in any way; a damaged
battery may release hazardous materials into the environment. Do not discard a used battery

in the garbage or a public landll. Please comply with the regulations set up by your local

hazardous waste management agency to dispose of your used battery properly.

Battery Installation

1. To install an onboard battery, follow the steps 1 & 2 above and continue below:

2. Identify the battery's polarity. The positive (+) side should be facing up.

3. Insert the battery into the battery holder and push it down until you hear a click to
ensure that the battery is securely locked.

Note: When replacing a battery, be sure to only replace it with the same type.

OR

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Super X11DSF-E User's Manual

3.5 Returning Merchandise for Service

A receipt or copy of your invoice marked with the date of purchase is required before any
warranty service will be rendered. You can obtain service by calling your vendor for a Returned
Merchandise Authorization (RMA) number. When returning to the manufacturer, the RMA
number should be prominently displayed on the outside of the shipping carton and mailed
prepaid or hand-carried. Shipping and handling charges will be applied for all orders that
must be mailed when service is complete.

For faster service, RMA authorizations may be requested online (http://www.supermicro.com/

support/rma/).

This warranty only covers normal consumer use and does not cover damages incurred in
shipping or from failure due to the alteration, misuse, abuse or improper maintenance of
products.

During the warranty period, contact your distributor rst for any product problems.

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Chapter 4: BIOS

Chapter 4

BIOS

4.1 Introduction

This chapter describes the AMIBIOS™ Setup utility for the motherboard. The BIOS is stored

on a chip and can be easily upgraded using a ash program.

Note: Due to periodic changes to the BIOS, some settings may have been added
or deleted and might not yet be recorded in this manual. Please refer to the Manual

Download area of our website for any changes to BIOS that may not be reected in

this manual.

Starting the Setup Utility

To enter the BIOS Setup Utility, hit the <Delete> key while the system is booting-up. (In
most cases, the <Delete> key is used to invoke the BIOS setup screen. There are a few
cases when other keys are used, such as <F1>, <F2>, etc.) Each main BIOS menu option
is described in this manual.

The Main BIOS screen has two main frames. The left frame displays all the options that can

be congured. “Grayed-out” options cannot be congured. The right frame displays the key

legend. Above the key legend is an area reserved for a text message. When an option is
selected in the left frame, it is highlighted in white. Often a text message will accompany it.
(Note that BIOS has default text messages built in. We retain the option to include, omit, or
change any of these text messages.) Settings printed in Bold are the default values.

A " " indicates a submenu. Highlighting such an item and pressing the <Enter> key will
open the list of settings within that submenu.

The BIOS setup utility uses a key-based navigation system called hot keys. Most of these
hot keys (<F1>, <F2>, <F3>, <Enter>, <ESC>, <Arrow> keys, etc.) can be used at any time
during the setup navigation process.

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4.2 Main Setup

When you rst enter the AMI BIOS setup utility, you will enter the Main setup screen. You can

always return to the Main setup screen by selecting the Main tab on the top of the screen. The
Main BIOS setup screen is shown below. The following Main menu items will be displayed:

System Date/System Time

Use this option to change the system date and time. Highlight System Date or System Time
using the arrow keys. Enter new values using the keyboard. Press the <Tab> key or the arrow

keys to move between elds. The date must be entered in MM/DD/YYYY format. The time

is entered in HH:MM:SS format.

Note: The time is in the 24-hour format. For example, 5:30 P.M. appears as 17:30:00.

The date's default value is 01/01/2015 after RTC reset.

Supermicro X11DSF-E

BIOS Version

This item displays the version of the BIOS ROM used in the system.

Build Date

This item displays the date when the version of the BIOS ROM used in the system was built.

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Memory Information

Total Memory

This item displays the total size of memory available in the system.

Memory Speed

This item displays the memory speed available in the system.

Chapter 4: BIOS

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X11DSF-E User's Manual

4.3 Advanced Setup Congurations

Use the arrow keys to select Boot Setup and press <Enter> to access the submenu items.

Warning: Take caution when changing the Advanced settings. An incorrect value, a very high

DRAM frequency, or an incorrect DRAM timing setting may make the system unstable. When

this occurs, revert to the default to the manufacture default settings.

Boot Feature

Quiet Boot

Use this feature to select the screen display between the POST messages and the OEM logo
upon bootup. Select Disabled to display the POST messages. Select Enabled to display the
OEM logo instead of the normal POST messages. The options are Disabled and Enabled.

Option ROM Messages

Use this feature to set the display mode for the Option ROM. Select Keep Current to display
the current AddOn ROM setting. Select Force BIOS to use the Option ROM display set by

the system BIOS. The options are Force BIOS and Keep Current.

Bootup NumLock State

Use this feature to set the Power-on state for the <Numlock> key. The options are On and Off.

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Chapter 4: BIOS

Wait For "F1" If Error

Use this feature to force the system to wait until the 'F1' key is pressed if an error occurs.
The options are Disabled and Enabled.

INT19 (Interrupt 19) Capture

Interrupt 19 is the software interrupt that handles the boot disk function. When this item is

set to Immediate, the ROM BIOS of the host adaptors will "capture" Interrupt 19 at bootup

immediately and allow the drives that are attached to these host adaptors to function as

bootable disks. If this item is set to Postponed, the ROM BIOS of the host adaptors will not

capture Interrupt 19 immediately and allow the drives attached to these adaptors to function
as bootable devices at bootup. The options are Immediate and Postponed.

Re-try Boot

If this item is enabled, the BIOS will automatically reboot the system from a specied boot

device after its initial boot failure. The options are Disabled, Legacy Boot, and EFI Boot.

Install Windows 7 USB support

EHCI needs to be supported in order for USB 2.0 to work properly during the installation of
Windows 7; however, EHCI support was removed from X11 DP Motherboard platforms. When
this item is enabled, this feature will allow USB keyboard and mouse to work properly during
installation of Windows 7. After installation of Windows 7 and all the drivers, please disable
this feature. The options are Disabled and Enabled.

Port 61h Bit-4 Emulation

Select Enabled to enable the emulation of Port 61h bit-4 toggling in SMM (System Management
Mode). The options are Disabled and Enabled.

Power Conguration

Watch Dog Function

If enabled, the Watch Dog Timer will allow the system to reset or generate NMI based on
jumper settings when it is expired for more than ve minutes. The options are Disabled and
Enabled.

Restore on AC Power Loss

Use this feature to set the power state after a power outage. Select Stay Off for
the system power to remain off after a power loss. Select Power On for the system
power to be turned on after a power loss. Select Last State to allow the system to
resume its last power state before a power loss. The options are Stay Off, Power On,
and Last State.

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Power Button Function

This feature controls how the system shuts down when the power button is pressed. Select 4
Seconds Override for the user to power off the system after pressing and holding the power
button for 4 seconds or longer. Select Instant Off to instantly power off the system as soon
as the user presses the power button. The options are Instant Off and 4 Seconds Override.

Throttle on Power Fail

When enabled, this feature decreases system power by throttling CPU frequency when power

supply has failed. The options are Disabled and Enabled.

CPU Conguration

Processor Conguration

The following CPU information will display:

• Processor BSP Revision

• Processor Socket

• Processor ID

• Processor Frequency

• Processor Max Ratio

• Processor Min Ratio

• Microcode Revision

• L1 Cache RAM

• L2 Cache RAM

• L3 Cache RAM

• Processor 0 Version

• Processor 1 Version

Hyper-Threading (ALL) (Available when supported by the CPU)

Select Enable to support Intel Hyper-threading Technology to enhance CPU performance.
The options are Disable and Enable.

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Chapter 4: BIOS

Cores Enabled

Use this feature to enable or disable CPU cores in the processor specied by the user. Enter

0 to enable all cores available in the processor. Please note that the maximum of 16 CPU
cores are currently available in each CPU package. The default option is 0.

Execute Disable Bit (Available if supported by the OS & the CPU)

Select Enabled to enable the Execute-Disable Bit which will allow the processor to designate
areas in the system memory where an application code can execute and where it cannot,

thus preventing a worm or a virus from ooding illegal codes to overwhelm the processor

or damage the system during an attack. The default is Enable. (Refer to the Intel® and
Microsoft® websites for more information.)

Intel Virtualization Technology

Use feature to enable the Vanderpool Technology. This technology allows the system to run
several operating systems simultaneously. The options are Disable and Enable.

PPIN Control

Select Unlock/Enable to use the Protected-Processor Inventory Number (PPIN) in the system.
The options are Unlock/Disable and Unlock/Enable.

Hardware Prefetcher (Available when supported by the CPU)

If set to Enabled, the hardware prefetcher will prefetch streams of data and instructions from
the main memory to the L2 cache to improve CPU performance. The options are Disable
and Enable.

Adjacent Cache Prefetch (Available when supported by the CPU)

The CPU prefetches the cache line for 64 bytes if this feature is set to Disabled. The CPU
prefetches both cache lines for 128 bytes as comprised if this feature is set to Enable.

DCU Streamer Prefetcher (Available when supported by the CPU)

Select Enabled to enable the DCU (Data Cache Unit) Streamer Prefetcher which will stream
and prefetch data and send it to the Level 1 data cache to improve data processing and
system performance. The options are Disable and Enable.

DCU IP Prefetcher (Available when supported by the CPU)

Select Enabled for DCU (Data Cache Unit) IP Prefetcher support, which will prefetch IP
addresses to improve network connectivity and system performance. The options are Enable
and Disable.

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LLC Prefetch

If set to Enabled, the hardware prefetcher will prefetch streams of data and instructions from
the main memory to the L3 cache to improve CPU performance. The options are Disable
and Enable.

Extended APIC

Select Enable to activate APIC (Advanced Programmable Interrupt Controller) support. The
options are Disable and Enable.

AES-NI

Select Enable to use the Intel Advanced Encryption Standard (AES) New Instructions (NI) to
ensure data security. The options are Disable and Enable.

Advanced Power Management Conguration

Power Technology

This feature allows for switching between stored CPU Power Management proles. The

options are Disable, Energy Efcient and Custom.

Power Performance Tuning (Available when "Power Technology" is set to Custom

Select BIOS to allow the system BIOS to congure the Power-Performance Tuning Bias

setting below. The options are BIOS Controls EPB and OS Controls EPB.

ENERGY_PERF_BIAS_CFG Mode Energy (ENERGY PERFORMANCE BIAS
CONFIGURATION Mode) (Available when supported by the Processor and when
"Power Performance Tuning" is set to BIOS Controls EPB)

This feature allows the user to set the desired processor power use policy for the machine
by prioritizing system performance or energy savings. Selecting Maximum Performance will
prioritize performance (to its highest potential); however, this may result in maximum power
consumption. The higher the performance is, the higher the power consumption will be.

Select Max Power Efcient to prioritize power saving; however, system performance may

be substantially impacted. The options are Maximum Performance, Performance, Balanced
Performance, Balanced Power, Power, and Max Power Efcient.

CPU P State Control

This feature allows the user to congure the following CPU power settings

Speedstep (Pstates)

Intel SpeedStep Technology allows the system to automatically adjust processor voltage and

core frequency to reduce power consumption and heat dissipation. The options are Disabled

and Enabled.

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Chapter 4: BIOS

EIST PSD Funtion

This feature allows the user to choose between Hardware and Software to control the

processor's frequency and performance (P-state). In HW_ALL mode, the processor hardware

is responsible for coordinating the P-state, and the OS is responsible for keeping the P-state

request up to date on all logical processors. In SW_ALL mode, the OS Power Manager

is responsible for coordinating the P-state, and must initiate the transition on all Logical

Processors. In SW_ANY mode, the OS Power Manager is responsible for coordinating the
P-state and may initiate the transition on any Logical Processors. Options available: HW_ALL/
SW_ALL/SW_ANY. Default setting is HW_ALL.

Turbo Mode

This feature will enable dynamic control of the processor, allowing it to run above stock
frequency. The options are Disable and Enable.

Hardware PM State Control

Hardware P-States

If this feature is set to Disable, hardware will choose a P-state setting for the system based

on an OS request. If this feature is set to Native Mode, hardware will choose a P-state setting

based on OS guidance. If this feature is set to Native Mode with No Legacy Support, hardware
will choose a P-state setting independently without OS guidance. The options are Disable,
Native Mode, Out of Band Mode, and Native Mode with No Legacy Support.

CPU C State Control

Autonomous Core C-State

Select Enable to support Autonomous Core C-State control which will allow the processor
core to control its C-State setting automatically and independently. The options are Enable
and Disable.

CPU C6 Report

Select Enabled to allow the BIOS to report the CPU C6 State (ACPI C3) to the operating
system. During the CPU C6 State, the power to all cache is turned off. The options are
Disable , Enable, and Auto.

Enhanced Halt State (C1E)

Select Enabled to use Enhanced Halt-State technology, which will signicantly reduce the

CPU's power consumption by reducing the CPU's clock cycle and voltage during a Halt-state.
The options are Disable and Enable.

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Package C State Control

Package C State

This feature allows the user to set the limit on the C State package register. The options are
C0/C1 State, C2 State, C6 (Non Retention) State, C6 (Retention) state, No Limit, and Auto..

CPU T State Control

Software Controlled T-States

Select Enable to support Software Controlled Throttling states for CPUs installed on the
motherboard. Such throttling states control the running time of CPUs with the goal of cooling
down CPUs and preventing them from burning out. The options are Disable and Enable.

Chipset Conguration

Warning: Setting the wrong values in the following features may cause the system to malfunc­tion.

North Bridge

This feature allows the user to congure the following North Bridge settings.

UPI Conguration

UPI General Conguration

The following UPI information will display:

• Number of CPU

• Number of IIO

• Current UPI Link Speed

• Current UPI Link Frequency

• UPI Global MMIO Low Base / Limit

• UPI Global MMIO High Base / Limit

• UPI Pci-e Congguration Base / Size

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Chapter 4: BIOS

Degrade Precedence

Use this feature to set degrade precedence when system settings are in conict. Select

Topology Precedence to degrade Features. Select Feature Precedence to degrade
Topology. The options are Topology Precedence and Feature Precedence.

Link L0p Enable

Select Enable for Link L0p support. The options are Enable and Disable.

Link L1 Enable

Select Enable for Link L1 support. The options are Enable and Disable.

IO Directory Cache (IODC)

IO Directory Cache is an 8-entry cache that stores the directory state of remote IIO writes
and memory lookups, and saves directory updates. Use this feature to lower cache to cache
(C2C) transfer latencies. The options are Disable, Auto, Enable for Remote InvItoM Hybrid

Push, InvItoM AllocFlow, Enable for Remote InvItoM Hybrid AllocNonAlloc, and Enable for
Remote InvItoM and Remote WViLF.

SNC

Sub NUMA Clustering (SNC) is a feature that breaks up the Last Level Cache (LLC) into
clusters based on address range. Each cluster is connected to a subset of the memory
controller. Enabling SNC improves average latency and reduces memory access congestion
to achieve higher performance. Select Auto for 1-cluster or 2-clusters depending on IMC
interleave. Select Enable for Full SNC (2-clusters and 1-way IMC interleave). The options
are Disable, Enable, and Auto.

XPT Prefetch

XPT Prefetch speculatively makes a copy to the memory controller of a read request being
sent to the LLC. If the read request maps to the local memory address and the recent

memory reads are likely to miss the LLC, a speculative read is sent to the local memory
controller. The options are Disable and Enable.

KTI Prefetch

KTI Pretech enables memory read to start early on a DDR bus, where the KTI Rx path
will directly create a Memory Speculative Read command to the memory controller. The

options are Disable and Enable.

Stale AtoS

This feature optimizes A to S directory. When all snoop responses found in directory A

are found to be RspI, then all data is moved to directory S and is returned in S-state. The

options are Disable, Enable, and Auto.

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LLC Dead Line Alloc

Select Enable to optimally ll dead lines in LLC. Select Disable to never ll dead lines in

LLC. The options are Disable, Enable, and Auto.

Isoc Mode

Select Enabled for Isochronous support to meet QoS (Quality of Service) requirements.

This feature is especially important for Virtualization Technology. The options are Enable
and Disable.

Memory Conguration

Enforce POR

Select Enable to enforce POR restrictions on DDR4 frequency and voltage programming.

The options are Enabled and Disable.

Memory Frequency

Use this feature to set the maximum memory frequency for onboard memory modules. The

options are Auto, 1333, 1400, 1600, 1800, 1867, 2000, 2133, 2200, and 2400.

Data Scrambling for NVDIMM

Use this festure to enable or disable data scrambling for non-volatile DIMM (NVDIMM)
memory. The options are Auto, Disable, and Enable.

Data Scrambling for DDR4

Use this feature to enable or disable data scrambling for DDR4 memory. The options are

Auto, Disable, and Enable.

tCCD_L Relaxation

Select Enable for tCCD_L to override the SPD. Select Disable for onboard DIMM modules
to run based on memory frequencies. The options are Enable and Disable.

tRWSR Relaxation

Select enable for rRWSR to override the SPD. Select Disable for onboard DIMM modules
to run based on memory frequencies. The options are Enable and Disable.

2X Refresh

This option allows the user to select 2X refresh mode. The options are Auto, Enabled, and
Disabled. The options are Auto and Enable.

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Page Policy

This feature allows the user to determine the desired page mode for IMC. When Auto is
selected, the memory controller will close or open pages based on the current operation.
Closed policy closes that page after reading or writing. Adaptive is similar to open page

policy, but can be dynamically modied. The default is Auto.

IMC Interleaving

This feature allows the user to congure Integrated Memory Controller (IMC) Interleaving

settings. The options are Auto, 1-way Interleave, and 2-way Interleave.

Memory Topology

This feature displays DIMM population information.

Memory RAS Conguration

Use this submenu to congure the following Memory RAS settings.

Static Virtual Lockstep Mode

Select Enable to support Static Virtual Lockstep mode to enhance memory performance.
The options are Disable and Enable.

Mirror Mode

Select Enable to set all 1LM/2LM memory installed in the system on the mirror mode,

which will create a duplicate copy of data stored in the memory to increase memory secu­rity, but it will reduce the memory capacity into half. The options are Enable and Disable.

UEFI ARM Mirror

Select Enable to support the UEFI-based address range mirroring with setup option. The
options are Disable and Enable. The options are Disable and Enable.

Memory Rank Sparing

Select Enable to enable memory-sparing support for memory ranks to improve memory
performance. The options are Disable and Enable.

Correctable Error Threshold

Use this item to specify the threshold value for correctable memory-error logging, which
sets a limit on the maximum number of events that can be logged in the memory-error
log at a given time. The default setting is 10.

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SDDC Plus One (Available when this feature is supported by the CPU & the
item: Intel Run Sure is set to Disable)

SDDC (Single Device Data Correction) checks and corrects single-bit or multiple-bit (4-

bit max.) memory faults that affect an entire single x4 DRAM device. SDDC Plus One
is the enhanced feature to SDDC. SDDC+1 will spare the faulty DRAM device out after

an SDDC event has occurred. After the event, the SDDC+1 ECC mode is activated to
protect against any additional memory failure caused by a ‘single-bit’ error in the same
memory rank. The options are Disable and Enable*. (The option "Enable" can be set as
default when it is supported by the motherboard.)

ADDDC Sparing

Adaptive Double Device Data Correction (ADDDC), which is an enhanced feature to
DDDC, will not issue a performance penalty before a device fails. Please note that virtual

lockstep mode will only start to work for ADDDC after a faulty DRAM module is spared.

The options are Enable and Disable.

Patrol Scrub

Patrol Scrubbing is a process that allows the CPU to correct correctable memory errors

detected on a memory module and send the correction to the requestor (the original

source). When this item is set to Enable, the IO hub will read and write back one cache

line every 16K cycles, if there is no delay caused by internal processing. By using this
method, roughly 64 GB of memory behind the IO hub will be scrubbed every day. The

options are Disable and Enable.

Patrol Scrub Interval

This feature allows you to decide how many hours the system should wait before the
next complete patrol scrub is performed. Use the keyboard to enter a value from 0-24.
The default setting is 24.

IIO Conguration

EV DFX Features

CPU1 Conguration

IOU0 (II0 PCIe Br1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

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Chapter 4: BIOS

IOU1 (II0 PCIe Br2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU2 (II0 PCIe Br3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (II0 PCIe Br4)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP1 (II0 PCIe Br5)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

CPU1 PcieBr0D00F0 - Port 1A/ PcieBr1D02F0 - Port 1C/ PcieBr2D00F0 - Port
2A/ PcieBr3D02F0 - Port 2C

Link Speed

Use this item to select the link speed for the PCI-E port specied by the user. The op­tions are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

PCI-E Port Max Payload Size

Selecting Auto for this feature will enable the motherboard to automatically detect the
maximum Transaction Layer Packet (TLP) size for the connected PCI-E device, allowing

for maximum I/O efciency. Selecting 128B or 256B will designate maximum packet size

of 128 or 256. Options are Auto, 128, and 256. Auto is enabled by default.

CPU2 Conguration

IOU0 (II0 PCIe Br1)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

IOU1 (II0 PCIe Br2)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

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IOU2 (II0 PCIe Br3)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP0 (II0 PCIe Br4)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

MCP1 (II0 PCIe Br5)

This item congures the PCI-E port Bifuraction setting for a PCI-E port specied by the

user. The options are x4x4x4x4, x4x4x8, x8x4x4, x8x8, x16, and Auto.

CPU2 PcieBr0D00F0 - Port 1A/ PcieBr1D02F0 - Port 1C/ PcieBr2D00F0 - Port
2A/ PcieBr3D02F0 - Port 2C

Link Speed

Use this item to select the link speed for the PCI-E port specied by the user. The op­tions are Auto, Gen 1 (2.5 GT/s), Gen 2 (5 GT/s), and Gen 3 (8 GT/s).

PCI-E Port Max Payload Size

Selecting Auto for this feature will enable the motherboard to automatically detect the
maximum Transaction Layer Packet (TLP) size for the connected PCI-E device, allowing

for maximum I/O efciency. Selecting 128B or 256B will designate maximum packet size

of 128 or 256. Options are Auto, 128, and 256. Auto is enabled by default.

IOAT Conguration

Disable TPH

Transparent Hugepages is a Linux memory management system that enables commu­nication in larger blocks (pages). Enabling this feature will increase performance. The
options are No and Yes.

Prioritize TPH

Use this feature to enable Prioritize TPH support. The options are Enable and Disable.

Relaxed Ordering

Select Enable to enable Relaxed Ordering support which will allow certain transactions to

violate the strict-ordering rules of PCI bus for a transaction to be completed prior to other
transactions that have already been enqueued. The options are Disable and Enable.

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Intel® VT for Directed I/O (VT-d)

Intel® VT for Directed I/O (VT-d)

Select Enable to use Intel Virtualization Technology for Direct I/O VT-d support by report-
ing the I/O device assignments to the VMM (Virtual Machine Monitor) through the DMAR
ACPI tables. This feature offers fully-protected I/O resource sharing across Intel platforms,

providing greater reliability, security and availability in networking and data-sharing. The
options are Disable and Enable.

Interrupt Remapping

Select Enable for Interrupt Remapping support to enhance system performance. The
options are Enable and Disable.

PassThrough DMA

Use this feature to allow devices such as network cards to access the system memory

without using a processor. Select Enable to use the Non-Isoch VT_D Engine Pass

Through Direct Memory Access (DMA) support. The options are Enable and Disable.

ATS

Use this feature to enable Non-Isoch VT-d Engine Address Translation Services (ATS)
support. ATS translates virtual addresses to physical addresses. The options are Enable
and Disable.

Posted Interrupt

Use this feature to enable VT_D Posted Interrupt. The options are Enable and Disable.

Coherency Support (Non-Isoch)

Use this feature to maintain setting coherency between processors or other devices.
Select Enable for the Non-Iscoh VT-d engine to pass through DMA to enhance system
performance. The options are Enable and Disable.

Intel® VMD Technology

Intel® VMD for Volume Management Device on CPU1

VMD Cong for PStack0

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

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*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

VMD port 1A (Available when the device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

VMD port 1C (Available when the device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable hot plug support for PCIe root ports 1A~1C, which will
allow the user to change PCI-E devices without turning off the system. The options
are Disable and Enable.

VMD Cong for PStack1

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

VMD port 2A (Available when the device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

VMD port 2C (Available when the device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Select Enable to enable hot plug support for PCIe root ports 2A~2C, which will allow
the user to change the devices populated on PCI-E Slots 2A~2C without turning off
the system. The options are Disable and Enable.

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VMD Cong for PStack2

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

Hot Plug Capable (Available when the device is detected by the system)

Select Enable to enable hot plug support for PCIe root ports 3A~3D, which will allow
the user to change the devices populated on PCI-E Slots 3A~3D without turning off
the system. This will allow the user to replace the components without shutting down
the system. The options are Disable and Enable.

Intel® VMD for Volume Management Device on CPU2

VMD Cong for PStack0

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

VMD port 1A (Available when the device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

VMD port 1C (Available when the device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Use this feature to enable hot plug support for PCIe root ports 1A~1C, which will
allow the user to change PCI-E devices without turning off the system. The options
are Disable and Enable.

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VMD Cong for PStack1

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

VMD port 2A (Available when the device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

VMD port 2C (Available when the device is detected by the system)

Select Enable to use the Intel Volume Management Device Technology for this spe-

cic root port. The options are Disable and Enable.

Hot Plug Capable (Available when the device is detected by the system)

Select Enable to enable hot plug support for PCIe root ports 2A~2C, which will allow
the user to change the devices populated on PCI-E Slots 2A~2C without turning off
the system. The options are Disable and Enable.

VMD Cong for PStack2

Intel® VMD for Volume Management Device

Select Enable to use the Intel Volume Management Device Technology for this stack.
The options are Disable and Enable.

*If the item "Intel VMD for Volume Management Device" above is set to Enable,
the following items will be dislayed:

Hot Plug Capable (Available when the device is detected by the system)

Select Enable to enable hot plug support for PCIe root ports 3A~3D, which will allow
the user to change the devices populated on PCI-E Slots 3A~3D without turning off
the system. This will allow the user to replace the components without shutting down
the system. The options are Disable and Enable.

IIO-PCIE Express Global Options

The section allows the user to congure the following PCI-E global options:

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PCE-E Hot Plug

Select Enable to support Hot-plugging for the selected PCI-E slots which will allow the user
to replace the devices installed in the slots without shutting down the system. The options
are Enable and Disabled.

PCI-E Completion Timeout (Global)

Use this item to select the PCI-E Completion Time-out settings. The options are Yes, No,
and Per-Port.

South Bridge

Legacy USB Support

This feature enables support for USB 2.0 and older. The options are Enabled and Dis­abled. Default setting is Enabled.

XHCI Hand-off

When this feature is disabled, the motherboard will not support USB 3.0. Options are
Enabled and Disabled. Default setting is Disabled.

Port 60/64 Emulation

This feature allows legacy I/O support for USB devices like mice and keyboards. The

options are Enabled and disabled. Default setting is Enabled.

PCIe PLL SSC

Use this feature to enable PCIE PLL spread spectrum clocking (SSC). The options are
Disable and Enable.

Server ME (Management Engine) Conguration

This feature displays the following system ME conguration settings.

• Operational Firmware Version

• Backup Firmware Version

• Recovery Firmware Version

• ME Firmware Status #1

• ME Firmware Status #2

• Current State

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• Error Code

PCH SATA Conguration

When this submenu is selected, the AMI BIOS automatically detects the presence of the SATA
devices that are supported by the Intel PCH chip and displays the following items:

SATA Controller

This item enables or disables the onboard SATA controller supported by the Intel PCH chip.
The options are Disable and Enable.

Congure SATA as

Select IDE to congure a SATA drive specied by the user as an IDE drive. Select AHCI to
congure a SATA drive specied by the user as an AHCI drive. Select RAID to congure a
SATA drive specied by the user as a RAID drive. The options are IDE, AHCI, and RAID.

SATA HDD Unlock

Select Enable to unlock SATA HDD password in the OS. The options are Enable and Disable.

Aggressive Link Power Management

When this item is set to Enabled, the SATA AHCI controller manages the power usage of the

SATA link. The controller will put the link in a low power mode during extended periods of I/O
inactivity, and will return the link to an active state when I/O activity resumes. The options

are Disabled and Enabled.

*If the item above "Congure SATA as" is set to RAID, the following items will display:

SATA Port 0 ~ Port 7

This item displays the information detected on the installed SATA drive on the particular SATA
port.

• Model number of drive and capacity

• Software Preserve Support

Port 0 ~ Port 7 Hot Plug

Set this item to Enabled for hot-plugging support, which will allow the user to replace a SATA
drive without shutting down the system. The options are Disabled and Enabled.

Port 0 ~ Port 7 Spin Up Device

On an edge detect from 0 to 1, set this item to allow the PCH to initialize the device. The
options are Disabled and Enabled.

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Port 0 ~ Port 7 SATA Device Type

Use this item to specify if the SATA port specied by the user should be connected to a Solid

State drive or a Hard Disk Drive. The options are Hard Disk Drive and Solid State Drive.



PCH sSATA Conguration

When this submenu is selected, AMI BIOS automatically detects the presence of the sSATA
devices that are supported by the sSATA controller and displays the following items:

sSATA Controller

This item enables or disables the onboard sSATA controller supported by the Intel SCU. The
options are Enable and Disable.

Congure sSATA as

Select AHCI to congure an sSATA drive specied by the user as an AHCI drive. Select RAID
to congure an sSATA drive specied by the user as a RAID drive. The options are AHCI
and RAID. (Note: This item is hidden when the sSATA Controller item is set to Disabled.)

SATA HDD Unlock

Select Enable to unlock sSATA HDD password in the OS. The options are Enable and Disable.

SATA/sSATA RAID Boot Select (Available when the item "Congure SATA as" is set

to "RAID")

This feature allows the user to decide which controller should be used for system boot. The
options are None, SATA Controller, sSATA Controller, and Both.

Aggressive Link Power Management

When this item is set to Enable, the sSATA AHCI controller manages the power use of the
SATA link. The controller will put the link in a low power mode during an extended period of

I/O inactivity, and will return the link to an active state when I/O activity resumes. The options

are Disable and Enable.

sSATA RAID Option ROM/UEFI Driver (Available when the item "Congure SATA as"

is set to "RAID")

Select EFI to load the EFI driver for system boot. Select Legacy to load a legacy driver for
system boot. The options are Disable, EFI, and Legacy.

sSATA Port 0 - sSATA Port 5

Hot Plug

Select Enable to support Hot-plugging for the device installed on an sSATA port selected by
the user which will allow the user to replace the device installed in the slot without shutting
down the system. The options are Disable and Enabled.

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Spin Up Device

On an edge detect from 0 to 1, set this item to allow the sSATA device installed on the

sSATA port specied by the user to start a COMRESET initialization. The options are

Enable and Disable.

sSATA Device Type

Use this item to specify if the device installed on the sSATA port specied by the user

should be connected to a Solid State drive or a Hard Disk Drive. The options are Hard
Disk Drive and Solid State Drive.

PCIe/PCI/PnP Conguration

The following information will display:

• PCI Bus Driver Version

• PCI Devices Common Settings:

Above 4G Decoding (Available if the system supports 64-bit PCI decoding)

Select Enabled to decode a PCI device that supports 64-bit in the space above 4G Address.

The options are Disabled and Enabled.

SR-IOV Support

Use this feature to enable or disable Single Root IO Virtualization Support. The options are

Disabled and Enabled.

MMIO High Base

Use this item to select the base memory size according to memory-address mapping for the
IO hub. The options are 56 TB, 40 TB, 24 TB, 3 TB, 2 TB, and 1 TB.

MMIO High Granularity Size

Use this item to select the high memory size according to memory-address mapping for the
IO hub. The options are 256 GB, 128 GB, 512 GB, and 1024 GB.

Maximum Read Request

Select Auto for the system BIOS to automatically set the maximum size for a read request

for a PCI-E device to enhance system performance. The options are Auto, 128 Bytes, 256
Bytes, 512 Bytes, 1024 Bytes, 2048 Bytes, and 4096 Bytes.

MMCFG Base

Use this item to select the low base address for PCIE adapters to increase base memory.

The options are 1G, 1.5G, 1.75G, 2G, 2.25G. and 3G.

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NVMe Firmware Source

This feature determines the lowest MMCFG (Memory-Mapped Conguration) base assigned

to PCI devices. The options are Vendor Dened Firmware and AMI Native Support.

VGA Priority

Use this item to select the graphics device to be used as the primary video display for system
boot. The options are Onboard Offboard, and Auto.

PCH SLOT 2 PCI-E 3.0 x4 OPROM

Select The options are Disabled, Legacy, and EFI.

PCH SLOT 3 PCI-E 3.0 x4 OPROM

Select Disabled to deactivate the selected slot. Select Legacy to enable the slot for use of
legacy devices. The options are Disabled, Legacy, and EFI.

Bus Master Enable

This feature enables a device connected to the bus to initiate Direct Memory Access (DMA)
transactions. When Disabled is selected, the PCI Bus Driver disables Bus Master Attribute
for Pre-Boot DMA Protection. When Enabled is slected, the PCI Bus Driver enables Bus

Master Attribute for DMA transactions. Some devices request Bus Master to be enabled for

operations. The options are Disabled and Enabled.

Onboard LAN Device

This feature allows the user to Enable or Disable Onboard LAN devices. The options are

Auto, Enabled, and Disabled.

Onboard LAN Option ROM Type

Use this to select rmware type to be loaded for onboard LANs. The options are Legacy
and EFI.

Onboard LAN1 Option ROM

Use this feature to select the type of device installed in LAN Port1 used for system boot. The
options are Legacy, EFI and Disabled.

Onboard LAN2 Option ROM

Use this feature to select the type of device installed in LAN Port2 used for system boot. The
options are Legacy, EFI and Disabled.

Onboard Video Option ROM

Use this feature to select the Onboard Video Option ROM type. The options are Disabled,

Legacy and EFI.

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Network Stack Conguration

Network Stack

Select Enabled to enable PXE (Preboot Execution Environment) or UEFI (Unied Extensible

Firmware Interface) for network stack support. The options are Enabled and Disabled.

*If "Network Stack" is set to Enabled, the following items will display:

Ipv4 PXE Support

Use this feature to enable Ipv4 PXE Boot Support. If this feature is disabled, it will not
create the Ipv4 PXE Boot option. The options are Disabled and Enabled.

Ipv4 HTTP Support

Use this feature to enable Ipv4 HTTP Boot Support. If this feature is disabled, it will not
create the Ipv4 HTTP Boot option. The options are Disabled and Enabled.

Ipv6 PXE Support

Use this feature to enable Ipv6 PXE Boot Support. If this feature is disabled, it will not
create the Ipv6 PXE Boot option. The options are Disabled and Enabled.

Ipv6 HTTP Support

Use this feature to enable Ipv6 HTTP Boot Support. If this feature is disabled, it will not
create the Ipv6 HTTP Boot option. The options are Disabled and Enabled.

PXE Boot Wait Time

Use this feature to select the wait time to press the ESC key to abort the PXE boot. The
default is 0.

Media Detect Count

Use this feature to select the wait time in seconds to detect LAN media. The default is 1.

Super IO Conguration

The following Super IO information will display:

• Super IO Chip AST2500

Serial Port 1 Conguration

Serial Port 1

Select Enabled to enable the onboard serial port specied by the user. The options are

Disabled and Enabled.

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Device Settings

This item displays the base I/O port address and the Interrupt Request address of a serial
port specied by the user.

Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial
Port 1. Select Auto for the BIOS to automatically assign the base I/O and IRQ address to
a serial port specied.

The options for Serial Port 1 are Auto, (IO=3F8h; IRQ=4), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9,
10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10,
11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12).

Serial Port 2 Conguration

Serial Port

Select Enabled to enable the onboard serial port specied by the user. The options are
Enabled and Disabled.

Device Settings

This item displays the base I/O port address and the Interrupt Request address of a serial
port specied by the user.

Note: This item is hidden when Serial Port 1 is set to Disabled.

Change Settings

This feature species the base I/O port address and the Interrupt Request address of Serial
Port 1or Serial Port 2. Select Auto for the BIOS to automatically assign the base I/O and
IRQ address to a serial port specied. The options for Serial Port 2 are Auto, (IO=3F8h;
IRQ=4), (IO=3F8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), (IO=2F8h; IRQ=3, 4, 5, 6, 7, 9, 10,
11, 12); (IO=3E8h; IRQ=3, 4, 5, 6, 7, 9, 10, 11, 12), and (IO=2E8h; IRQ=3, 4, 5, 6, 7, 9,

10, 11, 12).

Serial Port 2 Attribute

Select SOL to use COM Port 2 as a Serial_Over_LAN (SOL) port for console redirection.

The options are SOL and COM.

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Serial Port Console Redirection

COM 1 Console Redirection

Select Enabled to enable COM Port 1 for Console Redirection, which will allow a client

machine to be connected to a host machine at a remote site for networking. The options
are Disabled and Enabled.

*If the item above set to Enabled, the following items will become available for conguration:

Console Redirection Settings (for COM1)

Terminal Type

Use thid feature to select the target terminal emulation type for Console Redirection.

Select VT100 to use the ASCII Character set. Select VT100+ to add color and function
key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to
use UTF8 encoding to map Unicode characters into one or more bytes. The options are
VT100, VT100+, VT-UTF8 and ANSI.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console Redirection.

Make sure that the same speed is used in the host computer and the client computer. A

lower transmission speed may be required for long and busy lines. The options are 9600,

19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are

7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

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Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer

is full. Send a "Start" signal to start sending data when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.

The options are Disabled and Enabled.

Recorder Mode

Select Enabled to capture the data displayed on a terminal and send it as text messages
to a remote server. The options are Disabled and Enabled.

Resolution 100x31

Select Enabled for extended-terminal resolution support. The options are Disabled and

Enabled.

Legacy OS Redirection Resolution

Use this feature to select the number of rows and columns used in Console Redirection

for legacy OS support. The options are 80x24 and 80x25.

Putty KeyPad

This feature selects Function Keys and KeyPad settings for Putty, which is a terminal

emulator designed for the Windows OS. The options are VT100, LINUX, XTERMR6, SCO,
ESCN, and VT400.

Redirection After BIOS Post

Use this feature to enable or disable legacy Console Redirection after BIOS POST. When
the option-Bootloader is selected, legacy Console Redirection is disabled before booting
the OS. When the option-Always Enable is selected, legacy Console Redirection remains

enabled upon OS bootup. The options are Always Enable and Bootloader.

SOL (Serial-Over-LAN) Console Redirection

Select Enabled to use the SOL port for Console Redirection. The options are Disabled and

Enabled.

*If the item above set to Enabled, the following items will become available for user's

conguration:

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Console Redirection Settings (for SOL)

Use this feature to specify how the host computer will exchange data with the client
computer, which is the remote computer used by the user.

Terminal Type

Use this feature to select the target terminal emulation type for Console Redirection.

Select VT100 to use the ASCII Character set. Select VT100+ to add color and function
key support. Select ANSI to use the Extended ASCII Character Set. Select VT-UTF8 to
use UTF8 encoding to map Unicode characters into one or more bytes. The options are
VT100, VT100+, VT-UTF8 and ANSI.

Bits Per second

Use this feature to set the transmission speed for a serial port used in Console Redirection.

Make sure that the same speed is used in the host computer and the client computer. A

lower transmission speed may be required for long and busy lines. The options are 9600,

19200, 38400, 57600 and 115200 (bits per second).

Data Bits

Use this feature to set the data transmission size for Console Redirection. The options are

7 (Bits) and 8 (Bits).

Parity

A parity bit can be sent along with regular data bits to detect data transmission errors.
Select Even if the parity bit is set to 0, and the number of 1's in data bits is even. Select
Odd if the parity bit is set to 0, and the number of 1's in data bits is odd. Select None if you
do not want to send a parity bit with your data bits in transmission. Select Mark to add a
mark as a parity bit to be sent along with the data bits. Select Space to add a Space as a
parity bit to be sent with your data bits. The options are None, Even, Odd, Mark and Space.

Stop Bits

A stop bit indicates the end of a serial data packet. Select 1 Stop Bit for standard serial
data communication. Select 2 Stop Bits if slower devices are used. The options are 1 and 2.

Flow Control

Use this feature to set the ow control for Console Redirection to prevent data loss caused
by buffer overow. Send a "Stop" signal to stop sending data when the receiving buffer

is full. Send a "Start" signal to start data-sending when the receiving buffer is empty. The
options are None and Hardware RTS/CTS.

VT-UTF8 Combo Key Support

Select Enabled to enable VT-UTF8 Combination Key support for ANSI/VT100 terminals.

The options are Disabled and Enabled.

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