STV6111
AGC control
RF receiver
Mixers
LO dividers
VCO
PLL
External
filter
I²C
Clock management
XTAL_OUT
SCL
SDA
RF_INP
AGC
QP
RF_INN
LNA
QN
IN
IP
DC offset correction
VGA1VGA1
VGA1
VGA2
VGA2
8PSK/QPSK low-power 3.3-V satellite tuner IC
Data brief
Features
■ RF-to-baseband direct conversion architecture
■ Single 3.3-V DC supply, low consumption
■ Outstanding performance in heavily loaded
spectrum conditions
■ Input frequency range: 950 to 2150 MHz
■ Supports 1 to 60 Msymb/s using internal filter
■ RF-AGC or channel-AGC support
■ Extremely low-phase noise, compliant with
DVB-S2 requirements using fractional-N
synthesizer
■ Low external component count
■ Flexible crystal frequency output to drive the
demodulator and/or other tuner ICs
■ Continuously variable gain
■ Programmable 6 to 50 MHz cut-off frequency
(Butterworth 5th-order baseband filters)
■ Specific operating mode for symbol rates up to
220 Msymb/s
■ Compatible with 5-V and 3.3-V I
2
C bus
Applications
■ Direct broadcasting satellite (DBS), satellite
modems: BPSK, QPSK, 8PSK, 16/32 APSK
modulations
■ Set-top boxes, PCTV and iDTV
■ Outdoor units
Package
■ VFQFPN-32 5 x 5 x 1 mm
■ ECOPACK
®
, RoHS (2002/95/EC) compliant
3
with exposed pad
Description
The STV6111 satellite tuner is a direct-conversion
(zero IF) receiver for digital TV broadcasting.
November 2011 Doc ID 022528 Rev 1 1/4
For further information contact your local STMicroelectronics sales office.
www.st.com
4
Introduction STV6111
1 Introduction
In the STV6111 satellite tuner, on the RF input, there is a variable gain, low-noise amplifier
(VGLNA). The RF gain is monitored by an automatic gain control (AGC) circuit to ensure an
optimal signal level for the two mixers. Each mixer, which down-converts the signal to the
baseband, is followed by an AGC-controlled VGA, a low-pass filter and a second VGA.
The local oscillator signals are provided by an integrated fractional-N phase locked loop
(PLL), which contains an on-chip voltage-controlled oscillator meeting stringent phase noise
requirements. The PLL loop filter is partly integrated. The local oscillator frequencies are
programmable between 950 MHz and 2150 MHz.
The comparison frequency for the phase-frequency detector is generated by dividing the
crystal oscillator reference frequency. The crystal frequency may be within the range
15 MHz to 31 MHz depending on the application.
Features Benefits
Variable gain low noise amplifier input structure Allows flexible compromise between linearity and
noise figure allowing the most difficult signals to be
extracted in the most congested and noisy
conditions
Single flexible Xtal Wide choice of crystal frequencies with robust
clock buffer to drive second tuners and
demodulators allowing eBoM savings
Fractional-N PLL Low phase noise for low packet error rate under
extreme conditions (e.g. low symbol rates), fast
locking
High symbol rate support Allows more efficient exploitation of Ku (up to
60 Msps) and Ka band (up to ~220 Msps) satellites
2/4 Doc ID 022528 Rev 1