ST ST1S32 User Manual

4 A DC step-down switching regulator

VFDFPN 8 4x4x1.0

VINSW

SW

VFB

PG

GND

EN

ST1S32

Cin_sw

Cout

L

R1

R2

VINA

Cin_a R3

VOUT

VIN

AM12608V1

Features

■ 4 A DC output current

■ 2.8 V to 5.5 V input voltage

■ Output voltage adjustable from 0.8 V

■ 1.5 MHz switching frequency

■ Internal soft-start and enable

■ Integrated 60 mΩ and 45 mΩ Power MOSFETs

■ All ceramic capacitor

■ Power Good (POR)

■ Cycle-by-cycle current limiting

■ Current foldback short-circuit protection

■ VFDFPN 8 4x4x1.0 package

Applications

■ µP/ASIC/DSP/FPGA core and I/O supplies

■ Point of Load for: STB, TV, DVD

■ Optical storage, hard disk drives, printers,

audio/graphic cards

ST1S32

Datasheet — production data

Description

The ST1S32 is an internally compensated 1.5
MHz fixed-frequency PWM synchronous step­down regulator. The ST1S32 operates from 2.8 V
to 5.5 V input, while it regulates an output voltage
as low as 0.8 V and up to V

The ST1S32 integrates a 60 mΩ high-side switch
and a 45 mΩ synchronous rectifier, allowing very
high efficiency with very low output voltages.

The peak current mode control with internal
compensation delivers a very compact solution
with a minimum component count.

IN

.

Figure 1. Application circuit

May 2012 Doc ID 023246 Rev 1 1/29

This is information on a product in full production.

The ST1S32 is available in 4 mm x 4 mm, 8-lead
VFDFPN package.

www.st.com

29

Contents ST1S32

Contents

1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

2.1 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

4 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

4.1 Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4.2 Error amplifier and control loop stability . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4.3 Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

4.4 Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4.5 Light load operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

4.6 Hysteretic thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

5 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.1 Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

5.2 Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

5.3 Output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

5.4 Thermal dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

5.5 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

6 Demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

7 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

8 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

9 Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

2/29 Doc ID 023246 Rev 1

ST1S32 Pin settings

1 Pin settings

1.1 Pin connection

Figure 2. Pin connection (top view)

1.2 Pin description

Table 1. Pin description

No. Type Description

1 VINA Unregulated DC input voltage.

2EN

3FB

4 AGND Ground.

5PG

6 VINSW Power input voltage.

7 SW Regulator output switching pin.

8 PGND Power Ground.

Enable input. With EN higher than 1.5 V the device in ON and with EN
lower than 0.5 V the device is OFF.

Feedback input. Connecting the output voltage directly to this pin the
output voltage is regulated at 0.8 V. To have higher regulated voltages an
external resistor divider is required from V

Open drain Power Good (POR) pin. It is released (open drain) when the
output voltage is higher than 0.92 * V
output voltage is below 0.92 * V
immediately.

If not used, it can be left floating or to GND.

OUT

to the FB pin.

OUT

with a delay of 170 us. If the

OUT

, the POR pin goes to low impedance

Doc ID 023246 Rev 1 3/29

Maximum ratings ST1S32

2 Maximum ratings

Table 2. Absolute maximum ratings

Symbol Parameter Value Unit

V

IN

V

EN

V

SW

V

PG

V

FB

P

TOT

T

OP

T

stg

2.1 Thermal data

Table 3. Thermal data

Symbol Parameter Value Unit

R

thJA

1. Package mounted on demonstration board.

Input voltage -0.3 to 7

Enable voltage -0.3 to V

Output switching voltage -1 to V

Power-on reset voltage (Power Good) -0.3 to V

IN

IN

IN

Feedback voltage -0.3 to 1.5

Power dissipation at TA < 60 °C 2.25 W

Operating junction temperature range -40 to 150 °C

Storage temperature range -55 to 150 °C

Maximum thermal resistance junction­ambient

(1)

40 °C/W

V

4/29 Doc ID 023246 Rev 1

ST1S32 Electrical characteristics

3 Electrical characteristics

TJ=25 °C, V

=5 V, unless otherwise specified.

IN

Table 4. Electrical characteristics

Symbol Parameter Test condition

Operating input voltage

IN

range

Turn-on VCC threshold

Turn-off VCC threshold

High-side switch on-

-P
resistance

Low-side switch on-

-N
resistance

Maximum limiting current

V

R

R

V

V

INON

INOFF

DSON

DSON

I

LIM

Oscillator

Switching frequency 1.2 1.5 1.9 MHz

Maximum duty cycle

D

F

MAX

SW

Dynamic characteristics

(1)

(1)

(1)

=300 mA 60 mΩ

I

SW

=300 mA 45 mΩ

I

SW

(2)

(2)

Val ues

Min. Typ. Max.

2.8 5.5

2.4

2.0

5.0 A

95 100 %

Unit

V

Feedback voltage

/

Reference load regulation Io=10 mA to 4 A

/

Reference line regulation VIN= 2.8 V to 5.5 V

IN

%V

ΔI

%V

V

ΔV

FB

OUT

OUT

OUT

DC characteristics

I

Q

I

QST-BY

Quiescent current

Total standby quiescent
current

Enable

V

EN

I

EN

EN threshold voltage

EN current 0.1 μA

0.792 0.8 0.808

Io=10 mA to 4 A

(1)

(2)

(2)

Duty cycle=0, no load

=1.2 V

V

FB

0.776 0.8 0.824

0.2 0.6 %

0.2 0.3 %

630 1200 μA

V

OFF 10 μA

Device ON level 1.5

V

Device OFF level 0.5

Doc ID 023246 Rev 1 5/29

Electrical characteristics ST1S32

Table 4. Electrical characteristics (continued)

Val ues

Symbol Parameter Test condition

Min. Typ. Max.

Power Good

Unit

PG threshold 92 %V

PG hystereris 30 50

PG

PG output voltage low Isink= 6 mA open drain 400

PG rise delay 170 μs

Soft-start

T

SS

Soft-start duration 400 μs

Protection

Thermal shutdown 150

T

SHDN

1. Specifications referred to TJ from -40 to +125 °C. Specifications in the -40 to +125 °C temperature range
are assured by design, characterization and statistical correlation.

2. Guaranteed by design.

Hystereris 20

FB

mV

°C

6/29 Doc ID 023246 Rev 1

ST1S32 Functional description

4 Functional description

The ST1S32 is based on a “peak current mode”, constant frequency control. The output
voltage V
providing an error signal that, compared to the output of the current sense amplifier, controls
the ON and OFF time of the power switch.

The main internal blocks are shown in the block diagram in Figure 3. They are:

● A fully integrated oscillator that provides the internal clock and the ramp for the slope

compensation avoiding sub-harmonic instability

● The soft-start circuitry to limit inrush current during the startup phase

● The transconductance error amplifier

● The pulse width modulator and the relative logic circuitry necessary to drive the internal

power switches

● The drivers for embedded P-channel and N-channel Power MOSFET switches

● The high-side current sensing block

● The low-side current sense to implement diode emulation

● A voltage monitor circuitry (UVLO) that checks the input and internal voltages

● A thermal shutdown block, to prevent thermal run-away.

is sensed by the Feedback pin (FB) compared to an internal reference (0.8 V)

OUT

Figure 3. Block diagram

Doc ID 023246 Rev 1 7/29

Functional description ST1S32

4.1 Soft-start

The soft-start is essential to assure the correct and safe startup of the step-down converter.
It avoids inrush current surge and makes the output voltage rise monothonically.

The soft-start is managed by ramping the reference of the error amplifier from 0 V to 0.8 V.
The internal soft-start capacitor is charged with a resistor to 0.8 V, then the FB pin follows
the reference so that the output voltage is regulated to rise to the set value monothonically.

4.2 Error amplifier and control loop stability

The error amplifier provides the error signal to be compared with the high-side switch
current through the current sense circuitry. The non-inverting input is connected with the
internal 0.8 V reference, whilst the inverting input is the FB pin. The compensation network
is internal and connected between the E/A output and GND.

The error amplifier of the ST1S32 is a transconductance operational amplifier, with high
bandwidth and high output impedance.

The characteristics of the uncompensated error amplifier are:

Table 5. Characteristics of the uncompensated error amplifier

Description Value

DC gain 94 dB

gm 238 μA/V

Ro 96 MΩ

The ST1S32 embeds the compensation network that assures the stability of the loop in the
whole operating range. Here below are all the tools needed to check the loop stability.

In Figure 4. the simple small signal model for the peak current mode control loop is shown.

8/29 Doc ID 023246 Rev 1

ST1S32 Functional description

L

Cout

Current sense

Logic

And

Driver

Slope

Com pensati on

PW M comparator

Err or Amp

Rc

Cc

R1

R2

0.8 V

High side

Swi tch

Low si de

Swi tch

GCO(s)

G

DIV

(s)

G

EA

(s)

VIN

V

C

V

OUT

V

FB

AM12609V1

GCOs()

R

LOAD

R

i

------------ ------

1

1

R

outTSW

⋅

L

------------- ------------- ----

m

C

1D–()0.5–⋅[]⋅+

------------ ------------- ------------- ------------- ------------ --------------- ------------- ----------

1

s

ω

z

-----+

⎝⎠

⎛⎞

1

s

ω

p

-----+

⎝⎠

⎛⎞

------------ ---------

F

H

s()⋅⋅⋅=

ω

Z

1

ESR C

OUT

⋅

------------ ------------- ---------=

Figure 4. Block diagram of the loop for the small signal analysis

Three main terms can be identified to obtain the loop transfer function:

1. from control (output of E/A) to output, G

2. from output (V

) to the FB pin, G

OUT

DIV

3. from the FB pin to control (output of E/A), G

The transfer function from control to output G

CO

(s);

(s);

CO

(s).

EA

(s) results:

Equation 1

where R
current sense circuitry (0.369 Ω), ω
zero given by the ESR of the output capacitor.

F

(s) accounts for the sampling effect performed by the PWM comparator on the output of

H

the error amplifier that introduces a double pole at one half of the switching frequency.

Equation 2

represents the load resistance, Ri the equivalent sensing resistor of the

LOAD

the single pole introduced by the LC filter and ωz the

p

Doc ID 023246 Rev 1 9/29