ST1S32
4 A DC step-down switching regulator
Datasheet — production data
Features
■4 A DC output current
■2.8 V to 5.5 V input voltage
■Output voltage adjustable from 0.8 V
■1.5 MHz switching frequency
■Internal soft-start and enable
■Integrated 60 mΩ and 45 mΩ Power MOSFETs
■All ceramic capacitor
■Power Good (POR)
■Cycle-by-cycle current limiting
■Current foldback short-circuit protection
■VFDFPN 8 4x4x1.0 package
Applications
■µP/ASIC/DSP/FPGA core and I/O supplies
■Point of Load for: STB, TV, DVD
■Optical storage, hard disk drives, printers, audio/graphic cards
VFDFPN 8 4x4x1.0
Description
The ST1S32 is an internally compensated 1.5 MHz fixed-frequency PWM synchronous stepdown regulator. The ST1S32 operates from 2.8 V to 5.5 V input, while it regulates an output voltage as low as 0.8 V and up to VIN.
The ST1S32 integrates a 60 mΩ high-side switch and a 45 mΩ synchronous rectifier, allowing very high efficiency with very low output voltages.
The peak current mode control with internal compensation delivers a very compact solution with a minimum component count.
The ST1S32 is available in 4 mm x 4 mm, 8-lead VFDFPN package.
Figure 1. Application circuit
VIN |
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L |
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VOUT |
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VINA |
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Cin_a |
R3 |
ST1S32 |
R1 |
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EN |
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Cin_sw |
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Cout |
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R2 |
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GND |
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AM12608V1 |
May 2012 |
Doc ID 023246 Rev 1 |
1/29 |
This is information on a product in full production. |
www.st.com |
Contents |
ST1S32 |
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Contents
1 |
Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
. 3 |
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1.1 |
Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
3 |
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1.2 |
Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2 |
Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
4 |
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2.1 |
Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
4 |
3 |
Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4 |
Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
7 |
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4.1 |
Soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
8 |
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4.2 |
Error amplifier and control loop stability . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.3 |
Overcurrent protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.4 |
Enable function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.5 |
Light load operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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4.6 |
Hysteretic thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5 |
Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
15 |
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5.1 |
Input capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5.2 |
Inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5.3 |
Output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5.4 |
Thermal dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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5.5 |
Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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6 |
Demonstration board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
22 |
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7 |
Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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8 |
Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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9 |
Order codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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10 |
Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . |
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2/29 |
Doc ID 023246 Rev 1 |
ST1S32 |
Pin settings |
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1 Pin settings
1.1Pin connection
Figure 2. Pin connection (top view)
1.2Pin description
Table 1. |
Pin description |
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No. |
Type |
Description |
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1 |
VINA |
Unregulated DC input voltage. |
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2 |
EN |
Enable input. With EN higher than 1.5 V the device in ON and with EN |
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lower than 0.5 V the device is OFF. |
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Feedback input. Connecting the output voltage directly to this pin the |
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3 |
FB |
output voltage is regulated at 0.8 V. To have higher regulated voltages an |
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external resistor divider is required from VOUT to the FB pin. |
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4 |
AGND |
Ground. |
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Open drain Power Good (POR) pin. It is released (open drain) when the |
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output voltage is higher than 0.92 * VOUT with a delay of 170 us. If the |
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5 |
PG |
output voltage is below 0.92 * VOUT, the POR pin goes to low impedance |
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immediately. |
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If not used, it can be left floating or to GND. |
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6 |
VINSW |
Power input voltage. |
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7 |
SW |
Regulator output switching pin. |
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8 |
PGND |
Power Ground. |
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Doc ID 023246 Rev 1 |
3/29 |
Maximum ratings |
ST1S32 |
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2 Maximum ratings
Table 2. |
Absolute maximum ratings |
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Symbol |
Parameter |
Value |
Unit |
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VIN |
Input voltage |
-0.3 to 7 |
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VEN |
Enable voltage |
-0.3 to VIN |
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VSW |
Output switching voltage |
-1 to VIN |
V |
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VPG |
Power-on reset voltage (Power Good) |
-0.3 to VIN |
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VFB |
Feedback voltage |
-0.3 to 1.5 |
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PTOT |
Power dissipation at TA < 60 °C |
2.25 |
W |
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TOP |
Operating junction temperature range |
-40 to 150 |
°C |
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Tstg |
Storage temperature range |
-55 to 150 |
°C |
2.1Thermal data
Table 3. |
Thermal data |
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Symbol |
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Parameter |
Value |
Unit |
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RthJA |
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Maximum thermal resistance junction- |
40 |
°C/W |
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ambient (1) |
1. Package mounted on demonstration board.
4/29 |
Doc ID 023246 Rev 1 |
ST1S32 |
Electrical characteristics |
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3 Electrical characteristics
TJ=25 °C, VIN=5 V, unless otherwise specified.
Table 4. |
Electrical characteristics |
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Symbol |
Parameter |
Test condition |
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Values |
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Unit |
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Min. |
Typ. |
Max. |
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VIN |
Operating input voltage |
(1) |
2.8 |
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5.5 |
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range |
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V |
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VINON |
Turn-on VCC threshold |
(1) |
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2.4 |
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VINOFF |
Turn-off VCC threshold |
(1) |
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2.0 |
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RDSON-P |
High-side switch on- |
ISW=300 mA |
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60 |
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mΩ |
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resistance |
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RDSON-N |
Low-side switch on- |
ISW=300 mA |
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45 |
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mΩ |
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resistance |
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ILIM |
Maximum limiting current |
(2) |
5.0 |
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A |
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Oscillator |
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FSW |
Switching frequency |
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1.2 |
1.5 |
1.9 |
MHz |
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DMAX |
Maximum duty cycle |
(2) |
95 |
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100 |
% |
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Dynamic characteristics |
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VFB |
Feedback voltage |
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0.792 |
0.8 |
0.808 |
V |
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Io=10 mA to 4 A(1) |
0.776 |
0.8 |
0.824 |
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%VOUT/ |
Reference load regulation |
(2) |
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0.2 |
0.6 |
% |
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IOUT |
Io=10 mA to 4 A |
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%VOUT/ |
Reference line regulation |
V = 2.8 V to 5.5 V (2) |
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0.2 |
0.3 |
% |
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VIN |
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IN |
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DC characteristics |
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IQ |
Quiescent current |
Duty cycle=0, no load |
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630 |
1200 |
μA |
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VFB=1.2 V |
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IQST-BY |
Total standby quiescent |
OFF |
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10 |
μA |
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current |
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Enable |
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VEN |
EN threshold voltage |
Device ON level |
1.5 |
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V |
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Device OFF level |
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0.5 |
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IEN |
EN current |
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0.1 |
μA |
Doc ID 023246 Rev 1 |
5/29 |
Electrical characteristics |
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ST1S32 |
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Table 4. |
Electrical characteristics (continued) |
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Symbol |
Parameter |
Test condition |
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Values |
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Unit |
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Min. |
Typ. |
Max. |
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Power Good |
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PG threshold |
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92 |
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%VFB |
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PG |
PG hystereris |
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30 |
50 |
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mV |
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PG output voltage low |
Isink= 6 mA open drain |
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400 |
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PG rise delay |
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170 |
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μs |
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Soft-start |
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TSS |
Soft-start duration |
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400 |
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μs |
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Protection |
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TSHDN |
Thermal shutdown |
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150 |
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°C |
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Hystereris |
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20 |
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1.Specifications referred to TJ from -40 to +125 °C. Specifications in the -40 to +125 °C temperature range are assured by design, characterization and statistical correlation.
2.Guaranteed by design.
6/29 |
Doc ID 023246 Rev 1 |
ST1S32 |
Functional description |
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4 Functional description
The ST1S32 is based on a “peak current mode”, constant frequency control. The output voltage VOUT is sensed by the Feedback pin (FB) compared to an internal reference (0.8 V) providing an error signal that, compared to the output of the current sense amplifier, controls the ON and OFF time of the power switch.
The main internal blocks are shown in the block diagram in Figure 3. They are:
●A fully integrated oscillator that provides the internal clock and the ramp for the slope compensation avoiding sub-harmonic instability
●The soft-start circuitry to limit inrush current during the startup phase
●The transconductance error amplifier
●The pulse width modulator and the relative logic circuitry necessary to drive the internal power switches
●The drivers for embedded P-channel and N-channel Power MOSFET switches
●The high-side current sensing block
●The low-side current sense to implement diode emulation
●A voltage monitor circuitry (UVLO) that checks the input and internal voltages
●A thermal shutdown block, to prevent thermal run-away.
Figure 3. Block diagram
Doc ID 023246 Rev 1 |
7/29 |
Functional description |
ST1S32 |
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4.1Soft-start
The soft-start is essential to assure the correct and safe startup of the step-down converter. It avoids inrush current surge and makes the output voltage rise monothonically.
The soft-start is managed by ramping the reference of the error amplifier from 0 V to 0.8 V. The internal soft-start capacitor is charged with a resistor to 0.8 V, then the FB pin follows the reference so that the output voltage is regulated to rise to the set value monothonically.
4.2Error amplifier and control loop stability
The error amplifier provides the error signal to be compared with the high-side switch current through the current sense circuitry. The non-inverting input is connected with the internal 0.8 V reference, whilst the inverting input is the FB pin. The compensation network is internal and connected between the E/A output and GND.
The error amplifier of the ST1S32 is a transconductance operational amplifier, with high bandwidth and high output impedance.
The characteristics of the uncompensated error amplifier are:
Table 5. Characteristics of the uncompensated error amplifier
Description |
Value |
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DC gain |
94 dB |
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gm |
238 μA/V |
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Ro |
96 MΩ |
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The ST1S32 embeds the compensation network that assures the stability of the loop in the whole operating range. Here below are all the tools needed to check the loop stability.
In Figure 4. the simple small signal model for the peak current mode control loop is shown.
8/29 |
Doc ID 023246 Rev 1 |
ST1S32 |
Functional description |
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Figure 4. Block diagram of the loop for the small signal analysis
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VIN |
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Slope |
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GCO(s) |
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Compensation |
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High side |
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Switch |
GDIV(s) |
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L |
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Current sense |
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VOUT |
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Logic |
Cout |
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And |
Low side |
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Driver |
Switch |
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PWM comparator |
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0.8V |
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R1 |
VC |
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VFB |
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Rc |
Error Amp |
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R2 |
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Cc |
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GEA(s) |
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AM12609V1 |
Three main terms can be identified to obtain the loop transfer function:
1.from control (output of E/A) to output, GCO(s);
2.from output (VOUT) to the FB pin, GDIV(s);
3.from the FB pin to control (output of E/A), GEA(s).
The transfer function from control to output GCO(s) results:
Equation 1
RLOAD |
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1 |
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GCO(s) = |
-----------------R i |
---------------------------------------------------------------------------------------------------- |
Rout TSW |
[mC (1 – D) – 0.5-] |
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1 + |
-----------------------------L - |
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1 |
s |
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+ ---- |
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ω |
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z |
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-------------------- FH(s) |
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1 |
s |
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+ ----- |
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ω |
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p |
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where RLOAD represents the load resistance, Ri the equivalent sensing resistor of the current sense circuitry (0.369 Ω), ωp the single pole introduced by the LC filter and ωz the zero given by the ESR of the output capacitor.
FH(s) accounts for the sampling effect performed by the PWM comparator on the output of the error amplifier that introduces a double pole at one half of the switching frequency.
Equation 2
ω 1
Z = ----------------------------------
ESR COUT
Doc ID 023246 Rev 1 |
9/29 |