ST ST1S14 User Manual
Up to 3 A step down switching regulator
Features
■ 3 A DC output current
■ Operating input voltage from 5.5 V to 48 V
■ 850 kHz internally fixed switching frequency
■ Internal soft start
■ Power good open collector output
■ Current mode architecture
■ Embedded compensation network
■ Zero load current operation
■ Internal current limiting
■ Inhibit for zero current consumption
■ 2 mA maximum quiescent current over
temperature range
■ 250 mΩ typical R
■
Thermal shutdown
Application
Factory automation
Printers
DC-DC modules
High current LED drivers
Figure 1. Application schematic
DS(on)
ST1S14
HSOP8 - exposed pad
Description
The ST1S14 is a step down monolithic power
switching regulator able to delivers up to 3 A DC
current to the load depending on the application
conditions. The high current level is also achieved
thanks to an HSOP8 package with exposed
frame, that allows to reduce the R
approximately 40 °C/W. The output voltage can
be set from 1.22 V. The device uses an internal Nchannel DMOS transistor (with a typical R
200 mΩ) as switching element to minimize the
size of the external components. The internal
oscillator fixes the switching frequency at 850
kHz. Power good open collector output validates
the regulated output voltage as soon as it reaches
the regulation. Pulse by pulse current limit offers
an effective constant current short circuit
protection. Current foldback decreases overstress
in persistent short circuit condition.
100nFC1 100nFC1
th(JA)
PGOODPGOOD
down to
DS(on)
of
VINVIN
GNDGND
10uFC210uF
U1 ST1S14U1 ST1S14
PGOOD
8
SW
2
4
FB
D1
D1
STPS3L60U
STPS3L60U
1
BOOT
7
VIN
5
EN2
3
EN1
C3
C2
100nFC3100nF
GND
6
L1 8.5uHL1 8.5uH
R3 47KR3 47K
R1 4.7KR1 4.7K
C4C4
R2
2.7KR22.7K
small signal
power plane
VOUTVOUT
C5
100uFC5100uF
GNDGND
October 2010 Doc ID 17977 Rev 1 1/42
www.st.com
42
Contents ST1S14
Contents
1 Pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.1 Pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
1.3 Enable inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
2 Electrical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.1 Maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.2 Thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2.3 ESD protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
3 Electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
4 Functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
4.1 Power supply and voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.2 Voltages monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.3 Soft Start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
4.4 Error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.5 Inhibit function . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
4.6 Thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
5 Additional features and limitations . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.1 Maximum duty cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
5.2 Minimum output voltage over V
range . . . . . . . . . . . . . . . . . . . . . . . . . . 13
IN
6 Closing the loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
6.1 GCO(s) Control to output transfer function . . . . . . . . . . . . . . . . . . . . . . . . 15
6.2 Error amplifier compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
6.3 Voltage divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
6.4 Total loop gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18
7 Application information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1 Component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
7.1.1 Input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
2/42 Doc ID 17977 Rev 1
ST1S14 Contents
7.1.2 Output capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
7.1.3 Inductor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.2 Layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
7.3 Thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
7.4 Short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
7.4.1 300 mV < VFB < 1.22 V . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
7.4.2 V
< 300 mV . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
FB
7.5 Application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
8 Typical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
9 Package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
10 Order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40
11 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41
Doc ID 17977 Rev 1 3/42
Pin settings ST1S14
1 Pin settings
1.1 Pin connection
Figure 2. Pin connection (top view)
EXPOSED
PA D
TO GND
1.2 Pin description
Table 1. Pin description
N Pin Description
1BOOT
2 PG Power good
3EN1
4 FB Feedback voltage
5 FB Enable pin active high
6 GND Ground pin
7V
8 SW Switching node
IN
E.p. Exposed pad must be connected to GND
1.3 Enable inputs
Table 2. Truth table
EN1 EN2 Device status
HL INH
HH INH
LL INH
Bootstrap capacitor for N-channel gate driver. Connect 100nF low ESR
capacitor from BOOT pin to SW
Enable pin active low
Input supply pin
LH ON
4/42 Doc ID 17977 Rev 1
ST1S14 Electrical data
2 Electrical data
2.1 Maximum ratings
Table 3. Absolute maximum ratings
Symbol Parameter Value Unit
V
IN
V
EN1
V
EN2
PG Power good -0.3 to (V
BOOT Bootstrap pin -0.3 to 55 V
SW Switching node -1 to (VIN+0.3) V
V
FB
T
J
T
STG
T
LEAD
Power supply input voltage -0.3 to 52 V
Enable 1 voltage -0.3 to 7 V
Enable 2 voltage -0.3 to (VIN+0.3) V
Feedback voltage -0.3 to 3 V
Operating junction temperature range -40 to 150 °C
Storage temperature range -65 to 150 °C
Lead temperature (soldering 10 sec.) 260 °C
2.2 Thermal data
Table 4. Thermal data
Symbol Parameter Value Unit
R
th JA
Thermal resistance junction-ambient 40 °C/W
+0.3) V
IN
2.3 ESD protection
Table 5. ESD protection
Symbol Test condition Value Unit
HBM 4 kV
ESD
MM 500 V
Doc ID 17977 Rev 1 5/42
Electrical characteristics ST1S14
3 Electrical characteristics
All the population tested at TJ = 25 °C, VCC =12 V, V
EN1
= 5 V, V
=0 V unless otherwise
EN2
specified.
The specification is guaranteed from (-40 to +125) T
temperature range by design,
J
characterization and statistical correlation.
Table 6. Electrical characteristics
Symbol Parameter Test condition Min Typ Max Unit
Operating input
V
IN
R
DS(on)
I
SW
t
HICCUP
f
SW
T
ON MIN
T
OFF MIN
voltage range
MOSFET on
resistance
=1A 0.2 0.4 Ω
I
SW
Maximum limiting
current
Hiccup time 16 ms
Switching frequency 600 850 1000 kHz
Duty cycle
Minimum conduction
time of the power
element
Minimum conduction
time of the external
diode
5.5 48 V
3.7 4.5 5.2 A
(1)
(1)
(1)
75 90 120 ns
90 %
90 ns
DC characteristics
I
=0 A 1.202 1.22 1.239 V
V
I
FB
I
I
qst-by
Voltage feedback
FB
FB biasing current 50 nA
Quiescent current
q
Stand-by quiescent
current
PG output voltage
(open collector active)
LOAD
I
=10 mA to 3A 1.196 1.22 1.245 V
LOAD
V
=2V 1.3 2 mA
FB
V
=2V, VIN=48V 1.7 2.4 mA
FB
DEVICE OFF (see Ta b le 2 μ
V
falling edge
FB
I
= 6mA 0.4 V
SINK
6/42 Doc ID 17977 Rev 1
0.92*
V
OUT
0.8*
V
OUT
V
V
Table 6. Electrical characteristics (continued)
Symbol Parameter Test condition Min Typ Max Unit
Inhibit
V
I
V
I
Enable 1 levels
EN1
Enable 1 biasing
EN1
current
Enable 2 levels
EN2
Enable 2 biasing
EN2
current
Thermal shutdown
T
SHDWN
T
HYS
1. Parameter guaranteed by design
Thermal shutdown
temperature
Thermal shutdown
hysteresis
Device ON
=5.5V to 48V
V
IN
Device OFF
=5.5V to 48V
V
IN
=5V 1.6 2.5 μA
V
EN1
Device ON
VIN=5.5V to 48V
1.5 V
1.5 V
Device OFF
V
=5.5V to 48V
IN
V
=0V; V
EN1
V
=0V; V
EN1
=0V; VCC=V
V
EN1
=0V -1.0 -2.4 -3.7 μA
EN2
=12V 2.7 5.8 8.5 μA
EN2
=48V 3.0 6.0 9.0 μA
EN2
(1)
140 150 160 °C
(1)
15 °C
0.5 V
0.5 V
Doc ID 17977 Rev 1 7/42
Functional description ST1S14
4 Functional description
The ST1S14 is based on a “peak current mode”, constant frequency control. As a
consequence the intersection between the error amplifier output and the sensed inductor
current generates the control signal to drive the power switch.
The main internal blocks shown in the block diagram in Figure 3 are:
● A fully integrated sawtooth oscillator with a typical frequency of 850 kHz
● A transconductance error amplifier
● An high side current sense amplifier to track the inductor current
● A pulse width modulator (PWM) comparator and the circuitry necessary to drive the
internal power element
● The soft start circuitry to decrease the inrush current at power-up
● The current limitation circuit based on the pulse by pulse current protection with
frequency divider based on FB voltage and the HICCUP protection
● The bootstrap circuitry to drive the embedded N-MOS switch.
● A multi input inhibit block for stand-by operation.
● A circuit to implement the thermal protection function.
Figure 3. Device block diagram
Slope
compensation
EA
SOFT START
REF
VC
1.21V
T
Comp
Rc
Cc
OSC
OTP
KR*I
Reg
L
MOSFET
CONTROL
LOGIC
ShutDown
BOOT
I_SEN
VIN
Boot Reg
Driver1
SW
Driver2Cp
PG
8/42 Doc ID 17977 Rev 1
EN2
EN1 GND
ST1S14 Functional description
4.1 Power supply and voltage reference
The internal regulator circuit consists of a start-up circuit, an internal voltage pre-regulator,
the bandgap voltage reference and the bias block that provides current to all the blocks. The
starter supplies the start-up current to the entire device when the input voltage goes high
and the device is enabled (inhibit pin connected to ground). The pre-regulator block supplies
the bandgap cell with a pre-regulated voltage that has a very low supply voltage noise
sensitivity.
4.2 Voltages monitor
An internal block continuously senses the Vcc, V
good, the regulator begins operating. There is also a hysteresis on the V
Figure 4. Internal circuit
4.3 Soft Start
The startup phase minimizes the inrush current and decreases the stress of the power
components at the power up. The startup takes place when V
threshold.
As shown in Figure 5, the soft start event is composed of three main phases:
and Vbg. If the monitored voltages are
ref
crosses the selected UVLO
IN
(UVLO).
CC
Phase 1: [V
<300 mV]
FB
The output capacitor is charged with a typical peak inductor current equal to 1.45 A and
the nominal f
Phase 2: [VFB>300 mV & n
is divided by 5
SW
COUNT
<2816 clks]
A internal counter determines phase 2 time (see Figure 5).
The reference of the error amplifier is ramped in 44 steps (one step every 64 clks).
A low pass filter smooths each step to minimize output discontinuity. Considering the
typical 850 kHz switching frequency, the phase two duration is 3.3 msec
Phase 3: [VFB>300 mV & n
COUNT
=2816 clks]
The reference of the embedded error amplifier is connected to the nominal reference
voltage (1.222 typical) derived from the internal bandgap generator. The soft start
phase ends at this time.
Doc ID 17977 Rev 1 9/42
Functional description ST1S14
Figure 5. soft start phases
PHASE 1
PHASE 2 PHASE 3
VREF_OUT
VFB
SHORT
2816 clks
During normal operation a new soft start cycle takes place in case of:
● HICCUP mode current protection
● thermal shutdown event
● UVLO event
● the device is driven in INH mode
Figure 6. Soft-start block diagram
VREF
Ctrl
S2
c
Vsaw
Vsense
64clks
S1
300mV
VREF_OUT
VFB
VFB
EA
400mV
Vsense
Logic
Iclamp
SHORT
10/42 Doc ID 17977 Rev 1
ST1S14 Functional description
4.4 Error amplifier
The voltage error amplifier is the core of the loop regulation. It is a transconductance
operational amplifier whose non inverting input is connected to the internal voltage
reference (1.222 V), while the inverting input (FB) is connected to the external divider or
directly to the output voltage.
The error amplifier is internally compensated to minimize the size of the final application.
Table 7. Uncompensated error amplifier characteristics
Description Values
Transconductance 218 µS
Low frequency gain 93 dB
C
P
C
C
R
C
The error amplifier output is compared with the inductor current sense information to
perform PWM control
24 pF
211 pF
200 kΩ
4.5 Inhibit function
The inhibit feature is used to set the device in standby mode according to Ta b l e 2 : Tr u t h
table. When the device is disabled, the power consumption is reduced to less than 40 µA.
The pin EN2 is also V
compatible.
IN
4.6 Thermal shutdown
The shutdown block generates a signal that turns OFF the power stage if the temperature of
the chip goes higher than a fixed internal threshold (150±10 °C). The sensing element of the
chip is very close to the PDMOS area, ensuring fast and accurate temperature detection. A
hysteresis of approximately 15 °C keeps the device from turning ON and OFF continuously.
Doc ID 17977 Rev 1 11/42
Additional features and limitations ST1S14
5 Additional features and limitations
5.1 Maximum duty cycle
The bootstrap circuitry charges cycle by cycle the external bootstrap capacitor to generate a
voltage higher than V
An internal linear regulator charges the C
free wheeling diode during the switching activity. The internal logic implements a minimum
OFF time of the high side switch (90 nsec typical) to prevent the bootstrap discharge at high
duty cycle. As a consequence the ST1S14 can operate at a maximum duty cycle around
90% typical.
necessary to drive the internal N-channel power element.
IN
during the conduction time of the external
BOOT
The ST1S14 embeds the diode V
Figure 7. Bootstrap operation
REGULATOR
V
D1
V
DRIVER
V
REG-VD1+VD2
required for the bootstrap operation.
D1
V
IN
HS switch
C
BOOT
V
D2
C
OUT
12/42 Doc ID 17977 Rev 1
ST1S14 Additional features and limitations
5.2 Minimum output voltage over VIN range
The minimum regulated output voltage at a given input voltage is limited by the minimum
conduction time of the power element, that is 90nsec typical for the ST1S14:
Equation 1
V
O_MINVIN
()VIND
⋅ V
MIN
T
ON_MIN
--------------------- -
⋅ V
IN
T
SW
⋅== =
IN
90ns
------------------
1.18μs
which is plotted in Figure 14. The reference of the embedded error amplifier (1.22V) sets the
minimum V
Figure 8. V
O_SET
O_MIN
at low VIN.
over input voltage range
Figure 8 shows the minimum output voltage over input voltage range to have constant
switching activity and a predictable output voltage ripple.
The regulator can anyway regulate the minimum input voltage over the entire input voltage
range but, given the 90ns minimum conduction time of the power element, it will skip some
pulses to keep the output voltage in regulation when Equation 1 is not satisfied.
This operation is not recommended at the nominal input voltage of the application mainly
because it affects the output voltage ripple, but it is generally accepted during a line
transient event.
Doc ID 17977 Rev 1 13/42
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