RXQB
RXQA
RXIB
RXIA
IDATA
QDATA
DCLK
TESTOUT
DCDC_PA
WPAVDC
VLOOP
RTEMP
WRFLOOP
BTCLKREQ
BTRX
BTCTS
VBATI
DCDC_PA
WPAVDC
Pages 10-15
Pages 10-15
VBATI
VDIG
VDDE18
VMSPICO
VBACKUP
DCDC_PA
WPAVDC
VLOOP
RTEMP
WRFLOOP
BTCLKREQ
BTRX
BTCTS
MEMRESn
VAD
FLASH_STROBE
SPL
SPR
MIDREF
ANT
SW3_1V8
WSTR_15
Operation & Services
Operation & Services
MPX1_OFF
VGA_OFF
KBDIM
NAVDIM
AMPCTRL
ICN/AUXinR
M
MICP/AUXinL
I2CDAT1
I2CCLK1
BTRTS
WPABIAS
VCXOCONT
VBUS
DCIO_ON
VBT_EN
CAM_27_EN
SERVICEn
ANTSW3
WSTR
Pages 16-18
Pages 16-18
WSTR_15
VDIG
VDDE18
RXQB
VCAM12
VCAM18
MPX1_OFF
VGA_OFF
KBDIM
NAVDIM
I2CDAT1
I2CCLK1
BTTX
VPP
DCIO
VBATI
VDIG
VCAM27
VCAM12
VCAM18
VDDE18
MPX1_OFF
VGA_OFF
KBDIM
M
NAVDI
AMPCTRL
MICN/AUXinR
MICP/AUXinL
I2CDAT1
I2CCLK1
CAMSYSCLK
DCIOint
MMI
MMI
ANTSW3_1V8
Pages 19-23
Pages 19-23
FLASH_STROBE
ANTSW3
WSTR
WSTR_15
PCMDATA
PCMDATB
PCMSYN
PCM
MIDREF
ONSWA
CLK
VAD
SPL
SPR
RXQA
RXIB
RXIA
IDATA
QDATA
DCLK
TESTOUT
UMTS Access
UMTS Access
WDAT
WCLK
TXQB
TXQA
RADST
RADDAT
RADCLK
TXON
MODA
MODB
MODC
MODD
ANTSW0
ANTSW1
ANTSW2
ANTSW3_1V8
TXIA
TXIB
R
VccAVccB
VAPC
WSTR
WDAT
WCLK
RADSTR
RADDAT
RADCLK
MODA
MODB
MODC
MODD
ANTSW0
ANTSW1
ANTSW2
ANTSW3
PCMDATA
PCMDATB
PCMSYN
PCMCLK
BTRTS
WPABIAS
VCXOCONT
VBATI
VRTC13
VBT27
VDDE18
TXQB
TXQA
TXON
BTTX
VDIG
VAPC
VccA
VccB
TXIA
TXIB
CLKREQ
MCLK
VDDE18
VCORE15
CLKREQ
MCLK
SERVICEn
ONSWAn
System Control
System Control
Pag
Pag
es 2-4
es 2-4
MEMRESn
BTRESn
RTCCLK
CAMSYSCLK
Pages 5-9
Pages 5-9
VPP
VBUS
DCIO
DCIO_ON
VBT_EN
CAM_27_EN
Power
Power
VBATI
VBT27
VDDE18
VBACKUP
VCAM27
VCAM12
VCAM18
VMSPICO
DCIOint
VRTC13
VCORE15
XTLDO
VAPC
BTRESn
VCAM12
VDIG
VccA
VccB
VccB
XTLDO
VAPC
Confidential
Approved according to 00021-LXE 107 42/1
Sony Ericsson
BASEBAND
Logic Top
SEMCJ/ Kensuke Katsuta
SEMCJ/ Ken Ikuno
Ai Main Board
VccA
VCAM18
2/1911-ROA 128 2071/2
RTCCLK
XTLDO
VAPC
DIAGRAMSCHEMA
2006/12/14
E
01 of 23
VDDE18
VCORE15
CLKREQ
MCLK
SERVICEn
ONSWAn
VDDE18 VCORE15 VDDE18VCORE15
CLKREQ
MCLK
SERVICEn
ONSWAn
VDDE18
RE15
VCO
CLKREQ
MCLK
CEn
SERVI
ONSWAn
Clocks & Resets
Clocks & Resets
Page 4
Page 4
TestTest
Page 3
Page 3
CAMSYSCLK
RTCCLK
MEMRESn
BTRESn
RTCCLK
CAMSYSCLK
MEMRESn
BTRESn
RTCCLK
CAMSYSCLK
MEMRESn
BTRESn
Confidential
Approved according to 00021-LXE 107 42/1
Sony Ericsson
BASEBAND
System Control
Top
SEMCJ/ Zhang Zongyao
SEMCJ/ Ken Ikuno
Ai Main Board
2/1911-ROA 128 2071/2
DIAGRAMSCHEMA
2006/12/14
E
02 of 23
RTCCLK_1
SERVICEn
CLKREQ
ONSWAn
MCLK
Actual net on system
connector page...
R2102
100ohms
B2100
RTM501911/2
R1A
C2C1
C2102
22p
C2104 & C2106 mounted close to D2000
C2104
1nF
C2100
1nF
C2106
NM
10pF
SERVICEn
CLKREQ_1
ONSWAn ONSWAn
VDDE18
32768k
F
Connect to ground pla ne in one single point
D2000
RTC
RTCIN
V3
RTCBDIS_N
W3
RESPOW_N RESOUT0_N
T8
MCLK_M SYSCLK0
E15
IRQ0_N
D15
RQ1_N
I
C16
SERVICE_N
AA6
CLKREQ
DB2030
ROP1013112/1
Resets
Clocks
Control
R1A
RTCOUT
RTCCLK
RTCDCON
RESOUT1_N
RESOUT2_N
SYSCLK1
SYSCLK2
RREQ0_N
PW
PWRREQ1
(REQ3234U)
27pF
C2103
E16
D16
AB6
AC6
AC5
AB5
Use for
dumping resister
47ohm
T2V2
W4
Y4
Y6
Y7
VCORE15
R2101
100Kohms
R2100
0oh
C2101
1nF
ms
R2105
10Kohms
R2104
47ohms
R2104 mounted
close to D2000
RTCCLK
MEMRESn
BTRESn
CAMSYSCLK
PWR_IRQ
PWRRST
MCLK_WANDA
RTCDCON
PWRREQn
CLKREQ_1
MCLK
RTCCLK_1
D2000
V21
CLK32
U9
MCLK_W
U3
HCLK
DB2030
ROP1013112/1
N2000
ERICSSON AB 2010
SYSTEM CONTROL
POWER ON/RESET
C4
ONSWA
C5
ONSWB
A7
ONSWC
C10
SLEEP
K3
CLKREQ
K9
MCLK
M1
XTAL1
ERICSSON_AB2012
ROP1013066/6
CONTROL
RTCCLK
MEMRESn
BTRESn
CAMSYSCLK
B8
RRST
PW
C1
IRQ
R1A
VDDE18
VCORE15
VDDE18 VCORE15
Confidential
Approved according to 00021-LXE 107 42/1
Sony Ericsson
BASEBAND
System Control
Clocks & Resets
SEMCJ/ Zhang Zongyao
SEMCJ/ Ken Ikuno
Ai Main Board
2/1911-ROA 128 2071/2
DIAGRAMSCHEMA
2006/12/14
E
03 of 23
AB7
AA7
AA8
D2000
TDI_M
TMS_M
TCK_M
TRST_N_M
DB2030
ROP1013112/1
JTAG_IF
ETM_IF
TDO_M
RTCK_M
TEMU0_N_M
TEMU1_N_M
ETMPSTAT0
ETMPSTAT1
ETMPSTAT2
ETMSYNC
ETMCLK
ETMPKT0
ETMPKT1
ETMPKT2
ETMPKT3
ETMPKT4
ETMPKT5
ETMPKT6
ETMPKT7
D2000
Y8AC7
AB8
AD8
Y9
AB11
AC10
Y12
AA12
AB12
AC12
AA13
AB13
AC13
Y14
AA14
AB14
AC14
UART_RX
DSPINTERRUPT
DB2030
ROP1013112/1
D2000
TDI_W
M20
TMS_W
P21
TRST_N_W
N20 H20
TC
K_W
DB2030
ROP1013112/1
D2000
U12
BOOTMODE0
R11
BOOTMODE1
U15
BOOTMODE2
F20
BOOTMODE3
AD23
TESTMODE
T14
ANALOG_ENABLE
T15
APLL_BYPASS
T16
CS_BYPASS
DB2030
ROP1013112/1
GPO0
GPO1
GPO2
GP
GPO4
GPO5
GPO6
GPO7
UART_TX
CPU_IACK
CPU_XF
CPU_IRQ1
CPU_IRQ0
CPU_CLKOUT
TDO_W
EMU0_W
EM
U1_W
APLL_ATEST1
T10
U4
P12
R12
O3
T12
P11
U14
T13
E22D22
N10
P9
H4
H3
T11
K20L20
G20
N9
D2000
J16
H16
K15
J15
M14
L14
K14
J14
H14
M13
L13
K13
J13
M12
L12
K12
J12
H12
M11
L11
K11
J11
N12
M10
L10
K10
J10
H10
N11
L9
K9
J9
DB2030
ROP1013112/1
EMIF_D0
EMIF_D1
EMIF_D2
EMIF_D3
EMIF_D4
EMIF_D5
EM
IF_D6
EMIF_D7
EMIF_D8
EMIF_D9
EMIF_D10
EMIF_D11
EMIF_D12
EMIF_D13
EMIF_D14
EMIF_D15
EMIF_D16
EMIF_D17
EMIF_D18
EMIF_D19
EMIF_D20
EMIF_D21
EMIF_D22
EMIF_D23
EMIF_D24
EM
IF_D25
EMIF_D26
EMIF_D27
EMIF_D28
EM
IF_D29
EMIF_D30
EMIF_D31
EMIF_AWE
EMIF_ARE
EMIF_ARE_ADY
EMIF_A1
EMIF_A2
EMIF_A3
EMIF_A4
EMIF_A5
EMIF_A6
EMIF_A7
EMIF_A8
EMIF_A9
EMIF_A10
EMIF_A11
EMIF_A12
EMIF_A13
EMIF_A14
EMIF_A15
EMIF_A16
EMIF_A17
EMIF_A18
EMIF_A19
EMIF_A20
EMIF_A21
EMIF_A22
EMIF_A23
EXT_MEM_UBUS10
EXT_MEM_UBUS11
EXT_MEM_UBUS12
EXT_FRZME_STOROBE
T4
M9
K8
R16
R15
R14
R13
R17
P16
P15
P14
P13
N17
N16
N15
N14
N13
M16
M15
L17
L16
L15
A23
K17
B24
K16
P10
R10
R9
J20
Confidential
Approved according to 00021-LXE 107 42/1
Sony Ericsson
BASEBAND
System Control
Test
SEMCJ/ Zhang Zongyao
SEMCJ/ Ken Ikuno
Ai Main Board
2/1911-ROA 128 2071/2
DIAGRAMSCHEMA
2006/12/14
E
04 of 23
VBUS
DCIO
DCIO_ON
CAM_27_EN
VBT_EN
Page 7
Page 7
VAPC
XTLDO
VccA
VBATI
VccB
VDIG
RF Power
RF Power
Page 9
VPP
VPP VPP
Page 6
Page 6
VDDF13
VDDE18
VBUS
DCIO
DCIO_ON
CAM_27_EN
VBT_EN
VBUS
DCIO
DCIO_ON
CAM_27_EN
VBT
Regulators & Char ging
Regulators & Char ging
VRTC13
VCORE13
VCORE15
VCORE18
VBT27
VBACKUP
VBATI
VDIG
VCAM27
VCAM12
VCAM18
VMSPICO
_EN
DCIOint
VBATI
VCORE18
VDDE18
VDDF13
VDDE18
VRTC13
VCORE13
VCORE15
VDDE18
VBT27
VBACKUP
VBATI
VDIG
VCAM27
VCAM12
VCAM18
VMSPICO
DCIOint
VPP
VBATI
VCORE18
VDDE18
Memories
Memories
VDDF13
VDDE18
VRTC13
VCORE13
VCORE15
Power Asics
Power Asics
Page 9
Page 8
Page 8
VAPC
XT
LDO
VccA
VccB
VAPC
XTLDO
VccA
VccB
VDDE18
VBT27
VBACKUP
VBATI
VDIG
VMSPICO
DCIOint
VCORE15
VRTC13
VCAM27
VCAM12
VCAM18
Confidential
Approved according to 00021-LXE 107 42/1
Sony Ericsson
BASEBAND
Power
Top
SEMCJ/ Kensuke katsuta
SEMCJ/ Ken Ikuno
Ai Main Board
2/1911-ROA 128 2071/2
DIAGRAMSCHEMA
2006/12/14
E
05 of 23
NC
NC
Ch
arge sense lines, pin D2 and D3 on
N2000, should be routed together and
connected directly to pads for R2201
(no current conducting via allowed
between connection point and pad).
NM
C2236
1uF
(REQ3312U)
FG sense lines, pin F11 and F12 on N2000,
should be routed together and connected
directly to pads for R2200 (no
current conducting via allowed between
connection point and pad).
C2289
C2284
C2283
1uF
10nF
1uF
(REQ3312U)
Mount C2211 and C2212
close to battery connector
This components MUST BE fit
into RF layout side.
(REQ3317U)
Place C2206 and C2207
close to N2000
C2286
NM
1uF
NM
C2237
100nF
10uF
NM
C2201
C2200
10uF
Local ground plane
Connect local gro und plane to
main ground plane in one poi nt only
L2201
12
(REQ3254U)
C2218 close
to N2000
REG70618/18
BLM15EG121SN1
1Ghz
NC2
HEAT1
HEAT2
(REQ3200U)
VROUT1
VROUT2
NC3
NC4
Should be separated
from surface GND
N2000 reference.
Mount close to N2000
BASEBAND
Power
Regulators & Charging
06 of 23
PA Control
VBATI
VDIG
C1100
10nF
Power Supply
VBATI
N2000
C1103
10uF
ERICSSON_AB2012
ROP1013066/6
C1108
100nF
GND
ERICSSON AB 2010
POWER
RADIO
LDO_A
LDO_B
N2000
C12
VDDBUF
G12
VDDPA
ERICSSON_AB2012
ROP1013066/6
VDDAVBATA
VDDB
EXTLDO
VSSA
ERICSSON AB 2010
UM
TS ACCESS
PA CONTROL
B12A12
A11
C11
H10
PASENSE+
PASENSE-
PAREG
FF_IN
EXPOUT
VSSPA
E12
E11
D11
D12
IOUT
F10
G10
E10
C1101
470pF
C1102
470pF
VAPC
C1106
C1107
4.7uF
VccA
4.7uF
VccB
VBATI
VDIG
VBATI VDIG
XTLDO
Confidential
Approved according to 00021-LXE 107 42/1
Sony Ericsson
BASEBAND
Power
RF
SEMCJ/ Kensuke katsuta
SEMCJ/ Ken Ikuno
Ai Main Board
2/1911-ROA 128 2071/2
DIAGRAMSCHEMA
2006/12/14
E
07 of 23