Sony CPD-G200 Schematic

CPD-G200
Mass Approx. 20 kg (44 lb 1 oz) Plug and Play DDC1/DDC2B/DDC2Bi/GTF Supplied accessories Power cord (1)
Macintosh adapter (1) Windows Monitor Information Disk (1) Warranty card (1) Notes on cleaning the screen’s surface (1) This instruction manual (1)
* Recommended horizontal and vertical timing condition
• Horizontal sync width should be more than 1.0 µsec.
• Horizontal blanking width should be more than 3.0 µsec.
• Vertical blanking width should be more than 500 µsec.
Design and specifications are subject to change without notice.
(Single input)
SERVICE MANUAL
SPECIFICATIONS
CRT 0.24 mm aperture grille pitch (center)
17 inches measured diagonally 90-degree deflection FD Trinitron
Viewable image size Approx. 327 × 243 mm (w/h)
Resolution
Maximum Horizontal: 1600 dots
Recommended Horizontal: 1024 dots
Standard image area Approx. 312 × 234 mm (w/h)
Deflection frequency* Horizontal: 30 to 96 kHz
AC input voltage/current 100 to 240 V, 50/60 Hz, Max. 1.7 A Power consumption 130 W Dimensions
7
/8 × 9 5/8 inches)
(12
16.0" viewing image
Vertical: 1200 lines
Vertical: 768 lines
3
/8 × 9 1/4 inches)
(12
Vertical: 48 to 120 Hz
Approx. 404 × 413.5 × 419.5 mm (w/h/
(16 × 16 3/8 × 16 5/8 inches)
d)
US Model
Canadian Model
Chassis No. SCC-L29B-A
D99
CHASSIS
MICROFILM
TRINITRON® COLOR COMPUTER DISPLAY
(1) Schematic Diagram of D (a-d) Boards
123456789101112
A
D
G
H
B
C
E
KEY SCAN
CN904
7P
STBY 5V
WHT
:S-MICRO
CN701
10P YEL
CY4­CY4+ CY3­CY3+ CY2­CY2+ CY1­CY1+
1 2
FB902
3
JW(5)
4 5 6 7 8
10
9 8 7 6 5 4 3 2 1
100 :CHIP
R919
100 :CHIP
R926
100 :CHIP
R928
R566
22 1W
:RS
LA6500-FA
ROTATION DRIVE
R563
1.5
:FPRD
IC502
15V
R562
18k :RN
-0.6
C513
10
OUT
C549
0.068 :PT
-15V
IN-
1.1
IN+
12345
R560
15k
:RN-CP
C547
1.0
1.0
R559
2.7k
:RN-CP
STBY5V
R558
6.8k
:RN-CP
R718
100
1W
:RS
R724
18 1W
RESET
R717
2.2 1W
:RS
C708
0.1 :PT
R745
2.2
:CHIP
1 2 3 4 5 6 7 8 9 10
I OUTA
1 3
RESET STBY 5V GND
CN801
KEY DET LED RED LED GRN
INPUT SELECT
GND
TO H BOARD
:S-MICRO
CY-DY
ROTATION-
ROTATION
ROTATION+
F
S901
R705
4.7k
:RN-CP
R719
15k
:RN-CP
C729 330p
B:CHIP
OUTA
C929
STBY 5V
0.001
B:CHIP
R940
2.7k
:RN-CP
R943
470
R755
4.7k
:RN-CP
R706
R753
4.7k
15k
:RN-CP
:RN-CP
C725
0.01
B:CHIP
3.8 3.8 3.8 0.2
VEE
INA-
INA+
INB+
R727
15k
:RN-CP
C733 330p
B:CHIP
R747
2.2
:CHIP
INB-
OUTB
I OUTB
R711
0.56 1W
R729
2.2
1W
:RS
VCC
R712
33 1W
:RS
C711
0.1 :PT
IC701
CXA8071AP
CONVERGENCE
CONTROL
4.9
4.9
5.0
4.9
5.0
5.0
5.0
5.0
5.0
INB-
A_GND
123456789
V_SIN
VPOSIN
V_DF
VREF OUT
H_CONVOUT
V.CONVOUT
H_STATICOUT
V_STATICOUT
V.SIN
:RN-CP
C707
68p
CH:CHIP
R735
2.2k
:RN-CP
B:CHIP
R737
2.2k
:RN-CP
INB+
D_GND
SCL
SDL
D_VCC
HD.IN
V_REFIN
H-SAW_CAP
H-AGC_CAP
A_VCC
R710
R708
2.2k
2.2k :RN-CP
R733
:CHIP
C723
0.01
INA+
INA-
D CONVERGENCE OUTS CONVERGENCE OUT
0
C716
0.033 25V
B:CHIP
C718
0.033 25V
B:CHIP
C702
4.7
R707
R709
2.2k
2.2k :RN-CP
:RN-CP
C706
R731
0
68p
:CHIP
CH:CHIP
R728
100
1W
:RS
R730
12 1W
:RS
2.5 2.5 2.5 2.5-0.2
1 2 3 4 5 6 7 8 9 10 11 12
OUTB
4.7
4.2
CH:CHIP
3.7
4.9
4.9
10 11 12 13 14 15 16 17 18
C705
R716
33 1W
:RS
OUTA
42
IC702IC703
STK391-110LA6510
C714 390p
0.1 :PT
VEE
D935
HZS5.1N
D704
1SS119
R704
8.2k :RN-CP C701
0.1
25V B:CHIP C704 220p
CH:CHIP
C703
0.22 :MPS
C715
R713
0.68 1W
-a
D
(CONVERGENCE CONTROL)
470 16V
12V
VCC
C712
0.1 :PT
C713 2200
10V
5V-2
R703
270
1/4W
R739
10k
:CHIP
JW901 JW(5)
3.2
STBY
-15V
470 25V
R743
0.47
:FPRD
R741
0.47
:FPRD
I
ab1
ab2
ab3
ab4
ab5
ab6
ab7
ab8
ab9
ac1
ab10
ab11
ab12
ab13
15V
C710C709
470 25V
ab14
B-SS3483<J..>-D..-P1
Divided circuit diagram One sheet of D board circuit diagram is divided into four sheets, each having the code D-a to D-d . For example, the destination ab1 on the D-a sheet is connected to ab1 on the D-b sheet.
1
a
b
Ref. No.
Circuit diagram division code
5-7
Schematic diagram
D
-a board
ll
l
ll
•D - a BOARD WAVEFORMS
1
0.1 Vp-p (V)
23
0.16 Vp-p (V)
5-8
2.4Vp-p (V)
4
2.0 Vp-p (V)
1234567891011 1312
A
D
B
C
E
STBY
D901
5V
R905
0
:CHIP
R921
0 :CHIP
R912
1k :CHIP
R913
100
:CHIP
R914
100
:CHIP
R923
0 :CHIP
H FLY
CBLANK
1k :CHIP
R904
1k
:CHIP
R918
1k
:CHIP
D507
HZS5.1N
R935
100
:CHIP
R938
100
:CHIP
:CHIP
R936
ab1
ab2
ab3
ab4
ab5
ab6
ab13
ab7
ab9
ab8
ab10
ab11
R907
C901
100
0.47
1/2W
B:CHIP
C903
0.01
B:CHIP
C902
470 16V
C938
220 16V
C906
1.0
:MPS
C934 100p
CH:CHIP
D937
HZS5.6NB2
R915
4.7k
:CHIP
IIC DATA
IIC CLK
C905
0.068 :PT
V SAW
E/W
V.SIN
C913
0.1 :PT
ab12
F
V SAW
E/W
V.DF
IIC CLK
123456789101112131415
D.GND
D VCC
4.8
LOCK
4.2
SDA
V.DIV
SCL
V.GND
4.0
6.0
4.9
4.2
4.9
6.1
4.7 5.2
0.7
V-REF
H BLK
H.PH.FI
V.OSC
V.AGC
1
V.SAW
2
E/W
VCO.FI
V.SIN
R.F/V
H.AGC
DELAY CAP
3
V.DF
H.DF
4
H.OUT
H.FLY
0.4
H.GND
IC902
CXA8071CP
DEF CONTROL
C937
0.47
B:CHIP
X5
V.IN
H.IN
AFC1
REF
9V
AFC2
VCC
C936 100p
CH:CHIP
X902
0.4
V-USYNC
5.04.5
4.7
H-USYNC
3.6
4.9
V-REF
10.2
2.4
9.4
C916
C917
0.01
B:CHIP
R933
1k
16 17 18 19 20 21 22 23 24 25 26 27 28 29 30
C925
0.01
B:CHIP
C918
10
R504
0.47
:FPRD
Q501 2SC2412 H DRIVE
5.5
22
12V
R931
2.2k
:RN-CP
D903
RB441QT
5.5
0.4
C926
470 16V
C935
0.47
B:CHIP
R594
220
:CHIP
5.5
5.5
Q502 2SA1037 H DRIVE
R929
4.7k
:CHIP
C922
1.0
C920
0.01
B:CHIP
Q903
2SC2412
H AMP
V-REF
R951
:CHIP
D920
RB501V-40
C923 470p
CH:CHIP
C924
C921
22 470 16V
D925
MA111
D922
1.2k
:CHIP
D927
MA111
D923
0
D926
MA111
D924
MA111
LOCK
100
H-USYNC
ABL
V-USYNC
ABL
THERMAL
C930
0.01 :PT
12V
R922
10k
:CHIP
KEY SCAN
R934
10k
B:CHIP
C927
0.01
B:CHIP
R932
15k
:CHIP
C928
0.01
V FLY
5.0
2.7
ROTATION
1.9
H.CENT
D921
MA111
5.0
0
DEGAUSS
D936
HZS5.6NB2
D902
HZU5.6B2TRF
0.8
D938
HZU5.6B2TRF
4.8
4.8
D918
HZU5.6B2TRF
D919
MA111
HV
3.6
V FLY
4.2
V-SYNC
5.0
0
4.8
5.0
HEATER
10
H-USYNC
4.7
CSYNC
0.5
12 13
H CENT
12345678910111213141516171819202122232425262728
DA0
DA1
5
DA2
6
DA3
DA4
DA5
DA6
DA7
DA8
VSS2
7
VDD2
8
PB7
OSCOUT
PB6
CLKOUT
PB5
PB4
4.0
PB3
2.8
PB2
PB1
VFB
9
VSI1
VSI2
CLP
DDCSDA
ITA
DDCSCL
PD4
PD3
14
VSO
HSO
11
CSI
IC901
CXD9528S
CPU
TEST
RESET
PA0
4.9
PA1
0.4
PA2
4.9
PA3
0.4
PA4
0.4
PA5
PA6
CBLK
OSCIN
2.2
2.4
TDO
RDI
SDA
SCL
PC1
HFB
VDD
HSI1
VSS
IR
NC
NC
NC
IIC CLK IIC DATAIIC DATA
4.8
HZU5.6B2TRF
HZU5.6B2TRF
LED RED
4.4
LED GREEN
1.0
CBLANK
C914
15p CH:CHIP
X901
24MHz
C915
15p
CH:CHIP
5.0
TXD
5.0
RXD
4.2
IIC DATA
4.6
IIC CLK
1.6
DDC DATA
4.4
DDC CLKLOCK
5.0
HOST GND
0.7
C909 1000
10V
4.6
C908
29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56
0.01
B:CHIP
RESET
D904
D934
D933
HZS5.6NB2
D932
HZS5.6NB2
HZS5.6NB2
R920
:CHIP
HZU5.6B2TRF
FB904
STBY
:CHIP
D915
MA111
D931
1k
D930
D929
HZU5.6B2TRF
5V
:CHIP
R908
2.2k
:CHIP
D917
MA111
R909
2.2k
R927
:CHIP
S0
S1
S2
S3
S4
0
C910
0.1 :PT
STBY
R954
10k
:CHIP
R953
10k
:CHIP
D928
HZU5.6B2TRF
R957
47 :CHIP
R958
47 :CHIP
IC904
PST9143NL
RESET
123
VCC
NC SUB GND
OUT
HV
RXD
5V
IIC DATA
IIC CLK
R925
4.7k
:CHIP
C912 100 16V
4 5
4.8
TXD
R916
15k
:CHIP
D909
HZU5.6B2TRF
VSSSDA
5 6 7 8
4.1
4.7
D911
MA111
D913
MA111
R917
15k
:CHIP
D906
MA111
ICC DATA
IIC CLK
D907
MA111
D910
HZU5.6B2TRF
1234
A0
A1
A2
SCLWCVCC
5.0
V FLY CSYNC BPCLAMP
1SS119
MA111
DDC CLK
IC905
M24C08-MN6T
EEPROM
C911
0.01 :PT
:CHIP
D905
D908
R901
JW(5)
R906
10k
MA111
R903
:CHIP
100
R924
100
R937
100
:CHIP
1
D GND
2
+5V
3
RXD
4
TXD
CN901
4P
WHT
:S-MICRO
1
DDCSCL
2
DDCSDA
3
HOST GND1
4
NC
5
IICDATA
6
GND
7
IICCLK
8
HOST GND2
9
HRTRC
10
VRTRC
CN902
10P WHT
:S-MICRO
CN903
8P
WHT
:S-MICRO
1
CBLANK
2
INPUT SELECT
3
BPCLAMP
4
CSYNC
5
VSYNC
6
GND
7
HSYNC
8
SYNC DET
TO A BOARD CN309
TO A BOARD CN311
TO A BOARD CN306
G
H
ab14
ROTATION
bc2
bc1
D
-b
bc3 bc4 bc5 bc6 bc7
(DEFLECTION,CPU)
Divided circuit diagram One sheet of D board circuit diagram is divided into four sheets, each having the code D-a to D-d . For example, the destination ab1 on the D-a sheet is connected to ab1 on the D-b sheet.
a
1
b
Ref. No.
Circuit diagram division code
5-9
bc8
C931 470p
CH:CHIP
bc9
H BLK
HEATER
DEGAUSS
REMOTE ON/OFF
V-SYNC
D916D914
MA111MA111
H-SYNC
bd2
bd1
bd3 bc10 bc11 bc12 bc13 bc14
•D - b BOARD WAVEFORMS
1
2.6 Vp-p (V)
8
3.2 Vp-p (24NHz)
23
0.3 Vp-p (V)
1.0 Vp-p (V)
90
4.0 Vp-p (V)
5.0 Vp-p (V)
4
0.7 Vp-p (H)
5.0 Vp-p (H)
5-10
B-SS3483<U/C>-D..-P2-24
5
5.0 Vp-p (H)
!™
4.0 Vp-p (H)
6
5.0 Vp-p (H)
5.0 Vp-p (H)
7
4.0 Vp-p (H)
4.6 Vp-p (H)
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