The SMSC 2-Port Hub is a low power, OEM
configurable, STT (Single transaction translator) hub
controller IC with 2 downstream ports for embedded
USB solutions. The 2-port hub is fully compliant with the
USB 2.0 Specification and will attach to an upstream
port as a Full-Speed Hub or as a Full-/Hi-Speed Hub.
The 2-Port Hub supports Low-Speed, Full- Speed, and
Hi-Speed (if operating as a Hi-Speed Hub) downstream
devices on all of the enabled downstream ports.
General Features
Hu b Controller IC with 2 downstream ports
Enh anced OEM configuration options available
through either a single serial I
SMBus Slave Port
3 6-pin (6x6mm) QFN lead-free, RoHS compliant
package
Hardware Features
L ow power operation
Full Power Management with individual or ganged
power control of each downstream port
On-chip Power On Reset (POR)
Interna l 1.8V Voltage Regulator
Full y integrated USB termination and Pull-up/Pull-
down resistors
On Boa rd 24MHz Crystal Driver, Resonator or
External 24MHz cloc k input
Enh anced EMI rejection and ESD protection
performance
OEM Selectable Features
Cu stomizable Vendor ID, Product ID, and Device ID
Select whether the hub is part of a compound device
(When any downstream port is permanently
hardwired to a USB peripheral device, the hub is part
of a compound device)
Flexib le port mapping and disable sequence. Ports
can be disabled/reordered in any order to support
multiple product SKUs. Hub will automatically reorder
the remaining ports to match the Host controller's
numbering scheme.
Prog rammable USB differential-pair pin location.
Ease PCB layout by aligning USB signal lines directly
to connectors
Prog rammable USB signal drive strength. Recover
USB signal integrity due to compromised system
environment using 2-level driving strength resolution
2
C EEPROM, or
Datasheet
Select the presence of a permanently hardwired USB
peripheral device on a port by port basis
C onfigure the delay time for filtering the over-current
sense inputs
C onfigure the delay time for turning on downstream
port power
Indicate the maximum current that the 2-port hub
consumes from the USB upstream port
Ind icate the maximum current required for the hub
controller
Pi n Selectable Options for Default Configuration
— Select Downstream Ports as Non-Removable Ports
Applications
L CD monitors and TVs
Multi-function USB peripherals
PC mo ther boards
Set-top b oxes, DVD players, DVR/PVR
Prin ters and scanners
PC me dia drive bay
Po rtable hub boxes
Mobile PC docking
Embedded systems
SMSC USB2512ADATASHEETRevision 1.96 (07-11-08)
USB 2.0 Hi-Speed 2-Port Hub Controller
ORDER NUMBERS:
USB2512A-AEZG FOR 36 PIN, QFN LEAD-FREE ROHS COMPLIANT PACKAGE
construction purposes is not necessarily given. Although the information has been checked and is believed to be accurate, no responsibility is assumed for inaccuracies. SMSC
reserves the right to make changes to specifications and product descriptions at any time without notice. Contact your local SMSC sales office to obtain the latest specifications
before placing your product order. The provision of this information does not convey to the purchaser of the described semiconductor devices any licenses under any patent
rights or other intellectual property rights of SMSC or others. All sales are expressly conditional on your agreement to the terms and conditions of the most recently da ted
version of SMSC's standard Terms of Sale Agreement dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors
known as anomalies which may cause the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not
designed, intended, authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property
damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the customer. Copies of
this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at http://www.smsc.com. SMSC is a registered
trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF MERCHANTABILITY,
FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES ARISING FROM ANY COURSE
OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT, SPECIAL, PUNITIVE, OR CONSEQUENTIAL
DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM OF ACTION, WHETHER BASED ON CONTRACT;
TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE; WHETHER OR NOT ANY REMEDY OF BUYER IS HELD
TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH DAMAGES.
NC
OCS2_N
PRTPWR2
VDD33CR
VDD18
OCS1_N
PRTPWR1
TEST
VDDA33
Indicates pins on the bottom of the device.
Figure 1.1 USB2512A 36-Pin QFN (Embedded F ootprint)
Revision 1.96 (07-11-08)6SMSC USB2512A
DATASHEET
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
Chapter 2 Block Diagram
To Upstream
V
BUS
Bus-Power
Detect/V
BUS
Pulse
Upstream USB
Upstream
PHY
Repeater
Routing & P ort Re-Ordering Logic
Data
24 MH z C rystal
3.3V
1.8V Reg
PLL
SIE
TT
1.8V
To EEPROM or
SM Bus Master
SCKSD
Serial
Inter fa c e
Controller
Port
Controller
PHY#1
USB Data
Downstream
Port #1
OC
Sense
Switch
Driver
LED
Drivers
OC Sense
Switch/LED
Drivers
PHY#2
USB Data
Downstream
Figure 2.1 USB2512A Block Diagram
Port #2
OC
Sense
Switch
Driver
LED
Drivers
OC Sense
Switch/LED
Drivers
SMSC USB2512A7Revision 1.96 (07-11-08)
DATASHEET
Chapter 3 Pin Descriptions
3.1 PIN Descriptions
This section provides a detailed description of each signal. The signals are arranged in functional
groups according to their associated interface.
The “N” symbol in the signal name indicates that the active, or asserted, state occurs when the signal
is at a low voltage level. When “N” is not present before the signal name, the signa l is asserted when
at the high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when worki ng
with a mixture of “active low” and “active high” signals. The term assert, or assertion, indi cates that a
signal is active, independent of whether that level is represented by a high or low voltage. The term
negate, or negation, indicates that a signal is ina ctive.
T able 3.1 USB2512A Pin Descriptions
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
SYMBOL
USBUP_DP
USBUP_DM
VBUS_DET27
USBDN_DP[2:1]/
&
USBDN_DM[2:1]/
QFN-36
EMB
31
30
4
2
3
1
BUFFER
TYPEDESCRIPTION
UPSTREAM USB INTERFACES
IO-UUSB Bus Data
These pins connect to the upstream USB bus data signals such
as the Host port or upstream Hub.
I/O12Detect Upstream VBUS Power
Detects state of Upstream VBUS power. The SMSC Hub
monitors VBUS_DET to determine when to assert the internal
D+ pull-up resistor which signals a connect event.
When designing a detachable hub, this pin must be connected
to the VBUS power pin of the USB port that is upstream of the
Hub.
For self-powered applications with a perma nently attached
host, this pin must be connected to 3.3V (typically VDD33).
DOWNSTREAM 2-PORT USB 2.0 INTERFACE
IO-UHi-Speed USB Data
These pins connect to the downstream USB peripheral devices
attached to the Hub’s port.
PRTPWR[2:1]16
12
OCS[2:1]_N17
13
Revision 1.96 (07-11-08)8SMSC USB2512A
O12USB Power Enable
Enables power to USB peripheral devices downstream.
Note: The Hub supports active high power controllers only!
IPUOver-Current Sense
Input from external current monitor indicating an over-cu rrent
condition.
{Note: Contains internal pull-up to 3.3V supply}
DATASHEET
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
Ta b le 3.1 USB2512A Pin Descriptions (continued)
QFN-36
SYMBOL
RBIAS35I-RUSB Transceiver Bias
SDA/
SMBDATA/
NON_REM1
SCL/
SMBCLK/
EMB
22
24
BUFFER
TYPEDESCRIPTION
A 12.0k
to set the transceiver’s internal bias settings.
SERIAL PORT INTERFACE
I/OSD12Serial Data / SMB Data & Port Non-removable Strap Option
NON_REM1: Non-removable port strap
option.
If this strap is enabled by package and configuration settings
(see Table 3.2), this pi n will be sampled (in conjunction
with LOCAL_PWR/SUSP_IND/NON_REM0) at RESET_N
negation to determine if ports [2:1] contain permanently
attached (non-removable) devices:
NON_REM[1:0] = ‘00’, All ports are removable.
NON_REM[1:0] = ‘01’, Port 1 is non-removable.
NON_REM[1:0] = ‘10’, Ports 1 & 2 are non-removable.
NON_REM[1:0] = ‘11’, Ports 1 & 2 are non-removable.
I/OSD12Serial Clock (SCL)
SMBus Clock (SMBCLK)
Ω (+/- 1%) resistor is attached from ground to this pin
CFG_SEL0
HS_IND/
CFG_SEL1
XTAL1/
CLKIN
25
33
Configuration Select_SEL0: The logic state of this multifunction
pin is internally latched on the rising edge of RESET_N
(RESET_N negation), and will determine the Hub configuration
method as described in Table 3.2, "SMBus or EEPROM
Interface Behavior".
I/O12Hi-Speed Upstream port indicator & Configuration
Programming Select
HS_IND: High Speed Indicator for upstream port connection
speed.
The active state of the LED will be determined as follows:
CFG_SEL1 = ‘0’,
HS_IND is active high,
CFG_SEL1 = ‘1’,
HS_IND is active low,
‘Asserted’ = Hub is connected at HS
‘Negated’ = Hub is connected at FS
CFG_SEL1: The logic state of this pin is internally latched on
the rising edge of RESET_N (RESET_N negation), and will
determine the Hub configuration method as described in
Table 3.2, "SMBus or EEPROM Interface Behavior".
MISC
ICLKxCrystal Input/External Clock Input
24MHz crystal or external clock input.
This pin connects to either one terminal of the crystal or to an
external 24MHz clock when a crystal is not used.
SMSC USB2512A9Revision 1.96 (07-11-08)
DATASHEET
USB 2.0 Hi-Speed 2-Port Hub Controller
Ta b le 3.1 USB2512A Pin Descriptions (continued)
Datasheet
BUFFER
TYPEDESCRIPTION
SYMBOL
QFN-36
EMB
XTAL232OCLKxCrystal Output
24MHz Crystal
This is the other terminal of the crystal, or a NO CONNECT
when an external clock source is used to drive XTAL1/CLKIN.
Note:This output must not be used to drive any external
RESET_N26
ISRESET Input
The system can reset the chip by driving this input low. The
minimum active low pulse is 1 us.
When the RESET_N pin is pulled to VDD33, the internal POR
(Power on Reset) is enabled and no external reset circuitry is
required. The internal POR holds the internal logic in reset until
the power supplies are stable.
SUSP_IND/
LOCAL_PWR/
NON_REM0
28
I/OActive/Suspend status LED or Local-Power & Non-removable
Strap Option
Suspend Indicator: Indicates USB state of the hub.
‘negated’ = Unconfigured, or configured and in USB Suspen d
‘asserted’ = Hub is configured, and is active (i.e., not in
suspend)
Local Power: Detects availability of local self-power source.
Low = Self/local power source is NOT available (i.e., Hub gets
all power from Upstream USB VBus).
High = Self/local power source is available.
circuitry other than the crystal circuit.
TEST1 1
NON_REM0 Strap Option:
If this strap is enabled by package and configuration settings
(see Table 3.2), this pi n will be sampled (in conjunction with
NON_REM1) at RESET_N negation to determine if ports [2:1]
contain permanently attached (non-removable) devices. Also,
the active state of the LED
will be determined as follows:
NON_REM[1:0] = ‘00’, All ports are removable, and the LED is
active high
NON_REM[1:0] = ‘01’, Port 1 is non-removable, and the LED
is active low
NON_REM[1:0] = ‘10’, Ports 1 & 2 are non-removable, and the
LED is active high
NON_REM[1:0] = ‘11’, Ports 1 & 2 are non-removable, and the
LED is active low
IPDTEST pin
XNOR continuity tests all signal pins on the hub. Please contact
your SMSC representative for a detailed description of how this
test mode is enabled and utilized.
Revision 1.96 (07-11-08)10SMSC USB2512A
DATASHEET
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
Table 3.2 SMBus or EEPROM Interface Behavior
CFG_SEL1CFG_SEL0SMBUS OR EEPROM INTERFACE BEHAVIOR
00Internal Default Configuration
Strap Options Enabled
01Configured as an SMBus slave for external download of user-defined
10Internal Default Configuration
112-Wire I
Table 3.3 USB2512A Power, Ground, and No Connect
PACKAGE SYMBOL36-QFN EMB
VDD1814
VDD33PLL36
descriptors.
SMBus sla ve address 58 (0101100x)
Strap Options Disabled
Al l Settings Controlled by Registers
Strap Options Enabled
Bus Power Operation
2
C EEPROMS are supported.
Strap Options Disabled
Al l Settings Controlled by Registers
FUNCTION
VDD Core
This pin must have a 1.0μF (or greater) ±20% (ESR <0.1Ω) capacitor to
VSS.
VDD 3.3 PLL Regulator Reference
+3.3V power supply for the PLL. If the internal PLL 1.8V regulator
is enabled, then this pin acts as the regulator input.
VDDPLL1834
VDD PLL
This pin must have a 1.0μF (or greater) ±20% (ESR <0.1Ω) capacitor to
VSS.
VDDA335
10
29
VDD33/VDD33CR23
15
VDD Analog I/O
+3.3V Filtered analog PHY power, shared between adjacent ports.
VDDIO/VDD 3.3 Core Regulator Reference
+3.3V power supply for the Digital I/O
If the internal core regulator is enabled, then VDD33CR acts as the
regulator input.
NC6
7
8
No Connect
No trace or signal should be routed or attached to these pins.
9
18
19
20
21
SMSC USB2512A11Revision 1.96 (07-11-08)
DATASHEET
3.2 Buffer Type Descriptions
Table 3.4 USB2512A Buffer Type Descriptions
BUFFERDESCRIPTION
IInput.
IPDInput with internal weak pull-down resistor.
IPUInput with internal weak pull-up resistor.
ISInput with Schmitt trigger.
O12Output 12mA.
OD12Open drain with 12mA sink.
I/O12Input/Output buffer with 12mA sink an d 12mA source.
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
I/OSD12
ICLKxXTAL clock input.
OCLKxXTAL clock output.
I-RRBIAS.
I/O-UAnalog Input/Output Defined in USB specification.
AIOAnalog Input/Output.
Open drain with Schmitt trigger and 12mA sink. Must meet I
Version 2.1 requirements.
2
C-Bus Specification
Revision 1.96 (07-11-08)12SMSC USB2512A
DATASHEET
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
Chapter 4 Configuration Options
4.1 2-Port Hub
SMSC’s USB 2.0 2-Port Hub is fully specification compliant to the Universal Serial Bus Specification
Revision 2.0 April 27,2000 (12/7/2000 and 5/28/2002 Errata). Please reference Chapter 10 (Hub
Specification) for general details regarding Hub operation and functionality.
The 2-Port Hub provides 1 Transaction Translator (TT) that is shared by both downstream ports
(defined as Single-TT configuration), The TT contains 4 non-periodic b uffers.
4.1.1Hub Configuration Options
The SMSC Hub supports a large number of features (some are mutually exclusive), and must be
configured in order to correctly function when attached to a USB host controller. There are three
principal ways to configure the hub: SMBus, EEPROM, or by internal default settings (with or without
pin strapping option over-rides). In all cases, the configuration method will be determined by the
CFG_SEL1 and CFG_SEL0 pins immediately after RESET_N negation.
4.1.1.1Power Switching Polarity
The hub only supports “active high” port power controllers.
4.1.2VBus Detect
According to Section 7.2.1 of the USB 2.0 Specification, a downstream port can never provide power
to its D+ or D- pull-up resistors unless the upstream port’s VBUS is in the asserted (powered) state.
The VBUS_DET pin on the Hub monitors the state of the upstream VBUS signal and will not pull-up
the D+ resistor if VBUS is not active. If VBUS goes from an active to an inactive state (Not Powered),
the Hub will remove power from the D+ pull-up resistor within 1 0 seconds.
4.2 EEPROM Interface
The SMSC Hub can be configured via a 2-wire (I2C) EEPROM (256x8). (Please see Table 3.1 for
specific details on how to enable configuration via an I
The Internal state-machine will (when configured for EEPROM support) read the exte rnal EEPROM for
configuration data. The hub will then “attach” to the upstream USB host.
Note: The Hub does not have the capacity to write, or “Program,” an external EEPROM. The Hub only
has the capability to read external EEPROMs. The external eeprom will be read (even if it is blank or
non-populated), and the hub will be “configured” with the values tha t are read.
Please see Internal Register Set (Common to EEPROM and SMBus) for a list of data fields available.
4.2.1Intern al Register Set (Common to EEPROM and SMBus)
2
C EEPROM).
Table 4.1 Internal Default, EEPROM and SMBus Register Memory Map
7:0VID_LSBLeast Significant Byte of the Vendor ID. This is a 16-bit value that uniquely
Revision 1.96 (07-11-08)14SMSC USB2512A
identifies the Vendor of the user device (assigned by USB-Interface Forum).
This field is set by the OEM using either the SMBus or EEPROM interface
options.
DATASHEET
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
4.2.1.2Register 01h: Vendor ID (MSB)
BIT
NUMBERBIT NAMEDESCRIPTION
7:0VID_MSBMost Significant Byte of the Vendor ID. This is a 16-bit value that uniquely
identifies the Vendor of the user device (assigned by USB-Interface Forum).
This field is set by the OEM using either the SMBus or EEPROM interface
options.
4.2.1.3Register 02h: Product ID (LSB)
BIT
NUMBERBIT NAMEDESCRIPTION
7:0PID_LSBLeast Significant Byte of the Product ID. This is a 16-bit value that the Vendor
can assign that uniquely identifies this particular product (assigned by OEM).
This field is set by the OEM using either the SMBus or EEPROM interface
options.
4.2.1.4Register 03h: Product ID (MSB)
BIT
NUMBERBIT NAMEDESCRIPTION
7:0PID_MSBMost Significant Byte of the Product ID. This is a 16-bit value that the Vendor
can assign that uniquely identifies this particular product (assigned by OEM).
This field is set by the OEM using either the SMBus or EEPROM interface
options.
4.2.1.5Register 04h: Device ID (LSB)
BIT
NUMBERBIT NAMEDESCRIPTION
7:0DID_LSBLeast Significant Byte of the Device ID. This is a 16-bit device release
number in BCD format (assigned by OEM). This field is set by th e OEM
using either the SMBus or EEPROM interface options.
4.2.1.6Register 05h: Device ID (MSB)
BIT
NUMBERBIT NAMEDESCRIPTION
7:0DID_MSBMost Significant By te of the Device ID. This is a 16-bit device release
SMSC USB2512A15Revision 1.96 (07-11-08)
number in BCD format (assigned by OEM). This field is set by th e OEM
using either the SMBus or EEPROM interface options.
DATASHEET
USB 2.0 Hi-Speed 2-Port Hub Controller
4.2.1.7Register 06h: CONFIG_BYTE_1
BIT
NUMBERBIT NAMEDESCRIPTION
7SELF_BUS_PWRSelf or Bus Power: Selects between Self- and Bus-Powered operation.
The Hub is either Self-Powered (draws less than 2mA of upstream bus
power) or Bus-Powered (limited to a 100mA maximum of upstream power
prior to being configured by the host controller).
When configured as a Bus-Powered device, the SMSC Hub consumes less
than 100mA of current prior to being configured. After configuration, the BusPowered SMSC Hub (along with all associated hub circuitry, any embedded
devices if part of a compound device, and 100mA per externally available
downstream port) must consume no more than 500mA of upstream VBUS
current. The current consumption is system dependent, and the OEM must
ensure that the USB 2.0 specifications are not violated.
When configured as a Self-Powered device, <1mA of upstream VBUS
current is consumed and all ports are available, with each port being capable
of sourcing 500mA of current.
This field is set by the OEM using either the SMBus or EEPROM interface
options.
Please see the description under Dynamic Power for the sel f/bus power
functionality when dynamic power switching is enabled.
5:4OC_TIMEROverCurrent Timer: Over Current Timer delay.
00 = 0.1ms
01 = 4ms
10 = 8ms
11 = 1 6 m s
3COMPOUND
Compound Device: Allows the OEM to indicate that the Hub is part
of a compound (see the USB Specification for definition) device. The
applicable port(s) must also be defined as having a "Non-Removable
Device".
Note: When configured via strapping options, declaring a port as
non-removable automatically causes the hub controller to report that
it is part of a compound device.
0 = No
1 = Yes, Hub is part of a compound device
2:0ReservedReserved
SMSC USB2512A17Revision 1.96 (07-11-08)
DATASHEET
4.2.1.9Register 08h: Configuration Data Byte 3
BIT
NUMBERBIT NAMEDESCRIPTION
7:4ReservedReserved
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
3PRTMAP_ENPort Re-mapping ena ble: Selects the method used by the hub to assign port
2:0ReservedReserved
numbers and disable ports.
‘0’ = Standard Mode
‘1’ = Port Re-map mode
4.2.1.10Register 09h: Non-Removable Device
BIT
NUMBERBIT NAMEDESCRIPTION
7:0NR_DEVICENon-Removable Device: Indicates which port(s) include non-removable
devices. ‘0’ = port is removable, ‘1’ = port i s non-removable.
Informs the Host if one of the active ports has a permanent device that is
undetachable from the Hub. (Note: The device must provide its own
descriptor data.)
When using the internal default option, the NON_REM[1:0] pins will
designate the appropriate ports as being non- removable.
Bit 7= Reserved, always = ‘0’
Bit 6= Reserved, always = ‘0’
Bit 5= Reserved, always = ‘0’
Bit 4= Reserved, always = ‘0’
Bit 3= Reserved, always = ‘1’
Bit 2= 1; Port 2 non-removable
Bit 1= 1; Port 1 non removable
Bit 0= Reserved, always = ‘0’
Revision 1.96 (07-11-08)18SMSC USB2512A
DATASHEET
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
4.2.1.11Register 0Ah: Port Disable For Self Powered Operation
BIT
NUMBERBIT NAMEDESCRIPTION
7:0PORT_DIS_SPPort Disable Self-Powered: Disables 1 or more contiguous ports. ‘0’ = port
is available, ‘1’ = port is disabled.
During Self-Powered operation
(PRTMAP_EN='0'),
disabled, and are not available to be enabled or enumerated by a Host
Controller. The ports can be disabled in any order, the internal logic will
automatically report the correct number of enabled ports to the USB Host,
and will reorder the active ports in order to ensure proper function.
Bit 7= Reserved, always = ‘0’
Bit 6= Reserved, always = ‘0’
Bit 5= Reserved, always = ‘0’
Bit 4= Reserved, always = ‘0’
Bit 3= Reserved, always = ‘1’
Bit 2= 1; Port 2 is disabled
Bit 1= 1; Port 1 is disabled
Bit 0= Reserved, always = ‘0’
this selects the ports which will be permanently
when remapping mode is disabled
4.2.1.12Register 0Bh: Port Disable For Bus Powered Operation
BIT
NUMBERBIT NAMEDESCRIPTION
7:0PORT_DIS_BPPort Disable Bus-Powered: Disables 1 or more contiguous ports. ‘0’ = port
is available, ‘1’ = port is disabled.
During Self-Powered operation
(PRTMAP_EN='0'),
disabled, and are not available to be enabled or enumerated by a Host
Controller. The ports can be disabled in any order, the internal logic will
automatically report the correct number of enabled ports to the USB Host,
and will reorder the active ports in order to ensure proper function.
this selects the ports which will be permanently
when remapping mode is disabled
When using the internal default option, the PRT_DIS[1:0] pins will disable the
appropriate ports.
Bit 7= Reserved
Bit 6= Reserved
Bit 5= Reserved
Bit 4= Reserved
Bit 3= Reserved, always = ‘1’
Bit 2= 1; Port 2 is disabled
Bit 1= 1; Port 1 is disabled
Bit 0 is Reserved, always = ‘0’
SMSC USB2512A19Revision 1.96 (07-11-08)
DATASHEET
4.2.1.13Register 0Ch: Max Power For Self Powered Operation
BIT
NUMBERBIT NAMEDESCRIPTION
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
7:0MAX_PWR_SPMax Power Self_Powered: Value in 2mA increments that the Hub consumes
from an upstream port (VBUS) when operating as a self-powered hub. This
value includes the hub silicon along with the combi ned power consumption
(from VBUS) of all associated circuitry on the board. This value also includes
the power consumption of a permanently attached peripheral if the hub is
configured as a compound device, and the embedded peripheral reports
0mA in its descriptors.
Note:The USB 2.0 Specification does not permit this value to exceed
100mA
4.2.1.14Register 0Dh: Max Power For Bus Powered Operation
BIT
NUMBERBIT NAMEDESCRIPTION
7:0MAX_PWR_BPMax Power Bus_Powered: Value in 2mA increments that the Hub consumes
from an upstream port (VBUS) when operating as a bus-powered hub. This
value includes the hub silicon along with the combi ned power consumption
(from VBUS) of all associated circuitry on the board. This value also includes
the power consumption of a permanently attached peripheral if the hub is
configured as a compound device, and the embedded peripheral reports
0mA in its descriptors.
4.2.1.15Register 0Eh: Hub Controller Max Current For Self Powered Operation
BIT
NUMBERBIT NAMEDESCRIPTION
7:0HC_MAX_C_SPHub Controller Max Current Self-Powered: Value in 2mA increments that the
Hub consumes from an upstream port (VBUS) when operating as a selfpowered hub. This value includes the hub silicon along with the combined
power consumption (from VBUS) of all associated circuitry on the board.
This value does NOT include the power consumption of a permanently
attached peripheral if the hub is configured as a compound device.
Note:The USB 2.0 Specification does not permit this value to exceed
100mA
A value of 50 (decimal) indicates 100mA, which is the default value.
Revision 1.96 (07-11-08)20SMSC USB2512A
DATASHEET
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
4.2.1.16Register 0Fh: Hub Controller Max Current For Bus Powered Operation
BIT
NUMBERBIT NAMEDESCRIPTION
7:0HC_MAX_C_BPHub Controller Max Current Bus-Powered: Value in 2mA increments that the
Hub consumes from an upstream port (VBUS) when operating as a buspowered hub. This value will include the hub silicon along with the combined
power consumption (from VBUS) of all associated circuitry on the board.
This value will NOT include the power consumption of a permanentl y
attached peripheral if the hub is configured as a compound device.
A value of 50 (decimal) would indicate 100mA, which is the default value.
4.2.1.17Register 10h: Power-On Time
BIT
NUMBERBIT NAMEDESCRIPTION
7:0POWER_ON_TIMEPower On Time: The length of time that it takes (in 2 ms intervals) from the
time the host initiated power-on sequence begins on a port until power is
good on that port.
4.2.1.18Register F6h: Boost_Up
BIT
NUMBERBIT NAMEDESCRIPTION
7:2ReservedReserved
1:0BOOST_IOUTUSB electrical signaling drive strength Boost Bit for the Upstream Port.
‘00’ = Normal electrical drive strength = No boost
‘01’ = Elevated electrical drive strength = Low (approximately 4% b oost)
‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
‘11’ = Elevated electrical drive strength = High (a pproximately 12% boost)
Note:“Boost” could result in non-USB Compliant parameters (one
example would be Test J/K levels), the OEM should use a 00 value
unless specific implementation issues require additional signal
boosting to correct for degraded USB signalling levels.
4.2.1.19Register F8h: Boost_2:0
BIT
NUMBERBIT NAMEDESCRIPTION
7:4ReservedReserved
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USB 2.0 Hi-Speed 2-Port Hub Controller
BIT
NUMBERBIT NAMEDESCRIPTION
3:2BOOST_IOUT_2USB electrical signaling d rive strength Boost Bit for Downstream Port ‘2’.
‘00’ = Normal electrical drive strength = No boost
‘01’ = Elevated electrical drive strength = Low (approximately 4% b oost)
‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
‘11’ = Elevated electrical drive strength = High (a pproximately 12% boost)
Note:“Boost” could result in non-USB Compliant parameters (one
example would be Test J/K levels), the OEM should use a 00 value
unless specific implementation issues require additional signal
boosting to correct for degraded USB signalling levels.
1:0BOOST_IOUT_1USB electrical signaling d rive strength Boost Bit for Downstream Port ‘1’.
‘00’ = Normal electrical drive strength = No boost
‘01’ = Elevated electrical drive strength = Low (approximately 4% b oost)
‘10’ = Elevated electrical drive strength = Medium (approximately 8% boost)
‘11’ = Elevated electrical drive strength = High (a pproximately 12% boost)
Note:“Boost” could result in non-USB Compliant parameters (one
example would be Test J/K levels), the OEM should use a 00 value
unless specific implementation issues require additional signal
boosting to correct for degraded USB signalling levels.
Datasheet
4.2.1.20Register FAh: Port Swap
BIT
NUMBERBIT NAMEDESCRIPTION
7:0PRTSPPort Swap: Swaps the Upstream and Downstream USB DP and DM Pins for
ease of board routing to devices and connectors.
‘0’ = USB D+ functionality is associated with the DP pin and D- functionality
is associated with the DM pin.
‘1’ = USB D+ functionality is associated with the DM pin and D- functionality
is associated with the DP pin.
Bit 7= Reserved
Bit 6= Reserved
Bit 5= Reserved
Bit 4= Reserved
Bit 3= Reserved
Bit 2= ‘1’; Port 2 DP/DM is Swapped.
Bit 1= ‘1’: Port 1 DP/DM is Swapped.
Bit 0= ‘1’:Upstream Port DP/DM is Swapped
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Datasheet
4.2.1.21Register FBh: Port Remap 12
BIT
NUMBERBIT NAMEDESCRIPTION
7:0PRTR12Port remap register for ports 1 & 2.
When a hub is enumerated by a USB Host Controller, the hub is only
permitted to report how many ports it has; the hub is not permitted to select
a numerical range or assignment. The Host Controller will number the
downstream ports of the hub starting with the number '1', up to the number
of ports that the hub reported having.
The host's port number is referred to as "Logical Port Number" and the
physical port on the hub is the “Physical Port Number". When remappi ng
mode is enabled (see PRTMAP_EN in Register 08h: Configuration Data
Byte 3) the hub's downstream port numbers can be remapped to different
logical port numbers (assigned by the host).
Note:The OEM must ensure that Contiguous Logical Port Numbers are
used, starting from #1 up to the maximum number of enabled ports;
this ensures that the hub's ports are numbered in accordance with
the way a Host will communicate with the ports.
Table 4.2 Port Remap Register for Ports 1 & 2
Bit [7:4]‘0000’Physical Port 2 is Disabled
‘0001’Physical Port 2 is mapped to Logical Port 1
‘0010’Physical Port 2 is mapped to Logical Port 2
‘0011’
to
‘1111’
Bit [3:0]‘0000’Physical Port 1 is Disabled
‘0001’Physical Port 1 is mapped to Logical Port 1
‘0010’Physical Port 1 is mapped to Logical Port 2
‘0011’
to
‘1111’
Illegal; Do Not Use
Illegal; Do Not Use
SMSC USB2512A23Revision 1.96 (07-11-08)
DATASHEET
4.2.1.22Register FFh: Status/Command
BIT
NUMBERBIT NAMEDESCRIPTION
7:3ReservedReserved
2INTF_PW_DNSMBus Interface Power Down
‘0’ = Interface is active
‘1’ = Interface power down after ACk has completed
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
1RESETReset the SMBus Interface and interna l memory back to RESET_N
0USB_ATTACHUSB Attach (and write protect)
assertion default settings.
‘0’ = Normal Run/Idle State
‘1’ = Force a reset of registers to their default state
‘0’ = SMBus slave interface is active
‘1’ = Hub will signal a USB attach event to an upstream device, and the
internal memory (address range 00h-FEh) is “write-protected” to prevent
unintentional data corruption.
4.2.2I2C EEPROM
The I2C EEPROM interface implements a subset of the I2C Master Specification (Please refer to the
Philips Semiconductor Standard I
EEPROM interface is designed to attach to a single “dedicated” I2C EEPROM, and it conforms to the
Standard-mode I2C Specification (100kbit/s transfer rate and 7-bit addressing) for protocol and
electrical compatibility.
Note: Extensions to the I
The Hub acts as the master and generates the serial clock SCL, contro ls the bus access (determines
which device acts as the transmitter and which device acts as the receiver), and generates the START
and STOP conditions.
2
C-Bus Specification for details on I2C bus protocols). The Hub’s I2C
2
C Specification are not supported.
4.2.2.1Implementation Characteristics
The Hub will only access an EEPROM using the Sequential Read Protocol.
4.2.2.2Pull-Up Resistor
The Circuit board designer is required to place external pull-up resistors (10K Ω recommended) on the
SDA/SMBDATA & SCL/SMBCLK/CFG_SELO lines (per SMBus 1.0 Specification, and EEPROM
manufacturer guidelines) to Vcc in order to assure proper operation.
4.2.2.3I2C EEPROM Slave Address
Slave address is 1010000.
Note: 10-bit addressing is NOT supported.
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Datasheet
4.2.3In-Circuit EEPROM Programming
The EEPROM can be programmed via ATE by pulling RESET_N low (which tri-states the Hub’s
EEPROM interface and allows an external source to program the EEPROM).
4.3 SMBus Slave Interface
Instead of loading User-Defined Descriptor data from an external EEPROM, the SMSC Hub can be
configured to receive a code load from an external processor via an SMBus interface. The SMBus
interface shares the same pins as the EEPROM interface; if CFG_SEL1 & CFG_SEL0 activates the
SMBus interface, external EEPROM support is no longer available (and the user-defined descriptor
data must be downloaded via the SMBus). Due to system issues, the SMSC Hub waits indefinitely for
the SMBus code load to complete and only “appears” as a newly connected device on USB after the
code load is complete.
The Hub’s SMBus implementation is a subset of the SMBus interface to the host. The device is a
slave-only SMBus device. The implementation in the device is a subset of SMBus since it only supports
two protocols.
The Write Block and Read Block protocols are the only valid SMBus protocols for the Hub. The Hub
responds to other protocols as described in Section 4.3.2, "In valid Protocol Response Behavior," on
page 26. Reference the System Management Bus Specification, Rev 1.0.
The SMBus interface is used to read and write the registers in the device. The register set is shown
in Section 4.2.1, "Internal Register Set (Common to EEPROM and SMBus)," on page 13.
4.3.1Bus Protocols
Typical Write Block and Read Block protocols are shown below. Register accesses are performed
using 7-bit slave addressing, an 8-bit register address field, and an 8-bit data field. The shading
indicates the Hub driving data on the SMBDATA line; otherwise, host data is on the SDA/SMBDATA
line.
The slave address is the unique SMBus Interface Address for the Hub that identifies it on SMBus. The
register address field is the internal address of the register to be accessed. The register data field is
the data that the host is attempting to write to the register or th e contents of the register that the host
is attempting to read.
Note: Data bytes are transferred MSB first (msb first).
4.3.1.1Block Read/Write
The Block Write begins with a slave address and a write condition. After the command co de, the host
issues a byte count which describes how many more bytes will follow in the message. If a slave had
20 bytes to send, the first byte would be the number 20 (14h), followed b y the 20 bytes of data. The
byte count may not be 0. A Block Read or Write is allowed to transfer a maximum of 32 data bytes.
Note: For the following SMBus tables:
Denotes Ma ster-to-SlaveDenotes Slave-to-Master
SMSC USB2512A25Revision 1.96 (07-11-08)
DATASHEET
17118A1
SSlave AddressRegister AddressWrA
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
...
811188
Byte Count = N
AData byte 1AData byte 2
Block Write
Figure 4.1 Block Write
Block Read
A Block Read differs from a block write in that the repeated start condition exists to satisfy the I2C
specification’s requirement for a change in the transfer direction.
17118
811188
Byte Count = N
Data byte 1Data b y te 2Data b y te N
Block Read
Figure 4.2 Block Read
181
A
1
1
SSSlave AddressReg ister AddressWrA
A
AAAA
Data b y te NAP
711
Slave AddressRdA
181
...
P
4.3.2Invalid Protocol Response Behavior
Registers that are accessed with an invalid protocol are not updated. A register is only updated
following a valid protocol. The only valid protocols are Write Block and Read Block, which are
described above.
The Hub only responds to the hardware selected Slave Address.
Attempting to communicate with the Hub over SMBus with an invalid slave address or invalid protocol
results in no response, and the SMBus Slave Interface returns to the idle state.
The only valid registers that are accessible by the SMBus slave address are the registers defined in
the Registers Section. See Section 4.3.3 for the response to undefined registers.
4.3.3General Call Address Resp onse
The Hub does not respond to a general call address of 0000 _000b.
4.3.4Slave Device Time-Out
According to the SMBus Specification, V1.0 devices in a transfer can abort the transfer in progress
and release the bus when any single clock low interval exceed s 25ms (T
have detected this condition must reset their communication and be able to receive a new START
condition no later than 35ms (T
Note: Some simple devices do not contain a clock low drive circuit; this simple kind of device typically
resets its communications port after a start or stop condition. The Slave Device Time-Out must
be implemented.
TIMEOUT, MAX
).
TIMEOUT, MIN
). Devices that
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USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
4.3.5Stretching the SCLK Signal
The Hub supports stretching of the SCLK by other devices on the SMBus. The Hub does not stretch
the SCLK.
4.3.6SMBu s Timing
The SMBus Slave Interface complies with the SMBus AC Timing Specification. See the SMBus timing
in the “Timing Diagram” section.
4.3.7Bus Reset Sequence
The SMBus Slave Interface resets and returns to the idle state upon a START field followed
immediately by a STOP field.
4.3.8SMBu s Alert Response Address
The SMBALERT# signal is not supported by the Hub.
4.3.8.1Undefined Registers
The registers shown in Table 4.1 are the defined registers in the Hub. Reads to undefined registers
return 00h. Writes to undefined registers have no effect and do not return an error.
4.3.8.2Reserved Registers
Unless otherwise instructed, only a ‘0’ may be written to all reserved registers or bits.
4.4 Default Configuration Option:
The SMSC Hub can be configured via its internal default configuration. (please see Section 4.2.1,
"Internal Register Set (Common to EEPROM and SMBus)" for specific details on how to enable default
configuration.)
Please refer to Table 4.1 for the internal defau lt values that are loaded when this option is selected.
4.5 Default Strapping Options:
The USB2512A can be configured via a combination of internal default values and pin strap options.
Please see Table 3.1 and Table 3.2 for specific details on how to enable the default/pin-strap
configuration option.
The strapping option pins only cover a limited sub-set of the configuration options. The internal d efault
values will be used for the bits & registers that are not controlled by a strapping option pin. Please
refer to Table 4.1 for the internal default values that are loaded when this o ption is selected.
4.6 Reset
There are two different resets that the Hub experiences. One is a hardware reset (either from the
internal POR reset circuit or via the RESET_N pin) and the second is a USB Bus Reset.
4.6.1Intern al POR Hardware Reset
All reset timing parameters are guaranteed by design.
SMSC USB2512A27Revision 1.96 (07-11-08)
DATASHEET
4.6.2External Hardware RESET_N
A valid hardware reset is defined as assertion of RESET_N for a minimum of 1us after all power
supplies are within operating range. While reset is asserted, the Hub (and its associated external
circuitry) consumes less than 500μA of current from the upstream USB power source.
Assertion of RESET_N (external pin) causes the following:
1. All downstream ports are disabled, and PRTPWR power to downstream devices is removed.
2. The PHYs are disabled, and the differential pairs will be in a high-impedance state.
3. All transactions immediately terminate; no states are saved.
4. All internal registers return to the default state (in most cases, 00(h)).
5. The external crystal oscillator is halted.
6. The PLL is halted.
The Hub is “operational” 500μs after RESET_N is negated.
Once operational, the Hub immediately reads OEM-specific data from the external EEPROM (if the
SMBus option is not disabled).
4.6.2.1RESET_N for Strapping Option Configuration
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
Hardware
reset
asserted
Read Strap
Options
t1
Drive Strap
Outputs to
inactive
levels
Attach
USB
Upstream
t5t6
USB Reset
recovery
Idle
t7t8
Start
completion
request
response
t2
Valid
t3
t4
Don’t Care
Driven by Hub if strap is an output.
RESET_N
VSS
Strap Pins
Don’t Care
VSS
Figure 4.3 Reset_N Timing for Default/Strap Option Mode
Table 4.3 Reset_N Timing for Default/Strap Option Mode
NAMEDESCRIPTIONMINTYPMAXUNITS
t1RESET_N Asserted.1μsec
t2Strap Setup Time16.7nsec
t3Strap Hold Time.16.71400nsec
t4hub outputs driven to inactive logic states1.52μsec
t5USB Attach (See Note).100msec
t6Host acknowl edges attach and signals USB
100msec
Reset.
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USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
Table 4.3 Reset_N Timing for Default/Strap Option Mode (continued)
NAMEDESCRIPTIONMINTYPMAXUNITS
t7USB Idle.undefinedmsec
t8Completion time for requests (with or without d ata
stage).
Notes:
When in Bus-Powered mode, the Hub and its associated circuitry must not consume more than
100mA from the upstream USB power source during t1+t5.
All Power Supplies must have reac hed the operating levels mandated in Chapter 5, DC
Parameters, prior to (or coincident with) the assertion of RESET_N.
4.6.2.2RESET_N for EEPROM Configuration
Hardware
reset
asserted
Read Strap
Options
Read EEPROM
+
Set Options
t4
RESET_N
VSS
t1
t2
t3
Attach
USB
Upstream
USB Reset
recovery
Idle
t5t6t7
5msec
Start
completion
request
response
Figure 4.4 Reset_N Timing for EEPROM Mode
Table 4.4 Reset_N Timing for EEPROM Mode
NAMEDESCRIPTIONMINTYPMAXUNITS
t1RESET_N Asserted.1μsec
t2Hub Recovery/Stabilization.500μsec
t3EEPROM Read / Hub Config.2.099.5msec
t4USB Attach (See Note).100msec
t5Host acknowl edges attach and signals USB
100msec
Reset.
t6USB Idle.undefinedmsec
t7Completion time for requests (with or without d ata
5msec
stage).
Notes:
When in Bus-Powered mode, the Hub and its associated circuitry must not consume more than
100mA from the upstream USB power source during t4+t5+t6+t7.
All Power Supplies must have reac hed the operating levels mandated in Chapter 5, DC
Parameters, prior to (or coincident with) the assertion of RESET_N.
SMSC USB2512A29Revision 1.96 (07-11-08)
DATASHEET
4.6.2.3RESET_N for SMBus Slave Configuration
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
Hardware
RESET_N
VSS
reset
asserted
Reset
Negation
t1
SMBus Code
Load
t2t4
Hub PHY
Stabilization
t3
Attach
USB
Upstream
USB Reset
recovery
t5
Idle
t6t7
Start
completion
request
response
Figure 4.5 Reset_N Timing for SMBus Mode
T able 4.5 Reset_N Timing for SMBus Mode
NAMEDESCRIPTIONMINTYPMAXUNITS
t1RESET_N Asserted.1μsec
t2Hub Recovery/Stabilization.500μsec
t3SMBus Code Load (See Note).250300msec
t4Hub Configuration and USB Attach.100msec
t5Host acknowledges attach and si gnals USB
100msec
Reset.
t6USB Idle.Undefinedmsec
t7Completion time for requests (with or without data
5msec
stage).
Notes:
For Bus-Powered configurations, the 99.5ms (MAX) i s required, and the Hub and its associated
circuitry must not consume more than 100mA from the upstream USB power source d uring
t2+t3+t4+t5+t6+t7. For Self-Powered configurations, t3 MAX is not applicable and the time to load
the configuration is determined by the external SMBus host.
All Power Supplies must have reac hed the operating levels mandated in Chapter 5, DC
Parameters, prior to (or coincident with) the assertion of RESET_N.
4.6.3USB Bus Reset
In response to the upstream port signaling a reset to the Hub, the Hub does the following:
Note: The Hub does not propagate the upstream USB reset to downstream devices.
1. Sets default address to 0.
2. Sets configuration to: Unconfigured.
3. Negates PRTPWR[2:1] to all downstream ports.
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Datasheet
4. Clears all TT buffers.
5. Moves device from suspended to active (if suspended).
6. Complies with Section 11.10 of the USB 2.0 Specification for behavior after completion of the reset
sequence.
The Host then configures the Hub and the Hub’s downstream port devices in accordance with the USB
Specification.
SMSC USB2512A31Revision 1.96 (07-11-08)
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USB 2.0 Hi-Speed 2-Port Hub Controller
Chapter 5 DC Parameters
5.1 Maximum Guaranteed Ratings
PARAMETERSYMBOLMINMAXUNITSCOMMENTS
Datasheet
Storage
Temperature
Lead
Temperature
1.8V supply
voltage
3.3V supply
voltage
Voltage on any
I/O pin
Voltage on
XTAL1
Voltage on
XTAL2
T
STOR
-55150°C
325°CSoldering < 10 seconds
V
DDA18PLL,
V
DD18
V
DDA33,
V
DD33PLL,
V
DD33,
V
DD33CR
2.5V
4.6V
-0.55.5V
-0.54.0V
-0.53.6V
Note 5.1Stresses above the specified parameters could cause permanent damage to the device.
This is a stress rating only and functi onal operation of the device at any condition above
those indicated in the operation sections of this specification is not implied .
Note 5.2When powering this device from laboratory or system power supplies, it is important that
the Absolute Maximum Ratings not be exceeded or device failure can result. Some power
supplies exhibit voltage spikes on their outputs when the AC power is switched on or off.
In addition, voltage transients on the AC power line may appear on the DC output. When
this possibility exists, it is suggested that a clamp circuit be used.
Voltage
VDD33
VSS
10%
t
10%
t
RT
t
90%
3.3V
90%
Time
100%
Figure 5.1 Supply Rise Time Model
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Datasheet
5.2 Operating Conditions
PARAMETERSYMBOLMINMAXUNITSCOMMENTS
Operating
Temperature
1.8V supply voltageV
3.3V supply voltageV
3.3V supply rise timet
T
A
DDA18PLL
V
DD18
DDA33
V
DDA33PLL
V
DD33
V
DD33CR
RT
070°CAmbient temperature in still air.
1.621.98V
3.03.6V
0400μsSee Figure 5.1
Voltage on any I/O pin-0.35.5VIf any 3.3V supply voltage drops
The SMSC Hub conforms to all voltage, power, and timing characteristics and specifications as set
forth in the SMBus 1.0 Specification for Slave-Only devices (except as noted in Section 4.3).
Crystal
Figure 6.1 Typical Crystal Circuit
+ CS1 + C2 + CS2)
1
C
L
1Meg
C
=
and C
1
XTAL2
(C
S2 =
CB + C
L
2
XTAL
)
6.1.2I2C EEPROM:
Clock frequency is fixed at 60KHz ± 20%.
6.1.3USB 2.0
The SMSC Hub conforms to all voltage, power, and timing characteristics and specifications as set
forth in the USB 2.0 Specification. Please refer to the USB 2.0 Specification for more information.
Revision 1.96 (07-11-08)36SMSC USB2512A
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Revision 1.96 (07-11-08)37 SMSC USB2512A
Chapter 7 Package Outline
DATASHEET
USB 2.0 Hi-Speed 2-Port Hub Controller
Datasheet
Figure 7.1 36-Pin QFN, 6x6mm Body, 0.5mm Pitch
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