Ultra Fast USB 2.0 Multi-Slot
Flash Media Controller
PRODUCT FEATURES
General Description
The SMSC USB2250/50i/51/51i is a USB 2.0 compliant, high
speed Mass Storage Class Peripheral Controller intended for
reading and writing to
formats from the
Picture Card
CompactFlash® (CF), SmartMedia
TM
(xD)1, Memory StickTM (MS), Secure Digital
(SD), and MultiMediaCard
The SMSC USB2250/50i/51/51i is a fully integrated, single
chip solution capable of ultra high performance operation.
Average sustained transfer rates exceeding 35MB/s are
possible if the media and host can support those rates.
Targeted for applications in which single or "combo" media
sockets are used
Supports multiple simultaneous card insertions
Flexible assignment of number of LUNs and how card type s
are associated with the LUNs
Hardware-controlled data flow architecture for all self-
mapped media
Pipelined hardware support for access to non-self-
mapped media
Product name with “i” denotes the version that supports
the industrial temperature range of -40ºC to 85ºC
Hardware Features
Sin gle Chip Flash Media Controller with non-multiplexed
interface for independent card sockets
Flash Media Specification Revision Compliance
— Compact Flash Specification 4.1
– CF UDMA Modes 0-4
– CF PIO Modes 0-6
— Memory Stick Specification 1.43
— Memory Stick Pro Format Specification 1.02
— Memory Stick Pro-HG Duo Format Specification 1.01
– Memory Stick, MS Duo, HS-MS, MS Pro-HG, MS Pro
— xD Picture Card 1.2
— Smart Media Specification 1.3
— Secure Digital 2.0
– HS-SD, HC-SD, TransFlash™ and reduced form factor
media
— MultiMediaCard Specification 4.2
– 1/4/8 bit MMC
SDIO and MMC Streaming Mode support
Extended configuration op tions
— xD player mode operation
— Socket switch polarities, etc.
Media Activity LED
more than24popular flash media
TM
(MMC) families.
TM
(SM),xD
Datasheet
GPIO configuration and polarity
— Up to 11 GPIOs (based on configuration) for special
function use: LED indicators, button inputs, power
control to memory devices, etc. The number of actual
GPIO’s depends on the implementation configuration
used.
— Four GPIO’s with up to 200 mA drive
— An additional 16 GPIO’s if CF is not used
On Board 24MHz Crystal Driver Circuit
Optio nal external 24MHz clock input
4 Ind ependent Internal Card Power FET
— 200mA each
— "Fold-back" short circuit current protected
Internal Regulator for 1.8V core operation
Optimized pinout improves signal routing, easing
implementation and allowing for improved signal integrity
OEM Selectable Features
VID/PID/Language ID
28-character Manufacturer ID and Product string
12-hex digit (max) Serial Number string
Customizable Vendor specific data by optional use of
external serial EEPROM
Bus- or Self- powered selection
LED blink interval or duration
Inter nal power FET configuration
Software Features
Optimized for low latency interrupt handling
Reduced memory footprint
Device F irmware Upgrade (DFU) support of external
EEPROM or External Flash
— Assembly line support
— End user field upgrade support
— DFU Package consists of driver, firmware, sample DFU
application and source code, DFU driver API
Optio nal custom firmware with external ROM (up to 128k)
Please see the USB2250/50i/51/51iSoftware Release
Notes for additional Software Features.
Applications
Flash Media Card Reader/Writer
Printers
Desktop and Mobile PCs
Consumer A/V
Media Players/Viewers
Vista ReadyBo ost
information sufficient for construction purposes is not n ecessarily given. Although the information has been checked and is believed to be accurate, no
responsibility is assumed for inaccuracies. SMSC reserves the right to make changes to specifications and product descriptions at any time without notice.
Contact your local SMSC sales office to obtain the latest specifications before placing your product order. The provision of this information does not convey
to the purchaser of the described semiconductor devices any licenses under any patent rights or other intellectual property rights of SMSC or others. All sales
are expressly conditional on your agreement to the terms and conditions of the most recently dated version of SMSC's standard Terms of Sale Agreement
dated before the date of your order (the "Terms of Sale Agreement"). The product may contain design defects or errors known as anomalies which may cause
the product's functions to deviate from published specifications. Anomaly sheets are available upon request. SMSC products are not designed, intended,
authorized or warranted for use in any life support or other application where product failure could cause or contribute to personal injury or severe property
damage. Any and all such uses without prior written approval of an Officer of SMSC and further testing and/or modification will be fully at the risk of the
customer. Copies of this document or other SMSC literature, as well as the Terms of Sale Agreement, may be obtained by visiting SMSC’s website at
http://www.smsc.com. SMSC is a registered trademark of Standard Microsystems Corporation (“SMSC”). Product names and company names are the
trademarks of their respective holders.
SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES, INCLUDING WITHOUT LIMITATION ANY AND ALL IMPLIED WARRANTIES OF
MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE, TITLE, AND AGAINST INFRINGEMENT AND THE LIKE, AND ANY AND ALL WARRANTIES
ARISING FROM ANY COURSE OF DEALING OR USAGE OF TRADE. IN NO EVENT SHALL SMSC BE LIABLE FOR ANY DIRECT, INCIDENTAL, INDIRECT,
SPECIAL, PUNITIVE, OR CONSEQUENTIAL DAMAGES; OR FOR LOST DATA, PROFITS, SAVINGS OR REVENUES OF ANY KIND; REGARDLESS OF THE FORM
OF ACTION, WHETHER BASED ON CONTRACT; TORT; NEGLIGENCE OF SMSC OR OTHERS; STRICT LIABILITY; BREACH OF WARRANTY; OR OTHERWISE;
WHETHER OR NOT ANY REMEDY OF BUYER IS HELD TO HAVE FAILED OF ITS ESSENTIAL PURPOSE, AND WHETHER OR NOT SMSC HAS BEEN ADVISED
OF THE POSSIBILITY OF SUCH DAMAGES.
TM
TM
TM
xD Picture
TM
Card
..
..
.
.
Operational
temperature
0ºC to 70ºC
-40ºC to 85ºC
0ºC to 70ºC
-40ºC to 85ºC
SMSC USB2250/50i/51/51i2 Revision 1.1 (05-29-08)
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
CF: Compact Flash
CFC: Compact Flash Controller
EEPROM: Electrically Erasable Programmable Read-Onl y Memory
FET: Field Effect Transistor
LUN: Logical Unit Number
MMC: MultiMediaCard
MS: Memory Stick
MSC: Memory Stick Controller
PLL: Phase-Locked Loop
RoHS: Restriction of Hazardous Substances Directive
SD: Secure Digital
SDIO: Secure Digital Input/Output
SDC: Secure Digital Controllerl
SIE: Serial Interface Engine
SM: SmartMedia
SMC: SmartMedia Controller
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
VTQFP: Very Thin Quad Flat Package
xD: xD Picture Card
*Note: In order to develop, make, use, or sell readers and/or other products using or incorporating any of the SMSC devices made
the subject of this document or to use related SMSC software programs, technical information and licenses under patent and other
intellectual property rights from or through various persons or entities, including without limitation media standard companies,
forums, and associations, and other patent holders may be required. These media standard companies, forums, and associations
include without limitation the following: Sony Corporation (Memory Stick, Memory Stick Pro); SD3 LLC (Secure Digital); MultiMedia
Card Association (MultiMediaCard); the SSFDC Forum (SmartMedia); the Compact Flash Association (Compact Flash); and Fuji
Photo Film Co., Ltd., Olympus Optical Co., Ltd., and Toshiba Corporation (xD-Picture Card). SMSC does not make such licenses
or technical information available; does not promise or represent that any such licenses or technical information will actually be
obtainable from or through the various persons or entities (including the media standard companies, forums, and associations), or
with respect to the terms under which they may be made available; and is not responsible for the accuracy or sufficiency of, or
otherwise with respect to, any such technical information.
SMSC's obligations (if any) under the Terms of Sale Agreement, or any other agreement with any customer, or otherwise, with
respect to infringement, including without limitation any obligations to defend or settle claims, to reimburse for costs, or to pay
damages, shall not apply to any of the devices made the subject of this document or any software programs related to any of such
devices, or to any combinations involving any of them, with respect to infringement or claimed infringement of any existing or future
patents related to solid state disk or other flash memory technology or applications ("Solid State Disk Patents"). By making any
purchase of any of the devices made the subject of this document, the customer represents, warrants, and agrees that it has
obtained all necessary licenses under then-existing Solid State Disk Patents for the manufacture, use and sale of solid state disk
and other flash memory products and that the customer will timely obtain at no cost or expense to SMSC all necessary licenses
under Solid State Disk Patents; that the manufacture and testing by or for SMSC of the units of any of the devices made the subject
of this document which may be sold to the customer, and any sale by SMSC of such units to the customer, are valid exercises of
the customer's rights and licenses under such Solid State Disk Patents; that SMSC shall have no obligation for royalties or otherwise
under any Solid State Disk Patents by reason of any such manufacture, use, or sale of such units ; and that SMSC shall have no
obligation for any costs or expenses related to the customer's obtaining or having obtained rights or licenses under any Solid State
Disk Patents.
SMSC MAKES NO WARRANTIES, EXPRESS, IMPLIED, OR STATUTORY, IN REGARD TO INFRINGEMENT OR OTHER
VIOLATION OF INTELLECTUAL PROPERTY RIGHTS. SMSC DISCLAIMS AND EXCLUDES ANY AND ALL WARRANTIES
AGAINST INFRINGEMENT AND THE LIKE.
No license is granted by SMSC expressly, by implication, by estoppel or otherwise, under any patent, trademark, copyright, mask
work right, trade secret, or other intellectual property right.
**To obtain this software program the appropriate SMSC Software License Agreement must be executed and in effect. Forms of
these Software License Agreements may be obtained by contacting SMSC.
Revision 1.1 (05-29-08)6SMSC USB2250/50i/51/51i
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
Chapter 5 Pin Descriptions
This section provides a detailed description of each signal. The signals are arranged in functional
groups according to their associated interface.
The “n” symbol in the signal name indicates that the active, or asserted, state occurs when the signal
is at a low voltage level. When “n” is not present before the signal name, the signal is asserted at the
high voltage level.
The terms assertion and negation are used exclusively. This is done to avoid confusion when worki ng
with a mixture of “active low” and “active high” signals. The term assert, or assertion, indi cates that a
signal is active, independent of whether that level is represented by a high or low voltage. The term
negate, or negation, indicates that a signal is ina ctive.
CF_D7 - CF_D0 in True IDE mode data
transfer. In True IDE Mode , all of the task file
register operations occur on the CF_D[7:0],
while data transfer occurs on CF_D[15:0].
The bi-directional data signal has an internal
weak pull-down resistor.
I/O12GPIO[23:16]: These Pins are GPIOs if the
CF_INTF_EN bit of the CFC_ATA_MODE
CTL is disabled and the EXTENDED_GPIO
bit set in UTIL_CONFIG1 is enabled.
IO ReadyCF_IORDY80IPUThis pin is the active high input signal for
IORDY.
This pin has an internal weak pull-up resistor
that can be controlled by:
CF_INTF_EN bit of CFC_ATA_MODE CTL.
CF Card
Detection1
CF Hardware
Reset
GPIO13
(CF_nCD)
58I/O12This is a GPIO designated as the Compact
Flash card detection pin.
CF_nRESET79O12This pin is an active low hardware reset
signal to the CF device.
CF IO ReadCF_nIOR72O12This pin is an active low read strobe signal
for the CF device.
CF IO Write
Strobe
CF DMA requestCF_DMARQ /
CF_nIOW73O12This p in is an active low write strobe signal
for the CF device.
117ICF_DMARQ: This pin is the DMA request
RXD / GPIO2
from the device to the CF controller.
RXD: The signal can be used as input to the
RXD of UART in the device when the
TXD_RXD_SEL bit in UTIL_CONFIG1
register is cleared to "0".
I/O12GPIO: This pin may be used either as input,
edge sensitive interrupt input, or output.
CF DMA
acknowledge
CF_DMACK/
TXD / GPIO
119O12CF_nDMACK: This pin is an active low dma
acknowledge signal for the CF device.
TXD: GPIO7 can be used as an output TXD
of UART in the device , when the GPIO2/ TXD
bit in UTL_CONFIG register is set to "1".
I/O12GPIO: This pin may be used either as input,
edge sensitive interrupt input, or output.
SMART MEDIA INTERFACE
SM Write ProtectS M_nWP47O12PDThis pin is an active low write protect signal
for the SM device.
This pin has a weak pull-down resistor that
is permanently enabled.
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
SM_nB/R56IPUThis pin is connected to the BSY/RDY pin of
BUFFER
TYPEDESCRIPTION
the SM device.
When using the internal FET, this pin has an
internal weak pull-up resistor that is tied to
the output of the internal Power FET, and is
controlled by the SM_PU bit of the
SMC_CTL register.
If an external FET is used (Internal FET is
disabled), then the internal pull-up is not
available (external pull-ups must be used).
SM Chip EnableSM_nCE54O12PUThis pin is the active low chip en able signal
to the SM device.
When using the internal FET, this pin has an
internal weak pull-up resistor that is tied to
the output of the internal Power FET, and is
controlled by the SM_PU bit of the
SMC_CTL register.
If an external FET is used (Internal FET is
disabled), then the internal pull-up is not
available (external pull-ups must be used).
SM Card
Detection GPIO
GPIO14
(SM_nCD)
57I/O12This is a GPIO designated as the Smart
Media card detection pin.
MEMORY STICK INTERFAC E
MS Bus StateMS_BS91O12This pin is connected to the BS pin of the MS
device.
It is used to control the Bus States 0, 1, 2
and 3 (BS0, BS1, BS2 and BS3) of the MS
device.
MS Card
Insertion GPIO
GPIO12
(MS_INS)
98IPUThis is a GPIO designated as the Memory
Stick card detection pin.
MS System CLKMS_SCLK1 01O12This pin is an output clock si gnal to the MS
device.
The clock frequency is software configurable.
MS System Data
In/Out
MS_D[7:1] 100
97
93
95
99
96
92
I/O12PDMS_D[7:0]: These pins are the bi-directional
data signals for the MS device. MS_D2 and
MS_D3 have weak pull-down resistors.
MS_D1 has a pull down resistor if it is in
parallel mode, otherwise it is disabled. In 4or 8-bit parallel mode, there is a weak pulldown resistor on all MS_D7~0 signals. The
resistors are controlled by MSC_SYSTEM_0,
MSC_MODE_CTL and MSC_PRO_HG
registers.
Revision 1.1 (05-29-08)14SMSC USB2250/50i/51/51i
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
94I/O12PDMS_D0: This pin is one of the bi-directional
SD / MMC INTERFACE
SD Data 7-0SD_D[7:0]13
11
19
21
22
23
10
12
128-PIN
BUFFER
TYPEDESCRIPTION
data signals for the MS device. In serial
mode, the most significant bit (MSB) of each
byte is transmitted first by either MSC or the
MS device on MS_D0, MS_D0, MS_D2, and
MS_D3 (which have weak pull-down
resistors). MS_D1 has a pull-down resistor
if it is in parallel mode; Otherwise, it is
disabled. In 4- or 8-bit parallel mode, all
MS_D7~0 signals have a weak pull-down
resistor. The resistors are controlled by
MSC_SYSTEM_0, MSC_MODE_CTL and
MSC_PRO_HG registers.
MS_SDIO: Serial Data Bus. Responsible for
transfer direction and types of data change
depending on the Bus State.
I/O12PUThese are the bi-directional data signals
SD_D0 - SD_D7.
The bi-directional signals should have weak
pull-up resistors. The register can be
controlled by the SD_MMC_INTF_EN bit of
SDC_MODE_CTL.
SD ClockSD_CLK18O12This is an output clock signal to the SD/MMC
device.
The clock frequency is software configurable.
SD CommandSD_CMD20I/O12PUThis is a bi-directional signal that connects to
the CMD signal of the SD/MMC device.
The bi-directional signal should have an
internal weak pull-up resistor.
The pull-up register can be controlled by:
SD_MMC_INTF_EN bit of SDC_MODE CTL.
SD Write
Protected GPIO
SD Card Detect
GPIO
GPIO6
(SD_WP)
GPIO15
(SD_nCD)
105I/O12This is a GPIO designated as the Secure
Digital card mechanical write detect pin.
32I/O12This is a GPIO designated as the Secure
Digital card detection pin.
USB INTERFACE
USB Bus DataUSB+
USB-
USB Transceiver
RBIAS127I-RA 12.0k, 1.0% resistor is attached from
Bias
7
8
I/O-UThese pins connect to the USB bus data
signals.
VSSA to this pin in order to set the
transceiver's internal bias currents.
SMSC USB2250/50i/51/51i15Revision 1.1 (05-29-08)
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
1.8V PLL PowerVDD18PLL125This pin is the 1.8V Power for the PLL.
3.3V Analog
Power
XTAL1
(CLKIN)
VDDA331283.3V Analog Power
128-PIN
VTQFP
124ICLKx24MHz Crystal or external clock input.
BUFFER
TYPEDESCRIPTION
XTAL: This pin can be connected to one
terminal of the crystal or it can be connected
to an external 24/48MHz clock when a
crystal is not used.
Note:The MA[1:0] pins will be sampled
while nRESET is asserted, and the
value will be latched upon nRESET
negation. This will determine the
clock source and value.
This is the other terminal of the crystal, or it
is left open when an external clock source is
used to drive XTAL1(CLKIN). It may not be
used to drive any external circuitry other than
the crystal circuit.
If the internal regulator is enabled, then this
pin must have a 1.0
(ESR <0.1Ω) capacitor to VSS.
μF (or greater) ±20%
Memory Data
Bus
Memory Address
Bus
Memory Address
Bus
MEMORY / IO INTERFACE
MD[7:0]33
29
30
31
34
35
36
37
MA1628O12These signals address memory locations
MA[15:2]2
4
107
1
113
24
111
109
106
108
110
112
114
116
I/O12These signals are used to transfer data
between the internal CPU and the external
program memory.
Note:These pins have internal weak pull-
up resistors that are controlled by
the MD_PU_DIS bit of the
PWR_MGMT_CTL1 register.
within the external memory. MA16 is a bit
generated by the ROM Mapper.
O12These signals address memory locati ons
within the external memory.
Revision 1.1 (05-29-08)16SMSC USB2250/50i/51/51i
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
these pins will select the operating frequency
of the external clock, and the corresponding
weak pull-down resistors are enabled. When
nRESET is negated, the value on these pins
will be internal latched and these pins will
revert to MA[1:0] functionality; the internal
pull-downs will be disabled.
corresponding MA pin is tri-stated
when the chip is in the powerdown
state.
If the latched value is '0', then the
corresponding MA pin will function identically
to the MA[15:3] pins at all times (other than
during nRESET assertion).
Memory Write
Strobe
Memory Read
Strobe
Memory Chip
Enable
General Purpose
I/O
General Purpose
I/O
nMWR3O12Program Memory Write; active low
nMRD115O12Program Memory Read; active low
nMCE26O12Program Memory Chip Enable; active low.
This signal is asserted when any external
access is being done by the processor.
This signal is held to the logic 'high' while
nRESET is asserted.
MISC
LED1 / GPIO1120I/O12GPIO: This pin may be used either as input,
edge sensitive interrupt input, or output.
LED: In addition, as an output, the GPIO1
can be used output controlled by the
LED1_GPIO1 register.
GPIO3
(VBUS_DET)
121I/O12This pin may be used either as input, edge
sensitive interrupt input, or output.
This pin is not 5V tolerant. An external
resistor divider must be used when
connected to VBUS.
SMSC USB2250/50i/51/51i17Revision 1.1 (05-29-08)
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
118I/O12GPIO: This pin may be used either as input,
edge sensitive interrupt input, or output.
O12SCL: This is the clock output when used with
an external EEPROM.
I/O12xD_ID: This is the xD card detection pin only
applicable to the USB2250/USB2250i.
5I/O12This pin may be used either as input, edge
sensitive interrupt input, or output.
SDA: This is the data pin when used with an
external serial EEPROM.
14I/O12GPIO: This pin may be used either as input,
edge sensitive interrupt input, or output.
I/O200CRD_PWR: Card Power drive of 3.3V @
either 100mA or 200mA.
78I/O12GPIO: This pin may be used either as input,
edge sensitive interrupt input, or output.
I/O200CRD_PWR: Card Power drive of 3.3V @
either 100mA or 200mA.
General Purpose
I/O
GPIO10 /
CRD_PWR2
76I/O12GPIO: These pins may be used either as
input, edge sensitive interrupt input, or
output. It is a requirement that this is the
only FET used to power SM devices. Failure
to do this will violate SM voltage specification
on SM device pins.
I/O200CRD_PWR: Card Power drive of 3.3V @
either 100mA or 200mA.
General Purpose
I/O
GPIO11 /
CRD_PWR3
16I/O12GPIO: These pins may be used either as
input, edge sensitive interrupt input, or
output.
I/O200CRD_PWR: Card Power drive of 3.3V @
either 100mA or 200mA.
RESET InputnRESET64ISThis active low signal is used by the system
to reset the chip. The active low pulse should
be at least 1μs wide.
TEST InputTEST103IThis signal is used for testing the chip. User
should normally tie this pin low externally, if
the test function is not used.
Regulator
Enable
REG_EN6IPUThis signal is used to enable the internal
1.8V regulator.
Revision 1.1 (05-29-08)18SMSC USB2250/50i/51/51i
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
1. Hot-insertion capable card connectors are required for all flash media. It is required for the SD
connector to have a Write Protect switch. This allows the chip to detect the MMC card.
VDD1849All VDD18 pins must be connected together
VDD3315
128-PIN
VTQFP
DIGITAL POWER, and GROUND
104
102
122
126
50
65
77
17
51
75
81
BUFFER
TYPEDESCRIPTION
on the circuit board.
+1.8V Core power. If the internal regulator is
enabled, then this pin must have a 1.0
greater) ±20% (ESR <0.1Ω) capacitor to
VSS.
3.3V Power & Voltage Regulator Input
Ground Reference.
μF (or
2. nMCE is normally asserted except when the 8051 is in standby mode.
3. Refer to PWR_MGMT_CTL1 register for controlling pull-up / down resistors associated with the
pins as well as the individual card control registers.
SMSC USB2250/50i/51/51i19Revision 1.1 (05-29-08)
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
5.2 Buffer Type Descriptions
Table 5.2 USB2250/50i/51/51i Buffer Type Descriptions
BUFFERDESCRIPTION
IInput.
IPUInput with internal weak pull-up resistor.
IPDInput with internal weak pull-down resistor.
ISInput with Schmitt trigger.
I/O12Input/Output buffer with 12mA sink and 12mA source.
Datasheet
I/O200Input/Output buffer 12mA with FET disabled, 100/200mA source onl y when the FET is
I/O12PDInput/Output buffer with 12mA sink and 12mA source with an internal weak pull-down
I/O12PUInput/Output buffer with 12mA sink and 12mA source with a pull-up resistor.
O12Output buffer with 12mA source.
O12PUOutput buffer with 12mA sink and 12mA source, with a pull-up resistor.
O12PDOutput buffer with 12mA sink and 12mA source, with a pull-down resistor.
ICLKxXTAL clock input.
OCLKxXTAL clock output.
I/O-UAnalog Input/Output as Defined in USB specifica tion.
I-RRBIAS.
enabled.
resistor.
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Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
Chapter 6 Pin Reset State Table
Voltage
Signal (v)
V
DD33
V
SS
Hardware
Initialization
RESET
Firmware
Operational
Figure 6.1 Pin Reset States
LEGEND
yeshardware enables function
--hardware disables function
zhardware disables output driver
puhardware enables pullup
pdhardware enables pulldown
hwhardware controls function, but state is protocol dependent
(fw)firmware controls function through registers
VDDhardware supplies power through pin, applicable only to CARD_PWR pins
nonehardware disables pad
RESET
Time
(t)
Figure 6.2 Legend for Pin Reset States Table
SMSC USB2250/50i/51/51i21Revision 1.1 (05-29-08)
DATASHEET
Revision 1.1 (05-29-08)22 SMSC USB2250/50i/51/51i
6.1 128-Pin Reset States
Figure 6.3 USB2250/50i/51/51i Pin Reset States
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
RESET STATE
PINPIN NAMEFUNCTION
85CF_D0/GPIO16GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
86CF_D1/GPIO17GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
88CF_D2/GPIO18GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
59CF_D3/GPIO19GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
61CF_D4/GPIO20GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
63CF_D5/GPIO21GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
DATASHEET
67CF_D6/GPIO22GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
69CF_D7/GPIO23GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
87CF_D8/GPIO24GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
89CF_D9/GPIO25GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
90CF_D10/GPIO26GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
60CF_D11/GPIO27GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
xD Mode
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
SD Mode
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
MS Mode
OUT-
PUT
PU/PDIN-
PUT
62CF_D12/GPIO28GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
66CF_D13/GPIO29GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
68CF_D14/GPIO30GPIOz----CFhwpdhwGPIO(fw)(fw)(fw)
70CF_D15/GPIO31GPIO
72CF_nIORCFz----CFhw----
z----
CFhwpdhwGPIO(fw)(fw)(fw)
Revision 1.1 (05-29-08)23 SMSC USB2250/50i/51/51i
RESET STATE
PINPIN NAMEFUNCTION
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
73CF_nIOWCFz----CFhw--
74CF_nIRQCFz----CFzpdyes
79CF_nRESETCFz----CF(fw)----
80CF_IORDYCFz----CFzpuyes
71CF_nCS0CFz----CFhw(fw)--
Post-Reset State
xD Mode
OUT-
PUT
PU/PDIN-
PUT
--
FUNCTION
Post-Reset State
SD Mode
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
MS Mode
OUT-
PUT
PU/PDIN-
PUT
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
84CF_SA0CFz----CFhw--
83CF_SA1CFz----CFhw----
DATASHEET
82CF_SA2CF
119CF_DMACK/TXD/GPIO7GPIO
117CF_DMARQ/RXD/GPIO2GPIO
58GPIO13(CF_nCD)GPIO
46SM_D0SM
45SM_D1SM
44SM_D2SM
43SM_D3SM
42SM_D4SM
41SM_D5SM
40SM_D6SM
39SM_D7SM
z----
0----
0----
zpuyes
zpd--
zpd--
zpd--
zpd--
zpd--
zpd--
zpd--
zpd--
CFhw----
CFhw----GPIO(fw)(fw)(fw)TXDhw--
CFzpdyesGPIO(fw)(fw)(fw)RXDz(fw)
GPIO(fw)(fw)(fw)
SMhw pdyes
SMhw pdyes
SMhw pdyes
SMhw pdyes
SMhw pdyes
SMhw pdyes
SMhw pdyes
SMhw pdyes
--
--
yes
Revision 1.1 (05-29-08)24 SMSC USB2250/50i/51/51i
PINPIN NAMEFUNCTION
RESET STATE
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
xD Mode
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
SD Mode
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
MS Mode
OUT-
PUT
PU/PDIN-
PUT
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
52SM_ALESM
53SM_CLESM
47SM_nWPSM
38SM_nWPSSM
57GPIO14(SM_nCD)GPIO
91MS_BSMS
101MS_SCLKMS
DATASHEET
94MS_D0/MS_SDIOMS
92MS_D1MS
96MS_D2MS
99MS_D3MS
95MS_D4MS
93MS_D5MS
97MS_D6MS
zpd--
zpd--
zpd--
z----
zpuyes
zpd--
zpd--
zpd--
zpd--
zpd--
zpd--
zpd--
zpd--
zpd--
SMhw pd --
SMhw pd --
SM(fw)pd--
SMzpuyes
GPIO(fw)(fw)(fw)
MShwhw--
MShwhw--
MShwpdyes
MShwhwyes
MShwpdyes
MShwpdyes
MShwpdyes
MShwhwyes
MShwpdyes
100MS_D7MS
98GPIO12(MS_INS)GPIO
20SD_CMDSD
18SD_CLKSD
12SD_D0SD
zpd--
zpuyes
z----
z----
z----
MShwpdyes
GPIO(fw)(fw)(fw)
SDhw
SDhw
yes
pu
yes
--
SDhwpuyes
Revision 1.1 (05-29-08)25 SMSC USB2250/50i/51/51i
PINPIN NAMEFUNCTION
RESET STATE
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
xD Mode
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
SD Mode
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
MS Mode
OUT-
PUT
PU/PDIN-
PUT
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
10SD_D1SD
23SD_D2SD
22SD_D3SD
21SD_D4SD
19SD_D5SD
11SD_D6SD
13SD_D7SD
DATASHEET
105GPIO6(SD_WP)GPIO
32GPIO15(SD_nCD)GPIO
27MA0/CLK_SEL0MA
25MA1/CLK_SEL1MA
116MA2MA
114MA3MA
112MA4MA
z----
z----
z----
z----
z----
z----
z----
0----
zpuyes
zpdyes
zpdyes
zpdyes
zpdyes
0----
SDhwpuyes
SDhwpuyes
SDhwpuyes
SDhwpuyes
SDhwpuyes
SDhwpuyes
SDhwpuyes
GPIO(fw)(fw)(fw)
GPIO(fw)(fw)(fw)
MAhw
MAhw
MAhw
MAhw
MAhw
----
----
----
----
----
110MA5MA
108MA6MA
106MA7MA
109MA8MA
111MA9MA
0----
0----
0----
0----
0----
MAhw
MAhw
MAhw
MAhw
MAhw
----
----
----
----
----
Revision 1.1 (05-29-08)26 SMSC USB2250/50i/51/51i
PINPIN NAMEFUNCTION
RESET STATE
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
xD Mode
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
SD Mode
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
MS Mode
OUT-
PUT
PU/PDIN-
PUT
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
24MA10MA
113MA11MA
107MA13MA
28MA16MA
37MD0MA
36MD1MA
35MD2MA
DATASHEET
34MD3MA
31MD4MA
30MD5MA
29MD6MA
33MD7MA
115nMRDMA
26nMCEMA
0----
0----
0----
0----
zpu--
zpu--
zpu--
zpu--
zpu--
zpu--
zpu--
zpu--
1----
1----
MAhw
MAhw
MAhw
MAhw
----
----
----
----
MAhwhwhw
MAhwhwhw
MAhwhwhw
MAhwhwhw
MAhwhwhw
MAhwhwhw
MAhwhwhw
MAhwhwhw
MAhw----
MA
0----
120LED1 / GPIO1GPIO
118GPIO4 (SCL/xD_ID)GPIO
14GPIO8/CARD_PWR0GPIO
78GPIO9/CARD_PWR1GPIO
76GPIO10/CARD_PWR2GPIO
0----
0----
z----
z----
z----
GPIO(fw)(fw)(fw)
GPIO(fw)(fw)(fw)
GPIO(fw)(fw)(fw)PWRVDD----
GPIO(fw)(fw)(fw)PWRVDD----
GPIO(fw)(fw)(fw)PWRVDD----
Revision 1.1 (05-29-08)27 SMSC USB2250/50i/51/51i
PINPIN NAMEFUNCTION
RESET STATE
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
xD Mode
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
SD Mode
OUT-
PUT
PU/PDIN-
PUT
FUNCTION
Post-Reset State
MS Mode
OUT-
PUT
PU/PDIN-
PUT
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
16GPIO11/CARD_PWR3GPIO
103TESTTEST
64nRESETnRESET
1MA12 MA
4MA14 MA
2MA15 MA
3nMWR MA
DATASHEET
121GPIO3 (VBUS_DET)GPIO
5GPIO5 (SDA)GPIO
55SM_nRESM
48SM_nWESM
56SM_nB/RSM
54SM_nCESM
7USB+USB+
z----
z--yes
z--yes
0----
0----
0----
1----
z--yes
0pu--
z----
z----
z----
z----
z----
GPIO(fw)(fw)(fw)PWRVDD----
TEST
nRESET
z--yes
z--yes
MAhw----
MAhw----
MAhw----
MAhw----
GPIO(fw)(fw)(fw)
GPIO(fw)(fw)(fw)
SMhw(fw)--
SMhw(fw)--
SMz(fw)yes
SMhw(fw)--
USB+zhwhw
8USB-USB-
127RBIAS
124XTAL1(CLKIN)
123XTAL2
6REG_EN
z----
USB-zhwhw
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Chapter 7 DC Parameters
7.1 Maximum Guaranteed Ratings
PARAMETERSYMBOLMINMAXUNITSCOMMENTS
Datasheet
Storage
Temperature
Lead
Temperature
3.3V supply
voltage
Voltage on
USB+ and
USB- pins
Voltage on
GPIO8, 9, 10
& 11
Voltage on any
signal pin
Voltage on
XTAL1
Voltage on
XTAL2
T
A
V
DD33,
V
DDA33
-55150°C
325°CSoldering < 10 seconds
-0.54.0V
-0.5(3.3V supply voltage + 2) ≤ 6V
-0.5V
-0.5V
+ 0.3VWhen internal power FET
DD33
+ 0.3V
DD33
-0.54.0V
-0.5V
+ 0.3V
DD18
operation of these pins are
enabled, these pins may be
simultaneously shorted to
ground or any voltage up to
3.63V indefinitely, without
damage to the device as long
as V
than 3.63V and TA is less than
DD33
and V
DDA33
are less
70oC.
Note 7.1Stresses above the specified parameters may cause permanent damage to the device.
This is a stress rating only and functi onal operation of the device at any condition above
those indicated in the operation sections of this specification is not implied .
Note 7.2When powering this device from laboratory or system power supplies, it is important that
the Absolute Maximum Ratings not be exceeded or device failure can result. Some power
supplies exhibit voltage spikes on their outputs when the AC power is switched on or off.
In addition, voltage transients on the AC power line may appear on the DC output. When
this possibility exists, it is suggested that a clamp circuit be used.
Revision 1.1 (05-29-08)28SMSC USB2250/50i/51/51i
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
Voltage
VDD33
VSS
10%
t
10%
t
RT
t
90%
3.3V
90%
Time
100%
Figure 7.1 Supply Rise Time Model
Note 7.3When powering the device, the maximum power supply ramp time should be set at a rate
faster than 400μs. This speed is important to ensure that the device resets properly.
Measure rise time at 10% and 90%.
7.2 Recommended Operating Conditions
PARAMETERSYMBOLMINMAXUNITSCOMMENTS
Operating
Temperature
Commercial Part
Industrial Part
3.3V supply voltageV
3.3V supply rise timet
Voltage on
T
A
T
A
DD33,
V
DDA33
RT
0
-40
3.03.6V(Note 7.4)
0400μs (See Figure 7.1 and Note 7.3)
-0.35.5VIf any 3.3V suppl y voltage drops
USB+ and USB- pins
Voltage on any signal
-0.3V
pin
Voltage on XTAL1 -0.3V
Voltage on XTAL2-0.3V
Note 7.4A 3.3V regulator with an output tolerance of 1% must be used if the output of the internal
power FET’s must support a 5% tolerance.
70
85
DD33
DDA33
DD18
°C
°C
below 3.0V, then the MAX
becomes:
(3.3V supply voltage) + 0.5 ≤ 5.5
V
V
V
SMSC USB2250/50i/51/51i29Revision 1.1 (05-29-08)
DATASHEET
7.3 DC Electrical Characteristics
PA RAMETERSYMBOLMINTYPMAXUNITSCOMMENTS
I, IPU, IPD Type Input Buffer
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
Low Input Level
High Input Level
Pull Down
Pull Up
IS Type Input Buffer
Low Input Level
High Input Level
Hysteresis
ICLK Input Buffer
Low Input Level
High Input Level
Input Leakage
Input Leakage
(All I and IS buffers)
V
V
V
V
ILI
V
IHI
PD
PU
V
ILI
V
IHI
HYSI
ILCK
IHCK
I
IL
2.0
2.0
1.4
-10
72
58
420
0.8V
0.8V
0.5
+10
V
μA
μA
V
mV
V
V
μA
TTL Levels
TTL Levels
V
= 0 to V
IN
DD33
Low Input Leakage
High Input Leakage
O12 Type Buffer
Low Output Level
High Output Level
Output Leakage
V
-10
-10
DD33
I
IL
I
IH
V
OL
V
OH
- 0.4
I
OL
-10
+10
+10
0.4
+10
μA
μA
V
V
μA
VIN = 0
= V
V
IN
DD33
= 12mA @
I
OL
= 3.3V
V
DD33
= -12mA @
I
OH
V
= 3.3V
DD33
= 0 to V
V
IN
DD33
(Note 7.5)
Revision 1.1 (05-29-08)30SMSC USB2250/50i/51/51i
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
PA RAMETERSYMBOLMINTYPMAXUNITSCOMMENTS
I/O12, I/O12PU & I/O12PD Type
Buffer
Low Output Level
High Output Level
Output Leakage
Pull Down
Pull Up
IO-U
(Note 7.6)
I-R
(Note 7.7)
I/O200
Integrated Power FET for
GPIO8, GPIO9, GPIO10, &
GPIO11
High Output Current Mode
V
V
I
OL
PD
PU
I
OUT
OL
OH
V
DD33
- 0.4
-10
200
72
58
0.4
+10
V
V
µA
μA
μA
mA
= 12mA @
I
OL
= 3.3V
V
DD33
= -12mA @
I
OH
V
= 3.3V
DD33
= 0 to V
V
IN
(Note 7.5)
Vdrop
FET
DD33
= 0.46V
Low Output Current Mode
(Note 7.8)
On Resistance
(Note 7.8)
Output Voltage Rise Time
Supply Current UnconfiguredI
Supply Current Active
Full Speed
High Speed
Supply Current SuspendI
Industrial Temperature SuspendI
Note 7.5Output leakage is measured with the current pins in high impedance.
Note 7.6See The USB 2.0 Sp ecification, Chapter 7, for USB DC electrical characteri stics
Note 7.7RBIAS is a 3.3V tolerant analog pin.
Note 7.8Output current range is controlled by program software, software disables FET during short
circuit condition.
I
OUT
R
DSON
t
DSON
CCINIT
I
CC
I
CC
CSBY
CSBYI
100
Vdrop
I
FET
C
LOAD
= 70mA
2.1
800
mA
Ω
μs
8090mA
, V
110
135
140
165
mA
mA
V
V
DD
DD33
350750µAVDD, V
V
DD33
350950µA
= 0.23V
FET
= 10μF
= 1.8V
DDP
, V
DDA
= 1.8V
DDP
, V
DDA
= 3.3V
= 3.3V
SMSC USB2250/50i/51/51i31Revision 1.1 (05-29-08)
DATASHEET
Note 7.9The assignment of each Integrated Card Power FET to a designated Card Connector is
controlled by both firmware and the specific board implementation. Firmware will default to
the settings listed in Table 10.1, “USB2250/50i/51/51i GPIO Usage (ROM Rev 0x00),” on
page 35.
Note 7.10 The 3.3V supply should be at least at 75% of its operating condition before the 1.8V supply
is allowed to ramp up.
7.4 Capacitance
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
Datasheet
TA = 25°C; fc = 1MHz; V
PARAMETERSYMBOL
Clock Input CapacitanceC
Input CapacitanceC
Output CapacitanceC
DD, VDDP
= 1.8V
Table 7.1 Pin Capacitance
LIMITS
XTAL
IN
OUT
UNITTEST CONDITIONMINTYPMAX
2pFAll pins (except USB pins
and pins under test) are tied
to AC ground.
10pF
20pF
Revision 1.1 (05-29-08)32SMSC USB2250/50i/51/51i
DATASHEET
Ultra Fast USB 2.0 Multi-Slot Flash Media Controller
GPIO9LCRD_PWR1Card Power Control
GPIO10LCRD_PWR2Card Power Control
GPIO11LCRD_PWR3Card Power Control
GPIO12LMS_INSMemory Stick Card Insertion
GPIO13LCF_nCDCompact Flash card detect
GPIO14LxD_nCDxD card detect
GPIO15LSD_nCDSecure Digital card detect
Port of Debugger
detect
/Transmit Port of Debugger
GPIO16-32USERGPIO [32:16]User defined
SMSC USB2250/50i/51/51i35Revision 1.1 (05-29-08)
DATASHEET
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