The radio part is realizes the conversion of the GMSK-HF-signals from the antenna to the
baseband and vice versa.
In the receiving direction, the signals are split in the I- and Q-component and led to the D/Aconverter of the logic part. In the transmission direction, the GMSK-signal is generated in an
Up Conversion Modulation Phase Locked Loop by modulation of the I- and Q-signals which
were generated in the logic part. After that the signals are amplified in the power amplifier.
Transmitter and Receiver are never active at the same time. Simultaneous receiving in the
EGSM900 and GSM1800 band is impossible. Simultaneous transmission in the EGSM900
and GSM1800 band is impossible, too. However the monitoring band (monitoring timeslot) in
the TDMA-frame can be chosen independently of the receiving respectively the transmitting
band (RX- and TX timeslot of the band).
The RF-part is dimensioned for triple band operation (EGSM900, DCS1800, PCS19000)
supporting GPRS functionality up to multiclass 10.
The RF-circuit consists of the following components:
• Hitachi Bright 6E chip set (HD155165BP) with the following functionality:
o PLL for local oscillator LO1 and LO2 and TxVCO
o Integrated local oscillators LO1, LO2
o Integrated TxVCO
o Direct conversion receiver including LNA, DC-mixer, channel filtering and
PGC-amplifier
o 26 MHz reference oscillator
• Transmitter power amplifier with integrated power control circuitry
• Frontend-Module including RX-/TX-switch and EGSM900 / DCS1800 / PCS 1900
receiver SAW-filters
• Quartz and passive circuitry of the 26MHz VCXO reference oscillator
The voltage regulator for the RF-part is located inside the ASIC D1300. It generates the
required 2,8V “RF-Voltages” named VDD_RF1 and VDD_RF2. VDD_RF2 is passed via a 0Ω
resistor and renamed as VDD_BRIGHT as operating voltage for the BRIGHT.The voltage
regulator is activated as well as deactivated via VCXOEN_UC
SGOLDlite. The temporary deactivation is used to extend the stand by time.
The C75 mobile is using a reference frequency of 26MHz. The generation of the 26MHz
signal is done via a VCO (Z950). TP (test point) of the 26MHz signal is the TP 820
The oscillator output signal 26MHz_RF is directly connected to the BRIGHT IC
used as reference frequency inside the Bright (PLL). The signal leaves the Bright IC as
RF_SIN26M
Bright 6E
(ball G9) to be further used from the SGOLDlite (D1000 (Functional AE15)).
VCXO Out
SGOLDlite In
To compensate frequency drifts (e.g. caused by temperature) the oscillator frequency is
controlled by the (RF_AFC) signal, generated through the internal SGOLDlite (D1000
PLL. Reference for the “EGOLD-PLL” is the base station frequency received via the
Frequency Correction Burst.
The required voltage VDD_RF2 is provided by the ASCI D1300
Waveform of the AFC_PNM signal from SGOLDlite to Oscillator
Synthesizer: LO1
First local oscillator (LO1) consists of a PLL and VCO inside Bright (D903) and an internal
loop filter
RF PLL
The frequency-step is 400 kHz in GSM1800 mode and 800kHz in EGSM900 mode due to the
internal divider by two for GSM1800 and divider by four for EGSM900. To achieve the
required settling-time in GPRS operation, the PLL can operate in fastlock-mode a certain
period after programming to ensure a fast settling. After this the loopfilter and currents are
switched into normal-mode to get the necessary phasenoise-performance. The PLL is
controlled via the tree-wire-bus of Bright VI E.
RFVCO (LO1)
The first local oscillator is needed to generate frequencies which enable the transceiver IC to
demodulate the receiver signal and to perform the channel selection in the TX part. The VCO
module is switched on with the signal PLLON. The full oscillation range is divided into 256
sub-bands To do so, a control voltage for the LO1 is used, gained by a comparator. This
control voltage is a result of the comparison of the divided LO1 and the 26MHz reference
Signal. The division ratio of the dividers is programmed by the SGOLDlite, according to the
network channel requirements.
Synthesizer: LO2
The second local oscillator (LO2) consists of a PLL and VCO inside Bright (D903) and an
internal loop filter. Due to the direct conversion receiver architecture, the LO2 is only used for
transmit-operation. The LO2 covers a frequency range of at least 16 MHz (640MHz –
656MHz).
Before the LO2-signal gets to the modulator it is divided by 8. So the resulting TX-IF
frequencies are 80/82 MHz (dependent on the channel and band). The LO2 PLL and powerup of the VCO is controlled via the tree-wire-bus of Bright (SGOLDlite signals RF_DAT;
RF_CLK; RF_STR). To ensure the frequency stability, the 640MHz VCO signal is compared
by the phase detector of the 2
nd
PLL with the 26Mhz reference signal. The resulting control
signal passes the external loop filter and is used to control the 640/656MHz VCO.
The required voltage VDD_BRIGHT is provided by the ASIC D1300
Receiver: Filter to Demodulator
The band filters are located inside the frontend module (D902). The filters are centred to the
band frequencies. The symmetrical filter output is matched to the LNA input of the Bright .The
Bright 6E incorporates three RF LNAs for GSM850/EGSM900, GSM1800 and GSM1900
operation. The LNA/mixer can be switched in High- and Low-mode to perform an
amplification of ~ 20dB. For the “High Gain“ state the mixers are optimised to conversion gain
and noise figure, in the “Low Gain“ state the mixers are optimised to large-signal behavior for
operation at a high input level. The Bright performs a direct conversion mixers which are IQdemodulators. For the demodulation of the received GSM signals the LO1 is required. The
channel depending LO1 frequencies for 1800MHz/1900MHz bands are divided by 2 and by 4
for 850MHG/900MHz band. Furthermore the IC includes a programmable gain baseband
amplifier PGA (90 dB range, 2dB steps) with automatic DC-offset calibration. LNA and PGA
are controlled via SGOLDlite signals RF_DAT; RF_CLK; RF_STR
channel-filtering is realized inside the chip with a three stage baseband filter for both IQ
chains. Only two capacitors which are part of the first passive RC-filters are external. The
second and third filters are active filters and are fully integrated. The IQ receive signals are
fed into the A/D converters in the EGAIM part of SGOLDlite. The post-switched logic
measures the level of the demodulated baseband signal and regulates the level to a defined
value by varying the PGA amplification and switching the appropriate LNA gains.
From the antenna switch, up to the demodulator the received signal passes the following
blocks to get the demodulated baseband signals for the SGOLDlite:
Filter
LNA
Demodulator
PGC
D903 Bright(D903)
The required voltage VDD_BRIGHT is provided by the ASIC D1300
Transmitter: Modulator and Up-conversion Loop
The generation of the GMSK-modulated signal in Bright (D903) is based on the principle of
up conversion modulation phase locked loop. The incoming IQ-signals from the baseband
are mixed with the divided LO2-signal. The modulator is followed by a lowpass filter (corner
frequency ~80 MHz) which is necessary to attenuate RF harmonics generated by the
modulator. A similar filter is used in the feedback-path of the down conversion mixer.
With help of an offset PLL the IF-signal becomes the modulated signal at the final transmit
frequency. Therefore the GMSK modulated rf-signal at the output of the TX-VCOs is mixed
with the divided LO1-signal to a IF-signal and sent to the phase detector. The I/Q modulated
signal with a center frequency of the intermediate frequency is send to the phase detector as
well.
The output signal of the phase detector controls the TxVCO and is processed by a loop filter
whose components are external to the Bright. The TxVCO which is realized inside the Bright
chip generates the GSMK modulated frequency.
Modulator
Bright(D903)
The required voltage VDD_BRIGHT is provided by the ASIC D1300
Filter
PD
TxVCO
Service Repair Documentation
Level 2.5e – C75
Page 12 of 37
Release 1.0
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