like lamps and motors; all types of resis tive and
inductive loads
•
Replaces electromechanic al r elay s , fuses and
discrete circuits
V and 24V DC grounded loads
Product Summary
Overvoltage protection
Output clamp
Operating voltage
On-state resistance
Load current (ISO)
Short circuit current l i m i t ation
Current sense ratio
TO-220AB/7
1
Standard
V
bb(AZ)
V
ON(CL
V
bb(on)
R
ON
I
L(ISO)
I
L(SC)
I
L :
7
I
IS
62V
5.0...34V
6.0
70A
130A
14 000
1
SMD
42
V
mΩ
7
General Description
N channel vertical power F E T with charge pump, cur r ent controlled input and diagnost ic feedback with load
current sense, integrated in Smart S IPMOS chip on chip technology. Fully protected by em bedded pr otection
functions.
4 & Tab
+ V
R
Voltage
source
Voltage
sensor
3
IN
ESD
I
IN
V
IN
V
IS
Logic
I
IS
IS
5
R
IS
Overvoltage
protection
Charge pump
Level shifter
Rectifier
Current
limit
Gate
protection
Limit for
unclamped
ind. loads
Output
Voltage
detection
Temperature
sensor
bb
Current
Sense
PROFET
bb
OUT
1,2,6,7
I
L
Load GND
Load
Logic GND
1
)With additional ext er nal diode.
2
)
Additional external diode requir ed for energized inductive loads ( s ee page 9) .
Semiconductor Group Page 1 of 16 1998-Nov.-2
PinSymbolFunction
1OUTO
Output to the load. The pins
especially in high current applic ations!
BTS650P
1,2,6 and 7 must be s hor ted with each other
3
)
2OUTOOutput to the load. The pins1,2, 6 and 7 m us t be shorted with each ot her
especially in high current applic ations!
3INIInput, act iv ates the power switch in c as e of short to ground
4V
5ISS
6OUTO
7OUTO
Maximum Ratings at
bb
T
Positive power supply v oltage, the tab is electrically connected t o this pin.
+
In high current applications the tab should be used f or the V
instead of this pin
Diagnostic feedback pr ov iding a s ens e c ur r ent proportional to the load
current; zer o c ur r ent on failure (see Truth Table on page 7)
Output to the load. The pins
especially in high current applic ations!
Output to the load. The pins
especially in high current applic ations!
j = 25 °C unless otherwise specified
4
)
.
1,2,6 and 7 must be s hor ted with each other
1,2,6 and 7 must be s hor ted with each other
3)
connection
bb
3)
3)
ParameterSymbolValuesUnit
Supply voltage (overvoltage protect ion s ee page 4)
Supply voltage for short circuit protection,
T
=-40 ...+150°C: (see diagram on page 10)
j,start
Load current (short circuit current, see page 5)
Load dump protection
5
)
R
= 2 Ω,
I
R
= 0.54 Ω,
L
V
LoadDump
t
= 200 ms,
d
=
V
A
+
V
,
s
V
= 13.5 V
A
V
bb
V
bb
I
L
V
Load dump
42V
34V
self-limitedA
6
)
75V
IN, IS = open or grounded
Operating temperature range
Storage temperature range
Power dissipation (DC), TC ≤ 25 °C
T
T
P
j
stg
tot
-40 ...+150
-55 ...+150
170W
°C
Inductive load switch-off energy dissipation, single pulse
V
= 12V,
bb
I
= 20 A, ZL = 7.5 mH, 0 Ω, see diagrams on page 10
L
Electrostatic discharge capability (ESD)
Human Body Model acc. M IL-STD883D, met hod 3015.7 and ESD
assn. std. S 5.1-1993, C = 100 pF, R = 1.5 kΩ
Current through input pin (DC)
Current through current sense status pin (DC)
see internal circuit diagr am s on page 7 and 8
T
j,start
= 150°C,
T
= 150°C const.,
C
E
V
I
I
AS
ESD
IN
IS
1.5J
+15 , -250
+15 , -250
4kV
mA
3
)
Not shorting all outputs will considerably increase the on-state resis tance, reduce the peak c ur r ent
capability and decrease t he c ur r ent sense accuracy
4
)
Otherwise add up to 0.7 mΩ (depending on used length of the pin) to the RON if the pin is used inst ead of
the tab.
5
)
R
= internal resis tance of the load dump tes t pulse generator.
I
6
)
V
Load dump
is setup without the DUT connected to the generator per ISO 7637-1 and DIN 40839.
Semiconductor Group Page 2 1998-Nov.-2
BTS650P
Thermal Characteristics
Parameter and ConditionsSymbolValuesUnit
mintypmax
7
)
Thermal resistancechip - case:
junction - ambient (free air):
SMD version, device on PCB
8
R
thJC
R
thJA
)
:33
----0.75
--
60--
K/W
Electrical Characteristics
Parameter and ConditionsSymbolValuesUnit
at
T
j =-40 ... +150°C,
Load Switching Capabilities and Characteristics
On-state resistance (Tab to pins 1,2, 6,7, see
measurement circ uit page 7)
Nominal load current
ISO 10483-1/6.7:
Nominal load current
T
= 85 °C,
A
T
Maximum load current in resistive range
(Tab to pins 1,2,6,7)
see diagram on page 13
Turn-on time
12
Turn-off timeIIN to 10%
R
=1Ω ,
L
Slew rate on
R
= 1 Ω ,
L
Slew rate off
R
= 1 Ω ,
L
T
=-40...+150°C
j
12)
T
J
12)
T
J
V
= 12 V unless otherwis e s pec ified
bb
I
=20A,
L
V
= 0,
I
9
)
V
ON
V
I
,
I
ON
OUT
= 20 A,
L
= 90 A,
L
= 20 A,
L
T
c
= 1.8 V,
= 1.8 V,
)
IN
V
= 6V
bb
10
)
(Tab to pins 1, 2,6,7)
V
= 0.5 V,
ON
10)
, device on PCB
≤ 150 °C
j
V
≤ 0.5 V ,
ON
V
)
IIN to 90%
(10 to 30%
T
T
T
= 85 °C
8))
T
T
c
= 25 °C
(70 to 40%
V
OUT
)
= 25 °C
mintypmax
T
=25°C:
j
= 150 °C:
j
= 150 °C:--10.7
j
= 150 °C:
j
11
)
= 25 °C:
c
= 150 °C:
V
OUT
V
OUT
:
:
R
ON
R
ON(Static)
I
L(ISO)
I
L(NOM)
I
L(Max)
t
on
t
off
dV/dt
-dV/dt
on
off
--4.4
7.9
10.5
--1017
5570--A
13.617--A
250
150
100
30
--
--
--
--
420
110
--0.7--V/µs
--1.1--V/µs
6.0
--
--
mΩ
A
µs
7
)
Thermal resist anc e R
8
)
Device on 50mm*50mm*1.5m m epox y P CB FR4 with 6cm
connection. PCB is v er tical without blown air.
9
)
Decrease of V
long as V
10
)
Not tested, s pec ified by design.
11
)
T
is about 105°C under thes e c onditions.
J
12
)
See timing diagram on page 14.
below 10 V causes slowly a dynamic inc r eas e of RON to a higher value of R
bb
> V
bIN
bIN(u) max
case to heatsink ( about 0.5 ... 0.9 K/W with silicone paste) not included!
thCH
, RON increase is less than 10 % per s ec ond for TJ < 85 °C.
2
(one layer, 70µm thick) copper area for V
ON(Static)
bb
. As
Semiconductor Group Page 3 1998-Nov.-2
Inverse Load Current Operation
On-state resistance (Pins 1,2,6,7 to pin 4)
V
=12 V,
bIN
see diagram on page 10
I
=-20A
L
T
=25°C:
j
T
= 150 °C:
j
Nominal inverse load current (Pins 1,2,6,7 to Tab)
V
= -0.5 V,
ON
T
c
= 85 °C
Drain-source diode voltage (V
I
-
=
L
20 A,
I
IN
= 0,
11
T
j = +150°C
out
> V
bb
)
Operating Parameters
13
9,
Operating voltage (
V
IN
Undervoltage shutdown
= 0)
)
14
)
Undervoltage start of charge pump
see diagram page 15
15
Overvoltage protection
I
= 15 mA
bb
Standby current
I
= 0
IN
)
T
T
=-40°C:
j
= 25...+150°C:
j
T
=-40...+25°C:
j
T
= 150°C:
j
R
ON(inv)
I
L(inv)
-
V
ON
V
bb(on)
V
bIN(u)
V
bIN(ucp)
V
bIN(Z)
I
bb(off)
BTS650P
--4.4
7.9
5570--A
--0.6--V
5.0--34V
1.53.04.5V
3.04.56.0V
60
62
--
--
--
66
15
25
6.0
10.5
25
50
--
--
mΩ
V
µA
13
)
If the device is turned on before a V
For all voltages 0 ... 34 V the device is fully protected against overtem per ature and short circuit.
14
)
15
)
= V
-V
V
bIN
(typ.) t he c har ge pum p is not active and
See also
bb
see diagram on page 7. When
IN
V
in circuit diagram on page 9.
ON(CL)
-decrease, the oper ating voltage range is extended down to
bb
V
V
OUT
increases from les s than V
bIN
≈
V
-3V.
bb
bIN(u)
up to
V
bIN(ucp)
V
bIN(u)
= 5V
.
Semiconductor Group Page 41998-Nov.-2
BTS650P
I
(
)
Parameter and ConditionsSymbolValuesUnit
at
T
j =-40 ... +150°C,
Protection Functions
Short circuit current limit (Tab to pins 1,2,6, 7)V
= 12 V, time until shutdown max. 350 µs
ON
Short circuit shutdown delay after input current
positive slope,
min. value valid only if input "off-signal" time exceeds 30 µs
Output clamp
inductive load switch off
see diagram Ind. and over v olt. output clamp page 8
Output clamp (inductive load switch off)
at
V
=
V
bb
I
= 40 mA
L
OUT
Short circuit shutdown detection voltage
(pin 4 to pins 1,2,6,7)
Thermal overload trip temperature
Thermal hysteresis
16
-
V
)
ON
V
ON(CL)
V
= 12 V unless otherwis e s pec ified
bb
T
T
T
=+150°C:
c
>
V
ON(SC)
L
(e.g. overvoltage)
=-40°C:
c
=25°C:
c
= 40 mA:
I
L(SC)
I
L(SC)
I
L(SC)
t
d(SC)
-
V
OUT(CL)
V
ON(CL)
V
ON(SC)
T
jt
∆
T
mintypmax
--
-65
110
130
115
--
180
--
A
80--350µs
1416.520V
394247V
--6--V
150----°C
jt
--10--K
Reverse Battery
17
Reverse battery voltage
On-state resistance (Pins 1,2,6,7 to pin 4)
V
= -12V,
bb
V
IN
= 0,
I
L
Integrated resistor in Vbb line
16
)
This output clamp can be "switched off" by using an additional diode at the IS-Pin (see page 8). If the diode
is used, V
17
)
The reverse load curr ent through the intrins ic dr ain- s our c e diode has to be limited by the connected load
(as it is done with all polarity symmetric loads). Note that under off-conditions (
transistor is not activated. This results in raised power dis s ipation due to the higher voltage dr op ac r os s the
intrinsic drain-sour c e diode. The temperatur e pr otection is not act iv e dur ing r ev er s e c ur r ent operation!
Increasing reverse battery voltage capability is simply possible as described on page 9.
is clamped to Vbb- V
OUT
)
= - 20 A,
R
= 1 kΩ
IS
ON(CL)
-
V
bb
T
= 25 °C:
j
T
= 150 °C:
j
at inductive load swit c h off.
R
ON(rev)
R
bb
----32V
--
5.4
8.9
7.0
12.3
--120--
I
=
I
IN
=0) the power
IS
mΩ
Ω
Semiconductor Group Page 51998-Nov.-2
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