SGS Thomson Microelectronics M27C2001 Datasheet

2 Mbit (256Kb x 8) UV EPROM and OTP EPROM
5V ± 10% SUPPLY VOLTAGE in READ
OPERATION
FAST ACCESS TIME: 55ns
LOW POWER CONSUMPTION:
– Active Current 30mA at 5MHz – Standby Current 100µA
PROGRAMMING VOLTAGE: 12.75V± 0.25V
PROGRAMMING TIME: 100µs/byte (typical)
ELECTRONIC SIGNATURE
– Manufacturer Code: 20h – Device Code: 61h
M27C2001
32
1
FDIP32W (F) PDIP32 (B)
32
1
DESCRIPTION
The M27C2001 is a high speed 2 Mbit EPROM of­fered in the two ranges UV (ultra violet erase) and OTP (one time programmable). It is ideally suited for microprocessor systems requiring large pro­grams and is organised as 262,144 by 8 bits.
The FDIP32W (window ceramic frit-seal package) and LCCC32W (leadless chip carrier package) have a transparent lids which allow the user to ex­pose the chipto ultraviolet light to erase thebitpat­tern. A new pattern can then be written to the device by following the programming procedure.
For applications wherethe content is programmed only one time and erasure is not required, the M27C2001 is offered in PDIP32, PLCC32 and TSOP32 (8 x 20 mm) packages.
Table 1. Signal Names
A0-A17 Address Inputs Q0-Q7 Data Outputs E Chip Enable G Output Enable
LCCC32W (L)
PLCC32 (K) TSOP32 (N)
Figure 1. Logic Diagram
V
CC
18
A0-A17
P
E
G
M27C2001
V
8 x 20 mm
PP
8
Q0-Q7
P Program V
PP
V
CC
V
SS
Program Supply Supply Voltage Ground
V
SS
AI00716B
1/16April 1999
M27C2001
Figure 2A. DIP Pin Connections
V
PP
A15 A12
A7 A6 A5 A4 A3 A2 A1 A0
Q0
Q2 SS
1 2 3 4 5 6 7 8
M27C2001
9 10 11 12 13 14 15 16
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
AI00717
V
CC
PA16 A17 A14 A13 A8 A9 A11 G A10 E Q7 Q6 Q5Q1 Q4 Q3V
Figure 2B. LCC Pin Connections
CC
VPPV
32
Q3
Q4
P
Q5
A7 A6 A5 A4 A3 A2 A1 A0
Q0
9
A12
A15
M27C2001
Q1
Q2
A16
1
17
SS
V
A17
25
Q6
A14 A13 A8 A9 A11 G A10 E Q7
AI00718
Figure 2C. TSOP Pin Connections
A11 G
A9
A8 A13 A14 A17
V
CC
V
PP
A16 A15 A12
A7
A6
A5
A4 A3
1
P
M27C2001
8
(Normal)
9
16 17
32
25 24
AI01153B
A10 E Q7 Q6 Q5 Q4 Q3 V
SS
Q2 Q1 Q0 A0 A1 A2
The operationg modes of the M27C2001 are listed in the Operating Modes table. A single power sup­ply is required in the read mode. Allinputs are TTL levels except for VPPand 12V on A9 for Electronic Signature.
Read Mode
The M27C2001 has two control functions, both of which must be logically active in order to obtain data at the outputs. Chip Enable (E) is the power control and should be used for device selection. Output Enable (G) is the output control and should be used to gate data to the output pins, indepen­dent of device selection. Assuming that the ad­dresses are stable, the address access time (t
) is equal to the delay from E to output
AVQV
(t
). Data is availableatthe output after a delay
ELQV
of t
from the falling edge of G, assuming that
GLQV
E has been low and the addresses have been sta­ble for at least t
AVQV-tGLQV
.
Standby Mode
The M27C2001 has a standby mode which reduc­es the supply current from 30mA to 100µA. The M27C2001 is placed in the standby mode by ap­plying a CMOS high signalto the E input. When in the standbymode, theoutputsarein a high imped­ance state, independent of the G input.
2/16
M27C2001
Table 2. Absolute Maximum Ratings
(1)
Symbol Parameter Value Unit
T
A
T
BIAS
T
STG
(2)
V
IO
V
CC
(2)
V
A9
V
PP
Note: 1. Except for the rating ”Operating Temperature Range”, stressesabove those listedin the Table ”Absolute Maximum Ratings” may
cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above thoseindicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rating condi­tions forextended periods may affect device reliability. Refer alsoto theSTMicroelectronics SUREProgram and otherrelevant qual­ity documents.
2. Minimum DC voltage on Input or Output is –0.5V with possible undershoot to –2.0V for a period less than 20ns. Maximum DC voltage on Output is V
3. Depends on range.
Ambient Operating Temperature Temperature Under Bias –50 to 125 °C Storage Temperature –65 to 150 °C
Input or Output Voltage (except A9) –2 to 7 V Supply Voltage –2 to 7 V A9 Voltage –2 to 13.5 V Program Supply Voltage –2 to 14 V
+0.5V with possible overshoot to VCC+2V for a period less than 20ns.
CC
(3)
–40 to 125 °C
Table 3. OperatingModes
Mode E G P A9
Read Output Disable V Program Verify V Program Inhibit Standby Electronic Signature
Note: X = VIHor VIL,VID= 12V ± 0.5V.
V
IL
IL
V
IL
IL
V
IH
V
IH
V
IL
V
IL
V
IH
V
IH
V
IL
XX XXV
VILPulse
V
IH
X
XVPPData Out XXX XXX
V
IL
V
IH
V
ID
V
PP
V
or V
CC
SS
or V
CC
SS
V
PP
V
PP
V
or V
CC
SS
V
CC
Q0-Q7
Data Out
Hi-Z
Data In
Hi-Z Hi-Z
Codes
Table 4. Electronic Signature
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code Device Code
V
IL
V
IH
Two Line Output Control
Because EPROMs are usually used in larger memory arrays, this product features a 2 line con­trol function which accommodates the use of mul­tiple memory connection. The two line control function allows:
a. the lowest possible memory power dissipation, b. complete assurance that output bus contention
will not occur.
00100000 20h 01100001 61h
For the most efficient use of these two control lines, Eshould be decodedandused as the prima­ry device selecting function, while G should be made a common connection to all devices in the array and connected to the READ line from the system control bus. Thisensures that all deselect­ed memory devices are in their lowpower standby mode and that the output pins are only active when data is required from a particular memory device.
3/16
M27C2001
Table 5. AC Measurement Conditions
High Speed Standard
Input Rise and Fall Times 10ns 20ns Input Pulse Voltages 0 to 3V 0.4V to 2.4V Input and Output Timing Ref. Voltages 1.5V 0.8V and 2V
Figure 3. AC Testing Input Output Waveform
High Speed
3V
1.5V
0V
Standard
2.4V
0.4V
Table 6. Capacitance
Symbol Parameter Test Condition Min Max Unit
C
IN
C
OUT
Note: 1. Sampled only, not 100% tested.
Input Capacitance Output Capacitance V
(1)
(TA=25°C, f = 1 MHz)
2.0V
0.8V
AI01822
Figure 4. AC Testing Load Circuit
1.3V
1N914
3.3k
DEVICE UNDER
TEST
C
L
CL= 30pFfor High Speed CL= 100pF for Standard CLincludes JIG capacitance
V
=0V
IN
=0V 12 pF
OUT
6pF
OUT
AI01823B
System Considerations
The power switching characteristics of Advanced CMOS EPROMs requirecareful decoupling of the devices. The supply current, ICC, has three seg­ments that are of interest to the system designer: the standby current level, the active current level, and transient current peaks that are produced by the fallingand rising edges of E. The magnitude of the transient current peaks is dependent on the capacitive and inductive loading of the device at the output.
The associated transient voltage peaks can be suppressed by complying with the two line output
4/16
control and by properly selected decoupling ca­pacitors. It is recommended that a 0.1µF ceramic capacitor be used on every device between V
CC
and VSS. This should be a high frequency capaci­tor of low inherent inductance and should be placed as close to the device as possible. In addi­tion, a 4.7µF bulk electrolytic capacitor should be used between VCCand VSSfor every eight devic­es. The bulk capacitor should be located near the power supplyconnection point.Thepurposeof the bulk capacitor is to overcome the voltage drop caused by the inductive effects of PCB traces.
M27C2001
Table 7. Read Mode DC Characteristics
(1)
(TA = 0 to 70 °C or –40 to 85 °C; VCC=5V±5% or 5V ± 10%; VPP=VCC)
Symbol Parameter Test Condition Min Max Unit
I
I
I
CC
I
CC1
I
CC2
I V
V
IH
V
Input Leakage Current
LI
Output Leakage Current
LO
Supply Current
I
OUT
0V V
0V V
E=V
Supply Current (Standby)TTL E = V Supply Current (Standby)CMOS Program Current
PP
Input Low Voltage –0.3 0.8 V
IL
(2)
Input High Voltage 2 Output Low Voltage
OL
E>V
I
V
IN
CC
V
OUT
CC
,G=VIL,
IL
= 0mA, f = 5MHz
IH
– 0.2V
CC
V
PP=VCC
= 2.1mA
OL
±10 µA ±10 µA
30 mA
1mA
100 µA
10 µA
V
+1
CC
0.4 V
Output High Voltage TTL IOH= –400µA 2.4 V
V
OH
Output High Voltage CMOS
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
2. Maximum DC voltage on Output is V
Table 8A. Read Mode AC Characteristics
CC
+0.5V.
(1)
I
= –100µAV
OH
CC
– 0.7V
(TA = 0 to 70 °C or –40 to 85 °C; VCC=5V±5% or 5V ± 10%; VPP=VCC)
M27V2001
Symbol Alt Parameter Test Condition
(3)
-55
Min Max Min Max Min Max Min Max
-70 -80 -90
V
V
Unit
Address Valid to
(2)
(2)
t
ACC
Output Valid Chip Enable Low to
t
CE
Output Valid Output Enable Low
t
OE
to Output Valid Chip Enable High to
t
DF
Output Hi-Z Output Enable High
t
DF
to Output Hi-Z Address Transitionto
t
OH
Output Transition
t
AVQV
t
ELQV
t
GLQV
t
EHQZ
t
GHQZ
t
AXQX
Note: 1. VCCmust be applied simultaneously with or before VPPand removed simultaneously or after VPP.
2. Sampled only, not 100% tested.
3. In case of 45ns speed see High Speed AC measurament conditions.
E=V
G=V
G=V
E=V
,G=V
IL
E=V
E=V
,G=V
IL
IL
IL
IL
IL
IL
IL
55 70 80 90 ns
55 70 80 90 ns
30 35 40 40 ns
0 30 0 30 0 30 0 30 ns
0 30 0 30 0 30 0 30 ns
0000ns
5/16
Loading...
+ 11 hidden pages