SGS Thomson Microelectronics M27128A Datasheet
FA ST ACCESS TIME: 200ns
EXTENDED TEMPERATURE RANGE
SINGLE 5 V SUPPLY VOLT AGE
LOW STANDBY CURRE NT: 40mA max
M27128A
NMOS 128K (16K x 8) UV EPROM
TTL COMPATIBLE DURING READ and
PROGRAM
FAST PROGRAMMING ALGORITHM
ELECTRONIC SIGNATURE
PROGRAMMING VOLTAGE: 12V
DESCRIPTION
The M27128A is a 131,072 bit UV erasable and
electrically programmable memory EPROM. It is
organized as 16,384 words by 8 bits.
The M27128A is housed in a 28 Pin Window Ceramic Frit-Seal Dual-in-Line package. The transparent lid allows the user to expose the chip to
ultraviolet light to erase the bit pattern. A new
pattern can then be written to the device by following the programming procedure.
28
1
FDIP28W (F)
Figure 1. Logic Diag ra m
V
CC
14
A0-A13
V
PP
8
Q0-Q7
T able 1. Signal Names
A0 - A13 Address Inputs
Q0 - Q7 Data Outputs
E Chip Enable
G Output Enable
P Program
V
PP
V
CC
V
SS
March 1995 1/10
Program Supply
Supply Voltage
Ground
P
E
G
M27128A
V
SS
AI00769B
M27128A
Tab le 2. Absol ute Maxim u m Ratin gs
Symbol Parameter Value Unit
T
A
T
BIAS
T
STG
V
IO
V
CC
V
A9
V
PP
Note: Except for the rating "Operating T emperature R ange", stresses above those lis ted in the Table "Absolute Maximum Ratings" may cause
permanent damage to the device. These are stress ratings only and opera tion of the device at these or any other conditions above those
indicated in the Operating sections of this specification is not implied. Exposure to Absolute Maximum Rati ng conditions for extended periods
may affect device reliabil ity. Refer also to the SGS-THOMSON SURE Program and other relevant quality documents.
Ambient Operating T empera ture grade 1
grade 6
Temperature Under Bias grade 1
grade 6
Storage Temperature –65 to 125 °C
Input or Output Voltages –0.6 to 6.25 V
Supply Voltage –0.6 to 6.25 V
A9 Voltage –0.6 to 13.5 V
Program Supply –0.6 to 14 V
0 to 70
–40 to 85
–10 to 80
–50 to 95
°C
°C
Figure 2. DIP Pin Connections
V
1
PP
2
A7
3
4
A6
5
A5
A4
6
7
A3
A2
A1
A0
Q0
Q1
Q2
V
SS
8
9
10
11
12
13
14
M27128A
28
27
26
25
24
23
22
21
20
19
18
17
16
15
AI00770
V
CC
PA12
A13
A8
A9
A11
G
A10
E
Q7
Q6
Q5
Q4
Q3
DEVICE OPERATION
The seven modes of operation of the M27128A are
listed in the Operating Modes table. A single 5V
power supply is required in the read mode. All
inputs are TTL lev els except for VPP and 12V on A9
for Electronic Signature.
Read Mode
The M27128A has two control functions, both of
which must be logically satisfied in order to obtain
data at the outputs. Chip Enable (
E) is the power
control and should be used for device selection.
Output Enable (
G) is the output control and should
be used to gate data to the output pins, independent of device selection.
Assuming that the addresses are stable, address
access time (t
output (t
ELQV
the falling edge of
) is equal to the delay from E to
AVQV
). Data is available at the outputs after
G, assuming that E has been low
and the addresses have been stable for at least
t
AVQV-tGLQV
.
Standby Mo de
The M27128A has a standby mode whic h reduces
the maximum active power current from 85mA to
40mA. The M27128A is placed in the standby mode
by applying a TTL high signal to the
E input. Whe n
in the standby mode, the outputs are in a high
impedance state, independent of the
G input.
Two Line Output Control
Because EPROM s are usually used in larger memory arrays, this product features a 2 line control
function which accommodates the use of multiple
memory connection. The two line control function
allows:
a. the lowest possible memory power dissipation,
b. complete assurance t hat output bus co ntention
will not occur.
2/10
M27128A
DEVICE OPER ATION (cont’d)
For the most efficient us e of these two control lines,
E should be decoded and used as the primary
device selecting function, while
G should be made
a common connection to all devices in the array
and connected to the
READ line from the system
control bus.
This ensures that all deselected memory devices
are in their low power standby mode and that the
output pins are only active when data is requi red
from a particular memory device.
System Considerati ons
The power switching characteristics of fast
EPROMs require careful decoupling of the devices.
The supply current, I
, has three segments that
CC
are of interest to the system designer: the standby
current level, the active c urrent level, and transient
current peaks that are produced by the falling and
rising edges of
E. The magnitude of this transient
current peaks is dependent on the capacitive and
inductive loading of the device at the output. The
associated transient voltage peaks can be suppressed by complying with the two line output
control and by properly selected decoupling capacitors. It is recommended that a 1µF ceramic
capacitor be used on every device between V
CC
and VSS. This should be a high frequency capacitor
of low inherent inductance and should be placed
as close to the device as possible. In addition, a
4.7µF bulk electrolytic capacitor should be used
between V
and GND for ev ery eight devices. T he
CC
bulk capacitor should be located near the power
supply connection point. The purpose of the bulk
capacitor is to overcome the voltage drop caused
by the inductive effects of PCB trac es.
Programming
When delivered (and after each erasure for UV
EPPROM), all bits of the M27128A are in the “1"
state. Data is introduced by selectively programming ”0s" into the desired bit locations. Although
only “0s” will be programmed, both “1s” and “0s”
can be present in the data word. The only way to
change a “0" to a ”1" is by ultraviolet light erasure.
The M27128A is in the programming mode when
input is at 12.5V and E and P are at TTL low.
V
PP
The data to be programmed is applied 8 bits in
parallel, to the data output pins. The lev els required
for the address and data inputs are TTL.
Fast Programmi ng Al gor ithm
Fast Programming Algorithm rapidly programs
M27128A EPROMs using an efficient and reliable
method suited to the production programming environment. Programming reliability is also ensured
as the incremental program margin of each byte is
Table 3. Operating Modes
Mode E G PA9VPPQ0 - Q7
Read V
Output Disable V
Program V
Verify V
Program Inhibit V
Standby V
Electronic Signature V
Note: X = VIH or VIL, VID = 12V ± 0.5%.
IL
IL
IL
IL
IH
IH
IL
V
IL
V
IH
V
IH
V
IL
XXXVPPHi-Z
XXXVCCHi-Z
V
IL
V
IH
V
IH
VIL Pulse X V
V
IH
V
IH
XVCCData Out
XVCCHi-Z
XVPPData Out
V
ID
PP
V
CC
T ab le 4. Electron ic Sig natu r e
Identifier A0 Q7 Q6 Q5 Q4 Q3 Q2 Q1 Q0 Hex Data
Manufacturer’s Code V
Device Code V
IL
IH
00100000 20h
10001001 89h
Data In
Codes Out
3/10
Loading...