SANYO LC75808E Datasheet

Ordering number : ENN6370A

31000RM (OT)/12800RM No. 6370 -1/39

Overview

The LC75808E and LC75808W are 1/8 to 1/10 duty LCD
display drivers that can directly drive up to 600 segments
and can control up to four general-purpose output ports.
These products also incorporate a key scan circuit that
accepts input from up to 30 keys to reduce printed circuit
board wiring.

Features

• Key input function for up to 30 keys (A key scan is

performed only when a key is pressed.)

• 1/8duty–1/4bias, 1/9duty–1/4bias, and 1/10duty–1/4bias

drive schemes can be controlled from serial data.

1/8duty–1/4bias: up to 480 segments
1/9duty–1/4bias: up to 540 segments
1/10duty–1/4bias: up to 600 segments

• Sleep mode and all segments off functions that are

controlled from serial data.

• Serial data I/O supports CCB format communication

with the system controller.

• Direct display of display data without the use of a

decoder provides high generality.

• Built-in display contrast adjustment circuit.

• Up to 4 general-purpose output ports are included.

• Independent LCD driver block power supply V

LCD

.

• Provision of an on-chip voltage-detection type reset

circuit prevents incorrect displays.

• The INH pin is provided. This pin turns off the display,

disables key scanning, and forces the general-purpose
output ports to the low level.

• RC oscillator circuit.

Package Dimensions

unit: mm

3151-QFP100E

unit: mm

3181B-SQFP100

21.6

0.8

3.0max

1.6

17.2

0.825

130

31

50

51

80

81

1.6

0.575

0.575

0.15

2.7

15.6

0.3

20.0

23.2

14.0

0.65

0.825

100

0.8

0.65

0.1

SANYO: QFP100E

[LC75808E]

0.2

1.0

1.0

16.0

14.0

0.5

16.0

14.0

0.5

1.0

1.0

0.145

1.4

1.6max

0.5 0.5

100

125

26

50

5175

76

0.1

SANYO: SQFP100

[LC75808W]

LC75808E, 75808W

SANYO Electric Co.,Ltd. Semiconductor Company

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN

1/8 to 1/10 Duty LCD Display Drivers

with Key Input Function

CMOS IC

Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.

SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.

• CCB is a trademark of SANYO ELECTRIC CO., LTD.

• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.

No. 6370 -2/39

LC75808E, 75808W

Pin Assignment

No. 6370 -3/39

LC75808E, 75808W

Parameter Symbol Conditions Ratings Unit

Maximum supply voltage

V

DD

max V

DD

–0.3 to +7.0 V

V

LCD

max V

LCD

–0.3 to +12.0

V

IN

1 CE, CL, DI, INH –0.3 to +7.0

Input voltage V

IN

2 OSC, KI1 to KI5, TEST –0.3 to VDD+0.3 V

V

IN

3V

LCD

1, V

LCD

2, V

LCD

3, V

LCD

4 –0.3 to V

LCD

+0.3

V

OUT

1 DO –0.3 to +7.0

Output voltage V

OUT

2 OSC, KS1 to KS6, P1 to P4 –0.3 to VDD+0.3 V

V

OUT

3V

LCD

0, S1 to S60, COM1 to COM10 –0.3 to V

LCD

+0.3

I

OUT

1 S1 to S60 300 µA

Output current

I

OUT

2 COM1 to COM10 3

I

OUT

3 KS1 to KS6 1 mA

I

OUT

4 P1 to P4 5
Allowable power dissipation Pd max Ta = 85°C 200 mW
Operating temperature Topr –40 to +85 °C
Storage temperature Tstg –55 to +125 °C

Specifications

Absolute Maximum Ratings at Ta=25°C, VSS=0V

Parameter Symbol Conditions

Ratings

Unit

min typ max

V

DDVDD

4.5 6.0

V

LCD

, When the display contrast adjustment 7.0 11.0

Supply voltage

V

LCD

circuit is used V
V

LCD

, When the display contrast adjustment 4.5 11.0

circuit is not used

Output voltage V

LCD

0V

LCD

0

V

LCD

4 + 4.5

V

LCD

V

V

LCD

1V

LCD

1

3/4

V

LCD

0

(V

LCD

0–V

LCD

4)

V

LCD

2V

LCD

2

2/4

V

LCD

0

Input voltage

(V

LCD

0–V

LCD

4)

V

V

LCD

3V

LCD

3

1/4

V

LCD

0

(V

LCD

0–V

LCD

4)

V

LCD

4V

LCD

4 0 1.5

Input high level voltage

V

IH

1 CE, CL, DI, INH 0.8 V

DD

6.0
V

V

IH

2 KI1 to KI5 0.6 V

DD

V

DD

Input low level voltage V

IL

CE, CL, DI, INH, KI1 to KI5 0 0.2 V

DD

V

Recommended external resistance R

OSC

OSC 43 kΩ

Recommended external capacitance C

OSC

OSC 680 pF

Guaranteed oscillation range f

OSC

OSC 25 50 100 kHz

Data setup time t

ds

CL, DI :Figure 2 160 ns

Data hold time t

dh

CL, DI :Figure 2 160 ns

CE wait time t

cp

CE, CL :Figure 2 160 ns

CE setup time t

cs

CE, CL :Figure 2 160 ns

CE hold time t

ch

CE, CL :Figure 2 160 ns

High level clock pulse width tø

H

CL :Figure 2 160 ns

Low level clock pulse width tø

L

CL :Figure 2 160 ns

DO output delay time t

dc

DO, RPU= 4.7 kΩ, CL= 10 pF *1:Figure 2 1.5 µs

DO rise time t

dr

DO, RPU= 4.7 kΩ, CL= 10 pF *1:Figure 2 1.5 µs

Allowable Operating Ranges at Ta = –40 to +85°C, VSS=0V

Note: *1. Since DO is an open-drain output, these values depend on the resistance of the pull-up resistor RPUand the load capacitance CL.

No. 6370 -4/39

LC75808E, 75808W

Parameter Symbol Conditions

Ratings

Unit

min typ max

Hysteresis V

H

CE, CL, DI, INH, KI1 to KI5 0.1 V

DD

V

Power-down detection voltage V

DET

2.5 3.0 3.5 V

Input high level current I

IH

CE, CL, DI, INH: VI= 6.0 V 5.0 µA

Input low level current I

IL

CE, CL, DI, INH: VI= 0 V –5.0 µA

Input floating voltage V

IF

KI1 to KI5 0.05 V

DD

V

Pull-down resistance R

PD

KI1 to KI5: VDD= 5.0 V 50 100 250 kΩ

Output off leakage current I

OFFH

DO: VO = 6.0 V 6.0 µA

V

OH

1 S1 to S60: IO= –20 µA

V

LCD

0 – 0.6

Output high level voltage

V

OH

2 COM1 to COM10: IO= –100 µA

V

LCD

0 – 0.6

V

V

OH

3 KS1 to KS6: IO= –500 µA VDD– 1.0 VDD– 0.5 VDD– 0.2

V

OH

4 P1 to P4: IO= –1 mA VDD– 1.0

V

OL

1 S1 to S60: IO= 20 µA

V

LCD

4 + 0.6

VOL2 COM1 to COM10: IO= 100 µA

V

LCD

4 + 0.6

Output low level voltage VOL3 KS1 to KS6: IO= 25 µA 0.2 0.5 1.5 V

V

OL

4 P1 to P4: IO= 1 mA 1.0

V

OL

5 DO: IO= 1mA 0.1 0.5

2/4 2/4

V

MID

1 S1 to S60: IO= ±20 µA

(VLCD0 – VLCD4) (VLCD0 – VLCD4)

–0.6 +0.6
3/4 3/4

Output middle level voltage *2 V

MID

2 COM1 to COM10: IO= ±100 µA

(VLCD0 – VLCD4) (VLCD0 – VLCD4)

V

–0.6 +0.6
1/4 1/4

V

MID

3 COM1 to COM10: IO= ±100 µA

(VLCD0 – VLCD4) (VLCD0 – VLCD4)

–0.6 +0.6

Oscillator frequency fosc OSC: R

OSC

= 43 kΩ, C

OSC

= 680 pF 40 50 60 kHz

I

DD

1VDD:Sleep mode 100

I

DD

2VDD: VDD= 6.0 V, outputs open,fosc = 50 kHz 250 500

I

LCD

1V

LCD

: Sleep mode 5

V

LCD

: V

LCD

= 11.0 V

Current drain I

LCD

2

Outputs open

500 1000 µA

fosc = 50 kHz
(When the display contrast adjustment circuit is used.)

V

LCD

: V

LCD

= 11.0 V

Outputs open

I

LCD

3 fosc = 50 kHz 250 500

(When the display contrast adjustment circuit is not
used.)

Electrical Characteristics for the Allowable Operating Ranges

Note: *2. Excluding the bias voltage generation divider resistor built into V

LCD

0, V

LCD

1, V

LCD

2 , V

LCD

3, and V

LCD

4. (See Figure 1.)

No. 6370 -5/39

LC75808E, 75808W

Figure 1

1. When CL is stopped at the low level

Figure 2

2. When CL is stopped at the high level

To the common and segment drivers

Excluding these resistors.

No. 6370 -6/39

LC75808E, 75808W

Block Diagram

No. 6370 -7/39

LC75808E, 75808W

Pin

Pin No.

Function Active I/O

Handling

LC75808E LC75808W

when unused

S1 to S60 3 to 62 1 to 60 Segment driver outputs. — ●● OPEN

COM1 to COM10

72 to 63 70 to 61 Common driver outputs. — ●● OPEN

KS1 to KS6 73 to 78 71 to 76 — O OPEN

KI1 to KI5 79 to 83 77 to 81

Key scan inputs.

H I GND

These pins have built-in pull-down resistors.

P1 to P4 84 to 87 82 to 85 General-purpose output ports. — ●● OPEN

OSC 97 95 — I/O V

DD

CE 100 98 HI
CL 1 99 I GND

DI 2 100 —I

DO 99 97 — O OPEN

INH 98 96 LI V

DD

TEST 96 94 This pin must be connected to ground. — I —

V

LCD

090 88 — 0 OPEN

V

LCD

191 89 — I OPEN

V

LCD

292 90 — I OPEN

V

LCD

393 91 — I OPEN

V

LCD

494 92 — I GND

V

DD

88 86 —— —

V

LCD

89 87 —— —

V

SS

95 93 Power supply connection. Connect to ground. — — —

Pin Functions

Key scan outputs.
Although normal key scan timing lines require diodes to be inserted in
the timing lines to prevent shorts, since these outputs are unbalanced
CMOS transistor outputs, these outputs will not be damaged by shorting
when these outputs are used to form a key matrix.

Oscillator connection.
An oscillator circuit is formed by connecting an external resistor and
capacitor at this pin.

Serial data interface connections to the controller. Note that DO, being
an open-drain output, requires a pull-up resistor.
CE :Chip enable
CL :Synchronization clock
DI :Transfer data
DO :Output data

▲

Input that turns the display off, disables key scanning, and forces the
general-purpose output ports low.

• When INH is low (V

SS

):

• Display off
S1 to S60 = “L” (V

LCD

4).

COM1 to COM10 = “L” (V

LCD

4).

• General-purpose output ports P1 to P4 = low (V

SS

)

• Key scanning is disabled: KS1 to KS6 = low (V

SS

)

• All the key data is reset to low.

• When INH is high (V

DD

):

• Display on

• The states of the general-purpose output ports can be set by
the PC1 to PC4 control data.

• Key scanning is enabled.

However, serial data can be transferred when the INH pin is low.

LCD drive 3/4 bias voltage (middle level) supply pin. This pin can be
used to supply the 3/4 (V

LCD

0 – V

LCD

4) voltage level externally.

LCD drive 2/4 bias voltage (middle level) supply pin. This pin can be
used to supply the 2/4 (V

LCD

0 – V

LCD

4) voltage level externally.

LCD drive 1/4 bias voltage (middle level) supply pin. This pin can be
used to supply the 1/4 (V

LCD

0 – V

LCD

4) voltage level externally.

LCD drive 0/4 bias voltage (low level) supply pin. Fine adjustment of the
display contrast can be implemented by connecting an external variable
resistor to this pin.
However, (V

LCD

0 – V

LCD

4) must be greater than or equal to 4.5 V, and

V

LCD

4 must be in the range 0 V to 1.5 V, inclusive.

Logic block power supply connection. Provide a voltage of between 4.5
and 6.0V.

LCD driver block power supply connection. Provide a voltage of between

7.0 and 11.0 V when the display contrast adjustment circuit is used and
provide a voltage of between 4.5 and 11.0 V when the circuit is not used.

LCD drive 4/4 bias voltage (high level) supply pin. The level on this pin
can be changed by the display contrast adjustment circuit.
However, (V

LCD

0 – V

LCD

4) must be greater than or equal to 4.5 V.

Also,external power must not be applied to this pin since the pin circuit
includes the display contrast adjustment circuit.

No. 6370 -8/39

LC75808E, 75808W

Serial Data Input

1. 1/8 duty

① When CL is stopped at the low level.

• When the display data is transferred.

• When the control data is transferred.

Note: B0 to B3,A0 to A3

........

CCB address

DD

................................

Direction data

Display data Fixed data

Display data

Fixed data

Display data

Fixed data

Display data

Fixed data

Control data

No. 6370 -9/39

LC75808E, 75808W

② When CL is stopped at the high level.

• When the display data is transferred.

Note: B0 to B3,A0 to A3

........

CCB address

DD

................................

Direction data

• CCB address: ....42H

• D1 to D480: ........ Display data

• KC1 to KC6: ........ Key scan output state setting data

• PC1 to PC4: ........ General-purpose output port state setting data

• CT0 to CT3, CTC: Display contrast setting data

• SC: ...................... Segment on/off control data

• SP: ...................... Normal mode/sleep mode control data

• DT1, DT2:............ Display technique setting data

• When the control data is transferred.

Control data

Display data

Fixed data

Display data

Fixed data

Display data Fixed data

Display data Fixed data

No. 6370 -10/39

LC75808E, 75808W

2. 1/9 duty

① When CL is stopped at the low level.

• When the display data is transferred.

• When the control data is transferred.

Note: B0 to B3,A0 to A3

........

CCB address

DD

................................

Direction data

Display data

Fixed data

Display data

Fixed data

Display data

Fixed data

Display data

Fixed data

Control data

No. 6370 -11/39

LC75808E, 75808W

② When CL is stopped at the high level.

• When the display data is transferred.

Note: B0 to B3,A0 to A3

........

CCB address

DD

................................

Direction data

• CCB address:...... 42H

• D1 to D540: ........ Display data

• KC1 to KC6: ........ Key scan output state setting data

• PC1 to PC4: ........ General-purpose output port state setting data

• CT0 to CT3, CTC: Display contrast setting data

• SC: ...................... Segment on/off control data

• SP: ...................... Normal mode/sleep mode control data

• DT1, DT2:............ Display technique setting data

• When the control data is transferred.

Display data

Fixed data

Display data

Fixed data

Display data

Fixed data

Display data

Fixed data

Control data

No. 6370 -12/39

LC75808E, 75808W

3. 1/10 duty

① When CL is stopped at the low level.

• When the display data is transferred.

• When the control data is transferred.

Note: B0 to B3,A0 to A3

........

CCB address

DD

................................

Direction data

Display data

Fixed data

Display data

Fixed data

Display data

Fixed data

Display data

Fixed data

Control data