SANYO LC72121 Datasheet

Overview
The LC72121 and the LC72121M and the LC72121V are high input sensitivity (20 mVrms at 130 MHz) PLL frequency synthesizers for 3 V systems. These ICs are serial data (CCB) compatible with the LC72131, and feature the improved input sensitivity and lower spurious radiation (provided by a redesigned ground system) required in high-performance AM/FM tuners.
Functions
• High-speed programmable divider — FMIN: 10 to 160 MHz ... Pulse swallower technique
(With built-in divide-by-2 prescaler)
— AMIN: 2 to 40 MHz ... Pulse swallower technique
0.5 to 10 MHz ... Direct division technique
• IF counter — IFIN: 0.4 to 12 MHz ... For AM and FM IF counting
• Reference frequency — One of 12 reference frequencies can be selected
(using a 4.5 or 7.2 MHz crystal element) 1, 3, 5, 9, 10, 3.125, 6.25, 12.5, 15, 25, 50, or 100 kHz
• Phase comparator — Supports dead zone control. — Built-in unlocked state detection circuit — Built-in deadlock clear circuit
• An MOS transistor for an active low-pass filter is built in.
• I/O ports — Output-only ports: 4 pins — I/O ports: 2 pins — Supports the output of a clock time base signal.
• Operating ranges — Supply voltage: 2.7 to 3.6 V — Operating temperature: – 40 to 85°C
• Package — DIP22S, MFP24S, SSOP24
• Comparison with the LC72131/M — Serial data compatible (CCB) — Identical pin functions — Two VSSpins were added. — The DIP version is pin compatible (VSSpins were
inserted as the DIP22S NC pins.)
— The MFP product provides a modified pin
assignment (The MFP20 package was replaced by an MFP24 package, and extra VSSpins were added.)
— The SSOP24 is a newly developed package that has
the same pin assignment as the MFP24S product.
CMOS IC
70398RM (OT) No. 5815-1/22
Preliminary
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
PLL Frequency Synthesizers for Electronic Tuning
LC72121, 72121M, 72121V
Ordering number : EN*5815A
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus addresses are controlled by SANYO.
Package Dimensions
unit: mm
3059-DIP22S
unit: mm
3112-MFP24S
unit: mm
3175A-SSOP24
No. 5815-2/22
LC72121, 72121M, 72121V
SANYO: DIP22S
[LC72121]
SANYO: MFP24S
[LC72121M]
SANYO: SSOP24
[LC72121V]
Pin Assignments
Top view
No. 5815-3/22
LC72121, 72121M, 72121V
Block Diagram
No. 5815-4/22
LC72121, 72121M, 72121V
Parameter Symbol Conditions Ratings Unit
Maximum supply voltage V
DD
max V
DD
–0.3 to +7.0 V
V
IN
1 max CE, DI, CL, AIN –0.3 to +7.0 V
Maximum input voltage V
IN
2 max XIN, FMIN, AMIN, IFIN –0.3 to VDD+0.3 V
V
IN
3 max IO1, IO2 –0.3 to +15 V
V
O
1 max DO –0.3 to +7.0 V
Maximum output voltage V
O
2 max XOUT, PD –0.3 to VDD+0.3 V
V
O
3 max BO1 to BO4, IO1, IO2, AOUT –0.3 to +15 V
Maximum output current
I
O
1 max DO, AOUT 0 to +6.0 mA
I
O
2 max BO1 to BO4, IO1, IO2 0 to +10.0 mA
DIP22S: 350 mW
Allowable power dissipation Pd max (Ta 85°C) MFP24S: 200 mW
SSOP24: 150 mW Operating temperature Topr –40 to +85 °C Storage temperature Tstg –55 to +125 °C
Specifications
Absolute Maximum Ratings at Ta = 25°C, V
SSd
= V
SSa
= V
SSX
= 0 V
Parameter Symbol Conditions
Ratings
Unit
min typ max
Supply voltage V
DDVDD
2.7 3.6 V
Input high-level voltage
V
IH
1 CE, DI, CL 0.7 V
DD
6.5 V
V
IH
2 IO1, IO2 0.7 V
DD
13 V
Input low-level voltage V
IL
CE, DI, CL, IO1, IO2 0 0.3 V
DD
V
Output voltage
V
O
1 DO 0 6.5 V
V
O
2 BO1 to BO4, IO1, IO2, AOUT 0 13 V
f
IN
1 XIN: VIN1 1 8 MHz
f
IN
2 FMIN: VIN2 10 160 MHz
Input frequency f
IN
3 AMIN (SNS = 1): VIN3 2 40 MHz
f
IN
4 AMIN (SNS = 0): VIN4 0.5 10 MHz
f
IN
5 IFIN: VIN5 0.4 12 MHz
V
IN
1 XIN: fIN1 200 800 mVrms
V
IN
2-1 FMIN: f = 10 to 130 MHz 20 800 mVrms
V
IN
2-2 FMIN: f = 130 to 160 MHz 40 800 mVrms
Input amplitude V
IN
3 AMIN (SNS = 1): fIN3 40 800 mVrms
V
IN
4 AMIN (SNS = 0): fIN4 40 800 mVrms
V
IN
5-1 IFIN: fIN5, IFS = 1 40 800 mVrms
V
IN
5-2 IFIN: fIN5, IFS = 0 70 800 mVrms
Guaranteed crystal oscillator frequency Xtal
XIN, XOUT: *1 4.5 MHz XIN, XOUT: *2 7.2 MHz
Allowable Operating Ranges at Ta = – 40 to +85°C, V
SSd
= V
SSa
= V
SSX
= 0 V
Notes: 1. Recommended value for CI for the crystal oscillator element: CI < 120
2. Recommended value for CI for the crystal oscillator element: CI < 70
Parameter Symbol Conditions
Ratings
Unit
min typ max
Rf1 XIN 1 M
Internal feedback resistance
Rf2 FMIN 500 k Rf3 AMIN 500 k Rf4 IFIN 250 k
Internal pull-down resistance
Rpd1 FMIN 100 200 400 k Rpd2 AMIN 100 200 400 k
Hysteresis V
HIS
CE, DI, CL 0.1 V
DD
V
Output high-level voltage V
OH
1 PD: IO= –1 mA VDD– 1.0 V
Electrical Characteristics in the Allowable Operating Ranges
Continued on next page.
No. 5815-5/22
LC72121, 72121M, 72121V
Parameter Symbol Conditions
Ratings
Unit
min typ max
V
OL
1 PD: IO= 1 mA 1.0 V
V
OL
2
BO1 to BO4, IO1, IO2: I
O
= 1 mA 0.2 V
Output low-level voltage BO1 to BO4, IO1, IO2: I
O
= 8 mA 1.6 V
V
OL
3 DO: IO= 5 mA 1.0 V
V
OL
4 AOUT: IO= 1 mA, AIN = 1.3 V 0.5 V
I
IH
1 CE, DI, CL: VI= 6.5 V 5.0 µA
I
IH
2 IO1, IO2: VI= 13 V 5.0 µA
Input high-level current
I
IH
3 XIN: VI= V
DD
1.3 8 µA
I
IH
4 FMIN, AMIN: VI= V
DD
2.5 15 µA
I
IH
5 IFIN: VI= V
DD
5.0 30 µA
I
IH
6 AIN: VI= 6.5 V 200 nA
I
IL
1 CE, DI, CL: VI= 0 V 5.0 µA
I
IL
2 IO1, IO2: VI= 0 V 5.0 µA
Input low-level current
I
IL
3 XIN: VI= 0 V 1.3 8 µA
I
IL
4 FMIN, AMIN: VI= 0 V 2.5 15 µA
I
IL
5 IFIN: VI= 0 V 5.0 30 µA
I
IL
6 AIN: VI= 0 V 200 nA
Output off leakage current
I
OFF
1 BO1 to BO4, IO1, IO2, AOUT: VO= 13 V 5.0 µA
I
OFF
2 DO: VO= 6.5 V 5.0 µA
High-level 3-state off leakage current I
OFFH
PD: VO= V
DD
0.01 200 nA
Low-level 3-state off leakage current I
OFFL
PD: VO= 0 V 0.01 200 nA
Input capacitance C
IN
FMIN 6 pF
I
DD
1
V
DD
: Xtal = 7.2 MHz, fIN2 = 130 MHz,
2.5 6 mA
V
IN
2 = 20 mVrms
Supply current
V
DD
: PLL block stopped (PLL inhibit mode)
I
DD
2 Crystal oscillator operating 0.3 mA
(crystal frequency: 7.2 MHz)
I
DD
3
V
DD
: PLL block stopped, crystal oscillator 10 µA
stopped
Continued from preceding page.
Pin Descriptions
Pin
Pin No.
Type Function Equivalent circuit
name
LC72121
Xtal • Crystal oscillator element connections (4.5 or 7.2 MHz)
XIN
XOUT
1
22
1
24
LC72121M LC72121V
Local oscillator signal input
• FMIN is selected when DVS in the serial data is set to 1.
• Input frequency: 10 to 160 MHz
• The signal is passed through an internal divide-by-two prescaler and then input to the swallow counter.
• The divisor can be set to a value in the range 272 to 65535. Since the internal divide-by-two prescaler is used, the actual divisor will be twice the set value.
FMIN 16 17
Local oscillator signal input
• AMIN is selected when DVS in the serial data is set to 0.
• When SNS in the serial data is set to 1:
• Input frequency: 2 to 40 MHz
• The signal is input to the swallow counter directly.
• The divisor can be set to a value in the range 272 to 65535. The set value becomes the actual divisor.
• When SNS in the serial data is set to 0:
• Input frequency: 0.5 to 10 MHz
• The signal is input to a 12-bit programmable divider directly.
• The divisor can be set to a value in the range 4 to 4095. The set value becomes the actual divisor.
AMIN 15 16
Continued on next page.
No. 5815-6/22
LC72121, 72121M, 72121V
Continued from preceding page.
Pin
Pin No.
Type Function Equivalent circuit
name
LC72121
Chip enable
• This pin must be set high to enable serial data input (DI) or serial data output (DO).
CE 3 3
LC72121M LC72121V
Input data • Input for serial data transferred from the controllerDI 4 4
Clock
• Clock used for data synchronization for serial data input (DI) and serial data output (DO).
CL 5 5
Output data
• Output for serial data transmitted to the controller. The content of the data transmitted is determined by DOC0 through DOC2.
DO 6 6
Power supply
• LC72121 power supply (V
DD
2.7 to 3.6 V)
• The power on reset circuit operates when power is first applied.
——
V
DD
17 18
Ground • Ground for the crystal oscillator circuit ——
V
SSX
2 2
Ground • Ground for the low-pass filter MOS transistor ——
V
SSa
21 22
Ground
• Ground for the LC72121 digital systems other than those that use V
SSa
or V
SSX
.
——
V
SSd
14 15
I/O port
• Shared function I/O ports
• The pin function is determined by IOC1 and IOC2 in the serial data. When the data value 0: Input port When the data value 1: Output port
• When specified to function as an input port: The input pin state is reported to the controller through the DO pin. When the input state is low: The data will be 0: When the input state is high: The data will be 1:
• When specified to function as an output port: The output state is determined by IO1 and IO2 in the serial data. When the data value is 0: The output state will be the open circuit state. When the data value is 1: The output state will be a low level.
• These pins are set to input mode after a power on reset.
IO1 IO2
11 13
11 14
Output port
• Output-only ports
• The output state is determined by BO1 through BO4 in the serial
data. When the data value is 0: The output state will be the open circuit state. When the data value is 1: The output state will be a low level.
• A time base signal (8 Hz) is output from BO1 when TBC in the serial
data is set to 1.
BO1 BO2 BO3 BO4
7 8 9
10
7 8 9
10
Charge pump output
• PLL charge pump output
A high level is output when the frequency of the local oscillator signal divided by N is higher than the reference frequency, and a low level is output when that frequency is lower. This pin goes to the high­impedance state when the frequencies match.
PD 18 19
Low-pass filter amplifier transistor
• Connections for the MOS transistor used for the PLL active low-pass
filter.
AIN
AOUT
19 20
20 21
IF counter
• The input frequency range is 0.4 to 12 MHz
• The signal is passed directly to the IF counter.
• The result is output, MSB first, through the DO pin.
• Four measurement periods are supported: 4, 8, 32, and 64 ms.
IFIN 12 13
12 23
NC NC pin • No connection
——
Procedures for Input and Output of Serial Data
This product uses the CCB (Computer Control Bus), which is Sanyo’s audio product serial bus format, for data input and output. This product adopts an 8-bit address CCB format.
No. 5815-7/22
LC72121, 72121M, 72121V
I/O mode
Address
Function
B0 B1 B2 B3 A0 A1 A2 A3
• Control data input (serial data input) mode
1 IN1 (82) 0 0 0 1 0 1 0 0
• 24 bits of data are input.
• See the “DI Control Data (serial data input)” section for details on the content of the input data.
• Control data input (serial data input) mode
2 IN2 (92) 1 0 0 1 0 1 0 0
• 24 bits of data are input.
• See the “DI Control Data (serial data input)” section for details on the content of the input data.
• Data output (serial data output) mode
3 OUT (A2) 0 1 0 1 0 1 0 0
• The number of bits output is equal to the number of clock cycles.
• See the “DO Control Data (serial data output)” section for details on the content of the output data.
CL: Normally high CL: Normally low
I/O mode determined
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