SANYO LC7150 Datasheet

Ordering number: EN1634G
CMOS LSI
LC7150
FCC 10-Channel Standard PLL For Cordless
Telephone
Functions
.
On-chip PLL for transmission/reception
.
On-chip digital unlock detector (only PLL for transmission)
.
5.0 kHz/4.4 kHz output pins for guard tone
.
Standby function
.
Package Dimensions
unit : mm
3007A-DIP18
[LC7150]
LC7150: With (for mechanical switch) LC7151: Without (for microcontroller)
SANYO : DIP18
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS=0V
Parameter Symbol Conditions Ratings Unit Maximum supply voltage V Maximum input voltage V
Maximum output voltage
Output current I Allowable power dissipation Pd max Ta % 75°C 350 mW Operating temperature Topr –30 to +75 °C Storage temperature Tstg –40 to +125 °C
max –0.3 to +6.5 V
DD
max All input pins –0.3 to VDD+0.3 V
I
V
1 max F1,F2 Output OFF –0.3 to +6.5 V
O
V
2 max Output pins other than VO1 –0.3 to VDD+0.3 V
O
OUT
F1,F2, LDT 0 to 3.0 mA
Allowable Operating Conditions at Ta = 25°C, VSS=0V
Parameter Symbol Conditions min typ max Unit Supply voltage V Input high-level voltage V Input low-level voltage V Input high-level voltage V Input low-level voltage V
Input frequency
Input amplitude
DD
1 D1 to D4, SB 0.7 V
IH
1 D1 to D4, SB 0 0.3V
IL
2 R/B 0.9 V
IH
2 R/B 0 0.1V
IL
f
1 PIT; VIN= 0.15 Vrms 10 27 MHz
IN
f
2 PIR; VIN= 0.15 Vrms 30 42 MHz
IN
f
3 XIN; VIN= 0.3 Vrms 5.0 10.24 11.0 MHz
IN
V
1 PIT; fIN= 27 MHz 0.15 0.3V
IN
V
2 PIR; fIN= 42 MHz 0.15 0.3V
IN
V
3 XIN; fIN= 11 MHz 0.3 0.3V
IN
3.0 5.5 V
DD
DD
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
O3096HA(II)/11393JN/6297TA/7245KI/7104KI,TS No.1634-1/5
V
DD
DD
V
DD
DD
DD DD DD
V V V V
Vrms Vrms Vrms
LC7150
Electrical Characteristics at Ta = 25°C, under Allowable Operating Conditions
Parameter Symbol Conditions min typ max Unit Input high-level current I Input low-level current I Input high-level current I Input low-level current I Input high-level current I Input low-level current I Input pull-down resistance Rd D1 to D4 10 20 40 k Input floating voltage V
Feedback resistance Output high-level voltage V
Output low-level voltage V Output OFF leak current Ioff1 PDT,PDR; V Output high-level voltage V Output OFF leak current Ioff2 LDT; Output OFF V Output low-level voltage V Output OFF leak current Ioff3 F1,F2; Output OFF V
Supply current
(Note) Power supply VDD–VSS: Insert a capacitor of 2000 pF or greater.
1 XIN; VI=V
IH
1 XIN; VI=V
IL
2 PIT, PIR; VI=V
IH
2 PIT, PIR; VI=V
IL
3 SB,R/B; VI=V
IH
3 SB, R/B; VI=V
IL
D1 to D4; Open 0.1V
IF
Rf1 XIN; V Rf2 PIT, PIR; V
1 PDT, PDR; IO= 0.5mA VDD–1.0 V
OH
1 PDT, PDR; VO= 0.5 mA 1.0 V
OL
2 LDT; IO=1mA VDD–1.0 V
OH
2 F1,F2; IO=1mA 1.0 V
OL
I
1 (C3) VDD= 3.0 V 4 mA
DD
I
2 (C3) VDD= 4.5 V 7 mA
DD
I
3 (C3) VDD= 5.5 V 13 mA
DD
I
4 (C2) VDD= 3.0 V 3 mA
DD
I
5 (C2) VDD= 4.5 V 5 mA
DD
I
6 (C2) VDD= 5.5 V 10 mA
DD
DD SS
DD SS
DD
SS
= 4.3 V 1.0 M
DD
= 4.3 V 0.5 M
DD
O=VDD/VSS
O=VSS
O
= 5.5 V 5.0 µA
0.01 1.0 nA
20 µA 20 µA 40 µA 40 µA 10 µA 10 µA
DD
5.0 µA
(C3): XIN = 10.24 MHz, xtal connected
PIT = 27 MHz 150 mVrms PIR = 42 MHz 150 mVrms R/B= V
,SB=VDD, Other pin open
DD
(C2): XIN = 10.24 MHz, xtal connected
PIR = 42 MHz, 150 mVrms R/B= V
,SB=VSS, Other pin open
DD
V
Pin Assignment
Top view
No.1634-2/5
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