Samsung S3C7335, S3P7335 Datasheet
S3C7335/P7335 PRODUCT OVERVIEW
1 PRODUCT OVERVIEW
OVERVIEW
The S3C7335 single-chip CMOS microcontroller has been designed for high performance using Samsung's
newest 4-bit CPU core, SAM47 (Samsung Arrangeable Microcontrollers).
With features such as LCD direct drive capability, 4-channel A/D converter, 8-bit timer/counter, watch timer and
PLL frequency synthesizer, it offers you an excellent design solution for a wide variety of applications that require
LCD functions and audio applications.
Up to 56 pins of the 80-pin QFP package, it can be dedicated to I/O. Eight vectored interrupts provide fast
response to internal and external events. In addition, the S3C7335's advanced CMOS technology provides for
low power consumption and a wide operating voltage range.
OTP
The S3C7335 microcontroller is also available in OTP (One Time Programmable) version, S3P7335. The
S3P7335 microcontroller has an on-chip 16-Kbyte one-time-programmable EPROM instead of masked ROM.
The S3P7335 is comparable to S3C7335, both in function and in pin configuration.
1-1
PRODUCT OVERVIEW S3C7335/P7335
FEATURES
Memory
• 512-nibble RAM
• 16K-byte ROM
I/O Pins
• Input only: 4 pins
• Output only: 28 pins
• I/O: 24 pins
LCD Controller/Driver
• Maximum 14-digit LCD direct drive capability
• 28 segment x 4 common signals
• Display modes: Static, 1/2 duty (1/2 bias)
1/3 duty (1/2 or 1/3 bias), 1/4 duty (1/3 bias)
8-Bit Basic Timer
• Programmable interval timer functions
• Watch-dog timer function
A/D Converter
• 4-channels with 8-bit resolution
Bit Sequential Carrier Buffer
• Support 16-bit serial data transfer in arbitrary
format
PLL Frequency Synthesizer
• Level = 300 mVp-p (min)
• AMVCO range = 0.5 MHz to 30 MHz
• FMVCO range = 30 MHz to 150 MHz
16-Bit Intermediate Frequency (IF) Counter
• Level = 300 mVp-p (min)
• AMIF range = 100 kHz to 1 MHz
• FMIF range = 5 MHz to 15 MHz
8-Bit Timer/Counter
• Programmable 8-bit timer
• External event counter
• Arbitrary clock frequency output
• External clock signal divider
• Serial I/O interface clock generator
Watch Timer
• Time interval generation
: 0.5 s, 3.9 ms at 32.768 kHz
• Frequency outputs to BUZ pin
• Clock source generation for LCD
8-Bit Serial I/O Interface
• 8-bit transmit/receive mode
• 8-bit receive mode
• Data direction selectable (LSB-first or MSB-first)
• Internal or external clock source
1-2
S3C7335/P7335 PRODUCT OVERVIEW
FEATURES (Continued)
Interrupts
• Four internal vectored interrupts
• Four external vectored interrupts
• Two quasi-interrupts
Memory-Mapped I/O Structure
• Data memory bank 15
Three Power-Down Modes
• Idle: Only CPU clock stops
• Stop1: Main system or subsystem clock stops
• Stop2: Main system and subsystem clock stop
• CE low: PLL and IFC stop
Oscillation Sources
• Crystal or ceramic oscillator for main system
clock
• Crystal for subsystem clock
• Main system clock frequency: 4.5 MHz (Typ)
Instruction Execution Times
• 0.9, 1.8, 14.2 µs at 4.5 MHz
• 122 µs at 32.768 kHz (subsystem)
Operating Temperature
• – 40
°
C to 85 °C
Operating Voltage Range
• 1.8 V to 5.5 V at 3MHz
• PLL/IFC operation: 2.5V to 3.5V or 4.0V to 5.5V
Package Type
• 80-pin QFP
• Subsystem clock frequency: 32.768 kHz (Typ)
• CPU clock divider circuit (by 4, 8, or 64)
1-3
PRODUCT OVERVIEW S3C7335/P7335
BLOCK DIAGRAM
P0.0/BTCO
P0.1/TCLO0
P0.2/TCL0
P0.3/BUZ
P1.0/INT0
P1.1/INT1
P1.2/INT2
P1.3/INT4
P2.0
P2.1
P2.2
P2.3
P3.0
P3.1
P3.2
P3.3
P4.0/
SCK
P4.1/SO
P4.2/SI
P4.3/CLO
P5.0/ADC0
P5.1/ADC1
P5.2/ADC2
P5.3/ADC3
I/O Port 0
Input Port 1
I/O Port 2
I/O Port 3
Serial
I/O Port
I/O Port 4
I/O Port 5
A/D
Converter
INT0-INT4
RESET
CE
Interrupt
Control
Block
Internal
Interrupts
Instruction Decoder
Arithmetic
Logic Unit
512 x 4-Bit
Data Memory
X
and
X
OUT
IN
Clock
XT
IN
OUT
XT
Program Memory
Basic
Timer
Instruction
Register
Program
Counter
Program
Status Word
Stack
Pointer
16K-Byte
Watch
Timer
Watchdog
Timer
Timer/
Counter 0
IF
Counter
PLL
Synthesizer
LCD Driver/
Controller
Output Port
11,12,13
Output Port
7,8,9,10
I/O Port 6
AMIF
FMIF
VCOAM
VCOFM
EO
BIAS
VLC0-VLC2
COM0-COM3
P13.0-P13.3
/SEG24-SEG27
P12.0-P12.3
/SEG20-SEG23
P11.0-P11.3
/SEG16-SEG19
P10.0-P10.3
/SEG12-SEG15
P9.0-P9.3
/SEG8-SEG11
P8.0-P8.3
/SEG4-SEG7
P7.0-P7.3
/SEG0-SEG3
P6.0-P6.3
KS0-KS3
1-4
Figure 1-1. S3C7335 Simplified Block Diagram
S3C7335/P7335 PRODUCT OVERVIEW
PIN ASSIGNMENTS
P0.1/TCLO0
P0.0/BTCO
P0.2/TCL0
P1.0/INT0
P1.1/INT1
P1.2/INT2
P1.3/INT4
P4.0/SCK
P0.3/BUZ
P4.1/SO
P4.2/SI
P4.3/CLO
P5.0/ADC0
P5.1/ADC1
P5.2/ADC2
P5.3/ADC3
P6.0/KS0
P6.1/KS1
P6.2/KS2
P6.3/KS3
VDD0
VSS0
XOUT
XIN
TEST
XTIN
XTOUT
RESET
BIAS
VLC0
VLC1
VLC2
COM0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
80
25
75
76
77
78
79
S3C7335
(80-QFP-Top View)
30
29
28
27
26
74
31
73
32
72
33
P3.3
70
71
35
34
P3.1
P3.2
69
36
P3.0
68
37
CE
67
38
E0
66
39
VDD1
65
40
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
FMIF
AMIF
VSS1
VCOAM
VCOFM
P2.3
P2.2
P2.1
P2.0
SEG27/P13.3
SEG26/P13.2
SEG25/P13.1
SEG24/P13.0
SEG23/P12.3
SEG22/P12.2
SEG21/P12.1
SEG20/P12.0
SEG19/P11.3
SEG18/P11.2
SEG17/P11.1
SEG16/P11.0
SEG15/P10.3
SEG14/P10.2
SEG13/P10.1
SEG12/P10.0
SEG11/P9.3
SEG10/P9.2
SEG9/P9.1
SEG8/P9.0
SEG7/P8.3
SEG6/P8.2
SEG5/P8.1
SEG4/P8.0
SEG3/P7.3
SEG2/P7.2
SEG1/P7.1
SEG0/P7.0
COM3
COM2
COM1
Figure 1-2. S3C7335 80-QFP Pin Assignment
1-5
PRODUCT OVERVIEW S3C7335/P7335
PIN DESCRIPTIONS
Table 1-1. S3C7335 Pin Descriptions
Pin Name Pin
Type
P0.0
P0.1
P0.2
P0.3
P1.0
P1.1
P1.2
P1.3
P2.0-P2.3
P3.0-P3.3
P4.0
P4.1
P4.2
P4.3
P5.0
P5.1
P5.2
P5.3
P6.0
P6.1
P6.2
P6.3
P7.0
P7.1
P7.2
P7.3
P8.0
P8.1
P8.2
P8.3
P9.0
P9.1
P9.2
P9.3
P10.0
P10.1
P10.2
P10.3
Description Number Share
I/O 4-bit I/O port.
1-bit or 4-bit read, write, and test are possible.
Pull-up resistors can be configured by software.
I 4-bit input port.
1-bit or 4-bit read and test are possible.
Pull-up resistors can be configured by software.
I/O 4-bit I/O ports.
1-bit, 4-bit or 8-bit read, write and test are possible.
Pull-up resistors can be configured by software.
Ports 2 and 3 can be paired to support 8-bit data
transfer.
I/O 4-bit I/O ports.
1-bit, 4-bit or 8-bit read, write and test are possible.
Pull-up resistors can be configured by software.
I/O Ports 4 and 5 can be paired to support 8-bit data
transfer.
I/O 4-bit I/O port.
1-bit, 4-bit or 8-bit read, write and test are possible.
Pull-up resistors can be configured by software.
O 1-bit or 4-bit output port.
Alternatively used for LCD segment output.
O 1-bit or 4-bit output port.
Alternatively used for LCD segment output.
O 1-bit or 4-bit output port.
Alternatively used for LCD segment output.
O 1-bit or 4-bit output port.
Alternatively used for LCD segment output.
72
73
74
75
76
77
78
79
56-59
68-71
80
1
2
3
4
5
6
7
8
9
10
11
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
Reset
Pin
BTCO
Value
Input D-2
TCLO0
TCL0
BUZ
INT0
Input A-4
INT1
INT2
INT4
– Input D-2
SCK
Input D-4
SO
SI
CLO
ADC0
Input F-10
ADC1
ADC2
ADC3
KS0
Input D-7
KS1
KS2
KS3
SEG0
Output H-28
SEG1
SEG2
SEG3
SEG4
Output H-28
SEG5
SEG6
SEG7
SEG8
Output H-28
SEG9
SEG10
SEG11
SEG12
Output H-28
SEG13
SEG14
SEG15
Circuit
Type
D-2
D-4
D-2
D-2
D-4
D-2
1-6
S3C7335/P7335 PRODUCT OVERVIEW
Table 1-1. S3C7335 Pin Descriptions (Continued)
Pin Name Pin
Type
P11.0
P11.1
P11.2
P11.3
P12.0
P12.1
P12.2
P12.3
P13.0
P13.1
P13.2
P13.3
COM0-
O 1-bit or 4-bit output port.
Alternatively used for LCD segment output.
O 1-bit or 4-bit output port.
Alternatively used for LCD segment output.
O 1-bit or 4-bit output port.
Alternatively used for LCD segment output.
O Common signal output for LCD display 24-27 – Output H
Description Number Share
Pin
44
45
46
47
48
49
50
51
52
53
54
55
SEG16
SEG17
SEG18
SEG19
SEG20
SEG21
SEG22
SEG23
SEG24
SEG25
SEG26
SEG27
Reset
Value
Circuit
Type
Output H-28
Output H-28
Output H-28
COM3
BIAS I LCD power control 20 – Input –
V
LC0
V
LC1
V
LC2
V
DD0
V
SS0
RESET
X
OUT
X
IN
XT
OUT
XT
IN
TEST I
I LCD power supply.
Voltage dividing resistors are assignable by
software
21
22
23
– Input –
– Main power supply 12 – – –
– Main Ground 13 – – –
I System reset pin 19 – Input B
– Crystal, or ceramic oscillator pin for main system
clock. (For external clock input, use XIN and input
XIN’s reverse phase to X
OUT
)
– Crystal oscillator pin for subsystem clock. (For
external clock input, use XTIN and input XTIN’s
reverse phase to XT
OUT
)
Test signal input (must be connected to VSS for
14
– – –
15
18
– – –
17
16 – – –
normal operation)
CE I Input pin for checking device power.
67 – Input B-5
Normal operation is high level and PLL/IFC
operation is stopped at low level.
VCOFM
VCOAM
I External VCOFM/AM signal inputs. 60
61
– Input B-4
EO O PLL’s phase error output 66 – Output A-2
FMIF
AMIF
V
DD1
V
SS1
I FM/AM intermediate frequency signal inputs. 64
Input – B-4
63
– PLL/IFC power supply 65 – – –
– PLL/IFC ground 62 – – –
1-7
PRODUCT OVERVIEW S3C7335/P7335
Table 1-1. S3C7335 Pin Descriptions (Concluded)
Pin Name Pin
Type
Description Number Share
Pin
Reset
Value
Circuit
Type
BTCO I/O Basic timer overflow output signal 72 P0.0 Input D-2
TCLO0 I/O Timer/counter 0 clock output signal 73 P0.1 Input D-2
TCL0 I/O External clock input for timer/counter 0 74 P0.2 Input D-4
BUZ I/O 2,4,8 or 16 kHz frequency output for buzzer sound
75 P0.3 Input D-2
for 4.19 MHz main system clock or 32.768 kHz
subsystem clock
INT0
INT1
I External interrupt. The triggering edges
(rising/falling) are selectable. Only INT0 is
76
77
P1.0
P1.1
Input A-4
synchronized with system clock.
INT2 I Quasi-interrupt with detection of rising edge signal. 78 P1.2
INT4 I External interrupt input with detection of rising or
79 P1.3
falling edges.
SCK
I/O SIO interface clock signal 80 P4.0 Input D-4
SI I/O SIO interface data input signal 1 P4.2
SO I/O SIO interface data output signal 2 P4.1
CLO I/O CPU clock output 3 P4.3
KS0-KS3 I/O Quasi-interrupt input with falling edge detection 8-11 P6.0-
Input D-7
P6.3
ADC0ADC3
SEG0SEG3
SEG4-
I/O ADC input ports. 4-7 P5.0-
Input F-10
P5.3
O LCD segment signal output. 28-31 P7.0-
Output H-28
P7.3
O LCD segment signal output. 32-55 P8-P13 Output H-28
SEG27
1-8
S3C7335/P7335 PRODUCT OVERVIEW
PIN CIRCUIT DIAGRAMS
VDD
P-Channel
In
N-Channel
Figure 1-3. Pin Circuit Type A
VDD
Up
Down
P-Channel
Out
N-Channel
VDD
Pull-Up
Resistor
In
Schmitt Trigger
Figure 1-6. Pin Circuit Type B (RESETRESET)
In
Type A
Feedback
Enable
N-CH
Pull-Down
Enable
Figure 1-4. Pin Circuit Type A-2(EO)
VDD
Pull-Up
Enable
In
Figure 1-5. Pin Circuit Type A-4 (P1)
Figure 1-7. Pin Circuit Type B-4
In
Figure 1-8. Pin Circuit Type B-5(CE)
1-9
PRODUCT OVERVIEW S3C7335/P7335
VDD
VDD
Data
Output
Disable
P-Channel
Out
N-Channel
Pull-up
Enable
Data
Output
Disable
Circuit
Type C
Schmitt Trigger
P-Channel
I/O
Figure 1-9. Pin Circuit Type C
VDD
Pull-up
Enable
Data
Output
Disable
Circuit
Type C
P-Channel
Figure 1-10. Pin Circuit Type D-2
I/O
Figure 1-11. Pin Circuit Type D-4
VDD
Pull-up
Enable
Data
Output
Disable
Circuit
Type C
Schmitt Trigger
P-Channel
Port
Enable
Figure 1-12. Pin Circuit Type D-7 (P6)
I/O
1-10
S3C7335/P7335 PRODUCT OVERVIEW
V
DD
VLC0
Pull-up
Enable
VLC1
Data
Output
Disable
ADCEN
ADC Select
Data
TO ADC
Circuit
Type C
Figure1-13. Pin Circuit Type F-10 (P5)
VLC0
I/O
SEG
Output
Disable
VLC2
Figure 1-15. Pin Circuit Type H-4
PNE
Out
VDD
VLC1
LCD
COM
Out
VLC2
Figure 1-14. Pin Circuit Type H (COM0-COM3)
P-CH
Data
N-CH
Output
N-CH
DIsable
Circuit
SEG
Type H-4
Figure 1-16. Pin Circuit Type H-28 (P7-P13)
Output
1-11
S3C7335/P7335 ELECTRICAL DATA
17 ELECTRICAL DATA
OVERVIEW
In this section, information on S3C7335 electrical characteristics is presented as tables and graphics. The
information is arranged in the following order:
Standard Electrical Characteristics
— Absolute maximum ratings
— D.C. electrical characteristics
— System clock oscillator characteristics
— I/O capacitance
— A.C. electrical characteristics
— Operating voltage range
Miscellaneous Timing Waveforms
— A.C timing measurement point
— Clock timing measurement at X
— Clock timing measurement at XT
— Input timing for RESET
— Input timing for external interrupts and Quasi-Interrupts
Stop Mode Characteristics and Timing Waveforms
— RAM data retention supply voltage in stop mode
— Stop mode release timing when initiated by RESET
— Stop mode release timing when initiated by an interrupt request
IN
IN
17-1
ELECTRICAL DATA S3C7335/P7335
Table 17-1. Absolute Maximum Ratings
(TA = 25 °C)
Parameter Symbol Conditions Rating Units
Supply voltage
Input voltage
Output voltage
Output current high
V
DD
V
V
I
OH
Applies to all I/O ports
IN
O
One I/O port active - 15 mA
– - 0.3 to + 6.5 V
- 0.3 to VDD + 0.3
–
- 0.3 to VDD + 0.3
All I/O ports active -30
Output current low
I
OL
One I/O port active + 30 (peak value)
(note)
+ 15
Total value for output ports + 100 (peak value)
+ 60 *
T
T
A
STG
- 40 to + 85
- 65 to + 150
°
C
Operating temperature
Storage temperature
NOTE: The values for output current low ( IOL ) are calculated as Peak Value × Duty .
17-2
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