SAGEMCOM BROANDS HILONCV2 User Manual
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HiLoNC V2 APPLICATION NOTE
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SOMMAIRE / CONTENTS
1. OVERVIEW................................................................................................................................................................... 7
1.1 OBJECT OF THE DOCUMENT.........................................................................................................................7
1.2 REFERENCE DOCUMENTS.............................................................................................................................7
1.3 MODIFICATION OF THIS DOCUMENT .......................................................................................................... 7
1.4 CONVENTIONS...................................................................................................................................................7
2. BLOCK DIAGRAM.......................................................................................................................................................8
3. HILONC FAMILY LEGACY........................................................................................................................................9
3.1 PADS OUT AND NEW FEATURES.................................................................................................................. 9
3.2 EASY MIGRATION FROM HILONC (V1) TO HILONC V2.......................................................................... 10
3.2.1 Migration without the use of new features..............................................................................................10
3.2.2 Migration with the use of new features...................................................................................................10
4. FUNCTIONAL INTEGRATION.................................................................................................................................10
4.1 HOW TO CONNECT TO A SIM CARD..........................................................................................................11
4.2 HOW TO CONNECT THE AUDIOS? .............................................................................................................13
4.2.1 Connecting microphone and speaker.....................................................................................................13
4.2.2 Recommended characteristics for the microphone and speaker........................................................15
4.2.3 DTMF OVER GSM NETWORK ...............................................................................................................16
4.3 PWM ....................................................................................................................................................................16
4.3.1 PWM outputs ..............................................................................................................................................16
4.3.2 PWM for Buzzer connection.....................................................................................................................16
4.4 NETWORK LED.................................................................................................................................................17
4.5 POWER SUPPLY ..............................................................................................................................................17
4.5.1 Burst conditions..........................................................................................................................................17
4.5.2 Ripples and drops......................................................................................................................................18
4.6 EXAMPLE OF POWER SUPPLIES................................................................................................................ 18
4.6.1 DC/DC Power supply from a USB or PCMCIA port..............................................................................18
4.6.2 Simple high current low dropout voltage regulator................................................................................19
4.6.3 Simple 4V boost converter. ......................................................................................................................20
4.7 UART...................................................................................................................................................................20
4.7.1 Signals reminder ........................................................................................................................................20
4.7.2 Complete V24 – connection HiLoNC V2 - host .....................................................................................21
4.7.3 Complete V24 interface with PC.............................................................................................................. 22
4.7.4 Partial V24 (RX-TX-RTS-CTS) – connection HiLoNC V2 - host.........................................................23
4.7.5 Partial V24 (RX-TX) – connection HiLoNC V2 - host ...........................................................................24
4.8 UART0.................................................................................................................................................................25
4.9 GPIO....................................................................................................................................................................26
4.10
ADC..................................................................................................................................................................26
4.11
PCM................................................................................................................................................................. 26
4.12
RF BURST INDICATOR ............................................................................................................................... 26
4.13
BACKUP BATTERY ......................................................................................................................................27
4.13.1 Backup battery function feature ...............................................................................................................27
4.13.2 Current consumption on the backup battery.......................................................................................... 27
4.13.3 Charge by internal HiLoNC V2 charging function .................................................................................28
4.13.4 Backup Battery technology.......................................................................................................................28
4.14
START THE MODULE PROPERLY AND AVOID POWER UP ISSUES..............................................30
4.14.1 Power domains...........................................................................................................................................30
4.14.2 IO DC PRESENCE BEFORE POWER ON. ..........................................................................................31
4.14.3 SIDE EFFECTS OF A RETRO SUPPLY (CURRENT RE-INJECTION) ...........................................31
4.14.4 EXAMPLE OF A CURRENT RE-INJECTION ON U.A.R.T. ................................................................ 32
4.14.5 ADVICES FOR EVERY POWER DOMAIN............................................................................................33
4.14.6 CASE OF VBAT RISE TIME ....................................................................................................................34
4.14.7 START- UP.................................................................................................................................................34
4.15
UART SIGNALS AT POWER ON................................................................................................................36
4.16
POWER ON AND SLEEP DIAGRAMS ......................................................................................................37
4.17
MODULE RESET...........................................................................................................................................39
4.18
MODULE SWITCH OFF ............................................................................................................................... 39
4.19
SLEEP MODE MANAGEMENT AND POWER CONSUMPTION .......................................................... 40
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5. RECOMMENDED I/OS AND COMPONENTS ON THE FINAL PRODUCT ......................................................... 42
6. ESD & EMC RECOMMENDATIONS .......................................................................................................................42
6.1 HILONC V2 ALONE...........................................................................................................................................42
6.2 HANDLING THE MODULE ..............................................................................................................................42
6.3 Customer’s product with HiLONC V2..............................................................................................................42
6.4 Analysis...............................................................................................................................................................42
6.5 Recommendations to avoid ESD issues ........................................................................................................43
7. RADIO INTEGRATION..............................................................................................................................................43
7.1 ANTENNA...........................................................................................................................................................43
7.2 GROUND LINK AREA.......................................................................................................................................44
7.3 LAYOUT..............................................................................................................................................................45
7.4 MECHANICAL SURROUNDING.....................................................................................................................46
7.5 OTHER RECOMMENDATIONS – TESTS FOR PRODUCTION/DESIGN............................................... 46
8. AUDIO INTEGRATION .............................................................................................................................................46
8.1 MECHANICAL INTEGRATION AND ACOUSTICS......................................................................................46
8.2 ELECTRONICS AND LAYOUT.......................................................................................................................47
9. RECOMMENDATIONS ON LAYOUT OF CUSTOMER’S BOARD ......................................................................47
9.1 GENERAL RECOMMENDATIONS ON LAYOUT.........................................................................................47
9.1.1 Ground.........................................................................................................................................................47
9.1.2 Power supplies...........................................................................................................................................47
9.1.3 Clocks..........................................................................................................................................................48
9.1.4 Data bus and other signals.......................................................................................................................48
9.1.5 Radio............................................................................................................................................................48
9.1.6 Audio............................................................................................................................................................ 48
9.2 EXAMPLE OF LAYOUT FOR CUSTOMER’S BOARD................................................................................ 49
10. RECOMMANDATIONS FOR CUSTOMER PRODUCTION ...............................................................................49
10.1
MOISTURE LEVEL........................................................................................................................................49
10.2
PACKAGE.......................................................................................................................................................49
10.3
STENCIL ......................................................................................................................................................... 51
10.4
SOLDER PASTE............................................................................................................................................51
10.5
PROFILE FOR REFLOW SOLDERING.....................................................................................................52
10.6
SMT MACHINE ..............................................................................................................................................52
10.6.1 Nozzles........................................................................................................................................................ 53
10.6.2 Fiducials ......................................................................................................................................................54
10.7
UNDERFILL....................................................................................................................................................54
10.8
SECOND REFLOW SOLDERING...............................................................................................................55
10.9
HAND SOLDERING ......................................................................................................................................55
10.10 UNSOLDERING.............................................................................................................................................55
11. LABEL .....................................................................................................................................................................56
12. REFERENCE DESIGN: HiLoNC V2 DEVELOPMENT KIT ................................................................................ 57
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FIGURES LIST
Figure 1: Block diagram of HiLoNC module ...........................................................................................................................8
Figure 2: Postage stamp sized HiLoNC V2 51 pads out front side ........................................................................................11
Figure 3: Postage stamp sized HiLoNC V2 51 pads out back side.........................................................................................11
Figure 4: SIM Card signals.....................................................................................................................................................11
Figure 5: Protections: EMC and ESD components close to the SIM .....................................................................................12
Figure 6: Protections: Serial resistors for long SIM bus lines. ...............................................................................................12
Figure 7: Audio connection ....................................................................................................................................................13
Figure 8 : Filter and ESD protection of microphone .............................................................................................................. 14
Figure 9: Filter and ESD protection of 32 ohms speaker........................................................................................................ 14
Figure 10: Example of D class TPA2010D1 1Watt audio amplifier connections. .................................................................15
Figure 11: Buzzer connection .................................................................................................................................................16
Figure 12: Network LED connection .....................................................................................................................................17
Figure 13: GSM/GPRS Burst Current rush ............................................................................................................................17
Figure 14: GSM/GPRS Burst Current rush and VBAT drops and ripples............................................................................... 18
Figure 15: Example of power supply based on a DC/DC step down converter......................................................................19
Figure 16: Example of power supply based on regulator MIC29302WU .............................................................................. 19
Figure 17: Example with Linear LT1913 ...............................................................................................................................20
Figure 18: Complete V24 connection between HiLoNC V2 and host.................................................................................... 21
Figure 19: CTS versus POK_IN signal during the power on sequence. ................................................................................. 21
Figure 20: connection to a data cable .....................................................................................................................................22
Figure 21: Example of a connection to a data cable with a MAX3238E................................................................................23
Figure 22: Partial V24 connection (4 wires) between HiLoNC V2 and host .........................................................................23
Figure 23: CTS versus POK_IN signal during the power on sequence. ................................................................................. 24
Figure 24: Partial V24 connection (2 wires) between HiloNC V2 and host ...........................................................................24
Figure 25: CTS versus POK_IN signal during the power on sequence. ................................................................................. 25
Figure 26: PCM interface timing ............................................................................................................................................26
Figure 27: RF_TX burst indicator .......................................................................................................................................... 27
Figure 28: Backup battery or 10µF Capacitor internally charged ..........................................................................................28
Figure 29: Charging curve of backup battery ......................................................................................................................... 28
Figure 30 : HiLoNC V2 51 pads with their power domains ...................................................................................................30
Figure 31 : HiLoNC V2 51 pads with their power domains…continued ............................................................................... 31
Figure 32: Digital Pad-out clamp diode..................................................................................................................................32
Figure 33: Hardware interface diodes solution between HiLoNC V2 and host......................................................................33
Figure 34: Hardware interface buffers solution between HiLoNC V2 and host..................................................................... 33
Figure 35: Power ON sequence .............................................................................................................................................. 35
Figure 36: Full UART signals during the power on sequence................................................................................................ 36
Figure 37: Diagram for the power on .....................................................................................................................................37
Figure 38: Diagram for the sleep mode .................................................................................................................................. 38
Figure 39: Reset command of the HiLoNC V2 by an external GPIO ....................................................................................39
Figure 40: Power supply command by a GPIO ...................................................................................................................... 40
Figure 41: Power OFF sequence for POK_IN, VGPIO and CTS........................................................................................... 40
Figure 42: Power consumption at DRX9 (with RS-NGMO2 power supply) .........................................................................41
Figure 43: Antenna connection............................................................................................................................................... 43
Figure 44: Antenna detection circuit ...................................................................................................................................... 44
Figure 45: Mandatory area for varnish ...................................................................................................................................45
Figure 46: Connection of RF lines with different width.........................................................................................................45
Figure 47: Layout of audio differential signals on a layer n ...................................................................................................48
Figure 48: Adjacent layers of audio differential signals ......................................................................................................... 48
Figure 49: layer allocation for a 6 layers circuit .....................................................................................................................49
Figure 50: Factory Tape dimensions ...................................................................................................................................... 50
Figure 51 : Solder mask design ..............................................................................................................................................51
Figure 52 : Typical thermal profile......................................................................................................................................... 52
Figure 53 : Flexjet nozzle 340F .............................................................................................................................................. 53
Figure 54 : Siemens nozzle 417 ..............................................................................................................................................53
Figure 55 : Fiducials positions................................................................................................................................................ 54
Figure 56 : Underfill injection holes....................................................................................................................................... 55
Figure 57 : Laboratory hot plate to unsolder the module........................................................................................................ 56
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1. OVERVIEW
1.1 OBJECT OF THE DOCUMENT
The aim of this document is to describe some examples of hardware solutions for developing products around
the SAGEMCOM HiLoNC V2 GPRS Module. Most parts of these solutions are not mandatory. Use them as
suggestions of what should be done to have a working product and what should be avoided thanks to our
experiences.
This document suggests how to integrate the HiLoNC V2 GPRS module in machine devices such as
automotive, AMM (Automatic Metering Management), tracking system: connection with external devices, layout
advises, external components (decoupling capacitors…).
1.2 REFERENCE DOCUMENTS
URD1 OTL 5665.3 001 71927 - HiLoNC V2 technical specification
URD1 OTL 5635.1 008 70248 - AT Command Set for SAGEM HiLo Modules
1.3 MODIFICATION OF THIS DOCUMENT
The information presented in this document is supposed to be accurate and reliable. SAGEMCOM assumes no
responsibility for its use, nor any infringement of patents or other rights of third parties which may result from its
use.
This document is subject to change without notice.
Changes or modifications not expressly approved by the party responsible for compliance could void the user’s
authority to operate the equipment.
1.4 CONVENTIONS
SIGNAL NAME: All signal names available on the pads of the HiLoNC V2 module is written in italic.
Specific attention must be granted to the information given here.
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2. BLOCK DIAGRAM
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Figure 1: Block diagram of HiLoNC module
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3. HILONC FAMILY LEGACY
3.1 PADS OUT AND NEW FEATURES
HiLoNC Pads
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
E16
E17
E18
E19
E20
E21
E22
E23
E24
E25
E26
E27
E28
E29
E30
E31
E32
E33
E34
E35
E36
E37
E38
E39
E40
E41
E42
E43
E44
Note d’étude / Technical document : URD1– OTL
HiLoNC V2
Signal Name
/INTMIC_P AUDIO
/AUX_ADC0 ADC
GND POWER
VGPIO EXT_VDD
VBACKUP EXT_VDD
/PWM0 PWM
/RESET_IN RESET
SAGEMCOM FACTORY USE
SAGEMCOM FACTORY USE
SAGEMCOM FACTORY USE
NTRST JTAG/FACTORY
SAGEMCOM FACTORY USE
SAGEMCOM FACTORY USE
/GPIO2 GPIO
/GPIO1 GPIO
/RF_TX RF
/PCM_CLK PCM
/PCM_SYNC PCM
/PCM_OUT PCM
/PCM_IN PCM
GND POWER
/ JTAG1 JTAG
/JTAG2 JTAG
/TEST JTAG
/UART0_RXD Trace UART 0
/GPIO3 GPIO
GND RF
/ANTENNA RF
GND RF
VBATT POWER
VBATT POWER
/UART0_TXD Trace UART 0
/UART1_DSR UART 1
/UART1_DCD UART 1
/UART1_RI UART 1
/UART1_DTR UART 1
/UART1_RTS UART 1
/UART1_RX UART 1
/UART1_TX UART 1
/UART1_CTS UART 1
/POK_IN POWER ON
/PWM2 PWM
/PWM1 PWM
/SIM_CLK SIM
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HiLoNC V2
Function
5665.3
HiLoNC V1
Signal Name
/INTMIC_P AUDIO P2P Compliant
/AUX_ADC0 ADC P2P Compliant
GND POWER P2P Compliant
VGPIO EXT_VDD P2P Compliant
VBACKUP EXT_VDD P2P Compliant
/PWM0 PWM P2P Compliant
/RESET_IN RESET P2P Compliant
SAGEMCOM FACTORY P2P Compliant
SAGEMCOM FACTORY P2P Compliant
SAGEMCOM FACTORY P2P Compliant
/JTAG_TRST JTAG P2P Compliant
SAGEMCOM FACTORY P2P Compliant
SAGEMCOM FACTORY P2P Compliant
/GPIO2 GPIO P2P Compliant
/GPIO1 GPIO P2P Compliant
/GPIO8_SPI_IN SPI
/SCL_SPI_OUT SPI
/SDA_SPI_SEL SPI
/GPIO6_SPI_IRQ SPI
/GPIO7_SPI_CLK SPI
GND POWER P2P Compliant
/TEST_GPIO1 GPIO P2P Compliant
/TEST_GPIO2 GPIO P2P Compliant
/TEST JTAG P2P Compliant
/GPIO4 GPIO
/GPIO3 GPIO P2P Compliant
GND RF P2P Compliant
/ANTENNA RF P2P Compliant
GND RF P2P Compliant
VBATT POWER P2P Compliant
VBATT POWER P2P Compliant
/GPIO5 GPIO
/UART1_DSR UART P2P Compliant
/UART1_DCD UART P2P Compliant
/UART1_RI UART P2P Compliant
/UART1_DTR UART P2P Compliant
/UART1_RTS UART P2P Compliant
/UART1_RX UART P2P Compliant
/UART1_TX UART P2P Compliant
/UART1_CTS UART P2P Compliant
/POK_IN POWER ON P2P Compliant
/PWM2 PWM P2P Compliant
/PWM1 PWM P2P Compliant
/SIM_CLK SIM P2P Compliant
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HiLoNC V1
Function
Delta
New Feature
New Feature
New Feature
New Feature
New Feature
New Feature
New Feature
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E45
E46
E47
E48
E49
E50
E51
As seen in the table above, the two modules are almost pad to pad (P2P) compliant for the main important signals, however
the new HiLoNC V2 M2M module introduce some new interesting features as the digital audio on the PCM bus and the RF
bust indicator signal.
/SIM_RST SIM
/SIM_DATA SIM
VSIM SIM
VBATT POWER
GND POWER
/HSET_OUT_P AUDIO
/HSET_OUT_N AUDIO
/SIM_RST SIM P2P Compliant
/SIM_DATA SIM P2P Compliant
VSIM SIM P2P Compliant
VBATT POWER P2P Compliant
GND POWER P2P Compliant
/HSET_OUT_P AUDIO P2P Compliant
/HSET_OUT_N AUDIO P2P Compliant
3.2 EASY MIGRATION FROM HILONC (V1) TO HILONC V2
3.2.1 Migration without the use of new features
When upgrading from the HiLoNC V1 to the HiLoNC V2, the SPI bus formerly used was supposed to be left as test points
on your design, then simply left the design as it is, therefore the new PCM bus and RF burst indicator signals will remain
not used.
For the former GPIO4 and GPIO5, if there were both not used, simply add if possible two test points on those signals to be
able to connect a trace cable in case of need. Otherwise, if one or both former GPIO4 and GPIO5 were used, you have to
reallocate those pads to GPIO1, GPIO2 or GPIO3 which remain pad to pad compliant.
3.2.2 Migration with the use of new features
When upgrading from the HiLoNC V1 to the HiLoNC V2, the former SPI bus which was supposed to be left on test points
is now used as the digital audio PCM bus and also the RF indicator signal, simply connect the new signals as described
below in the respective chapter.
The former GPIO4 and GPIO5 signals are now used to connect the UART TXD / RXD trace bus, then add if possible two
test points on those signals to be able to connect a trace cable in case of need.
4. FUNCTIONAL INTEGRATION
The improvement of Silicon technologies heads toward functionality improvement, less power consumption. The
postage stamp sized HiLoNC V2 module meets all these requirement, uses the last high end technology in a
very compact design of only 24 x 24 x 2.6 mm and weighs less than 3 grams.
All digital I/Os among the 51 pads are in 2.8V domain which is suitable for most systems except SIM I/O's
with can also be in the 1.8V domain depending on the used SIM card and POK_IN at 3Vdomain
Analogical I/Os are in the following power domains
• VSIM (the SIM I/Os at 1.8V or 2.9V domain).
• VBACKUP 3V domain
• VGPIO 2.8V domain
• VBAT (from 3.2V to 4.5V domain)
• AUX_ADC0 2.8V domain
• INTMIC_P 2.85V domain
• HSET_OUT_P/N VBAT domain
• ANTENNA (RF power Amplifier is on VBAT domain)
Do not power the module I/O with a voltage over the specified limits, this could damage the module.
Acoustic engineering competences are mandatory to get accurate audio performance on customer’s
product
Radio engineering competences are mandatory to get accurate radio performance on customer’s product.
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1
51
14
40
1
26
Figure 2: Postage stamp sized HiLoNC V2 51 pads out front side
Figure 3: Postage stamp sized HiLoNC V2 51 pads out back side
4.1 HOW TO CONNECT TO A SIM CARD
Figure 4: SIM Card signals
HiLoNC V2 module provides the SIM signals on the 51 pads. A SIM card holder with 6 pads needs to be
adopted to use the SIM function.
Decoupling capacitors have to be added on SIM_CLK, SIM_RST, VSIM and SIM_DATA signals as close
as possible to the SIM card connector to avoid EMC issues and pass the SIM card tests approvals .
Use ESD protection components to protect SIM card and module I/Os against Electro Static Discharges.
The following schematic shows how to protect the SIM access for 6 pads connector, this should be apply
every time a SIM card holder is accessible by the final customer.
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Figure 5: Protections: EMC and ESD components close to the SIM
In case of long SIM bus lines over 10cm, it is recommended to also use serial resistors to avoid electrical
overshoots on SIM bus signals. Use 56Ω for the clock line and 10Ω for the reset and data lines.
Figure 6: Protections: Serial resistors for long SIM bus lines.
The schematic here above includes the hardware SIM card presence detector. It can be connected to any GPIO
and managed with an AT command.
SIM card must not be removed from its holder while it is still powered. First switch the module off properly
with the AT command, then remove the SIM card from its holder.
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4.2 HOW TO CONNECT THE AUDIOS?
The HiLoNC V2 module features one input audio path and one output audio path. The input path is single-end
while the output path is differential. In this following chapter examples of design will be given including
protections against EMC and ESD and some notes about the routing rules to follow to avoid the TDMA noise
sometimes present in this sensitive area of design.
customer’s product.
Note that acoustic engineering competences are mandatory to get accurate audio performance on
4.2.1 Connecting microphone and speaker
The HiLoNC V2 module can manage an external microphone (INTMIC_P) in single-end mode and an external
speaker (HSET_OUT_P / HSET_OUT_N) in differential mode. Thus, one speaker and one microphone can be
connected to the module. The 2.4V voltage to bias the microphone is implemented in the module.
The speaker connected to the module should be 32 ohms.
HiLoNC
V2
If the design is ESD or EMC sensitive we strongly recommend reading the notes below.
A poor audio quality could either come from the PCB routing and placement or from the chosen components (or
even both).
HSET_OUT_P
HSET_OUT_N
INTMIC_P
Filter and
ESD
protection
Figure 7: Audio connection
32ohms speaker
MIC
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4.2.1.1 Notes for microphone
Pay attention to the microphone device, it must not be sensitive to RF disturbances.
If you need to have deported microphone out of the board with long wires, you should pay attention to the
EMC and ESD effect. It is also the case when your design is ESD sensitive. In those cases, add the
following protections to improve your design.
voltage to be re-injected inside the module.
4.2.1.2 Notes for speaker
To ensure proper operation of such sensitive signals, they have to be isolated from the others by
analogue ground on customer’s board layout. (Refer to Layout design chapter)
HiLoNC V2
To use an external bias voltage for the microphone, simply use a capacitor of 10µF to prevent this bias
As explained for the microphone, if the speaker is deported out of the board or is sensitive to ESD, use the
schematic here after to improve the audio.
INTMIC_P
Figure 8 : Filter and ESD protection of microphone
Ferrite Bead
MIC
18pF
ESD protection
18pF
HiLoNC V2
HSET_OUT_P, HSET_OUT_N tracks must be larger than other tracks: 0.1 mm.
As described in the layout chapter, differential signals have to be routed in parallel (HSET_OUT_P and
HSET_OUT_N signals)
The impedance of audio chain (filter + speaker) must be lower than 32Ω.
To use an external audio amplifier connected to a loud-speaker, use serial capacitors of 10nF on HiLoNC
audio outputs to connect the audio amplifier.
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HSET_OUT_P
HSET_OUT_N
Figure 9: Filter and ESD protection of 32 ohms speaker
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Ferrite Bead
Ferrite Bead
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ESD protection
speaker
ESD protection
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Figure 10: Example of D class TPA2010D1 1Watt audio amplifier connections.
4.2.2 Recommended characteristics for the microphone and speaker
4.2.2.1 Recommended characteristics for the microphone
Item to be inspected Acceptance criterion
Sensitivity - 40 dB SPL +/-3 dB (0 dB = 1 V/Pa @ 1kHz)
Frequency response Limits (relatives values)
Freq. (Hz) Lower limit Upper limit
100 -1 1
200 -1 1
300 -1 1
1000 0 0
2000 -1 1
3000 -1.5 1.5
3400 -2 2
4000 -2 2
Current consumption 1 mA (maximum)
Operating voltage DC 1 to 3 V (minimum)
S / N ratio 55 dB minimum (A-Curve at 1 kHz, 1 Pa)
Directivity Omni-directional
Maximum input sound pressure level 100 dB SPL (1 kHz)
Maximum distortion 1%
Radio frequency protection Over 800 -1200 MHz and 1700 -2000 MHz, S/N ratio 50
dB minimum (signal 1 kHz, 1 Pa)
4.2.2.2 Recommended characteristics for the speaker
Item to be inspected Acceptance criterion
Input power: rated / max 0.1W (Rate)
Audio chain impedance 32 ohm +/- 10% at 1V 1KHz
Frequency Range
300 Hz ~ 4.0 KHz
Sensitivity (S.P.L) >105 dB at 1KHz with IEC318 coupler,
Distortion 5% max at 1K Hz, nominal input power
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4.2.3 DTMF OVER GSM NETWORK
Former systems used to transmits data through DTMF modulation on RTC telephone lines.
Audio DTMF tones are not guarantee over GSM network
This is due to the nature of the GSM Voice CODEC - it is specifically designed for the human voice and does
not faithfully transmit DTMF.
When you press the buttons on your GSM handset during a call, this goes in the Signalling channel - it does not
generate in-band DTMF; the actual DTMF tones are generated in the network.
Therefore if your design needs the DTMF functionality, you should know their transmission over the network is
not at all guaranteed (because of voice codec). This could work or fail depending very strongly to the GSM
network provider. SAGEMCOM does not guarantee any success on using this function.
However tests on HiLoNC V2 shown this feature can work on some GSM Networks. Successful transmissions
and receptions have been done with 300ms of characters duration and 200mVpp as input level on microphone
input.
If this function is needed, first try with your network and those parameters then (if success) try to tune
them to fit your specification.
4.3 PWM
4.3.1 PWM outputs
The HiLoNC V2 module can manage two PWM outputs.
They can be configured with appropriate AT command (for more details refer to AT command set for
SAGEMCOM HiLoNC V2 module specification).
User application can set for each output:
• Frequency between : 25.6KHz and 1083.3KHz
• Duty range from: 0 to 100%
4.3.2 PWM for Buzzer connection
The HiLoNC V2 module can manage a dedicate PWM output to drive a buzzer. The buzzer can be used to
alarm for abnormal state.
Resistors should be added to protect the buzzer. The value of these resistors depends on the buzzer and
the transistor. Normally, they can be set as 1KΩ.
VBAT
HiloNC
R2
PWM2
R1
Figure 11: Buzzer connection
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GPIO or
4.4 NETWORK LED
The HiLoNC V2 module can manage a network LED. The LED can be connected either to one of the available
GPIO or to a PWM (but not the one dedicated to the buzzer).
The transistors can be found a in a single package referenced as UMDXX or PUMDXX Family.
Value of resistor R depends on characteristic of chosen LED; it is used to limit the current through the diode.
Use the AT command to set the GPIO or PWM used to control the LED.
PWM
HiLoNC V2
VBAT
R
Figure 12: Network LED connection
4.5 POWER SUPPLY
The HiLoNC V2 module can be supplied by a battery or any DC/DC converter compliant with the module supply
range 3.2V to 4.5V and 2.2 A.
The PCB tracks must be well dimensioned to support 2.2 A maximum current (Burst current 1.8A plus the
extra current for the other used I/Os). The voltage ripple caused by serial resistance of power supply path
(Battery internal resistance, tracks and contact resistance) could result in the voltage drops.
To prevent any issue in the power up procedure the typical rise time for VBAT should be 1ms.
The HiLoNC V2 module does not manage the battery charging.
4.5.1 Burst conditions
- Communication mode (worst case: 2 continuous GSM time-slot pulse):
Figure 13: GSM/GPRS Burst Current rush
A 47µF with Low ESR capacitor is highly recommended for VBAT and close to the module pads 30 & 31.
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4.5.2 Ripples and drops
Current burst at 1.8A 33dBm
GSM TX Lev 5
Ripple
VBAT drop
3.2V Min
Figure 14: GSM/GPRS Burst Current rush and VBAT drops and ripples
The minimum voltage during the drop of VBAT must be 3.2V at 33dBm at pads 30 and 31 for the full
range of the required functioning temperature. To reach this aim, adapt the VBAT tracks width to minimize the
loss: the shorter and thicker is the track; the lower is the serial impedance.
To check the serial resistor, any CAD software can be used or by experiment by measuring it on the PCB by
injecting 1A into the VBAT track on connector side and shorting to GND the other side, this could be done using
a laboratory power supply set to few volts with a limitation in current to 1A. Then the measure of the drop
voltage leads to the serial resistor.
Noise on VBAT due to drops could result in poor audio quality.
Serial resistor should be less than 250mΩ including the impedance of connectors if any.
Ripple has to be minimised to have a clean RF signal. This can be improved by filtering the output of the
power supply when AC/DC or DC/DC components are used. Refer to the power converter chip supplier
application note for more information and advises.
4.6 EXAMPLE OF POWER SUPPLIES
4.6.1 DC/DC Power supply from a USB or PCMCIA port.
It the following application note from Linear Technology LTC3440, this schematic is an example of a DC/DC
power supply able to power 3.6V under 2A. This can be use with a AC/DC 5V unit or an USB or PCMCIA bus as
input power source. C6 to C9 can be followed by a serial MOS transistor to avoid a slow rise signal at VOUT.
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(270K+1.8K)
Figure 15: Example of power supply based on a DC/DC step down converter
4.6.2 Simple high current low dropout voltage regulator.
If the whole power consumption is not an issue, this example of a simple voltage regulator preceded by an
AC/DC to 5V converter, can be use to power the module.
The voltage output is given by:
VOUT = 1.235V × [1 + (R1 / R2)]
To have 3.7V out R1=560K & R2=271.8K
Figure 16: Example of power supply based on regulator MIC29302WU
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4.6.3 Simple 4V boost converter.
Simple boost converter with Linear LT1913 (see LT1316 evaluation kit document). The input can be preceded
by an AC/DC converter to get the 5V. PGOOD signal can be checked before the ignition of the module.
Figure 17: Example with Linear LT1913
4.7 UART
The HiLoNC V2 module features a V24 interface to communicate with the host through AT commands or for
easy firmware upgrading purpose.
It is recommended to manage an external access to the V24 interface, in order to allow easy software
upgrade (baud rate up to 460.8kbps, validated with ATEN USB/Serial converter).
DTR, DSR, DCD and RI signals are internally pull upped to VGPIO with a 100KΩ.
RI signal is a stand alone signal that can be used with anyone of the following configurations. Consult the
AT command specification for more information about this signal and its use.
4.7.1 Signals reminder
The following table quickly sums up the use of the different signals from UART
Signal name Signal use(DTE point of view)
RX
TX
DCD
DSR
DTR
RTS
CTS
RI
Note d’étude / Technical document : URD1– OTL
Receive data
Transmit data
Signal data connections in progress (GPRS or CSD)
Signal UART interface is ON
Prevent the HiLoNC V2 to enter into sleep mode
Switch between data and command modes
Wake up the module,…
Wakes up the module when Ksleep=1 is used
Signal HiLoNC V2 is ready to receive AT commands, has waken
up
Signal incoming calls (voice and data), SMS,…
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Consult the AT command Specification document for the use of the UART signals.
Unused signals can be left not connected.
4.7.2 Complete V24 – connection HiLoNC V2 - host
A V24 interface is provided on the 51 pads of the HiLoNC V2 module with the following signals: RTS/CTS,
RXD/TXD, DSR, DTR, DCD, RI.
The use of this complete V24 connection is recommended as soon as your application needs to exchange
data (over GPRS or CSD).
HiLoNC V2 Module
39
40
33
34
35
36
38
37
2.8V signals
TXD
CTS
DSR
DCD
RI
DTR
RXD
RTS
RXD
CTS
DSR
DCD
RI
DTR
TXD
RTS
Note: GND is not
represented
DTE Device
2.8V signals
DCE point of view
Figure 18: Complete V24 connection between HiLoNC V2 and host
This configuration allows to use the flow control RTS & CTS to avoid any overflow error during the data transfer,
CTS is moreover used to signal when the HiLoNC V2 is ready to receive an AT command after a power up
sequence or a wake up from sleep mode.
This configuration allows as well all the signalling signals like:
• RI signal used when programmed to indicate an incoming voice or data call or SMS incoming etc…
• DCD signal used to signal the GPRS connections
• DSR signal used to signal the module UART interface is ON
• DTR signal used to prevent the HiLoNC V2 module from entering into sleep mode or to switch between
Data and AT commands or to hang up a call or to wake up the module etc…
DTE point of view
Figure 19: CTS versus POK_IN signal during the power on sequence.
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