ROHM BR24E16FV, BR24E16FJ, BR24E16F, BR24E16, BR24E08F Datasheet

BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV / BR24C16/ BR24C16F /

Memory Ics

BR24C16FJ / BR24C16FV / BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV

I2C BUS compatible serial EEPROM

BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV /
BR24C16 / BR24C16F / BR24C16FJ / BR24C16FV /
BR24E16 / BR24E16F / BR24E16FJ / BR24E16 FV /

The BR24C08, BR24C16 and BR24E16 series are 2-wire (I2C BUS type) serial EEPROMs which are electrically
programma ble.

∗I2C BUS is a registered trademark of Philips.

z

Features

1) 1k x 8 bits serial EEPROM.
(BR24C08 / F / F J / FV)
2k x 8 bits serial EEPROM.
(BR24C16 / F / F J / FV, BR24E16 / F / FJ / FV)

2) T wo w ire seri al in ter face.
(2Byte Address : BR24E16)

3) Operating voltage range : 2.7V∼5.5V

4) Low current consumption
Active (at 5V) : 2.0mA (Typ.)
Standby (at 5V) : 1.0µA (T yp.)

5) Auto erase and auto complete functions can be used
during writ e op erat ions.

6) Page write function : 16byte

7) DATA security
Write protect feature
Inhibit to WRITE at low Vcc

8) Noise filters at SCL and SDA pins.

9) Address can be incremented automatically during
read operations.

10) Compact packages.

11) Rewriting possible up to 100,000 times.

12) Data can be stored for ten years without corruption.

z

zz

zAbsolute maximum ratings (T a=25°C)

Parameter Symbol Limits Unit

Supply voltage −0.3

~

+6.5 V

Power dissipation

mW

Storage temperature range −65

~

+125

°C

Operating temperature range

°C

Terminal voltage

−

V

−40

~

+85

V

CC

−0.3~VCC+0.3

Pd

Tstg
Topr

300(SSOP−B8)

∗1

800(DIP8)

450(SOP8, SOP−J8)

∗2
∗3

∗1 Reduced by 3.0mW for each increase in Ta of 1

°C over 25°C.

∗2 Reduced by 3.5mW for each increase in Ta of 1

°C over 25°C.

∗3 Reduced by 5.0mW for each increase in Ta of 1

°C over 25°C.

z

zz

zRecommended operating conditions (T a=25°C)

Parameter Symbol Limits Unit

Power supply voltage

V

Input voltage V

IN

V

V

CC

0~V

CC

2.7~5.5

BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV / BR24C16/ BR24C16F /

Memory Ics

BR24C16FJ / BR24C16FV / BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV

z

zz

zBlock diagram

BR24C08 / F / FJ / FV

8kbits EEPROM ARRAY

CONTROL LOGIC

HIGH VOLTAGE GEN.

ACK

START STOP

10bits

10bits

8bits

DATA

REGISTER

ADDRESS
DECODER

A0

A1

A2

1

2

3

4

GND

WP

SCL

SDA

8

7

6

5

V

CC

VCC LEVEL DETECT

ADDRESS REGISTER

SLAVE WORD

·

Function

Slave address set
Serial clock input

serial data input, serial data output
Wite protect pin

Power supply

Pin name

A0, A1

A2

SCL

SDA

WP

V

CC

GND

I / O

I / O

−

−

−

I
I

I

Ground (0V)
Out of use. Please connect to GND.

Slave and word address,

∗An open drain output requires a pull-up resistor.

∗

BR24C16 / F / FJ / FV

16kbits EEPROM ARRAY

CONTROL LOGIC

HIGH VOLTAGE GEN.

ACK

START STOP

11bits

8bits

DATA

REGISTER

ADDRESS
DECODER

A0

A1

A2

1

2

3

4

GND

WP

SCL

SDA

8

7

6

5

V

CC

VCC LEVEL DETECT

ADDRESS REGISTER

SLAVE WORD

·

11bits

A0, A1, A2

SCL

SDA

WP

V

CC

GND

I / O

I / O

−

−

I
I

I

FunctionPin name

∗An open drain output requires a pull-up resistor.

Serial clock input

serial data input, serial data output
Wite protect pin

Power supply
Ground (0V)
Out of use. Please connect to GND.

Slave and word address,

∗

BR24E16 / F / FJ / FV

16kbits EEPROM ARRAY

CONTROL LOGIC

HIGH VOLTAGE GEN.

ACK

START STOP

11bits

8bits

DATA

REGISTER

ADDRESS
DECODER

A0

A1

A2

1

2

3

4

GND

WP

SCL

SDA

8

7

6

5

V

CC

VCC LEVEL DETECT

ADDRESS REGISTER

SLAVE WORD

·

11bits

A0, A1, A2

SCL

SDA

WP

V

CC

GND

I / O

I / O

−

−

I
I

I

FunctionPin name

∗An open drain output requires a pull-up resistor.

Serial clock input

serial data input, serial data output
Wite protect pin

Power supply
Ground (0V)

Slave and word address,

∗

Slave address set

BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV / BR24C16/ BR24C16F /

Memory Ics

BR24C16FJ / BR24C16FV / BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV

z

zz

zElectrical characteristics

DC characteristics (Unless otherwise noted, T a=−40∼85°C, VCC=2.7∼5.5V)

Parameter Symbol Min. Typ. Max. Unit Conditions

V

IH

−−

V

V

IL

−−

0.3V

CC

V

V

OL

−−

0.4 V

Input leakage current I

LI

−

1 µA

VIN=0V~V

CC

Output leakage current I

LO

−1

−1 −

1 µA

operating current I

CC

−

3.0 mA

Standby current I

SB

−

−

−

3.0 µA

0.7V

CC

−

−

I

OL

=3.0mA(SDA)

V

CC

=5.5V, f

SCL

=400kHz

A0, A1, A2=GND, WP=GND

V

OUT

=0V~V

CC

"HIGH" input voltage
"LOW" input voltage
"LOW" output voltage

V

CC

=5.5V, SDA SCL=V

CC

This product is not designed for protection against radioactive rays.

Operating timing characteristics (Unless otherwise noted, T a=−40∼85°C, VCC=2.7∼5.5V)

Parameter Symbol

Vcc=5V±10% Vcc=3V±10%

Unit

f

SCL kHz

t

HIGH

Noise erase valid time (SDA/SCL pins) tI µs

Dataclock "HIGH" time

SCL frequency

µs

Dataclock "LOW" time t

LOW

µs

SDA / SCL rise time t

R

µs

SDA / SCL fall time t

F

µs

Start condition hold time t

HD : STA

µs

Start condition setup time t

SU : STA

µs

Input data hold time t

HD : DAT ns

Input data setup time t

SU : DAT ns

Output data delay time t

PD

µs

Output data hold time t

DH

µs

Stop condition setup time t

SU : STO

µs

Bus open time before start or transfer t

BUF µs

t

WR

Min.

−

0.6

−

1.2

−

−

0.6

0.6
0

100

0.1

0.1

0.6

1.2

−

Typ.

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

Max.

400

−

0.05

−

0.3

0.3

−

−

−

−

0.9

−

−

−

10

Min.

−

4.0

−

4.7

−

−

4.0

4.7
0

250

0.2

0.2

4.7

4.7

−

Typ.

−

−

−

−

−

−

−

−

−

−

−

−

−

−

−

Max.

100

−

0.1

−

1.0

0.3

−

−

−

−

3.5

−

−

−

10 msInternal write cycle time

BR24C08 / BR24C08F / BR24C08FJ / BR24C08FV / BR24C16/ BR24C16F /

Memory Ics

BR24C16FJ / BR24C16FV / BR24E16 / BR24E16F / BR24E16FJ / BR24E16FV

z

zz

zTiming char ts

t

BUF

t

DH

t

PD

t

HIGH

t

HD

:

STA t

LOW

t

F

t

R

SDA

SDA

SCL

START BIT STOP BIT

SCL

SDA

Data is read on the rising edge of SCL.
Data is output in synchronization with the falling edge of SCL.

t

SU

:

DAT t

HD

:

DAT

t

SU

:

STOt

HD

:

STA t

SU

:

STA

(OUT)

(IN)

Fig.1 Synchronized data input / output timing

ACKD0

t

WR

SDA

SCL

START CONDITIONSTOP CONDITION

Write data (n)

Fig.2 Write cycle timing

z

zz

zCircuit operation

(1) Start condition (recognition of start bit)

Before executing any command, when SCL is HIGH, a start condition (start bit) is required to cause SDA to fall from
HIGH to LOW. This IC is designed to constantly detec t whether t here is a start condit ion (start bit) for the SDA an d
SCL line, and no commands will be executed unless this condition is satisfied.
(See Fig.1 for the synchronized data input / output timing.)

(2) Stop condition (recognition of stop bit)

To stop any command, a stop condition (stop bit) is required. A stop condition is achieved when SDA goes from LOW
to HIGH while SCL is HIGH. This enables commands to be completed.
(See Fig.1 for the synchronized data input / output timing.)

(3) Precautions concerning write commands

In the WRITE mode, the transferred data is not written to the memory unless the stop bit is executed.