Renesas GX36420-3 Datasheet
Short-Form Datasheet
GX36420
4 × 64Gbps Linear TIA
X0106032 Rev.1.0
Nov.18.20
Page 1
SPI Control
ADC DAC
PD bi as
Filter
MGC/AGC
Gain Monitor
Input Monitor /LOS
OA-Output
Voltag e Contr ol
GC-Gain
Cont rol
Peak
Cont rol
Output Monit or
Cor e
TIA
VGA1
Output
Stage
VGA2
CM Loop1
DC Offse t
Loop2
DC Offse t
Loop3
Rectif ier
AGC
RSSI
SW
PKD_GC1
SW
PKD_GC2
PKD
_GC3
PKD_GC4
GC_OA1
GC_OA2
GC
_OA3GC_OA4
SW
SW
SW
Peaking
MC
SHD
CONFI G
PDS1
PDS2
PDS3
PDS4
PD2
PD3
PD4
PD1
NoCon
PKD_SUM
GC_SUM
LOS
SW
Scale r
SUM
SUM
CH2,3,4
CH2,3,4
CH2 CH3 CH4 CH4CH3CH2
CH2,3,4
In1p
In1n
Out1p
Out1n
SW SW
SHD
CH2,3,4 CH2,3,4
CH1,2,3,4
SUM
CH2,3,4
CH1,2,3,4
CH1,2,3,4
CH1,2,3,4
CS
SCK
MOSI
MISO
RST
CH1,2,3,4
CH1,2,3,4
CH1,2,3,4
VCCi n1
VCCi n2
VCCi n3VCCi n4
VCCo ut1
VCCo ut2
VCCo ut3
VCCo ut4
In2p
In2n
In
3p
In3n
In4p
In4n
Out2p
Out2n
Out4p
Out4n
Out3p
Out3n
-3
The GX36420-3 is a 64Gbps linear quad TIA chip
that integrates four lanes of TIAs for XI, XQ, YI, and
YQ channels, in addition to digital interface circuitry
for DC controls on a single die for 400G/600G
coherent applications. The TIA electrical
characteristics, functions, and physical dimensions
are designed for small-form factor integrated optical
modules such as CFP2 and CFP4.
Applications
• 400G/600G coherent systems with 64Gbps
16QAM/64QAM modulation format
• Integrated optical modules for CFP/CFP2/CFP4
form factors
Features
• Quad 64Gbps linear TIA integrated SPI and
analog interface
• Differential linear gain: 150Ω–5,000Ω and > 30dB
dynamic range
• 40+GHz adjustable 3dB bandwidth
• Automatic and manual gain control, output
voltage control, peak detection, RSSI and input
current monitor, and shutdown functionalities
• Low THD, crosstalk, and power consumption for
covering 64QAM applications
Figure 1. Block Diagram
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