Rainbow Electronics TSM13N50 User Manual

TO-220

ITO-220

PRODUCT SUMMARY

Block Diagram

Pin

Definition

:

TSM13N50

500V N-Channel Power MOSFET

1. Gate

2. Drain

3. Source

General Description

The TSM13N50 N-Channel enhancement mode Power MOSFET is produced by planar stripe DMOS technology.
This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching
performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well
suited for high efficiency switch mode power supply, power factor correction, electronic lamp ballast based on half
bridge.

VDS (V) R

500 0.48 @ V

(Ω) ID (A)

DS(on)

=10V 13

GS

Features

● Low R

● Low gate charge typical @ 36nC (Typ.)

● Low Crss typical @ 7.7pF (Typ.)

● Fast Switching

0.38Ω (Typ.)

DS(ON)

Ordering Information

Part No. Package Packing

TSM13N50CZ C0
TSM13N50CI C0 ITO-220 50pcs / Tube

TO-220 50pcs / Tube

N-Channel MOSFET

Absolute Maximum Rating

Parameter Symbol Limit Unit

Drain-Source Voltage VDS 500 V
Gate-Source Voltage VGS ±30 V
Continuous Drain Current(TC=25 )℃ ID 13 A
Pulsed Drain Current * IDM 52 A
Peak Diode Recovery dv/dt (Note 3) dv/dt 4.5 V/ns
Single Pulse Avalanche Energy (Note 2) EAS 563 mJ
Avalanche Current (Repetitive) (Note 1) IAR 13 A
Repetitive Avalanche Energy (Note 1) EAR 18.3 mJ
Operating Junction Temperature TJ 150 ºC
Storage Temperature Range T

* Limited by maximum junction temperature

(Ta = 25oC unless otherwise noted)

-55 to +150

STG

o

C

Thermal Performance

Parameter Symbol Limit Unit

Thermal Resistance - Junction to Case

Thermal Resistance - Junction to Ambient TO-220 / ITO-220

Notes: Surface mounted on FR4 board t ≤ 10sec

1/10

TO-220

RӨJC

RӨJA 62.5

0.63

o

C/W ITO-220 2.4

Version: C12

Electrical Specifications

500V N-Channel Power MOSFET

(Ta = 25oC unless otherwise noted)

TSM13N50

Parameter Conditions Symbol

Min Typ Max Unit

Static

Drain-Source Breakdown Voltage V
Drain-Source On-State Resistance V
Gate Threshold Voltage V
Zero Gate Voltage Drain Current V
Gate Body Leakage VGS = ±30V, VDS = 0V I
Forward Transconductance V

= 0V, ID = 250uA BV

GS

= 10V, ID = 6.5A R

GS

= VGS, ID = 250uA V

DS

= 500V, VGS = 0V I

DS

= 30V, ID = 6.5A gfs -- 14 -- S

DS

500 -- -- V

DSS

-- 0.38 0.48 Ω

DS(ON)

2.0 -- 4.0 V

GS(TH)

-- -- 1 uA

DSS

-- -- ±100 nA

GSS

Diode Forward Voltage IS = 13A, VGS = 0V VSD -- -- 1.5 V

Dynamic

Total Gate Charge

V

= 400V, ID = 13A,

Gate-Source Charge Qgs -- 8.5 -­Gate-Drain Charge Qgd -- 8.7 --

V

DS

= 10V

GS

Input Capacitance

V

= 25V, VGS = 0V,

Output Capacitance C

DS

f = 1.0MHz

Reverse Transfer Capacitance C

Qg -- 36 --

C

-- 1918 --

iss

-- 187 --

oss

-- 7.7 --

rss

Switching

Turn-On Delay Time
Turn-On Rise Time tr -- 45 -­Turn-Off Delay Time t

V

= 250V, ID = 13A,

DD

RG = 25Ω

t

-- 53 --

d(on)

-- 156 --

d(off)

Turn-Off Fall Time tf -- 59 -­Reverse Recovery Time
Reverse Recovery Charge Qfr -- 3.3 -- uC

V

= 0V, IS = 13A,

GS

dIF/dt = 100A/us

tfr -- 325 -- nS

Notes:

1. Repetitive Rating: Pulse Width Limited by Maximum Junction Temperature

2. VDD = 50V, IAS=13A, L=6mH, RG=25Ω, Starting TJ=25℃

3. I

≤13A, di/dt ≤ 200A/uS, Vdd ≤ BVDS, Starting TJ=25℃

SD

4. Pulse test: pulse width ≤300uS, duty cycle ≤2%

5. b For design reference only, not subject to production testing.

6. c Switching time is essentially independent of operating temperature.

nC

pF

nS

2/10

Version: C12

Gate Charge Test Circuit & Waveform

Resistive Switching Test Circuit & Waveform

TSM13N50

500V N-Channel Power MOSFET

EAS Test Circuit & Waveform

3/10

Version: C12