Features
• 1024 x 1024 Pixels with Memory Zone
• Up to 60 Images/Second
• Built-in Antiblooming Device Providing an Electronic Shutter Function
• Pixel: 14 µmx14µm
• Image Zone: 14.34 x 14.34 mm²
• Four Outputs (256 x 1024 pixels) at 20 MHz Each
• Possible Binning 2 x 2
• Optical Shield against Parasitic Reflexions and Stray Light
• A/R Window in 400 - 700 nm Bandwidth
Description
The TH7887A is especially designed for high data rate applications (up to 60 pict/s) in
medical and industrial fields.
This area array image sensor consists of a 1024 x 1024 pixels (14
zone associated to a memory zone (masked with optical shield).
In order to increase data rate, the image zone is divided into four zones (256 x 1024
each) which are read in parallel through 4 different outputs (readout frequency up to
20 MHz/output leading to a total readout frequency of 80 MHz).
The TH7887A is designed with antiblooming gates.
Moreover, the 2 x 2 binning mode is available on this sensor. In this case, the image
size is 512 x 512 with 28
The TH7887A is sealed with a specific anti-reflective window optimized in 400 700 nm bandwidth.
µmx28µm pixels. Each output will read 128 x 512 pixels.
µmx14µm) image
Area Array CCD
Image Sensor
1024 x 1024
Pixels with
Antiblooming
TH7887A
Rev. 2146A–IMAGE–05/02
1
Figure 1. TH7887A Organization
1, 2, 3, 4
PΦ
1, 2, 3, 4
M
Φ
A
Φ
VA
1024 x 1024
Image Zone
1024 x 1024
Memory Zone
VDD1 VS1 VDD2 VS2
VOS1 VOS2 VOS3 VOS4
VDD3 VS3
VDD4 VS4
Φ
M
VGS
ΦR
L 1,2Φ
2
TH7887A
2146A–IMAGE–05/02
Pin Identification
TH7887A
VA
AA
W
V
C
B
A
VSS VOS2 VOS1VOS3VOS4 R
Φ
L1 VSS VDR VS4 VS3 VS2 VS1 VSSΦ
L2 M VGS VDD4 VDD3 VDD2 VDD1 VSSΦ Φ
A M4 M3 ΦP3 P2
VSS M2
VSS M1 P4 P1 M4 M1 ΦP4 VSSΦΦΦΦΦ
VDDP N.C
ΦM2
ΦΦΦΦ
VSS P2 M3 VSS P3 VSS
87654321
ΦP1
ΦΦΦΦ
TOP VIEW
Pin Number Symbol Designation
A2, A6
B2, C5
B5, C3
A5, C2
A3, A7
B7, C4
B4, C6
C7, A4
(1)
(1)
(1)
(1)
(1)
(1)
(1)
(1)
ΦP4
ΦP3
Image zone clocks
ΦP2
ΦP1
ΦM1
ΦM2
Memory zone clocks
ΦM3
ΦM4
A1
Index
2146A–IMAGE–05/02
V7 ΦM Memory to register clock
W8 ΦL1
Readout register clocks
V8 ΦL2
V2 VDD1
V3 VDD2
Output amplifier drain supply
V4 VDD3
V5 VDD4
W2 VS1
W3 VS2
Output amplifier source supply
W4 VS3
W5 VS4
AA6 VDDP Screen voltage
AA5 NC Not connected
V6 VGS Register output gate bias
3
Pin Number Symbol Designation
AA1 VOS1
AA2 VOS2
AA3 VOS3
AA4 VOS4
AA8 ΦR Reset clock
C8 ΦA Antiblooming gate clock
W6 VDR Reset bias
C1 VA Antiblooming diode bias
AA7, V1, W1 VSS
B6, B1, A1, B3 VSS
Note: 1. Short circuited on package.
Video output signal
Substrate biasW7, A8, B8 VSS
4
TH7887A
2146A–IMAGE–05/02
TH7887A
Geometrical
Characteristics
Figure 2. Video Line (on each output)
3 isolation lines
First pixel
6 dark reference lines
The image zone features 1024 useful lines (+ 20 extra lines) of 1024 pixels. For readout
only, the full frame is split into 4 blocks of 256 columns.
The video line consists of 256 useful pixels, and 273 elements in total (for each output).
Image zone
Memory zone
7 dark reference lines
1024 useful pixels
3 isolation lines
1 inactive line
1044 line
1044 lin
Pixels 1 to 17 : inactive prescan elements
Pixels 18 to 273 : useful elements
2146A–IMAGE–05/02
Vos1 Vos2 Vos3 Vos4
5
Figure 3. Pixel Layout
14 µm
Φ A Φ A Φ A Φ A
VA
VA
A
A'
Aperture 10.3 µm
14 µm
Φ P1
Φ P2
Φ P3
Φ P4
Φ P1
Figure 4. Cross-section AA’
Potential profile
during integration time
Φ P1
Φ P2
14 µm
Φ P3
Φ P4
Signal charge
for one pixel
Φ P1
Transfer direction
6
TH7887A
2146A–IMAGE–05/02