Radio Shack TRS-80, MC-10, TRS-80 MC-10, 26-3011 Service Manual
26-3011
TRS-80
®
MICRO COLOR COMPUTER
MODEL MC-10
Catalog Number 26-3011
CUSTOM MANUFACTURED FOR RADIO SHACK, A DIVISION OF TANDY CORPORATION
TABLE OF CONTENTS
SECTION PAGE
NUMBER NUMBER
I SYSTEM DESCRIPTION - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 3
II SPECIFICATIONS - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 7
III DISASSEMBLY / REASSEMBLY - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 9
IV THEORY OF OPERATION - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 11
CPU-6803 - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 12
Reset Circuit - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 12
ROM - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 12
Cassette Interface - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 12
Detailed Tape Format Information - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 13
RS-232C Interface - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 14
I/O Connector - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 15
Keyboard Interface - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 16
TV Switch Box - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 16
Power Supply - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 17
VDG - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 17
Device Selection - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 19
System Timing - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 19
RAM - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 20
Modulator - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 20
V TROUBLESHOOTING - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 21
VI PARTS LIST - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 25
VII PRINTED CIRCUIT BOARDS - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 30
VIII IC INTERNAL CONNECTIONS - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 33
IX SCHEMATlC DlAGRAM - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 44
X EXPLODED VlEW - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - 46
[ Editor’s Note: I woul d also like to express my tha nks to RadioShack for perm itting the distributio n of this manual. I hope you find it useful. I have found a few
typos and inconsistenc ies in the Service Manual that I hav e noted in an italized
font like this. JMM.]
– 2 –
SECTION I
SYSTEM DESCRIPTION
– 3 –
SYSTEM DESCRIPTION
The MC-10 Micro Color Computer is a fully
expandable microprocessor system. I t is composed of a 6803 centr al processing unit, 4K of
static RAM, 8K of Basic ROM, and a 6847 v ideo
display generator. The microcomputer is also
interfaced to a 48-key keyboard and provides
the logic to execute a 1500 Baud cassette interface and a RS-232 serial int erface. The system
operates on a common color burst frequency
of 3.579545 MHz. Th is main clock is divided by
4 in the CPU to yield an operating speed of 0 .89
MHz.
In operation, the 4K of static RAM is shared
between the CPU and the video display generator. This time multiplexing is based on the
processor clock E. The CPU will be granted
access to the RAM (upon request) only during
the high state of E. This allows efficient usage
of the RAM with no waiting by the CPU and no
visible conflict on the display.
The 6847 VDG provides a display on a TV
screen of 32 characters by 16 rows. It also
allows a 64 x 32 semigr aphics mode with eight
colors. This display utilizes a minimum amount
of system RAM (512 bytes).
The final elements of the microcomputer system are the I/O devices. The MC-10 is interfaced
to a 48-key keyboard which generates the
codes for upper and lower case characters,
graphics symbols, and single stroke keyboard
entry. The computer also provides a 1500 baud
cassette interface for fast a nd re liable data and
program storage and a limited signal RS-232C
interface. The RS-232C interface allows eit her a
printer or a modem to be used with the MC-10.
– 4 –
SYSTEM BLOCK DIAGRAM
– 5 –
MEMORY MAP
Hex Address
C000 - FFFF 16K ROM (only 8K used)
9000 - BFFF 16K I/O Slot (Keyboard and VDG control)
4000 - 8FFF 16K RAM (4K - 20K used)
0100 - 3FFF Not Used
0080 - 00FF RAM internal to the 6803
0015 - 007F Not Used
0014 RAM Control Register
0013 Not Used
0012 Not Used
0011 Not Used
0010 Not Used
000F Port 3 Control and Status Register
000E Input Capture Register (low byte)
000D Input Capture Register (high byte)
000C Output Compare Register (low byte)
000B Output Compare Register (high byte)
000A Counter (low byte)
0009 Counter (high byte)
0008 Timer Control and Status Register
0007 Not Used
0006 Not Used
0005 Not Used
0004 Not Used
0003 Miscellaneous I/O Data Register
0002 Keyboard Output Lines
0001 Data Direction Register for miscellaneous I/O
0000 Data Direction Register for keyboard lines
– 6 –
SECTION II
SPECIFICATIONS
– 7 –
SPECIFICATIONS
Power Supply
AC/AC adaptor Input 120V/60Hz
Output 8.0V/1.5A 16W
RF Modulator Ch. FC (MHz) Fsc (MHz)
For U.S.A./CANADA 3 61.25 +/-0.25 4.5 +/-0.2
4 67.65 4.5
Output Impedance 75 ohm
RF Output Terminal RCA jack
RF Output Level 1.5 - 2.8 mV at 75 ohm
Central Processing Unit
6803 8-bit processor
clock speed 0.89 MHz
Memory Size
ROM (for BASIC) 8K
RAM 4K (expandable up to
20K-external)
Video Display
Character display 512 (32 x 16) upper case
characters
Semi-Graphic display 64 x 32 elements
Color 8 colors - Green, Yellow,
Blue, Red, Buff, Cyan, Magenta, Orange
Interface
Printer RS232C, 4 pin DIN
Cassette 5-pin DIN 1500 baud
Bus line 34-pin Cartridge connector
Switch Box
Isolation more than 60 dB
Dimensions
8-1/2" x 1-7/8” x 7”
Weight
1.75 Ibs (.7875 kilograms)
– 8 –
SECTION III
DISASSEMBLY / REASSEMBLY
– 9 –
DISASSEMBLY
1. Unplug the units from the AC wall outlet
and disconnect all cables from the rear
panel.
2. Turn the computer over and remove the
four screws from the case bottom. One of
the screws is located under the warranty
seal in the upper right corner of the case
bottom.
3. Turn the computer right side up. Disconnect the snap locks located on the right and
left side of the case by placing a slotted
screw driver in the groove between the top
and bottom cases, approximately 2.7
inches from the rear of case. Push in and
turn the screwdriver to pop the case apart.
4. Disconnect Keyboard cable from wire connector. NOTE : Pull flat wire upward.
5. Remove three screws that fasten the PC
Board to the bottom of the case. Remove
the PC Board.
6. Use tweezers to remove eleven clips that
fasten the bottom shield to the P.C. Board.
7. Locate the eight positions where the top
shield is soldered to the PC Board. Remove
this solder with solde r wick or a desoldering tool. Bend the protruding edge of the
shield upward until it is parallel to the slot
and remove top shield.
1. Removal of T op Cabinet
Remove 4 screws as shown in Figure A.
Figure A
2. Removal of P.C. Board
Remove flat wires of keyboard from connector.
Remove 3 screws as shown in Figure B.
REASSEMBLY
1. Install the top PC Board shield. Solder the
shield to the ground plane at eight points.
2. Install the bottom shield with metal side up.
Secure to the PC Board with eleven clips.
3. Install PC Board in bottom of case. Secur e
with three sc re ws.
4. Install the two keyboard cables in their
respective connect ors. Th is w il l be eas ier if
both hands are used and you are facing
rear of unit. Refasten cable restraints.
5. Join the top and bottom cases and push
them together at the snap lock positions.
This is a tight fit, therefore repositioning of
the cases may be required.
6. Install four screws in bottom of case.
Figure B
3. Removal of Keyboard
Remove 4 screws as shown in Figure C.
Figure C
– 10 –
SECTION IV
THEORY OF OPERATION
– 11 –
CPU-6803
RESET CIRCUIT
The main component of this microcomputer
system is the 6803 CPU. This is a 40-pin integrated circuit which provides the address,
data, and miscellaneous control signals. The
CPU receives the main clock frequency of
3.579545 MHz from the modulator assembly
and divides this by 4 to produce an operating
frequency of 0.89 MH z. This freque ncy is available as the processor clock E.
This processor chip is designed to be used in a
minimum hardware configuration so, I/O lines
are provided directly from th e CPU chip. In the
MC-10 computer these I/O lines are used to
address the keyboard and to support the cassette and RS232 interface.
The 6803 CPU is able to support several different modes of operation. For the MC-10 the CPU
is operating in mode 2. The CPU mode is
selected at power-up by the state of lines P20,
P21, and P22. P20 and P22 are connected by a
diode to Reset so that during power-up these
lines are low. P21 is connected to a pull-up
resistor so that during power-up it is high.
Mode 2 operates with 128 bytes of internal
RAM, a full 16 line address bus and an 8 bit
data bus which is multiplexed with the lower
eight address lines. Due to the multiplexed
address and data bus, two external devices ar e
required. A 74LS373 is used to latch the
address lines. This occurs durin g the low portion of the E clock when the CPU is not accessing external devices. The latch signal (AS) is
provided by the CPU. The other external device
is a 74LS245. This bi-directional buffer is
required to isolate the RAM output lines, which
are providing data to the video display generator during the low portion of the E clock, away
from the CPU data bus. This buffer is controlled
by the device selection logic.
The reset circuit is composed of switch S1
diode D9, resistor R24, capacitor C8, and two
gates of IC U12. R24 and C8 form a simple time
constant so that during power up or whenever
the reset switch is pressed, the reset line will
stay low for a few milliseconds before returning
to the high state. The reset input to the 6803
does not provide hysteresis so the reset signal
must be buffered by U12 before being connected to the CPU. The final component of the
circuit is diode D9 which is provided to allow
for rapid cycling of the power switch.
ROM
The MC-10 uses a single 8K x 8 ROM to store
the BASIC operating language. This is located
in a 16K memory map segment between hex
C000 - FFFF. This device is connected directly
to the multiplexed address/data, however any
possible contention is avoided by enabling the
ROM only during the high cycle of the E clock.
CASSETTE INTERFACE
The cassette interface is compose d of an output attenuator connected to a CPU output line
and an input zero crossing detector. Most of
the important cassette parameters are controlled by software. However, there is no cassette motor relay in the Micro Color Computer
and cassette recorder operation must be manual.
The cassette format chosen uses a sinewave of
2400 or 1200 Hertz t o yield a Baud rate of approximately 1500 Baud. In this format, a 0 (or
logic low) is represen ted by one cycle of 1200
Hertz. A 1 (or logic high) is represented by one
cycle of 2400 Hertz. A sa mple of data is shown
in Figure 2. A typical program tape would consist of a leader of alternating 1’s and 0’s, followed by one or more blocks of data. A block of
data is composed of 0 to 255 bytes of data with
a checksum, sync byte, and the block length.
The output circuit utilizes a CPU output line to
produce a sinewave of 1200 or 2400 Baud. This
signal is then attenuated to approximately 1
volt and connected to the auxiliary input of the
cassette recorder.
– 12 –
The input circuit is a zero crossing detector.
R12 is a termination resistor for the cassette
output. Resistors R16 a nd R17 are used to bias
one input of the comparator at 1 volt. The other
input is also biased at 1 volt by R15 and the
series combination of R14 and R13. If the AC
input from the recorder goes negative, diode
D6 turns on and sets the input to the com para-
00110
4.6v
0v
1v
0v
2.5v
0v
2.5v
5v
0v
0
This is shown inverted to indicate possible phase inversion by the tape recorder.
Figure 2. Sample Data of Cassette Format
00111
tor equal to 1/2 volt. Since the other input is
biased at 1 volt, the comparator output is
switched to the high state. If the AC input from
the recorder is pos itive, diode D6 is turne d off
and the input to the comparator will be at some
point greater than 1 volt, in which case, the
comparator output will be low.
REFERENCE SQUARE WAVE
COMPUTER MEMORY DATA
1
0
D/A OUTPUT
INPUT TO TAPE
OUTPUT FROM TAPE
INPUT TO THE PIA
1
0
1
DATA STORED
IN MEMORY
The comparator output is open-collector so
pullup resistor R19 is provided to generate a
TTL signal. R18 is used to prevent oscillation of
DETAILED TAPE FORMAT INFORMATION
The standard MC-10 tape is composed of the
following items:
1. A leader consisting of 128 bytes of hex 55
2. A Namefile block
3. A blank section of tape approximately
equal to 0.5 seconds in length; this allows
BASIC time to evaluate the Namefile.
4. A second leader of 128 bytes of Hex 55
5. One or more Data blocks
6. An End of File block
The block format for Data blocks, Namefile
Blocks, or an End of File block is as follows:
1. One leader byte - 55H
2. One sync byte - 3CH
3. One block type byte — 01H = Data, FFH =
End of File, 00H - Namefile
4. One block length byte - 00H to FFH
5. Data - 0 to 255 bytes
6. One checksum byte - the sum of all the data
plus block type and block length
7. One leader byte - 55H
the comparator. The final portion of the cassette circuit is capacitor C7 which is used to
isolate noise from the cassette cable.
The End of File block is a standard block with a
length of 0 and the block type equal to FFH. The
Namefile block is a standard block with a
length of 15 bytes (0FH) and the block type
equals 00H. The 15 bytes of data provide information to BASIC and are employed as described below:
1. Eight bytes for the program name
2. One file type byte - 00H = BASIC, 01H =
Data, 02H = Machine Language
3. One ASCII flag byte - 00H = Bi nary, FFH =
ASCII
4. One Gap flag byte - 01H = Continuous, FFH
= Gaps
5. Two bytes for the start address of a
machine language program
6. Two bytes for the load address of a
machine language program
– 13 –
RS-232C INTERFACE
The RS-232C interface utilizes a 4 -pin DIN connector (J2). This interface allo ws the computer
to have serial communication with printers,
modem, or other computers. The four signals
used by the interface are:
1. CD — a status input line
2. RS232lN — serial data input
3. GROUND — zero voltage reference
4. RS232OUT — serial data out
The pin configuration for the DIN connector is
shown in Figure 3.
1
RS232 OUT
4
3
2
CD
RS232 IN
thus if the input voltage is greater than 2.6
volts, the comparator is turned on. The comparator outputs are open-collector so pull-up
resistors R8 and R9 are required.
[I think there is a consistent e rror in the doc umentation of the pins here, specifically, CD and
RS232IN are reversed.]
1. RS232lN — serial data input
2. CD — a status input line
3. GROUND — zero voltage reference
4. RS232OUT — serial data out
[And the diagram should look like:]
1
RS232 OUT
4
3
2
RS232 IN
CD
Figure 3. RS-232C Connector Pin-Out
In general, an RS232C signal uses negative
logic. Therefore, a voltage greater than +3 volts
is defined as a SPACE, or logical 0. A voltage
less than -3 volts is defined as a MARK, or logical 1. The range of -3 to +3 volts is undefined.
The RS-232C interface circuitry is shown on the
upper right corner of the schematic. The output
signal from the CPU output P20 is tied to a
741C op-amp (U16). This same output is also
used for the cassette output, so care must be
taken to ensure that a casset te o utput d oes no t
appear as an RS-232 output. The op-amp is referenced at 1.4 volts by resistors R2 and R3.
This reference causes the op-amp to swing between the two power s upply voltages (Vcc and
Vee) as the TTL input switches states. A 100
ohm resistor (R1) is included to provide a current limit on the output. The two input signals
(RS232lN and CD) utilize identical circuits and
share a common bias resistor network.
RS232IN (pin 4 of U15) is tied to CPU input P22
and CD (pin 6 of U15) is tied to CPU input P23.
The inputs from the external device are connected to the positive side of a diode. This
diode blocks the application of a negative voltage to the comparator (U15). When a positive
voltage is applied, the diode conducts and the
voltage is applied to the input. The comparators are referenced at tw o volts, by R5 and R6,
[and the text should read...]
“The two input signals
(RS232lN and CD) utilize identical circuits and
share a common bias resis tor network. CD (pin 4
of U15) is tied to CPU inpu t P2 2 an d RS 232 IN (pi n
6 of U15) is tied to CPU input P23.”]
– 14 –
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