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201907EC25MX
Users Manual
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Quectel Wireless Solutions 201907EC25MX Users Manual

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EC25 Hardware Design
LTE Standard Module Series
Rev. EC25_Hardware_Design_V2.0
Date: 2019-04-30
Status: Released
www.quectel.com
EC25 Hardware Design
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GENERAL NOTES
QUECTEL OFFERS THE INFORMATION AS A SERVICE TO ITS CUSTOMERS. THE INFORMATION
PROVIDED IS BASED UPON CUSTOMERS’ REQUIREMENTS. QUECTEL MAKES EVERY EFFORT
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Copyright © Quectel Wireless Solutions Co., Ltd. 2019. All rights reserved.
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EC25 Hardware Design
About the Document
History
Revision Date Author Description
1.0 2016-04-01 Woody WU Initial
1.1 2016-09-22
1.2 2016-11-04
Lyndon LIU/
Frank WANG
Lyndon LIU/
Michael ZHANG
1. Updated EC25 series frequency bands in Table 1.
2. Updated transmitting power, supported maximum
baud rate of main UART/internal protocols/USB
drivers of USB interface, firmware upgrade and
temperature range in Table 2.
3. Updated timing of turning on module in Figure 12.
4. Updated timing of turning off module in Figure 13.
5. Updated timing of resetting module in Figure 16.
6. Updated supported baud rates of main UART in
Chapter 3.11.
7. Added notes for ADC interface in Chapter 3.13.
8. Updated GNSS performance in Table 21.
9. Updated operating frequencies of module in Table 23.
10. Added current consumption in Chapter 6.4.
11. Updated RF output power in Chapter 6.5.
12. Added RF receiving sensitivity in Chapter 6.6.
1. Added SGMII and WLAN interfaces in Table 2.
2. Updated function diagram in Figure 1.
3. Updated pin assignment (Top View) in Figure 2.
4. Added description of SGMII and WLAN interfaces in
Table 4.
5. Added SGMII interface in Chapter 3.17.
6. Added WLAN interface in Chapter 3.18.
7. Added USB_BOOT interface in Chapter 3.19.
8. Added reference design of RF layout in Chapter 5.1.4.
9. Added note about SIMO in Chapter 6.6.
1.3 2017-01-24
EC25_Hardware_Design 2 / 112
Lyndon LIU/
Frank WANG
1. Updated function diagram in Figure 1.
2. Updated pin assignment (top view) in Figure 2.
EC25 Hardware Design
AnniceZHANG/
1.4 2018-03-05
Lyndon LIU/
Frank WANG
3. Added BT interface in Chapter 3.18.2.
4. Updated GNSS performance in Table 24.
5. Updated reference circuit of wireless connectivity
interfaces with FC20 module in Figure 29.
6. Updated current consumption of EC25-E module in
Table 33.
7. Updated EC25-A conducted RF receiving sensitivity
in Table 38.
8. Added EC25-J conducted RF receiving sensitivity in
Table 40.
1. Updated functional diagram in Figure 1.
2. Updated LTE, UMTS and GSM features in Table 2.
3. Updated description of pin 40/136/137/138.
4. Updated PWRKEY pulled down time to 500ms in
Chapter 3.7.1 and reference circuit in Figure 10.
5. Updated reference circuit of (U)SIM interface in
Figure 17&18.
6. Updated reference circuit of USB interface in Figure
19.
7. Updated PCM mode in Chapter 3.12.
8. Added SD card interface in Chapter 3.13.
9. Updated USB_BOOT reference circuit in Chapter
3.20.
10. Updated module operating frequencies in Table 26.
11. Updated antenna requirements in Table 30.
12. Updated EC25 series module current consumption in
Chapter 6.4.
13. Updated EC25 series module conducted RF receiving
sensitivity in Chapter 6.6.
14. Added thermal consideration description in Chapter
6.8.
15. Added dimension tolerance information in Chapter 7.
16. Added storage temperature range in Table 2 and
Chapter 6.3.
17. Updated RF output power in Table 41.
18. Updated GPRS multi-slot classes in Table 53.
19. Updated storage information in Chapter 8.1.
1. Added information of EC25-AF in Table 1.
2. Updated module operating frequencies in Table 27.
3. Added current consumption of EC25-AF module in
1.5 2018-04-20 Kinsey ZHANG
Table 40.
4. Changed GNSS current consumption of EC25 series
module into Table 41.
5. Added EC25-AF conducted RF receiving sensitivity in
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EC25 Hardware Design
Nathan LIU/
2.0 2019-04-30
Frank WANG/
Ward WANG/
Ethan SHAN
Table 50.
1. Added new variants EC25-EU/-EC/-EUX/-MX and
related information.
2. Updated functional diagram in Figure 1.
3. Updated star structure of the power supply in Figure 8.
4. Updated power-on scenario of module in Figure 12.
5. Updated reference circuit with translator chip in Figure
20.
6. Added timing sequence for entering into emergency
download mode of USB_BOOT interface in Figure 32.
7. Updated general description in Table 1.
8. Updated module operating frequencies in Table 27.
9. Updated GNSS frequency in Table 29.
10. Updated antenna requirements in Table 30.
11. Updated EC25-V current consumption in Table 36.
12. Added EC25-EU current consumption in Table 41
13. Added EC25-EC current consumption in Table 42.
14. Added EC25-EUX current consumption in Table 43.
15. Added EC25-MX current consumption in Table 44.
16. Updated EC25-E conducted RF receiving sensitivity in
Table 47.
17. Updated EC25-A conducted RF receiving sensitivity in
Table 48.
18. Updated EC25-V conducted RF receiving sensitivity in
Table 49.
19. Updated EC25-AUT conducted RF receiving
sensitivity in Table 52.
20. Updated EC25-AUTL conducted RF receiving
sensitivity in Table 53.
21. Added EC25-EU conducted RF receiving sensitivity in
Table 55.
22. Added EC25-EC conducted RF receiving sensitivity in
Table 56.
23. Added EC25-EUX conducted RF receiving sensitivity
in Table 57.
24. Added EC25-MX conducted RF receiving sensitivity in
Table 58.
25. Updated recommended stencil thickness as
0.18mm~0.20mm and reflow soldering thermal profile
in Chapter 8.2.
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Contents
About the Document ................................................................................................................................ 2
Contents .................................................................................................................................................... 5
Table Index ............................................................................................................................................... 8
Figure Index ............................................................................................................................................ 10
1 Introduction ..................................................................................................................................... 12
1.1. Safety Information ................................................................................................................. 13
2 Product Concept ............................................................................................................................. 17
2.1. General Description .............................................................................................................. 17
2.2. Key Features ......................................................................................................................... 18
2.3. Functional Diagram ............................................................................................................... 21
2.4. Evaluation Board ................................................................................................................... 22
3 Application Interfaces ..................................................................................................................... 23
3.1. General Description .............................................................................................................. 23
3.2. Pin Assignment ..................................................................................................................... 24
3.3. Pin Description ...................................................................................................................... 25
3.4. Operating Modes .................................................................................................................. 37
3.5. Power Saving ........................................................................................................................ 37
3.5.1.
Sleep Mode.................................................................................................................. 37
3.5.1.1. UART Application .............................................................................................. 37
3.5.1.2. USB Application with USB Remote Wakeup Function ....................................... 38
3.5.1.3. USB Application with USB Suspend/Resume and RI Function.......................... 39
3.5.1.4. USB Application without USB Suspend Function .............................................. 40
3.5.2. Airplane Mode .............................................................................................................. 40
3.6. Power Supply ........................................................................................................................ 41
3.6.1. Power Supply Pins ....................................................................................................... 41
3.6.2. Decrease Voltage Drop ............................................................................................... 42
3.6.3. Reference Design for Power Supply ............................................................................ 43
3.6.4. Monitor the Power Supply ............................................................................................ 43
3.7. Power-on and off Scenarios .................................................................................................. 44
3.7.1. Turn on Module Using the PWRKEY ........................................................................... 44
3.7.2. Turn off Module ............................................................................................................ 46
3.7.2.1. Turn off Module Using the PWRKEY Pin ........................................................... 46
3.7.2.2. Turn off Module Using AT Command ................................................................ 46
3.8. Reset Module ........................................................................................................................ 47
3.9.
(U)SIM Interface .................................................................................................................... 48
3.10. USB Interface ........................................................................................................................ 50
3.11. UART Interfaces ................................................................................................................... 52
3.12. PCM and I2C Interfaces ........................................................................................................ 55
3.13. SD Card Interface ................................................................................................................. 57
3.14. ADC Interfaces ...................................................................................................................... 59
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EC25 Hardware Design
3.15. Network Status Indication ..................................................................................................... 60
3.16. STATUS ................................................................................................................................ 61
3.17. Behaviors of RI ..................................................................................................................... 62
3.18. SGMII Interface ..................................................................................................................... 62
3.19. Wireless Connectivity Interfaces ........................................................................................... 64
3.19.1. WLAN Interface ........................................................................................................... 67
3.19.2. BT Interface* ................................................................................................................ 67
3.20. USB_BOOT Interface............................................................................................................ 67
4 GNSS Receiver ................................................................................................................................ 70
4.1. General Description .............................................................................................................. 70
4.2. GNSS Performance .............................................................................................................. 70
4.3. Layout Guidelines ................................................................................................................. 71
5 Antenna Interfaces .......................................................................................................................... 72
5.1. Main/Rx-diversity Antenna Interfaces.................................................................................... 72
5.1.1. Pin Definition ................................................................................................................ 72
5.1.2. Operating Frequency ................................................................................................... 72
5.1.3. Reference Design of RF Antenna Interface ................................................................. 74
5.1.4. Reference Design of RF Layout ................................................................................... 74
5.2. GNSS Antenna Interface ....................................................................................................... 76
5.3. Antenna Installation .............................................................................................................. 78
5.3.1. Antenna Requirement .................................................................................................. 78
5.3.2. Recommended RF Connector for Antenna Installation ................................................ 79
6 Electrical, Reliability and Radio Characteristics .......................................................................... 81
6.1. Absolute Maximum Ratings .................................................................................................. 81
6.2. Power Supply Ratings ........................................................................................................... 82
6.3. Operation and Storage Temperatures .................................................................................. 82
6.4. Current Consumption ............................................................................................................ 83
6.5. RF Output Power ................................................................................................................ 101
6.6. RF Receiving Sensitivity ..................................................................................................... 102
6.7. Electrostatic Discharge ....................................................................................................... 108
6.8. Thermal Consideration ........................................................................................................ 109
7 Mechanical Dimensions................................................................................................................ 111
7.1. Mechanical Dimensions of the Module................................................................................ 111
7.2.
Recommended Footprint ..................................................................................................... 113
7.3. Design Effect Drawings of the Module ................................................................................ 114
8 Storage, Manufacturing and Packaging ...................................................................................... 115
8.1. Storage ............................................................................................................................... 115
8.2. Manufacturing and Soldering .............................................................................................. 116
8.3. Packaging ........................................................................................................................... 117
9 Appendix A References ................................................................................................................ 119
10 Appendix B GPRS Coding Schemes ........................................................................................... 123
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EC25 Hardware Design
11 Appendix C GPRS Multi-slot Classes .......................................................................................... 124
12 Appendix D EDGE Modulation and Coding Schemes ................................................................ 126
EC25_Hardware_Design 7 / 112
EC25 Hardware Design
Table Index
TABLE 1: FREQUENCY BANDS OF EC25 SERIES MODULE ....................................................................... 17
TABLE 2: KEY FEATURES OF EC25 MODULE .............................................................................................. 18
TABLE 3: I/O PARAMETERS DEFINITION ...................................................................................................... 25
TABLE 4: PIN DESCRIPTION ........................................................................................................................... 25
TABLE 5: OVERVIEW OF OPERATING MODES ............................................................................................ 37
TABLE 6: VBAT AND GND PINS ...................................................................................................................... 41
TABLE 7: PIN DEFINITION OF PWRKEY ........................................................................................................ 44
TABLE 8: PIN DEFINITION OF RESET_N ....................................................................................................... 47
TABLE 9: PIN DEFINITION OF (U)SIM INTERFACE ....................................................................................... 49
TABLE 10: PIN DESCRIPTION OF USB INTERFACE ..................................................................................... 51
TABLE 11: PIN DEFINITION OF MAIN UART INTERFACE ............................................................................ 52
TABLE 12: PIN DEFINITION OF DEBUG UART INTERFACE......................................................................... 53
TABLE 13: LOGIC LEVELS OF DIGITAL I/O ................................................................................................... 53
TABLE 14: PIN DEFINITION OF PCM AND I2C INTERFACES ...................................................................... 56
TABLE 15: PIN DEFINITION OF SD CARD INTERFACE ................................................................................ 57
TABLE 16: PIN DEFINITION OF ADC INTERFACES ...................................................................................... 59
TABLE 17: CHARACTERISTIC OF ADC .......................................................................................................... 59
TABLE 18: PIN DEFINITION OF NETWORK CONNECTION STATUS/ACTIVITY INDICATOR .................... 60
TABLE 19: WORKING STATE OF NETWORK CONNECTION STATUS/ACTIVITY INDICATOR .................. 60
TABLE 20: PIN DEFINITION OF STATUS ....................................................................................................... 61
TABLE 21: BEHAVIORS OF RI ......................................................................................................................... 62
TABLE 22: PIN DEFINITION OF SGMII INTERFACE ...................................................................................... 63
TABLE 23: PIN DEFINITION OF WIRELESS CONNECTIVITY INTERFACES ............................................... 65
TABLE 24: PIN DEFINITION OF USB_BOOT INTERFACE............................................................................. 68
TABLE 25: GNSS PERFORMANCE ................................................................................................................. 70
TABLE 26: PIN DEFINITION OF RF ANTENNAS ............................................................................................ 72
TABLE 27: MODULE OPERATING FREQUENCIES ....................................................................................... 72
TABLE 28: PIN DEFINITION OF GNSS ANTENNA INTERFACE .................................................................... 76
TABLE 29: GNSS FREQUENCY ...................................................................................................................... 77
TABLE 30: ANTENNA REQUIREMENTS ......................................................................................................... 78
TABLE 31: ABSOLUTE MAXIMUM RATINGS ................................................................................................. 81
TABLE 32: POWER SUPPLY RATINGS .......................................................................................................... 82
TABLE 33: OPERATION AND STORAGE TEMPERATURES ......................................................................... 82
TABLE 34: EC25-E CURRENT CONSUMPTION ............................................................................................. 83
TABLE 35: EC25-A CURRENT CONSUMPTION ............................................................................................. 85
TABLE 36: EC25-V CURRENT CONSUMPTION ............................................................................................. 86
TABLE 37: EC25-J CURRENT CONSUMPTION ............................................................................................. 87
TABLE 38: EC25-AU CURRENT CONSUMPTION .......................................................................................... 88
TABLE 39: EC25-AUT CURRENT CONSUMPTION ........................................................................................ 91
TABLE 40: EC25-AF CURRENT CONSUMPTION ........................................................................................... 92
TABLE 41: EC25-EU CURRENT CONSUMPTION .......................................................................................... 93
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TABLE 42: EC25-EC CURRENT CONSUMPTION .......................................................................................... 95
TABLE 43: EC25-EUX CURRENT CONSUMPTION ........................................................................................ 97
TABLE 44: EC25-MX CURRENT CONSUMPTION ........................................................................................ 100
TABLE 45: GNSS CURRENT CONSUMPTION OF EC25 SERIES MODULE .............................................. 101
TABLE 46: RF OUTPUT POWER ................................................................................................................... 101
TABLE 47: EC25-E CONDUCTED RF RECEIVING SENSITIVITY ................................................................ 102
TABLE 48: EC25-A CONDUCTED RF RECEIVING SENSITIVITY ................................................................ 103
TABLE 49: EC25-V CONDUCTED RF RECEIVING SENSITIVITY ................................................................ 103
TABLE 50: EC25-J CONDUCTED RF RECEIVING SENSITIVITY ................................................................ 103
TABLE 51: EC25-AU CONDUCTED RF RECEIVING SENSITIVITY ............................................................. 104
TABLE 52: EC25-AUT CONDUCTED RF RECEIVING SENSITIVITY ........................................................... 105
TABLE 53: EC25-AUTL CONDUCTED RF RECEIVING SENSITIVITY ......................................................... 105
TABLE 54: EC25-AF CONDUCTED RF RECEIVING SENSITIVITY ............................................................. 105
TABLE 55: EC25-EU CONDUCTED RF RECEIVING SENSITIVITY ............................................................. 106
TABLE 56: EC25-EC CONDUCTED RF RECEIVING SENSITIVITY ............................................................. 106
TABLE 57: EC25-EUX CONDUCTED RF RECEIVING SENSITIVITY ........................................................... 107
TABLE 58: EC25-MX CONDUCTED RF RECEIVING SENSITIVITY ............................................................. 108
TABLE 59: ELECTROSTATICS DISCHARGE CHARACTERISTICS (25ºC, 45% RELATIVE HUMIDITY) ... 108
TABLE 60: RECOMMENDED THERMAL PROFILE PARAMETERS ............................................................ 116
TABLE 61: RELATED DOCUMENTS ............................................................................................................. 119
TABLE 62: TERMS AND ABBREVIATIONS ................................................................................................... 119
TABLE 63: DESCRIPTION OF DIFFERENT CODING SCHEMES ................................................................ 123
TABLE 64: GPRS MULTI-SLOT CLASSES .................................................................................................... 124
TABLE 65: EDGE MODULATION AND CODING SCHEMES ........................................................................ 126
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Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 22
FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 24
FIGURE 3: SLEEP MODE APPLICATION VIA UART ...................................................................................... 38
FIGURE 4: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP .................................................... 39
FIGURE 5: SLEEP MODE APPLICATION WITH RI ......................................................................................... 39
FIGURE 6: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION ................................................ 40
FIGURE 7: POWER SUPPLY LIMITS DURING BURST TRANSMISSION ..................................................... 42
FIGURE 8: STAR STRUCTURE OF THE POWER SUPPLY ........................................................................... 42
FIGURE 9: REFERENCE CIRCUIT OF POWER SUPPLY .............................................................................. 43
FIGURE 10: TURN ON THE MODULE BY USING DRIVING CIRCUIT ........................................................... 44
FIGURE 11: TURN ON THE MODULE BY USING KEYSTROKE ................................................................... 45
FIGURE 12: POWER-ON SCENARIO OF MODULE ....................................................................................... 45
FIGURE 13: POWER-OFF SCENARIO OF MODULE ...................................................................................... 46
FIGURE 14: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT ...................................... 47
FIGURE 15: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON ...................................................... 48
FIGURE 16: RESET SCENARIO OF MODULE ................................................................................................ 48
FIGURE 17: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR
................................................................................................................................................................... 49
FIGURE 18: REFERENCE CIRCUIT OF (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR 50
FIGURE 19: REFERENCE CIRCUIT OF USB APPLICATION ......................................................................... 51
FIGURE 20: REFERENCE CIRCUIT WITH TRANSLATOR CHIP ................................................................... 54
FIGURE 21: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT .............................................................. 54
FIGURE 22: PRIMARY MODE TIMING ............................................................................................................ 55
FIGURE 23: AUXILIARY MODE TIMING .......................................................................................................... 56
FIGURE 24: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC ................................... 57
FIGURE 25: REFERENCE CIRCUIT OF SD CARD INTERFACE ................................................................... 58
FIGURE 26: REFERENCE CIRCUIT OF THE NETWORK INDICATOR ......................................................... 61
FIGURE 27: REFERENCE CIRCUITS OF STATUS ........................................................................................ 61
FIGURE 28: SIMPLIFIED BLOCK DIAGRAM FOR ETHERNET APPLICATION ............................................. 63
FIGURE 29: REFERENCE CIRCUIT OF SGMII INTERFACE WITH PHY AR8033 APPLICATION ................ 64
FIGURE 30: REFERENCE CIRCUIT OF WIRELESS CONNECTIVITY INTERFACES WITH FC20 MODULE
................................................................................................................................................................... 66
FIGURE 31: REFERENCE CIRCUIT OF USB_BOOT INTERFACE ................................................................ 68
FIGURE 32: TIMING SEQUENCE FOR ENTERING INTO EMERGENCY DOWNLOAD MODE .................... 68
FIGURE 33: REFERENCE CIRCUIT OF RF ANTENNA INTERFACE ............................................................ 74
FIGURE 34: MICROSTRIP DESIGN ON A 2-LAYER PCB .............................................................................. 75
FIGURE 35: COPLANAR WAVEGUIDE DESIGN ON A 2-LAYER PCB .......................................................... 75
FIGURE 36: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 3 AS REFERENCE GROUND)
................................................................................................................................................................... 75
FIGURE 37: COPLANAR WAVEGUIDE DESIGN ON A 4-LAYER PCB (LAYER 4 AS REFERENCE GROUND)
................................................................................................................................................................... 76
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FIGURE 38: REFERENCE CIRCUIT OF GNSS ANTENNA ............................................................................. 77
FIGURE 39: DIMENSIONS OF THE U.FL-R-SMT CONNECTOR (UNIT: MM) ............................................... 79
FIGURE 40: MECHANICALS OF U.FL-LP CONNECTORS ............................................................................. 79
FIGURE 41: SPACE FACTOR OF MATED CONNECTOR (UNIT: MM) .......................................................... 80
FIGURE 42: REFERENCED HEATSINK DESIGN (HEATSINK AT THE TOP OF THE MODULE) ............... 109
FIGURE 43: REFERENCED HEATSINK DESIGN (HEATSINK AT THE BACKSIDE OF CUSTOMERS’ PCB)
................................................................................................................................................................. 110
FIGURE 44: MODULE TOP AND SIDE DIMENSIONS .................................................................................. 111
FIGURE 45: MODULE BOTTOM DIMENSIONS (BOTTOM VIEW) ............................................................... 112
FIGURE 46: RECOMMENDED FOOTPRINT (TOP VIEW) ............................................................................ 113
FIGURE 47: TOP VIEW OF THE MODULE .................................................................................................... 114
FIGURE 48: BOTTOM VIEW OF THE MODULE ............................................................................................ 114
FIGURE 49: REFLOW SOLDERING THERMAL PROFILE ............................................................................ 116
FIGURE 50: TAPE AND REEL SPECIFICATIONS ........................................................................................ 118
EC25_Hardware_Design 11 / 112
EC25 Hardware Design
1 Introduction
This document defines the EC25 module and describes its air interface and hardware interfaces which
are connected with customers’ applications.
This document can help customers quickly understand module interface specifications, electrical and
mechanical details, as well as other related information of EC25 module. To facilitate its application in
different fields, relevant reference design is also provided for customers’ reference. Associated with
application note and user guide, customers can use EC25 module to design and set up mobile
applications easily.
EC25_Hardware_Design 12 / 112
EC25 Hardware Design
1.1. Safety Information
The following safety precautions must be observed during all phases of operation, such as usage, service
or repair of any cellular terminal or mobile incorporating EC25 module. Manufacturers of the cellular
terminal should send the following safety information to users and operating personnel, and incorporate
these guidelines into all manuals supplied with the product. If not so, Quectel assumes no liability for
customers’ failure to comply with these precautions.
Full attention must be given to driving at all times in order to reduce the risk of an
accident. Using a mobile while driving (even with a handsfree kit) causes
distraction and can lead to an accident. Please comply with laws and regulations
restricting the use of wireless devices while driving.
Switch off the cellular terminal or mobile before boarding an aircraft. The operation
of wireless appliances in an aircraft is forbidden to prevent interference with
communication systems. If the device offers an Airplane Mode, then it should be
enabled prior to boarding an aircraft. Please consult the airline staff for more
restrictions on the use of wireless devices on boarding the aircraft.
Wireless devices may cause interference on sensitive medical equipment, so
please be aware of the restrictions on the use of wireless devices when in
hospitals, clinics or other healthcare facilities.
Cellular terminals or mobiles operating over radio signals and cellular network
cannot be guaranteed to connect in all possible conditions (for example, with
unpaid bills or with an invalid (U)SIM card). When emergent help is needed in such
conditions, please remember using emergency call. In order to make or receive a
call, the cellular terminal or mobile must be switched on in a service area with
adequate cellular signal strength.
The cellular terminal or mobile contains a transmitter and receiver. When it is ON, it
receives and transmits radio frequency signals. RF interference can occur if it is
used close to TV set, radio, computer or other electric equipment.
In locations with potentially explosive atmospheres, obey all posted signs to turn
off wireless devices such as your phone or other cellular terminals. Areas with
potentially explosive atmospheres include fuelling areas, below decks on boats,
fuel or chemical transfer or storage facilities, areas where the air contains
chemicals or particles such as grain, dust or metal powders, etc.
EC25_Hardware_Design 13 / 112
EC25 Hardware Design
1.2. FCC Certification Requirements.
According to the definition of mobile and fixed device is described in Part 2.1091(b), this device is a
mobile device.
And the following conditions must be met:
1. This Modular Approval is limited to OEM installation for mobile and fixed applications only. The antenna
installation and operating configurations of this transmitter, including any applicable source-based time-
averaging duty factor, antenna gain and cable loss must satisfy MPE categorical Exclusion Requirements
of 2.1091.
2. The EUT is a mobile device; maintain at least a 20 cm separation between the EUT and the user’s
body and must not transmit simultaneously with any other antenna or transmitter.
3.A label with the following statements must be attached to the host end product: This device contains
FCC ID: XMR201907EC25MX.
4.To comply with FCC regulations limiting both maximum RF output power and human exposure to RF
radiation, maximum antenna gain (including cable loss) must not exceed:
❒ WCDMA Band2:≤9.000dBi
❒ WCDMA Band4:≤6.000dBi
❒WCDMA Band5:≤10.416dBi
❒ LTE Band2:≤10.000dBi
❒ LTE Band5:≤11.255dBi
❒ LTE Band4/7/66:≤7.000dBi
5. This module must not transmit simultaneously with any other antenna or transmitter
6. The host end product must include a user manual that clearly defines operating requirements and
conditions that must be observed to ensure compliance with current FCC RF exposure guidelines.
EC25_Hardware_Design 14 / 112
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For portable devices, in addition to the conditions 3 through 6 described above, a separate approval is
required to satisfy the SAR requirements of FCC Part 2.1093
If the device is used for other equipment that separate approval is required for all other operating
configurations, including portable configurations with respect to 2.1093 and different antenna
configurations.
For this device, OEM integrators must be provided with labeling instructions of finished products.
Please refer to KDB784748 D01 v07, section 8. Page 6/7 last two paragraphs:
A certified modular has the option to use a permanently affixed label, or an electronic label. For a
permanently affixed label, the module must be labeled with an FCC ID - Section 2.926 (see 2.2
Certification (labeling requirements) above). The OEM manual must provide clear instructions
explaining to the OEM the labeling requirements, options and OEM user manual instructions that are
required (see next paragraph).
For a host using a certified modular with a standard fixed label, if (1) the module’s FCC ID is not visible
when installed in the host, or (2) if the host is marketed so that end users do not have straightforward
commonly used methods for access to remove the module so that the FCC ID of the module is visible;
then an additional permanent label referring to the enclosed module:“Contains Transmitter Module
FCC ID: XMR201907EC25MX” or “Contains FCC ID: XMR201907EC25MX” must be used. The host
OEM user manual must also contain clear instructions on how end users can find and/or access the
module and the FCC ID.
The final host / module combination may also need to be evaluated against the FCC Part 15B criteria
for unintentional radiators in order to be properly authorized for operation as a Part 15 digital device.
The user’s manual or instruction manual for an intentional or unintentional radiator shall caution the
user that changes or modifications not expressly approved by the party responsible for compliance
could void the user's authority to operate the equipment. In cases where the manual is provided only in
a form other than paper, such as on a computer disk or over the Internet, the information required by
EC25_Hardware_Design 15 / 112
EC25 Hardware Design
this section may be included in the manual in that alternative form, provided the user can reasonably be
expected to have the capability to access information in that form.
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:
(1) This device may not cause harmful interference, and (2) this device must accept any interference
received, including interference that may cause undesired operation.
Changes or modifications not expressly approved by the manufacturer could void the user’s authority to
operate the equipment.
To ensure compliance with all non-transmitter functions the host manufacturer is responsible for ensuring
compliance with the module(s) installed and fully operational. For example, if a host was previously
authorized as an unintentional radiator under the Declaration of Conformity procedure without a
transmitter certified module and a module is added, the host manufacturer is responsible for ensuring that
the after the module is installed and operational the host continues to be compliant with the Part 15B
unintentional radiator requirements
FCC RF Exposure Requirements
This device complies with FCC RF radiation exposure limits set forth for an uncontrolled environment.
The antenna(s) used for this transmitter must not be co-located or operating in conjunction with any other
antenna or transmitter and must be installed to provide a separation distance of at least 20cm from all
persons.
FCC Regulations
This device complies with part 15 of the FCC Rules. Operation is subject to the following two conditions:
(1) This device may not cause harmful interference, and (2) this device must accept any interference
received, including interference that may cause undesired operation.
This device has been tested and found to comply with the limits for a Class B digital device, pursuant to
Part 15 of the FCC Rules.
These limits are designed to provide reasonable protection against harmful interference in a residential
installation. This equipment generates, uses and can radiate radio frequency energy and, if not installed
and used in accordance with the instructions, may cause harmful interference to radio communications.
EC25_Hardware_Design 16 / 112
EC25 Hardware Design
2 Product Concept
2.1. General Description
EC25 is a series of LTE-FDD/LTE-TDD/WCDMA/GSM wireless communication module with receive
diversity. It provides data connectivity on LTE-FDD, LTE-TDD, DC-HSDPA, HSPA+, HSDPA, HSUPA,
WCDMA, EDGE and GPRS networks. It also provides GNSS
specific applications. EC25 contains 12 variants: EC25-E, EC25-A, EC25-V, EC25-J, EC25-AU,
EC25-AUT, EC25-AF, EC25-EU, EC25-EC, EC25-EUX
choose a dedicated type based on the region or operator. The following table shows the frequency bands
of EC25 series module.
3)
1)
and voice functionality2) for customers’
, EC25-AUTL and EC25-MX3). Customers can
Table 1: Frequency Bands of EC25 Series Module
Modules2) LTE Bands
EC25-E
EC25-A
EC25-V
EC25-J
EC25-AU4)
EC25-AUT
EC25-AF
EC25-EU
FDD: B1/B3/B5/B7/B8/B20
TDD: B38/B40/B41
FDD: B2/B4/B12 B2/B4/B5 N Y
FDD: B4/B13 N N Y
FDD: B1/B3/B8/B18/B19/
B26
TDD: B41
FDD: B1/B2/B3/B4/B5/B7/
B8/B28
TDD: B40
FDD: B1/B3//B5/B7/B28 B1/B5 N Y
FDD: B2/B4//B5/B12/B13/
B14/B66/B71
FDD: B1/B3/B7/B8/B20/
B28A
TDD: B38/B40/B41
WCDMA Bands
B1/B5/B8 900/1800MHz Y
B1/B6/B8/B19 N Y
B1/B2/B5/B8
B2/B4/B5 N Y
B1/B8 900/1800MHz Y
GSM Bands
850/900/
1800/1900MHz
Rx­diversity
Y
GNSS1)
GPS,
GLONASS,
BeiDou/
Compass,
Galileo,
QZSS
EC25_Hardware_Design 17 / 112
EC25 Hardware Design
EC25-EC
FDD: B1/B3/B7/B8/B20/
B28A
B1/B8 900/1800MHz Y
FDD: B1/B3/B7/B8/B20/
EC25-EUX
B28A
B1/B8 900/1800MHz Y
TDD: B38/B40/B41
EC25-AUTL
EC25-MX
FDD: B3/B7/B28 N N Y N
FDD: B2/B4//B5/B7/B28/
B66
B2/B4/B5 N Y N
NOTES
1)
1.
GNSS function is optional.
2)
2.
EC25 series module contains Telematics version and Data-only version. Telematics version
supports voice and data functions, while Data-only version only supports data function.
3)
3.
EC25-EUX and EC25-MX are based on ThreadX OS.
4)
4.
B2 band on EC25-AU module does not support Rx-diversity.
5. Y = Supported. N = Not supported.
With a compact profile of 29.0mm × 32.0mm × 2.4mm, EC25 can meet almost all requirements for M2M
applications such as automotive, metering, tracking system, security, router, wireless POS, mobile
computing device, PDA phone, tablet PC, etc.
EC25 is an SMD type module which can be embedded into applications through its 144-pin pads,
including 80 LCC signal pads and 64 LGA pads.
2.2. Key Features
The following table describes the detailed features of EC25 module.
Table 2: Key Features of EC25 Module
Features Details
Power Supply
Transmitting Power
EC25_Hardware_Design 18 / 112
Supply voltage: 3.3V~4.3V Typical supply voltage: 3.8V
Class 4 (33dBm±2dB) for GSM850
Class 4 (33dBm±2dB) for EGSM900
Class 1 (30dBm±2dB) for DCS1800
Class 1 (30dBm±2dB) for PCS1900
Class E2 (27dBm±3dB) for GSM850 8-PSK
LTE Features
UMTS Features
EC25 Hardware Design
Class E2 (27dBm±3dB) for EGSM900 8-PSK
Class E2 (26dBm±3dB) for DCS1800 8-PSK
Class E2 (26dBm±3dB) for PCS1900 8-PSK
Class 3 (24dBm+1/-3dB) for WCDMA bands
Class 3 (23dBm±2dB) for LTE-FDD bands
Class 3 (23dBm±2dB) for LTE-TDD bands
Support up to non-CA Cat 4 FDD and TDD
Support 1.4MHz~20MHz RF bandwidth
Support MIMO in DL direction
LTE-FDD: Max 150Mbps (DL)/Max 50Mbps (UL)
LTE-TDD: Max 130Mbps (DL)/Max 30Mbps (UL)
Support 3GPP R8 DC-HSDPA, HSPA+, HSDPA, HSUPA and WCDMA
Support QPSK, 16-QAM and 64-QAM modulation
DC-HSDPA: Max 42Mbps (DL)
HSUPA: Max 5.76Mbps (UL)
WCDMA: Max 384Kbps (DL)/Max 384Kbps (UL)
GSM Features
Internet Protocol Features
SMS
GPRS:
Support GPRS multi-slot class 33 (33 by default)
Coding scheme: CS-1, CS-2, CS-3 and CS-4
Max 107Kbps (DL)/Max 85.6Kbps (UL)
EDGE:
Support EDGE multi-slot class 33 (33 by default)
Support GMSK and 8-PSK for different MCS (Modulation and Coding
Scheme)
Downlink coding schemes: CS 1-4 and MCS 1-9
Uplink coding schemes: CS 1-4 and MCS 1-9
Max 296Kbps (DL)/Max 236.8Kbps (UL)
Support TCP/UDP/PPP/FTP/HTTP/NTP/PING/QMI/NITZ/CMUX*/HTTPS*/
SMTP/MMS*/FTPS*/SMTPS*/SSL*/FILE* protocols
Support PAP (Password Authentication Protocol) and CHAP (Challenge
Handshake Authentication Protocol) protocols which are usually used for
PPP connections
Text and PDU mode
Point to point MO and MT
SMS cell broadcast
SMS storage: ME by default
(U)SIM Interface Support USIM/SIM card: 1.8V, 3.0V
Support one digital audio interface: PCM interface
GSM: HR/FR/EFR/AMR/AMR-WB
Audio Features
WCDMA: AMR/AMR-WB
LTE: AMR/AMR-WB
Support echo cancellation and noise suppression
EC25_Hardware_Design 19 / 112
PCM Interface
USB Interface
UART Interfaces
EC25 Hardware Design
Used for audio function with external codec
Support 16-bit linear data format
Support long frame synchronization and short frame synchronization
Support master and slave modes, but must be the master in long frame
synchronization
Compliant with USB 2.0 specification (slave only); the data transfer rate can
reach up to 480Mbps
Used for AT command communication, data transmission, GNSS NMEA
output, software debugging, firmware upgrade and voice over USB
Support USB serial drivers for: Windows 7/8/8.1/10, Windows CE
5.0/6.0/7.0*, Linux 2.6/3.x/4.1~4.14, Android 4.x/5.x/6.x/7.x/8.x/9.x, etc.
Main UART:
Used for AT command communication and data transmission
Baud rates reach up to 921600bps, 115200bps by default
Support RTS and CTS hardware flow control
Debug UART:
Used for Linux console and log output
115200bps baud rate
SD Card Interface Support SD 3.0 protocol
SGMII Interface
Wireless Connectivity
Interfaces
Support 10M/100M/1000M Ethernet work mode
Support maximum 150Mbps (DL)/50Mbps (UL) for 4G network
Support a low-power SDIO 3.0 interface for WLAN and UART/PCM
interface for Bluetooth*
Rx-diversity Support LTE/WCDMA Rx-diversity
GNSS Features
AT Commands
Network Indication
Antenna Interfaces
Physical Characteristics
Gen8C Lite of Qualcomm
Protocol: NMEA 0183
Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT
commands
Two pins including NET_MODE and NET_STATUS to indicate network
connectivity status
Including main antenna interface (ANT_MAIN), Rx-diversity antenna
interface (ANT_DIV) and GNSS antenna interface (ANT_GNSS)
Size: (29.0±0.15)mm × (32.0±0.15)mm × (2.4±0.2)mm
Weight: approx. 4.9g
Operation temperature range: -35°C ~ +75°C
Temperature Range
Extended temperature range: -40°C ~ +85°C
Storage temperature range: -40°C~ +90°C
1)
2)
Firmware Upgrade USB interface or DFOTA*
RoHS All hardware components are fully compliant with EU RoHS directive
EC25_Hardware_Design 20 / 112
EC25 Hardware Design
NOTES
1)
1.
Within operation temperature range, the module is 3GPP compliant.
2)
2.
Within extended temperature range, the module remains the ability to establish and maintain a
voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There
are also no effects on radio spectrum and no harm to radio network. Only one or more parameters like
P
might reduce in their value and exceed the specified tolerances. When the temperature returns to
out
normal operation temperature levels, the module will meet 3GPP specifications again.
3. “*” means under development.
2.3. Functional Diagram
The following figure shows a block diagram of EC25 and illustrates the major functional parts.
Power management
Baseband
DDR+NAND flash
Radio frequency
Peripheral interfaces
EC25_Hardware_Design 21 / 112
EC25 Hardware Design
ANT_MAIN ANT_DIVANT_GNSS
VBAT_RF
VBAT_BB
PWRKEY
RESET_N
ADCs
STATUS
APT
PMIC
VDD_EXT
SAW
Tx
Control
19.2 M
PAM
Duplex
PA
PRx DRx
Transceiver
IQ Cont rol
XO
USB (U)SIM PCM UARTsI2C
SAW
LNA
Switch
SAW
SDRAM
Baseband
SGMII
NAND DDR2
WLAN SDBT*
GPIOs
Figure 1: Functional Diagram
NOTE
“*” means under development.
2.4. Evaluation Board
In order to help customers develop applications with EC25, Quectel supplies an evaluation board (EVB),
USB to RS-232 converter cable, earphone, antenna and other peripherals to control or test the module.
EC25_Hardware_Design 22 / 112
EC25 Hardware Design
3 Application Interfaces
3.1. General Description
EC25 is equipped with 80 LCC pads plus 64 LGA pads that can be connected to cellular application
platform. Sub-interfaces included in these pads are described in detail in the following chapters:
Power supply
(U)SIM interface
USB interface
UART interfaces
PCM and I2C interfaces
SD card interface
ADC interfaces
Status indication
SGMII interface
Wireless connectivity interfaces
USB_BOOT interface
EC25_Hardware_Design 23 / 112
EC25 Hardware Design
3.2. Pin Assignment
The following figure shows the pin assignment of EC25 module.
Figure 2: Pin Assignment (Top View)
NOTES
1)
1.
means that these pins cannot be pulled up before startup.
2)
2.
PWRKEY output voltage is 0.8V because of the diode drop in the Qualcomm chipset.
3)
3.
means these interface functions are only supported on Telematics version.
4. Pads 37~40, 118, 127 and 129~139 are used for wireless connectivity interfaces, among which pads
118, 127 and 129~138 are WLAN function pins, and others are Bluetooth (BT) function pins. BT
function is under development.
5. Pads 119~126 and 128 are used for SGMII interface.
EC25_Hardware_Design 24 / 112
EC25 Hardware Design
6. Pads 24~27 are multiplexing pins used for audio design on EC25 module and BT function on the BT
module.
7. Keep all RESERVED pins and unused pins unconnected.
8. GND pads 85~112 should be connected to ground in the design. RESERVED pads 73~84 should not
be designed in schematic and PCB decal, and these pins should be served as a keepout area.
9. “*” means under development.
3.3. Pin Description
The following tables show the pin definition of EC25 module.
Table 3: I/O Parameters Definition
Type Description
AI Analog input
AO Analog output
DI Digital input
DO Digital output
IO Bidirectional
OD Open drain
PI Power input
PO Power output
Table 4: Pin Description
Power Supply
Pin Name Pin No. I/O Description DC Characteristics Comment
VBAT_BB 59, 60 PI
VBAT_RF 57, 58 PI
Power supply for
module’s baseband
part
Power supply for
module’s RF part
Vmax=4.3V
Vmin=3.3V
Vnorm=3.8V
Vmax=4.3V
Vmin=3.3V
It must be able to
provide sufficient
current up to 0.8A.
It must be able to
provide sufficient
EC25_Hardware_Design 25 / 112
EC25 Hardware Design
Vnorm=3.8V current up to 1.8A in a
burst transmission.
Power supply for
VDD_EXT 7 PO
Provide 1.8V for
external circuit
Vnorm=1.8V
I
max=50mA
O
external GPIO’s pull-up
circuits.
If unused, keep it open.
8, 9, 19,
22, 36, 46,
GND
48, 50~54,
Ground
56, 72,
85~112
Turn on/off
Pin Name Pin No. I/O Description DC Characteristics Comment
The output voltage is
PWRKEY 21 DI
Turn on/off the
module
V
H
=0.8V
0.8V because of the
diode drop in the
Qualcomm chipset.
V
max=2.1V
IH
V
min=1.3V
IH
V
max=0.5V
IL
If unused, keep it
open.
RESET_N 20 DI
Reset signal of the
module
Status Indication
Pin Name Pin No. I/O Description DC Characteristics Comment
An external pull-up
resistor is required.
If unused, keep it
open.
STATUS 61 OD
Indicate the module
operating status
The drive current
should be less than
0.9mA.
1.8V power domain.
It cannot be pulled up
before startup.
If unused, keep it
NET_MODE 5 DO
Indicate the
module’s network
registration mode
V
min=1.35V
OH
V
max=0.45V
OL
open.
NET_
STATUS
Indicate the
6 DO
module’s network
activity status
V
min=1.35V
OH
V
max=0.45V
OL
1.8V power domain.
If unused, keep it
open.
USB Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
USB_VBUS 71 PI
USB power supply,
used for USB
detection
Vmax=5.25V
Vmin=3.0V
Vnorm=5.0V
Typical: 5.0V
If unused, keep it
open.
EC25_Hardware_Design 26 / 112
EC25 Hardware Design
Require differential
impedance of 90Ω.
If unused, keep it
open.
Require differential
impedance of 90Ω.
If unused, keep it
open.
USB_DP 69 IO
USB_DM 70 IO
USB differential data
bus (+)
USB differential data
bus (-)
Compliant with USB
2.0 standard
specification.
Compliant with USB
2.0 standard
specification.
(U)SIM Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
USIM_GND 10
USIM_
PRESENCE
13 DI
Specified ground for
(U)SIM card
(U)SIM card
insertion detection
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
1.8V power domain.
If unused, keep it
open.
For 1.8V(U)SIM:
Vmax=1.9V
Vmin=1.7V
USIM_VDD 14 PO
Power supply for
(U)SIM card
For 3.0V(U)SIM:
Vmax=3.05V
Either 1.8V or 3.0V is
supported by the
module automatically.
Vmin=2.7V
I
max=50mA
O
For 1.8V (U)SIM:
V
max=0.6V
IL
V
min=1.2V
IH
V
max=0.45V
OL
V
min=1.35V
OH
For 3.0V (U)SIM:
max=1.0V
V
IL
V
min=1.95V
IH
V
max=0.45V
OL
V
min=2.55V
OH
USIM_DATA 15 IO
Data signal of
(U)SIM card
For 1.8V (U)SIM:
V
max=0.45V
OL
USIM_CLK 16 DO
Clock signal of
(U)SIM card
V
min=1.35V
OH
For 3.0V (U)SIM:
max=0.45V
V
OL
EC25_Hardware_Design 27 / 112
EC25 Hardware Design
VOHmin=2.55V
For 1.8V (U)SIM:
max=0.45V
V
OL
V
min=1.35V
OH
For 3.0V (U)SIM:
max=0.45V
V
OL
V
min=2.55V
OH
USIM_RST 17 DO
Reset signal of
(U)SIM card
Main UART Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
V
RI 62 DO Ring indicator
DCD 63 DO
Data carrier
detection
CTS 64 DO Clear to send
RTS 65 DI Request to send
DTR 66 DI
Data terminal ready,
sleep mode control
OL
V
OH
V
OL
V
OH
V
OL
V
OH
V
IL
V
IL
V
IH
V
IH
V
IL
V
IL
V
IH
V
IH
max=0.45V
min=1.35V
max=0.45V
min=1.35V
max=0.45V
min=1.35V
min=-0.3V
max=0.6V
min=1.2V
max=2.0V
min=-0.3V
max=0.6V
min=1.2V
max=2.0V
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
Pulled up by default.
Low level wakes up
the module.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
TXD 67 DO Transmit data
RXD 68 DI Receive data
V
max=0.45V
OL
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
Debug UART Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
DBG_TXD 12 DO Transmit data
max=0.45V
OL
V
min=1.35V
OH
1.8V power domain.
If unused, keep it
V
EC25_Hardware_Design 28 / 112
EC25 Hardware Design
open.
V
min=-0.3V
DBG_RXD 11 DI Receive data
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
1.8V power domain.
If unused, keep it
open.
ADC Interfaces
Pin Name Pin No. I/O Description DC Characteristics Comment
General purpose
ADC0 45 AI
analog to digital
converter
General purpose
ADC1 44 AI
analog to digital
converter
Voltage range:
0.3V to VBAT_BB
Voltage range:
0.3V to VBAT_BB
If unused, keep it
open.
If unused, keep it
open.
PCM Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
V
min=-0.3V
PCM_IN 24 DI PCM data input
PCM_OUT 25 DO PCM data output
PCM data frame
PCM_SYNC 26 IO
synchronization
signal
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
V
max=0.45V
OL
V
min=1.35V
OH
VOLmax=0.45V
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
In master mode, it is
an output signal. In
slave mode, it is an
input signal.
If unused, keep it
open.
1.8V power domain.
In master mode, it is
an output signal. In
slave mode, it is an
input signal.
If unused, keep it
open.
PCM_CLK 27 IO PCM clock
V
max=0.45V
OL
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
I2C Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
EC25_Hardware_Design 29 / 112
EC25 Hardware Design
I2C serial clock.
I2C_SCL 41 OD
Used for external
codec.
I2C serial data.
I2C_SDA 42 OD
Used for external
codec.
An external pull-up
resistor is required.
1.8V only. If unused,
keep it open.
An external pull-up
resistor is required.
1.8V only. If unused,
keep it open.
SD Card Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
1.8V signaling:
V
max=0.45V
OL
V
min=1.4V
OH
V
min=-0.3V
SDC2_
DATA3
28 IO
SD card SDIO bus
DATA3
IL
V
max=0.58V
IL
V
min=1.27V
IH
V
max=2.0V
IH
3.0V signaling:
max=0.38V
V
OL
V
min=2.01V
OH
V
min=-0.3V
IL
V
max=0.76V
IL
V
min=1.72V
IH
V
max=3.34V
IH
SDIO signal level can
be selected according
to SD card supported
level, please refer to
SD 3.0 protocol for
more details.
If unused, keep it
open.
1.8V signaling:
V
max=0.45V
OL
V
min=1.4V
OH
V
min=-0.3V
SDC2_
DATA2
SDC2_
DATA1
29 IO
30 IO
SD card SDIO bus
DATA2
SD card SDIO bus
DATA1
IL
V
max=0.58V
IL
V
min=1.27V
IH
V
max=2.0V
IH
3.0V signaling:
max=0.38V
V
OL
V
min=2.01V
OH
V
min=-0.3V
IL
V
max=0.76V
IL
V
min=1.72V
IH
V
max=3.34V
IH
1.8V signaling:
V
max=0.45V
OL
SDIO signal level can
be selected according
to SD card supported
level, please refer to
SD 3.0 protocol for
more details.
If unused, keep it
open.
EC25_Hardware_Design 30 / 112
EC25 Hardware Design
SDC2_
DATA0
31 IO
SDC2_CLK 32 DO
SD card SDIO bus
DATA0
SD card SDIO bus
clock
VOHmin=1.4V
VILmin=-0.3V
V
max=0.58V
IL
V
min=1.27V
IH
V
max=2.0V
IH
3.0V signaling:
max=0.38V
V
OL
V
min=2.01V
OH
V
min=-0.3V
IL
V
max=0.76V
IL
V
min=1.72V
IH
V
max=3.34V
IH
1.8V signaling:
V
max=0.45V
OL
V
min=1.4V
OH
V
min=-0.3V
IL
V
max=0.58V
IL
V
min=1.27V
IH
V
max=2.0V
IH
3.0V signaling:
max=0.38V
V
OL
V
min=2.01V
OH
V
min=-0.3V
IL
V
max=0.76V
IL
V
min=1.72V
IH
V
max=3.34V
IH
1.8V signaling:
V
max=0.45V
OL
V
min=1.4V
OH
3.0V signaling:
max=0.38V
V
OL
V
min=2.01V
OH
SDIO signal level can
be selected according
to SD card supported
level, please refer to
SD 3.0 protocol for
more details.
If unused, keep it
open.
SDIO signal level can
be selected according
to SD card supported
level, please refer to
SD 3.0 protocol for
more details.
If unused, keep it
open.
SDIO signal level can
be selected according
to SD card supported
level, please refer to
SD 3.0 protocol for
more details.
If unused, keep it
open.
SDIO signal level can
be selected according
to SD card supported
level, please refer to
SD 3.0 protocol for
more details.
If unused, keep it
open.
SDC2_CMD 33 IO
SD card SDIO bus
command
1.8V signaling:
V
max=0.45V
OL
V
min=1.4V
OH
V
min=-0.3V
IL
V
max=0.58V
IL
V
min=1.27V
IH
V
max=2.0V
IH
EC25_Hardware_Design 31 / 112
EC25 Hardware Design
SD_INS_
DET
23 DI
VDD_SDIO 34 PO
SD card insertion
detect
SD card SDIO bus
pull-up power
3.0V signaling:
V
OL
V
OH
V
min=-0.3V
IL
V
max=0.76V
IL
V
IH
V
IH
V
min=-0.3V
IL
V
max=0.6V
IL
V
IH
V
IH
I
max=50mA
O
max=0.38V
min=2.01V
min=1.72V
max=3.34V
min=1.2V
max=2.0V
1.8V power domain.
If unused, keep it
open.
1.8V/2.85V
configurable.
Cannot be used for
SD card power.
If unused, keep it
open.
SGMII Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
For 1.8V:
V
max=0.45V
EPHY_RST_
N
119 DO Ethernet PHY reset
EPHY_INT_N 120 DI
Ethernet PHY
interrupt
OL
V
min=1.4V
OH
For 2.85V:
max=0.35V
V
OL
V
min=2.14V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
1.8V/2.85V power
domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
For 1.8V:
VOLmax=0.45V
V
min=1.4V
OH
V
max=0.58V
SGMII_
MDATA
SGMII MDIO
121 IO
(Management Data
Input/Output) data
IL
V
min=1.27V
IH
For 2.85V:
max=0.35V
V
OL
V
min=2.14V
OH
V
max=0.71V
IL
V
min=1.78V
IH
1.8V/2.85V power
domain.
If unused, keep it
open.
EC25_Hardware_Design 32 / 112
EC25 Hardware Design
SGMII_
MCLK
122 DO
USIM2_VDD 128 PO
SGMII_TX_M 123 AO
SGMII MDIO
(Management Data
Input/Output) clock
SGMII MDIO pull-up
power source
SGMII transmission
- minus
For 1.8V:
V
max=0.45V
OL
V
min=1.4V
OH
For 2.85V:
max=0.35V
V
OL
V
min=2.14V
OH
1.8V/2.85V power
domain.
If unused, keep it
open.
Configurable power
source.
1.8V/2.85V power
domain.
External pull-up for
SGMII MDIO pins.
If unused, keep it
open.
Connect with a 0.1uF
capacitor, close to the
PHY side.
If unused, keep it
open.
Connect with a 0.1uF
capacitor, close to the
PHY side.
If unused, keep it
SGMII_TX_P 124 AO
SGMII transmission
- plus
open.
Connect with a 0.1uF
capacitor, close to
EC25 module.
If unused, keep it
SGMII_RX_P 125 AI
SGMII receiving
- plus
open.
Connect with a 0.1uF
capacitor, close to
EC25 module.
If unused, keep it
SGMII_RX_M 126 AI
SGMII receiving
- minus
open.
Wireless Connectivity Interfaces
Pin Name Pin No. I/O Description DC Characteristics Comment
V
max=0.45V
OL
V
SDC1_
DATA3
129 IO
WLAN SDIO data
bus D3
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
1.8V power domain.
If unused, keep it
open.
EC25_Hardware_Design 33 / 112
EC25 Hardware Design
SDC1_
DATA2
SDC1_
DATA1
SDC1_
DATA0
130 IO
131 IO
132 IO
SDC1_CLK 133 DO
WLAN SDIO data
bus D2
WLAN SDIO data
bus D1
WLAN SDIO data
bus D0
WLAN SDIO bus
clock
VIHmax=2.0V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
V
max=0.45V
OL
min=1.35V
OH
min=-0.3V
IL
max=0.6V
IL
min=1.2V
IH
max=2.0V
IH
max=0.45V
OL
min=1.35V
OH
min=-0.3V
IL
max=0.6V
IL
min=1.2V
IH
max=2.0V
IH
max=0.45V
OL
min=1.35V
OH
min=-0.3V
IL
max=0.6V
IL
min=1.2V
IH
max=2.0V
IH
max=0.45V
OL
min=1.35V
OH
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
SDC1_CMD 134 DO
WLAN SDIO bus
command
PM_ENABLE 127 DO WLAN power control
WAKE_ON_
WIRELESS
135 DI
Wake up the host
(EC25 module) by
FC20 module
WLAN function
WLAN_EN 136 DO
control via FC20
module
COEX_UART
_RX
137 DI
LTE/WLAN&BT
coexistence signal
V
max=0.45V
OL
V
min=1.35V
OH
V
max=0.45V
OL
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
V
max=0.45V
OL
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
Active low.
If unused, keep it
open.
1.8V power domain.
Active high.
Cannot be pulled up
before startup.
If unused, keep it
open.
1.8V power domain.
Cannot be pulled up
before startup.
If unused, keep it
open.
EC25_Hardware_Design 34 / 112
COEX_UART
_TX
EC25 Hardware Design
138 DO
LTE/WLAN&BT
coexistence signal
1.8V power domain.
V
max=0.45V
OL
V
min=1.35V
OH
Cannot be pulled up
before startup.
If unused, keep it
open.
WLAN_SLP_
CLK
BT_RTS* 37 DI
BT_TXD* 38 DO
BT_RXD* 39 DI
BT_CTS* 40 DO
BT_EN* 139 DO
118 DO WLAN sleep clock
BT UART request to
send
BT UART transmit
data
BT UART receive
data
BT UART clear to
send
BT function control
via FC20 module
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
V
max=0.45V
OL
V
min=1.35V
OH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
V
max=0.45V
OL
V
min=1.35V
OH
V
max=0.45V
OL
V
min=1.35V
OH
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
1.8V power domain.
Cannot be pulled up
before startup.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
RF Interface
Pin Name Pin No. I/O Description DC Characteristics Comment
ANT_DIV 35 AI
Diversity antenna
pad
50Ω impedance
If unused, keep it
open.
ANT_MAIN 49 IO Main antenna pad 50Ω impedance
ANT_GNSS 47 AI GNSS antenna pad 50Ω impedance
If unused, keep it
open.
GPIO Pins
Pin Name Pin No. I/O Description DC Characteristics Comment
V
WAKEUP_IN 1 DI Sleep mode control
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
1.8V power domain.
Cannot be pulled up
before startup.
Low level wakes up
EC25_Hardware_Design 35 / 112
EC25 Hardware Design
W_DISABLE# 4 DI
AP_READY 2 DI
USB_BOOT Interface
Airplane mode
control
Application
processor sleep
state detection
the module.
If unused, keep it
open.
1.8V power domain.
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
Pull-up by default.
At low voltage level,
module can enter into
airplane mode.
If unused, keep it
open.
1.8V power domain.
If unused, keep it
open.
Pin Name Pin No. I/O Description DC Characteristics Comment
1.8V power domain.
Cannot be pulled up
before startup.
It is recommended to
reserve test point.
USB_BOOT 115 DI
Force the module to
enter into
emergency
download mode
V
min=-0.3V
IL
V
max=0.6V
IL
V
min=1.2V
IH
V
max=2.0V
IH
RESERVED Pins
Pin Name Pin No. I/O Description DC Characteristics Comment
3, 18, 43,
RESERVED
55, 73~84,
113, 114,
116, 117,
Reserved
Keep these pins
unconnected.
140-144.
NOTES
1. “*” means under development.
2. Pads 24~27 are multiplexing pins used for audio design on the EC25 module and BT function on the
BT module.
EC25_Hardware_Design 36 / 112
EC25 Hardware Design
3.4. Operating Modes
The table below briefly summarizes the various operating modes referred in the following chapters.
Table 5: Overview of Operating Modes
Mode Details
Normal
Idle
Operation
Talk/Data
Minimum
Functionality
Mode
Airplane Mode
AT+CFUN command can set the module to a minimum functionality mode without
removing the power supply. In this case, both RF function and (U)SIM card will be
invalid.
AT+CFUN command or W_DISABLE# pin can set the module to airplane mode. In
this case, RF function will be invalid.
In this mode, the current consumption of the module will be reduced to the minimal
Sleep Mode
level. During this mode, the module can still receive paging message, SMS, voice
call and TCP/UDP data from the network normally.
Power Down
Mode
In this mode, the power management unit shuts down the power supply. Software is
not active. The serial interface is not accessible. Operating voltage (connected to
VBAT_RF and VBAT_BB) remains applied.
3.5. Power Saving
Software is active. The module has registered on the network, and it is
ready to send and receive data.
Network connection is ongoing. In this mode, the power consumption is
decided by network setting and data transfer rate.
3.5.1. Sleep Mode
EC25 is able to reduce its current consumption to a minimum value during the sleep mode. The following
section describes power saving procedures of EC25 module.
3.5.1.1. UART Application
If the host communicates with module via UART interface, the following preconditions can let the module
enter into sleep mode.
Execute AT+QSCLK=1 command to enable sleep mode.
Drive DTR to high level.
EC25_Hardware_Design 37 / 112
EC25 Hardware Design
The following figure shows the connection between the module and the host.
Figure 3: Sleep Mode Application via UART
Driving the host DTR to low level will wake up the module.
When EC25 has a URC to report, RI signal will wake up the host. Please refer to Chapter 3.17 for
details about RI behaviors.
AP_READY will detect the sleep state of the host (can be configured to high level or low level
detection). Please refer to AT+QCFG="apready"* command for details.
NOTE
“*” means under development.
3.5.1.2. USB Application with USB Remote Wakeup Function
If the host supports USB suspend/resume and remote wakeup functions, the following three preconditions
must be met to let the module enter into sleep mode.
Execute AT+QSCLK=1 command to enable sleep mode.
Ensure the DTR is held at high level or keep it open.
The host’s USB bus, which is connected with the module’s USB interface, enters into suspended
state.
EC25_Hardware_Design 38 / 112
EC25 Hardware Design
The following figure shows the connection between the module and the host.
Figure 4: Sleep Mode Application with USB Remote Wakeup
Sending data to EC25 through USB will wake up the module.
When EC25 has a URC to report, the module will send remote wake-up signals via USB bus so as to
wake up the host.
3.5.1.3. USB Application with USB Suspend/Resume and RI Function
If the host supports USB suspend/resume, but does not support remote wake-up function, the RI signal is
needed to wake up the host.
There are three preconditions to let the module enter into sleep mode.
Execute AT+QSCLK=1 command to enable the sleep mode.
Ensure the DTR is held at high level or keep it open.
The host’s USB bus, which is connected with the module’s USB interface, enters into suspended
state.
The following figure shows the connection between the module and the host.
Figure 5: Sleep Mode Application with RI
EC25_Hardware_Design 39 / 112
EC25 Hardware Design
Sending data to EC25 through USB will wake up the module.
When EC25 has a URC to report, RI signal will wake up the host.
3.5.1.4. USB Application without USB Suspend Function
If the host does not support USB suspend function, USB_VBUS should be disconnected via an additional
control circuit to let the module enter into sleep mode.
Execute AT+QSCLK=1 command to enable sleep mode.
Ensure the DTR is held at high level or keep it open.
Disconnect USB_VBUS.
The following figure shows the connection between the module and the host.
Figure 6: Sleep Mode Application without Suspend Function
Switching on the power switch to supply power to USB_VBUS will wake up the module.
NOTE
Please pay attention to the level match shown in dotted line between the module and the host. For more
details about EC25 power management application, please refer to document [1].
3.5.2. Airplane Mode
When the module enters into airplane mode, the RF function does not work, and all AT commands
correlative with RF function will be inaccessible. This mode can be set via the following ways.
EC25_Hardware_Design 40 / 112
EC25 Hardware Design
Hardware:
The W_DISABLE# pin is pulled up by default. Driving it to low level will let the module enter into airplane
mode.
Software: AT+CFUN command provides the choice of the functionality level through setting <fun> into 0, 1 or 4.
AT+CFUN=0: Minimum functionality mode. Both (U)SIM and RF functions are disabled.  AT+CFUN=1: Full functionality mode (by default).  AT+CFUN=4: Airplane mode. RF function is disabled.
NOTES
1. The W_DISABLE# control function is disabled in firmware by default. It can be enabled by
AT+QCFG="airplanecontrol" command, and this command is under development.
2. The execution of AT+CFUN command will not affect GNSS function.
3.6. Power Supply
3.6.1. Power Supply Pins
EC25 provides four VBAT pins for connection with the external power supply. There are two separate
voltage domains for VBAT.
Two VBAT_RF pins for module’s RF part
Two VBAT_BB pins for module’s baseband part
The following table shows the details of VBAT pins and ground pins.
Table 6: VBAT and GND Pins
Pin Name Pin No. Description Min. Typ. Max. Unit
VBAT_RF 57, 58
VBAT_BB 59, 60
8, 9, 19, 22, 36,
GND
EC25_Hardware_Design 41 / 112
46, 48, 50~54,
56, 72, 85~112
Power supply for module’s RF
part
Power supply for module’s
baseband part
Ground - 0 - V
3.3 3.8 4.3 V
3.3 3.8 4.3 V
EC25 Hardware Design
3.6.2. Decrease Voltage Drop
The power supply range of the module is from 3.3V to 4.3V. Please make sure that the input voltage will
never drop below 3.3V. The following figure shows the voltage drop during burst transmission in 2G
network. The voltage drop will be less in 3G and 4G networks.
Figure 7: Power Supply Limits during Burst Transmission
To decrease voltage drop, a bypass capacitor of about 100µF with low ESR (ESR=0.7Ω) should be used,
and a multi-layer ceramic chip (MLCC) capacitor array should also be reserved due to its ultra-low ESR. It
is recommended to use three ceramic capacitors (100nF, 33pF, 10pF) for composing the MLCC array,
and place these capacitors close to VBAT_BB/VBAT_RF pins. The main power supply from an external
application has to be a single voltage source and can be expanded to two sub paths with star structure.
The width of VBAT_BB trace should be no less than 1mm; and the width of VBAT_RF trace should be no
less than 2mm. In principle, the longer the VBAT trace is, the wider it will be.
In addition, in order to avoid the damage caused by electric surge and ESD, it is suggested that a TVS
diode with suggested low reverse stand-off voltage V
peak pulse current I
VB AT
should be used. The following figure shows the star structure of the power supply.
PP
4.5V, low clamping voltage VC and high reverse
RWM
VB AT_R F
VB AT_BB
D1
WS4.5D3HV
C1
100uF
+
C2
100nF
33pF
C3
C4
10pF
C5
100uF
+
C6
100nFC733pFC810pF
Module
Figure 8: Star Structure of the Power Supply
EC25_Hardware_Design 42 / 112
EC25 Hardware Design
3.6.3. Reference Design for Power Supply
Power design for the module is very important, as the performance of the module largely depends on the
power source. The power supply should be able to provide sufficient current up to 2A at least. If the
voltage drop between the input and output is not too high, it is suggested that an LDO should be used to
supply power for the module. If there is a big voltage difference between the input source and the desired
output (VBAT), a buck converter is preferred to be used as the power supply.
The following figure shows a reference design for +5V input power source. The typical output of the power
supply is about 3.8V and the maximum load current is 3A.
Figure 9: Reference Circuit of Power Supply
NOTE
In order to avoid damaging internal flash, please do not switch off the power supply when the module
works normally. Only after the module is shut down by PWRKEY or AT command, then the power supply
can be cut off.
3.6.4. Monitor the Power Supply
AT+CBC command can be used to monitor the VBAT_BB voltage value. For more details, please refer to
document [2].
EC25_Hardware_Design 43 / 112
EC25 Hardware Design
3.7. Power-on and off Scenarios
3.7.1. Turn on Module Using the PWRKEY
The following table shows the pin definition of PWRKEY.
Table 7: Pin Definition of PWRKEY
Pin Name Pin No. I/O Description Comment
PWRKEY 21 DI Turn on/off the module
The output voltage is 0.8V because of
the diode drop in the Qualcomm chipset.
When EC25 is in power down mode, it can be turned on to normal mode by driving the PWRKEY pin to a
low level for at least 500ms. It is recommended to use an open drain/collector driver to control the
PWRKEY. After STATUS pin (require external pull-up) outputs a low level, PWRKEY pin can be released.
A simple reference circuit is illustrated in the following figure.
PWRKEY
≥ 500ms
4.7K 10nF
Turn-on pulse
47K
Figure 10: Turn on the Module by Using Driving Circuit
The other way to control the PWRKEY is using a button directly. When pressing the key, electrostatic
strike may generate from finger. Therefore, a TVS component is indispensable to be placed nearby the
button for ESD protection. A reference circuit is shown in the following figure.
EC25_Hardware_Design 44 / 112
EC25 Hardware Design
Figure 11: Turn on the Module by Using Keystroke
The power-on scenario is illustrated in the following figure.
NOTE
VBA T
PWRKEY
VDD_EXT
BOOT_CONFIG & USB_BOOT PINS
RESET_N
STAT US (OD)
UART
≥500ms
VIL≤0.5V
About 100ms
≥100ms, after this tim e, the BOOT_CONFIG pins can b e s et h igh level by exter nal circuit
≥2.5s
Inactive
V
H
≥12s
=0.8V
Act ive
≥13s
USB
Inactive
Act ive
Figure 12: Power-on Scenario of Module
EC25_Hardware_Design 45 / 112
EC25 Hardware Design
NOTE
Please make sure that VBAT is stable before pulling down PWRKEY pin. The time between them should
be no less than 30ms.
3.7.2. Turn off Module
The following procedures can be used to turn off the module:
Normal power-off procedure: Turn off the module using the PWRKEY pin.
Normal power-off procedure: Turn off the module using AT+QPOWD command.
3.7.2.1. Turn off Module Using the PWRKEY Pin
Driving the PWRKEY pin to a low level voltage for at least 650ms, the module will execute power-off
procedure after the PWRKEY is released. The power-off scenario is illustrated in the following figure.
VBAT
≥29.5s
Po w er-of f pro cedu r e
OFF
PWRKEY
STATUS (OD)
Module Status
≥
RUNNING
65 0ms
Figure 13: Power-off Scenario of Module
3.7.2.2. Turn off Module Using AT Command
It is also a safe way to use AT+QPOWD command to turn off the module, which is similar to turning off the
module via PWRKEY pin.
Please refer to document [2] for details about AT+QPOWD command.
EC25_Hardware_Design 46 / 112
EC25 Hardware Design
NOTES
1. In order to avoid damaging internal flash, please do not switch off the power supply when the module
works normally. Only after the module is shut down by PWRKEY or AT command, then the power
supply can be cut off.
2. When turning off module with AT command, please keep PWRKEY at high level after the execution of
power-off command. Otherwise the module will be turned on again after successfully turn-off.
3.8. Reset Module
The RESET_N pin can be used to reset the module. The module can be reset by driving RESET_N to a
low level voltage for time between 150ms and 460ms.
Table 8: Pin Definition of RESET_N
Pin Name Pin No. I/O Description Comment
RESET_N 20 DI Reset the module 1.8V power domain
The recommended circuit is similar to the PWRKEY control circuit. An open drain/collector driver or button
can be used to control the RESET_N.
Figure 14: Reference Circuit of RESET_N by Using Driving Circuit
EC25_Hardware_Design 47 / 112
EC25 Hardware Design
Figure 15: Reference Circuit of RESET_N by Using Button
The reset scenario is illustrated in the following figure.
Figure 16: Reset Scenario of Module
NOTES
1. Use RESET_N only when failed to turn off the module by AT+QPOWD command and PWRKEY pin.
2. Ensure that there is no large capacitance on PWRKEY and RESET_N pins.
3.9. (U)SIM Interface
The(U)SIM interface circuitry meets ETSI and IMT-2000 requirements. Both 1.8V and 3.0V (U)SIM cards
are supported.
EC25_Hardware_Design 48 / 112
EC25 Hardware Design
Table 9: Pin Definition of (U)SIM Interface
Pin Name Pin No. I/O Description Comment
USIM_VDD 14 PO Power supply for (U)SIM card
Either 1.8V or 3.0V is supported
by the module automatically.
USIM_DATA 15 IO Data signal of (U)SIM card
USIM_CLK 16 DO Clock signal of (U)SIM card
USIM_RST 17 DO Reset signal of (U)SIM card
USIM_
PRESENCE
13 DI (U)SIM card insertion detection
1.8V power domain.
If unused, keep it open.
USIM_GND 10 Specified ground for (U)SIM card
EC25 supports (U)SIM card hot-plug via the USIM_PRESENCE pin. The function supports low level and
high level detections, and is disabled by default. Please refer to document [2] for more details about AT+QSIMDET command.
The following figure shows a reference design for (U)SIM interface with an 8-pin (U)SIM card connector.
Figure 17: Reference Circuit of (U)SIM Interface with an 8-pin (U)SIM Card Connector
If (U)SIM card detection function is not needed, please keep USIM_PRESENCE unconnected. A
reference circuit for (U)SIM interface with a 6-pin (U)SIM card connector is illustrated in the following
figure.
EC25_Hardware_Design 49 / 112
EC25 Hardware Design
Figure 18: Reference Circuit of (U)SIM Interface with a 6-pin (U)SIM Card Connector
In order to enhance the reliability and availability of the (U)SIM card in customers’ applications, please
follow the criteria below in (U)SIM circuit design:
Keep placement of (U)SIM card connector to the module as close as possible. Keep the trace length
as less than 200mm as possible.
Keep (U)SIM card signals away from RF and VBAT traces.
Assure the ground between the module and the (U)SIM card connector short and wide. Keep the
trace width of ground and USIM_VDD no less than 0.5mm to maintain the same electric potential.
Make sure the bypass capacitor between USIM_VDD and USIM_GND less than 1uF, and place it as
close to (U)SIM card connector as possible. If the ground is complete on customers’ PCB,
USIM_GND can be connected to PCB ground directly.
To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away from each other and
shield them with surrounded ground.
In order to offer good ESD protection, it is recommended to add a TVS diode array whose parasitic
capacitance should not be more than 15pF. The 0Ω resistors should be added in series between the
module and the (U)SIM card to facilitate debugging. The 33pF capacitors are used for filtering
interference of EGSM900. Please note that the (U)SIM peripheral circuit should be close to the
(U)SIM card connector.
The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace
and sensitive occasion are applied, and should be placed close to the (U)SIM card connector.
3.10. USB Interface
EC25 contains one integrated Universal Serial Bus (USB) interface which complies with the USB 2.0
specification and supports high-speed (480Mbps) and full-speed (12Mbps) modes. The USB interface is
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used for AT command communication, data transmission, GNSS NMEA sentences output, software
debugging, firmware upgrade and voice over USB. The following table shows the pin definition of USB
interface.
Table 10: Pin Description of USB Interface
Pin Name Pin No. I/O Description Comment
USB_DP 69 IO USB differential data bus (+)
USB_DM 70 IO USB differential data bus (-)
USB_VBUS 71 PI
USB power supply,
used for USB detection
Require differential
impedance of 90Ω
Require differential
impedance of 90Ω
Typical 5.0V
GND 72 Ground
For more details about the USB 2.0 specifications, please visit http://www.usb.org/home
.
The USB interface is recommended to be reserved for firmware upgrade in customers’ designs. The
following figure shows a reference circuit of USB interface.
Figure 19: Reference Circuit of USB Application
A common mode choke L1 is recommended to be added in series between the module and customer’s
MCU in order to suppress EMI spurious transmission. Meanwhile, the 0Ω resistors (R3 and R4) should be
added in series between the module and the test points so as to facilitate debugging, and the resistors are
not mounted by default. In order to ensure the integrity of USB data line signal, L1/R3/R4 components
must be placed close to the module, and also these resistors should be placed close to each other. The
extra stubs of trace must be as short as possible.
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The following principles should be complied with when design the USB interface, so as to meet USB 2.0
specification.
It is important to route the USB signal traces as differential pairs with total grounding. The impedance
of USB differential trace is 90Ω.
Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is
important to route the USB differential traces in inner-layer with ground shielding on not only upper
and lower layers but also right and left sides.
Pay attention to the influence of junction capacitance of ESD protection components on USB data
lines. Typically, the capacitance value should be less than 2pF.
Keep the ESD protection components to the USB connector as close as possible.
NOTES
1. EC25 module can only be used as a slave device.
2. “*” means under development.
3.11. UART Interfaces
The module provides two UART interfaces: the main UART interface and the debug UART interface. The
following shows their features.
The main UART interface supports 4800bps, 9600bps, 19200bps, 38400bps, 57600bps, 115200bps,
230400bps, 460800bps and 921600bps baud rates, and the default is 115200bps. The interface is
used for data transmission and AT command communication.
The debug UART interface supports 115200bps baud rate. It is used for Linux console and log
output.
The following tables show the pin definition of the UART interfaces.
Table 11: Pin Definition of Main UART Interface
Pin Name Pin No. I/O Description Comment
RI 62 DO Ring indicator
DCD 63 DO Data carrier detection
1.8V power domain
CTS 64 DO Clear to send
RTS 65 DI Request to send
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DTR 66 DI
Data terminal ready,
sleep mode control
TXD 67 DO Transmit data
RXD 68 DI Receive data
Table 12: Pin Definition of Debug UART Interface
Pin Name Pin No. I/O Description Comment
DBG_TXD 12 DO Transmit data
1.8V power domain
DBG_RXD 11 DI Receive data
The logic levels are described in the following table.
Table 13: Logic Levels of Digital I/O
Parameter Min. Max. Unit
VIL -0.3 0.6 V
VIH 1.2 2.0 V
VOL 0 0.45 V
VOH 1.35 1.8 V
The module provides 1.8V UART interface. A level translator should be used if customers’ application is
equipped with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instruments
is recommended. The following figure shows a reference design.
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VDD_EXT
RI
DCD
CTS
RTS
DTR
TXD
RXD
0.1uF
120K
51K
VCCA VCCB
10K
OE
A1
A2
Translator
A3
A4
A5
A6
A7
A8
GND
B1
B2
B3
B4
B5
B6
B7
B8
0.1uF
51K
VDD_MCU
RI_MCU
DCD_MCU
CTS_MCU
RTS_MCU
DTR_MCU
TXD_MCU
RXD_MCU
Figure 20: Reference Circuit with Translator Chip
Please visit http://www.ti.com
for more information.
Another example with transistor translation circuit is shown as below. The circuit design of dotted line
section can refer to the design of solid line section, in terms of both module’s input and output circuit
designs, but please pay attention to the direction of connection.
Figure 21: Reference Circuit with Transistor Circuit
NOTE
Transistor circuit solution is not suitable for applications with high baud rates exceeding 460Kbps.
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3.12. PCM and I2C Interfaces
EC25 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the
following modes and one I2C interface:
Primary mode (short frame synchronization, works as both master and slave)
Auxiliary mode (long frame synchronization, works as master only)
In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC falling edge represents the MSB. In this mode, the PCM interface supports
256KHz, 512KHz, 1024KHz or 2048KHz PCM_CLK at 8KHz PCM_SYNC, and also supports 4096KHz
PCM_CLK at 16KHz PCM_SYNC.
In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge. The PCM_SYNC rising edge represents the MSB. In this mode, the PCM interface operates with a
256KHz, 512KHz, 1024KHz or 2048KHz PCM_CLK and an 8KHz, 50% duty cycle PCM_SYNC.
EC25 supports 16-bit linear data format. The following figures show the primary mode’s timing
relationship with 8KHz PCM_SYNC and 2048KHz PCM_CLK, as well as the auxiliary mode’s timing
relationship with 8KHz PCM_SYNC and 256KHz PCM_CLK.
Figure 22: Primary Mode Timing
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Figure 23: Auxiliary Mode Timing
The following table shows the pin definition of PCM and I2C interfaces which can be applied on audio
codec design.
Table 14: Pin Definition of PCM and I2C Interfaces
Pin Name Pin No. I/O Description Comment
PCM_IN 24 DI PCM data input 1.8V power domain
PCM_OUT 25 DO PCM data output 1.8V power domain
PCM_SYNC 26 IO
PCM data frame
synchronization signal
1.8V power domain
PCM_CLK 27 IO PCM data bit clock 1.8V power domain
I2C_SCL 41 OD I2C serial clock Require external pull-up to 1.8V
I2C_SDA 42 OD I2C serial data Require external pull-up to 1.8V
Clock and mode can be configured by AT command, and the default configuration is master mode using
short frame synchronization format with 2048KHz PCM_CLK and 8KHz PCM_SYNC. Please refer to
document [2] for more details about AT+QDAI command.
The following figure shows a reference design of PCM interface with external codec IC.
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Figure 24: Reference Circuit of PCM Application with Audio Codec
NOTES
1. It is recommended to reserve an RC (R=22Ω, C=22pF) circuits on the PCM lines, especially for
PCM_CLK.
2. EC25 works as a master device pertaining to I2C interface.
3.13. SD Card Interface
EC25 supports SDIO 3.0 interface for SD card.
The following table shows the pin definition of SD card interface.
Table 15: Pin Definition of SD Card Interface
Pin Name Pin No. I/O Description Comment
SDC2_DATA3 28 IO SD card SDIO bus DATA3
SDIO signal level can be
SDC2_DATA2 29 IO SD card SDIO bus DATA2
SDC2_DATA1 30 IO SD card SDIO bus DATA1
SDC2_DATA0 31 IO SD card SDIO bus DATA0
selected according to SD
card supported level,
please refer to SD 3.0
protocol for more details.
If unused, keep it open.
SDC2_CLK 32 DO SD card SDIO bus clock
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SDC2_CMD 33 IO SD card SDIO bus command
VDD_SDIO 34 PO SD card SDIO bus pull up power
1.8V/2.85V configurable.
Cannot be used for SD
card power. If unused,
keep it open.
SD_INS_DET 23 DI SD card insertion detection
The following figure shows a reference design of SD card.
Figure 25: Reference Circuit of SD Card Interface
1.8V power domain.
If unused, keep it open.
In SD card interface design, in order to ensure good communication performance with SD card, the
following design principles should be complied with:
SD_INS_DET must be connected.
The voltage range of SD card power supply VDD_3V is 2.7V~3.6V and a sufficient current up to 0.8A
should be provided. As the maximum output current of VDD_SDIO is 50mA which can only be used
for SDIO pull-up resistors, an externally power supply is needed for SD card.
To avoid jitter of bus, resistors R7~R11 are needed to pull up the SDIO to VDD_SDIO. Value of these
resistors is among 10KΩ~100KΩ and the recommended value is 100KΩ. VDD_SDIO should be used
as the pull-up power.
In order to adjust signal quality, it is recommended to add 0Ω resistors R1~R6 in series between the
module and the SD card. The bypass capacitors C1~C6 are reserved and not mounted by default. All
resistors and bypass capacitors should be placed close to the module.
In order to offer good ESD protection, it is recommended to add a TVS diode on SD card pins near
the SD card connector with junction capacitance less than 15pF.
Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals,
etc., as well as noisy signals such as clock signals, DCDC signals, etc.
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It is important to route the SDIO signal traces with total grounding. The impedance of SDIO data trace
is 50Ω (±10%).
Make sure the adjacent trace spacing is two times of the trace width and the load capacitance of
SDIO bus should be less than 15pF.
It is recommended to keep the trace length difference between CLK and DATA/CMD less than 1mm
and the total routing length less than 50mm. The total trace length inside the module is 27mm, so the
exterior total trace length should be less than 23mm.
3.14. ADC Interfaces
The module provides two analog-to-digital converter (ADC) interfaces. AT+QADC=0 command can be used to read the voltage value on ADC0 pin. AT+QADC=1 command can be used to read the voltage value on ADC1 pin. For more details about these AT commands, please refer to document [2].
In order to improve the accuracy of ADC, the trace of ADC should be surrounded by ground.
Table 16: Pin Definition of ADC Interfaces
Pin Name Pin No. Description
ADC0 45 General purpose analog to digital converter
ADC1 44 General purpose analog to digital converter
The following table describes the characteristic of ADC function.
Table 17: Characteristic of ADC
Parameter Min. Typ. Max. Unit
ADC0 Voltage Range 0.3 VBAT_BB V
ADC1 Voltage Range 0.3 VBAT_BB V
ADC Resolution 15 bits
NOTES
1. ADC input voltage must not exceed VBAT_BB.
2. It is prohibited to supply any voltage to ADC pins when VBAT is removed.
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3. It is recommended to use a resistor divider circuit for ADC application.
3.15. Network Status Indication
The network indication pins can be used to drive network status indication LEDs. The module provides
two pins which are NET_MODE and NET_STATUS. The following tables describe the pin definition and
logic level changes in different network status.
Table 18: Pin Definition of Network Connection Status/Activity Indicator
Pin Name Pin No. I/O Description Comment
1.8V power domain
Cannot be pulled up
before startup
1.8V power domain
NET_MODE 5 DO
NET_STATUS 6 DO
Indicate the module’s network
registration mode
Indicate the module’s network activity
status
Table 19: Working State of Network Connection Status/Activity Indicator
Pin Name Logic Level Changes Network Status
Always High Registered on LTE network
NET_MODE
Always Low Others
Flicker slowly (200ms High/1800ms Low) Network searching
Flicker slowly (1800ms High/200ms Low) Idle
NET_STATUS
Flicker quickly (125ms High/125ms Low) Data transfer is ongoing
Always High Voice calling
A reference circuit is shown in the following figure.
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Figure 26: Reference Circuit of the Network Indicator
3.16. STATUS
The STATUS pin is an open drain output for indicating the module’s operation status. It can be connected
to a GPIO of DTE with a pull-up resistor, or as LED indication circuit as below. When the module is turned
on normally, the STATUS will present the low state. Otherwise, the STATUS will present high-impedance
state.
Table 20: Pin Definition of STATUS
Pin Name Pin No. I/O Description Comment
STATUS 61 OD Indicate the module’s operation status
The following figure shows different circuit designs of STATUS, and customers can choose either one
according to customers’ application demands.
An external pull-up resistor
is required.
If unused, keep it open.
Figure 27: Reference Circuits of STATUS
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3.17. Behaviors of RI
AT+QCFG="risignaltype","physical" command can be used to configure RI behavior.
No matter on which port a URC is presented, the URC will trigger the behavior of RI pin.
NOTE
URC can be outputted from UART port, USB AT port and USB modem port through configuration via
AT+QURCCFG command. The default port is USB AT port.
In addition, RI behavior can be configured flexibly. The default behavior of the RI is shown as below.
Table 21: Behaviors of RI
State Response
Idle RI keeps at high level
URC RI outputs 120ms low pulse when a new URC returns
The RI behavior can be changed by AT+QCFG="urc/ri/ring" command. Please refer to document [2]
for details.
3.18. SGMII Interface
EC25 includes an integrated Ethernet MAC with an SGMII interface and two management interfaces, and
key features of the SGMII interface are shown below:
IEEE802.3 compliance
Support 10M/100M/1000M Ethernet work mode
Support maximum 150Mbps (DL)/50Mbps (UL) for 4G network
Support VLAN tagging
Support IEEE1588 and Precision Time Protocol (PTP)
Can be used to connect to external Ethernet PHY like AR8033, or to an external switch
Management interfaces support dual voltage 1.8V/2.85V
The following table shows the pin definition of SGMII interface.
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Table 22: Pin Definition of SGMII Interface
Pin Name Pin No. I/O Description Comment Control Signal Part
EPHY_RST_N 119 DO Ethernet PHY reset 1.8V/2.85V power domain
EPHY_INT_N 120 DI Ethernet PHY interrupt 1.8V power domain
SGMII_MDATA 121 IO
SGMII_MCLK 122 DO
SGMII MDIO (Management Data
Input/Output) data
SGMII MDIO (Management Data
Input/Output) clock
1.8V/2.85V power domain
1.8V/2.85V power domain
Configurable power source.
USIM2_VDD 128 PO SGMII MDIO pull-up power source
1.8V/2.85V power domain.
External pull-up power source for
SGMII MDIO pins.
SGMII Signal Part
SGMII_TX_M 123 AO SGMII transmission-minus
SGMII_TX_P 124 AO SGMII transmission-plus
SGMII_RX_P 125 AI SGMII receiving-plus
SGMII_RX_M 126 AI SGMII receiving-minus
Connect with a 0.1uF capacitor,
close to the PHY side.
Connect with a 0.1uF capacitor,
close to the PHY side.
Connect with a 0.1uF capacitor,
close to EC25 module.
Connect with a 0.1uF capacitor,
close to EC25 module.
The following figure shows the simplified block diagram for Ethernet application.
Figure 28: Simplified Block Diagram for Ethernet Application
The following figure shows a reference design of SGMII interface with PHY AR8033 application.
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Figure 29: Reference Circuit of SGMII Interface with PHY AR8033 Application
In order to enhance the reliability and availability in customers’ applications, please follow the criteria
below in the Ethernet PHY circuit design:
Keep SGMII data and control signals away from other sensitive circuits/signals such as RF circuits,
analog signals, etc., as well as noisy signals such as clock signals, DCDC signals, etc.
Keep the maximum trace length less than 10-inch and keep skew on the differential pairs less than
20mil.
The differential impedance of SGMII data trace is 100Ω±10%, and the reference ground of the area
should be complete.
Make sure the trace spacing between SGMII RX and TX is at least 3 times of the trace width, and the
same to the adjacent signal traces.
3.19. Wireless Connectivity Interfaces
EC25 supports a low-power SDIO 3.0 interface for WLAN and a UART/PCM interface for BT.
The following table shows the pin definition of wireless connectivity interfaces.
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Table 23: Pin Definition of Wireless Connectivity Interfaces
Pin Name Pin No. I/O Description Comment
WLAN Part
SDC1_DATA3 129 IO WLAN SDIO data bus D3 1.8V power domain
SDC1_DATA2 130 IO WLAN SDIO data bus D2 1.8V power domain
SDC1_DATA1 131 IO WLAN SDIO data bus D1 1.8V power domain
SDC1_DATA0 132 IO WLAN SDIO data bus D0 1.8V power domain
SDC1_CLK 133 DO WLAN SDIO bus clock 1.8V power domain
SDC1_CMD 134 IO WLAN SDIO bus command 1.8V power domain
WLAN_EN 136 DO
WLAN function control via FC20
module.
Coexistence and Control Part
PM_ENABLE 127 DO WLAN power control
WAKE_ON_
WIRELESS
135 DI
Wake up the host (EC25 module) by
FC20 module
COEX_UART_RX 137 DI LTE/WLAN&BT coexistence signal
COEX_UART_TX 138 DO LTE/WLAN&BT coexistence signal
WLAN_SLP_CLK 118 DO WLAN sleep clock
BT Part*
1.8V power domain.
Active high.
Cannot be pulled up
before startup.
1.8V power domain
Active high.
1.8V power domain
1.8V power domain.
Cannot be pulled up
before startup.
1.8V power domain.
Cannot be pulled up
before startup.
BT_RTS* 37 DI BT UART request to send 1.8V power domain
BT_TXD* 38 DO BT UART transmit data 1.8V power domain
BT_RXD* 39 DI BT UART receive data 1.8V power domain
1.8V power domain.
BT_CTS* 40 DO BT UART clear to send
Cannot be pulled up
before startup.
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PCM_IN
1)
24 DI PCM data input 1.8V power domain
PCM_OUT1) 25 DO PCM data output 1.8V power domain
PCM_SYNC1) 26 IO
PCM data frame synchronization
signal
1.8V power domain
PCM_CLK1) 27 IO PCM data bit clock 1.8V power domain
BT_EN* 139 DO
BT function control via FC20
module.
1.8V power domain
Active high.
The following figure shows a reference design of wireless connectivity interfaces with Quectel FC20
module.
POWER
WLAN
Module
SDC1_DAT A3
SDC1_DAT A2
SDC1_DAT A1
SDC1_DATA0
WLAN_SLP_CLK
WAKE_ ON _WIRELE SS
PM_ENABLE
VDD_EXT VIO
SDC1_CLK
SDC1_CMD
WLAN_EN
DCDC/LDO
FC20 Module
VDD_3V3
SDIO_D3
SDIO_D2
SDIO_D1
SDIO_D0
SDIO_CLK
SDIO_CMD
WLAN_EN
32K HZ_IN
WAKE_ ON_WIRELE SS
COEX
COEX_ UART_RX
COEX_UART_TX
LTE_UART_TXD
LTE_UART_RXD
Figure 30: Reference Circuit of Wireless Connectivity Interfaces with FC20 Module
NOTES
1. FC20 module can only be used as a slave device.
2. When BT function is enabled on EC25 module, PCM_SYNC and PCM_CLK pins are only used to
output signals.
3. For more information about wireless connectivity interfaces, please refer to document [5].
4. “*” means under development.
1)
5.
Pads 24~27 are multiplexing pins used for audio design on EC25 module and BT function on BT
module.
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3.19.1. WLAN Interface
EC25 provides a low power SDIO 3.0 interface and control interface for WLAN design.
SDIO interface supports the SDR mode (up to 50MHz).
As SDIO signals are very high-speed, in order to ensure the SDIO interface design corresponds with the
SDIO 3.0 specification, please comply with the following principles:
It is important to route the SDIO signal traces with total grounding. The impedance of SDIO signal
trace is 50Ω±10%.
Keep SDIO signals far away from other sensitive circuits/signals such as RF circuits, analog signals,
etc., as well as noisy signals such as clock signals, DCDC signals, etc.
It is recommended to keep matching length between CLK and DATA/CMD less than 1mm and total
routing length less than 50mm.
Keep termination resistors within 15Ω~24Ω on clock lines near the module and keep the route
distance from the module clock pins to termination resistors less than 5mm.
Make sure the adjacent trace spacing is 2 times of the trace width and bus capacitance is less than
15pF.
3.19.2. BT Interface*
EC25 supports a dedicated UART interface and a PCM interface for BT application.
Further information about BT interface will be added in future version of this document.
NOTE
“*” means under development.
3.20. USB_BOOT Interface
EC25 provides a USB_BOOT pin. Customers can pull up USB_BOOT to VDD_EXT before powering on
the module, thus the module will enter into emergency download mode when powered on. In this mode,
the module supports firmware upgrade over USB interface.
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Table 24: Pin Definition of USB_BOOT Interface
Pin Name Pin No. I/O Description Comment
1.8V power domain.
USB_BOOT 115 DI
Force the module to enter into
emergency download mode
Active high.
It is recommended to
reserve test point.
The following figure shows a reference circuit of USB_BOOT interface.
Module
VDD_EXT
Test point
USB_BOOT
Cl ose to tes t po in t
TVS
4.7K
Figure 31: Reference Circuit of USB_BOOT Interface
NOTE
VBAT
PWRKEY
VDD_EXT
500ms
≥
VH=0.8V
V
0. 5V
≤
IL
About 100ms
Setting USB_BOOT to high level between VBAT rising on and VDD_EXT rising on can let the module enter into emergency download mode.
USB_BOOT
RESET_N
Figure 32: Timing Sequence for Entering into Emergency Download Mode
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NOTES
1. Please make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is
no less than 30ms.
2. When using MCU to control module to enter into the forced download mode, follow the above timing
sequence. It is not recommended to pull up USB_BOOT to 1.8V before powering up the VBAT. Short
the test points as shown in Figure 31 can manually force the module to enter into download mode.
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4 GNSS Receiver
4.1. General Description
EC25 includes a fully integrated global navigation satellite system solution that supports Gen8C-Lite of
Qualcomm (GPS, GLONASS, BeiDou, Galileo and QZSS).
EC25 supports standard NMEA-0183 protocol, and outputs NMEA sentences at 1Hz data update rate via
USB interface by default.
By default, EC25 GNSS engine is switched off. It has to be switched on via AT command. For more
details about GNSS engine technology and configurations, please refer to document [3].
4.2. GNSS Performance
The following table shows the GNSS performance of EC25.
Table 25: GNSS Performance
Parameter Description Conditions Typ. Unit
Cold start Autonomous -146 dBm
Sensitivity
(GNSS)
TTFF
(GNSS)
Reacquisition Autonomous -157 dBm
Tracking Autonomous -157 dBm
Cold start
@open sky
Warm start
@open sky
Autonomous 35 s
XTRA enabled 18 s
Autonomous 26 s
XTRA enabled 2.2 s
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Autonomous 2.5 s
XTRA enabled 1.8 s
Autonomous
@open sky
<2.5 m
Accuracy
(GNSS)
Hot start
@open sky
CEP-50
NOTES
1. Tracking sensitivity: the lowest GNSS signal value at the antenna port on which the module can keep
on positioning for 3 minutes.
2. Reacquisition sensitivity: the lowest GNSS signal value at the antenna port on which the module can
fix position again within 3 minutes after loss of lock.
3. Cold start sensitivity: the lowest GNSS signal value at the antenna port on which the module fixes
position within 3 minutes after executing cold start command.
4.3. Layout Guidelines
The following layout guidelines should be taken into account in customers’ designs.
Maximize the distance among GNSS antenna, main antenna and Rx-diversity antenna.
Digital circuits such as (U)SIM card, USB interface, camera module and display connector should be
kept away from the antennas.
Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar
isolation and protection.
Keep 50Ω characteristic impedance for the ANT_GNSS trace.
Please refer to Chapter 5 for GNSS antenna reference design and antenna installation information.
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5 Antenna Interfaces
EC25 antenna interfaces include a main antenna interface, an Rx-diversity antenna interface which is
used to resist the fall of signals caused by high speed movement and multipath effect, and a GNSS
antenna interface. The antenna ports have an impedance of 50Ω.
5.1. Main/Rx-diversity Antenna Interfaces
5.1.1. Pin Definition
The pin definition of main antenna and Rx-diversity antenna interfaces is shown below.
Table 26: Pin Definition of RF Antennas
Pin Name Pin No. I/O Description Comment
ANT_MAIN 49 IO Main antenna pad 50Ω impedance
50Ω impedance.
ANT_DIV
35 AI
Receive diversity antenna pad
If unused, keep it
open.
5.1.2. Operating Frequency
Table 27: Module Operating Frequencies
3GPP Band Transmit Receive Unit
GSM850 824~849 869~894 MHz
EGSM900 880~915 925~960 MHz
DCS1800 1710~1785 1805~1880 MHz
PCS1900 1850~1910 1930~1990 MHz
WCDMA B1 1920~1980 2110~2170 MHz
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WCDMA B2 1850~1910 1930~1990 MHz
WCDMA B4 1710~1755 2110~2155 MHz
WCDMA B5 824~849 869~894 MHz
WCDMA B6 830~840 875~885 MHz
WCDMA B8 880~915 925~960 MHz
WCDMA B19 830~845 875~890 MHz
LTE FDD B1 1920~1980 2110~2170 MHz
LTE FDD B2 1850~1910 1930~1990 MHz
LTE FDD B3 1710~1785 1805~1880 MHz
LTE FDD B4 1710~1755 2110~2155 MHz
LTE FDD B5 824~849 869~894 MHz
LTE FDD B7 2500~2570 2620~2690 MHz
LTE FDD B8 880~915 925~960 MHz
LTE FDD B12 699~716 729~746 MHz
LTE FDD B13 777~787 746~756 MHz
LTE FDD B14 788~798 758~768 MHZ
LTE FDD B18 815~830 860~875 MHz
LTE FDD B19 830~845 875~890 MHz
LTE FDD B20 832~862 791~821 MHz
LTE FDD B26 814~849 859~894 MHz
LTE FDD B28 703~748 758~803 MHz
LTE TDD B38 2570~2620 2570~2620 MHz
LTE TDD B40 2300~2400 2300~2400 MHz
LTE TDD B41 2555~2655 2555~2655 MHz
LTE FDD B66 1710~1780 2100~2200 MHz
EC25_Hardware_Design 73 / 112
EC25 Hardware Design
LTE FDD B71 663~698 617~652 MHz
5.1.3. Reference Design of RF Antenna Interface
A reference design of ANT_MAIN and ANT_DIV antenna pads is shown as below. A π-type matching
circuit should be reserved for better RF performance. The capacitors are not mounted by default.
Figure 33: Reference Circuit of RF Antenna Interface
NOTES
1. Keep a proper distance between the main antenna and the Rx-diversity antenna to improve the
receiving sensitivity.
2. ANT_DIV function is enabled by default. AT+QCFG="diversity",0 command can be used to disable
receive diversity. Please refer to document [2] for details.
3. Place the π-type matching components (R1&C1&C2, R2&C3&C4) as close to the antenna as
possible.
5.1.4. Reference Design of RF Layout
For user’s PCB, the characteristic impedance of all RF traces should be controlled as 50Ω. The
impedance of the RF traces is usually determined by the trace width (W), the materials’ dielectric constant,
height from the reference ground to the signal layer (H), and the space between the RF trace and the
ground (S). Microstrip and coplanar waveguide are typically used in RF layout to control characteristic
impedance. The following figures are reference designs of microstrip or coplanar waveguide with different
PCB structures.
EC25_Hardware_Design 74 / 112
EC25 Hardware Design
.
Figure 34: Microstrip Design on a 2-layer PCB
Figure 35: Coplanar Waveguide Design on a 2-layer PCB
Figure 36: Coplanar Waveguide Design on a 4-layer PCB (Layer 3 as Reference Ground)
EC25_Hardware_Design 75 / 112
EC25 Hardware Design
Figure 37: Coplanar Waveguide Design on a 4-layer PCB (Layer 4 as Reference Ground)
In order to ensure RF performance and reliability, the following principles should be complied with in RF
layout design:
Please use an impedance simulation tool to control the characteristic impedance of RF traces as
50Ω.
The GND pins adjacent to RF pins should not be designed as thermal relief pads, and should be fully
connected to ground.
The distance between the RF pins and the RF connector should be as short as possible, and all the
right angle traces should be changed to curved ones.
There should be clearance area under the signal pin of the antenna connector or solder joint.
The reference ground of RF traces should be complete. Meanwhile, adding some ground vias around
RF traces and the reference ground could help to improve RF performance. The distance between
the ground vias and RF traces should be no less than two times the width of RF signal traces (2*W).
For more details about RF layout, please refer to document [6].
5.2. GNSS Antenna Interface
The following tables show the pin definition and frequency specification of GNSS antenna interface.
Table 28: Pin Definition of GNSS Antenna Interface
Pin Name Pin No. I/O Description Comment
ANT_GNSS 47 AI GNSS antenna
EC25_Hardware_Design 76 / 112
50Ω impedance.
If unused, keep it open.
EC25 Hardware Design
Table 29: GNSS Frequency
Type Frequency Unit
GPS 1575.42±1.023 MHz
GLONASS 1597.5~1605.8 MHz
Galileo 1575.42±2.046 MHz
BeiDou 1561.098±2.046 MHz
QZSS 1575.42 MHz
A reference design of GNSS antenna is shown as below.
Figure 38: Reference Circuit of GNSS Antenna
NOTES
1. An external LDO can be selected to supply power according to the active antenna requirement.
2. If the module is designed with a passive antenna, then the VDD circuit is not needed.
EC25_Hardware_Design 77 / 112
EC25 Hardware Design
5.3. Antenna Installation
5.3.1. Antenna Requirement
The following table shows the requirements on main antenna, Rx-diversity antenna and GNSS antenna.
Table 30: Antenna Requirements
Type Requirements
Frequency range: 1559MHz~1609MHz
Polarization: RHCP or linear
VSWR: < 2 (Typ.)
GNSS1)
Passive antenna gain: > 0dBi
Active antenna noise figure: < 1.5dB
Active antenna gain: > 0dBi
Active antenna embedded LNA gain: < 17 dB
VSWR: ≤ 2
Efficiency: > 30%
Max input power: 50W
Input impedance: 50Ω
Cable insertion loss: < 1dB
GSM/WCDMA/LTE
(GSM850, GSM 900, WCDMA B5/B6/B8/B19,
LTE-FDD B5/B8/B12/B13/B14/B18/B19/B20/B26/B28/B71)
Cable insertion loss: < 1.5dB
(DCS1800, PCS1900, WCDMA B1/B2/B4,
LTE-FDD B1/B2/B3/B4/B66)
Cable insertion loss: < 2dB
(LTE-FDD B7, LTE-TDD B38/B40/B41)
NOTE
1)
It is recommended to use a passive GNSS antenna when LTE B13 or B14 is supported, as the use of
active antenna may generate harmonics which will affect the GNSS performance.
EC25_Hardware_Design 78 / 112
EC25 Hardware Design
5.3.2. Recommended RF Connector for Antenna Installation
If RF connector is used for antenna connection, it is recommended to use U.FL-R-SMT connector
provided by Hirose.
Figure 39: Dimensions of the U.FL-R-SMT Connector (Unit: mm)
U.FL-LP serial connectors listed in the following figure can be used to match the U.FL-R-SMT.
Figure 40: Mechanicals of U.FL-LP Connectors
EC25_Hardware_Design 79 / 112
EC25 Hardware Design
The following figure describes the space factor of mated connector.
Figure 41: Space Factor of Mated Connector (Unit: mm)
For more details, please visit http://www.hirose.com
.
EC25_Hardware_Design 80 / 112
EC25 Hardware Design
6 Electrical, Reliability and Radio
Characteristics
6.1. Absolute Maximum Ratings
Absolute maximum ratings for power supply and voltage on digital and analog pins of the module are
listed in the following table.
Table 31: Absolute Maximum Ratings
Parameter Min. Max. Unit
VBAT_RF/VBAT_BB -0.3 4.7 V
USB_VBUS -0.3 5.5 V
Peak Current of VBAT_BB 0 0.8 A
Peak Current of VBAT_RF 0 1.8 A
Voltage at Digital Pins -0.3 2.3 V
Voltage at ADC0 0 VBAT_BB V
Voltage at ADC1 0 VBAT_BB V
EC25_Hardware_Design 81 / 112
EC25 Hardware Design
6.2. Power Supply Ratings
Table 32: Power Supply Ratings
Parameter Description Conditions Min. Typ. Max. Unit
The actual input voltages
VBAT_BB and
VBAT_RF
VBAT
must stay between the
minimum and maximum
values.
3.3 3.8 4.3 V
I
VBAT
Voltage drop during
burst transmission
Peak supply current
(during transmission
slot)
Maximum power control
level on EGSM900.
Maximum power control
level on EGSM900.
400 mV
1.8 2.0 A
USB_VBUS USB detection 3.0 5.0 5.25 V
6.3. Operation and Storage Temperatures
The operation and storage temperatures are listed in the following table.
Table 33: Operation and Storage Temperatures
Parameter Min. Typ. Max. Unit
Operation Temperature Range1) -35 +25 +75 ºC
Extended Temperature Range2) -40 +85 ºC
Storage Temperature Range -40 +90 ºC
NOTES
1)
1.
Within operation temperature range, the module is 3GPP compliant.
2)
2.
Within extended temperature range, the module remains the ability to establish and maintain a
voice, SMS, data transmission, emergency call, etc. There is no unrecoverable malfunction. There
are also no effects on radio spectrum and no harm to radio network. Only one or more parameters
like P
might reduce in their value and exceed the specified tolerances. When the temperature
out
EC25_Hardware_Design 82 / 112
EC25 Hardware Design
returns to the normal operation temperature levels, the module will meet 3GPP specifications again.
6.4. Current Consumption
The values of current consumption are shown below.
Table 34: EC25-E Current Consumption
Parameter Description Conditions Typ. Unit
OFF state Power down 11 uA
I
VBAT
Sleep state
AT+CFUN=0 (USB disconnected)
1.16 mA
GSM DRX=2 (USB disconnected) 2.74 mA
GSM DRX=9 (USB disconnected) 2.0 mA
WCDMA PF=64 (USB disconnected) 2.15 mA
WCDMA PF=128 (USB disconnected) 1.67 mA
LTE-FDD PF=64 (USB disconnected) 2.60 mA
LTE-FDD PF=128 (USB disconnected) 1.90 mA
LTE-TDD PF=64 (USB disconnected) 2.79 mA
LTE-TDD PF=128 (USB disconnected) 2.00 mA
GSM DRX=5 (USB disconnected) 19.5 mA
GSM DRX=5 (USB connected) 29.5 mA
WCDMA PF=64 (USB disconnected) 21.0 mA
Idle state
WCDMA PF=64 (USB connected) 31.0 mA
LTE-FDD PF=64 (USB disconnected) 20.7 mA
LTE-FDD PF=64 (USB connected) 30.8 mA
LTE-TDD PF=64 (USB disconnected) 20.8 mA
EC25_Hardware_Design 83 / 112
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LTE-TDD PF=64 (USB connected) 32.0 mA
EGSM900 4DL/1UL @33.22dBm 271.0 mA
EGSM900 3DL/2UL @33.0dBm 464.0 mA
EGSM900 2DL/3UL @30.86dBm 524.0 mA
GPRS data
transfer
(GNSS OFF)
EDGE data
transfer
(GNSS OFF)
EGSM900 1DL/4UL @29.58dBm 600 mA
DCS1800 4DL/1UL @29.92dBm 192.0 mA
DCS1800 3DL/2UL @29.84dBm 311.0 mA
DCS1800 2DL/3UL @29.67dBm 424.0 mA
DCS1800 1DL/4UL @29.48dBm 539.0 mA
EGSM900 4DL/1UL PCL=8 @27.40dBm 174.0 mA
EGSM900 3DL/2UL PCL=8 @27.24dBm 281.0 mA
EGSM900 2DL/3UL PCL=8 @27.11dBm 379.0 mA
EGSM900 1DL/4UL PCL=8 @26.99dBm 480.0 mA
DCS1800 4DL/1UL PCL=2 @25.82dBm 159.0 mA
DCS1800 3DL/2UL PCL=2 @25.85dBm 251.0 mA
WCDMA data
transfer
(GNSS OFF)
LTE data
transfer
(GNSS OFF)
DCS1800 2DL/3UL PCL=2 @25.68dBm 340.0 mA
DCS1800 1DL/4UL PCL=2 @25.57dBm 433.0 mA
WCDMA B1 HSDPA @22.47dBm 613.0 mA
WCDMA B1 HSUPA @22.44dBm 609.0 mA
WCDMA B5 HSDPA @23.07dBm 671.0 mA
WCDMA B5 HSUPA @23.07dBm 669.0 mA
WCDMA B8 HSDPA @22.67dBm 561.0 mA
WCDMA B8 HSUPA @22.39dBm 557.0 mA
LTE-FDD B1 @23.27dBm 754.0 mA
LTE-FDD B3 @23.54dBm 774.0 mA
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LTE-FDD B5 @22.83dBm 762.0 mA
LTE-FDD B7 @23.37dBm 842.0 mA
LTE-FDD B8 @23.48dBm 720.0 mA
LTE-FDD B20 @22.75dBm 714.0 mA
LTE-TDD B38 @23.05dBm 481.0 mA
LTE-TDD B40 @23.17dBm 431.8 mA
LTE-TDD B41 @23.02dBm 480.0 mA
GSM
voice call
EGSM900 PCL=5 @33.08dBm 264.0 mA
DCS1800 PCL=0 @29.75dBm 190.0 mA
WCDMA B1 @23.22dBm 680.0 mA
WCDMA voice
call
WCDMA B5 @23.18dBm 677.0 mA
WCDMA B8 @23.54dBm 618.0 mA
Table 35: EC25-A Current Consumption
Parameter Description Conditions Typ. Unit
OFF state Power down 10 uA
AT+CFUN=0 (USB disconnected)
1.1 mA
WCDMA PF=64 (USB disconnected) 1.8 mA
Sleep state
WCDMA PF=128 (USB disconnected) 1.5 mA
LTE-FDD PF=64 (USB disconnected) 2.2 mA
I
VBAT
LTE-FDD PF=128 (USB disconnected) 1.6 mA
WCDMA PF=64 (USB disconnected) 21.0 mA
WCDMA PF=64 (USB connected) 31.0 mA
Idle state
LTE-FDD PF=64 (USB disconnected) 21.0 mA
LTE-FDD PF=64 (USB connected) 31.0 mA
EC25_Hardware_Design 85 / 112
EC25 Hardware Design
WCDMA B2 HSDPA @21.9dBm 591.0 mA
WCDMA B2 HSUPA @21.62dBm 606.0 mA
WCDMA data
WCDMA B4 HSDPA @22.02dBm 524.0 mA
transfer
(GNSS OFF)
WCDMA B4 HSUPA @21.67dBm 540.0 mA
WCDMA B5 HSDPA @22.71dBm 490.0 mA
WCDMA B5 HSUPA @22.58dBm 520.0 mA
LTE-FDD B2 @22.93dBm 715.0 mA
LTE data
transfer
LTE-FDD B4 @22.96dBm 738.0 mA
(GNSS OFF)
LTE-FDD B12 @23.35dBm 663.0 mA
WCDMA B2 @22.93dBm 646.0 mA
WCDMA voice
call
WCDMA B4 @23dBm 572.0 mA
WCDMA B5 @23.78dBm 549.0 mA
Table 36: EC25-V Current Consumption
Parameter Description Conditions Typ. Unit
OFF state Power down 10 uA
0.85 mA
Sleep state
AT+CFUN=0 (USB disconnected)
LTE-FDD PF=64 (USB disconnected) 2.0 mA
LTE-FDD PF=128 (USB disconnected) 1.5 mA
I
VBAT
LTE-FDD PF=64 (USB disconnected) 20.0 mA
Idle state
LTE-FDD PF=64 (USB connected) 31.0 mA
LTE data
LTE-FDD B4 @23.14dBm 770.0 mA
transfer
(GNSS OFF)
LTE-FDD B13 @23.48dBm 531.0 mA
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Table 37: EC25-J Current Consumption
Parameter Description Conditions Typ. Unit
OFF state Power down 10 uA
I
VBAT
AT+CFUN=0 (USB disconnected)
1.1 mA
WCDMA PF=64 (USB disconnected) 1.9 mA
WCDMA PF=128 (USB disconnected) 1.5 mA
Sleep state
LTE-FDD PF=64 (USB disconnected) 2.5 mA
LTE-FDD PF=128 (USB disconnected) 1.8 mA
LTE-TDD PF=64 (USB disconnected) 2.6 mA
LTE-TDD PF=128 (USB disconnected) 1.9 mA
WCDMA PF=64 (USB disconnected) 21.0 mA
WCDMA PF=64 (USB connected) 31.0 mA
LTE-FDD PF=64 (USB disconnected) 21.0 mA
Idle state
LTE-FDD PF=64 (USB connected) 32.0 mA
WCDMA data
transfer
(GNSS OFF)
LTE data
transfer
(GNSS OFF)
LTE-TDD PF=64 (USB disconnected) 21.0 mA
LTE-TDD PF=64 (USB connected) 32.0 mA
WCDMA B1 HSDPA @22.32dBm 550.0 mA
WCDMA B1 HSUPA @22.64dBm 516.0 mA
WCDMA B6 HSDPA @22.02dBm 524.0 mA
WCDMA B6 HSUPA @22.33dBm 521.0 mA
WCDMA B19 HSDPA @22.67dBm 517.0 mA
WCDMA B19 HSUPA @22.33dBm 522.0 mA
LTE-FDD B1 @23.16dBm 685.0 mA
LTE-FDD B3 @23.22dBm 766.0 mA
LTE-FDD B8 @23.22dBm 641.0 mA
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LTE-FDD B18 @23.35dBm 661.0 mA
LTE-FDD B19 @23.16dBm 677.0 mA
LTE-FDD B26 @22.87dBm 690.0 mA
LTE-TDD B41 @22.42dBm 439.0 mA
WCDMA B1 @22.33dBm 605.0 mA
WCDMA voice
call
WCDMA B6 @23.28dBm 549.0 mA
WCDMA B19 @23.28dBm 549.0 mA
Table 38: EC25-AU Current Consumption
Parameter Description Conditions Typ. Unit
OFF state Power down 11 uA
AT+CFUN=0
AT+CFUN=0 (USB disconnected)
1.3 mA
1.46 mA
GSM850 DRX=5 (USB disconnected) 1.8 mA
EGSM900 DRX=5 (USB disconnected) 2.0 mA
DCS1800 DRX=5 (USB disconnected) 1.9 mA
PCS1900 DRX=5 (USB disconnected) 1.9 mA
Sleep state
I
VBAT
WCDMA PF=64 (USB disconnected) 2.0 mA
WCDMA PF=128 (USB disconnected) 1.6 mA
LTE-FDD PF=64 (USB disconnected) 2.2 mA
LTE-FDD PF=128 (USB disconnected) 1.6 mA
LTE-TDD PF=64 (USB disconnected) 2.3 mA
LTE-TDD PF=128 (USB disconnected) 1.6 mA
EGSM900 DRX=5 (USB disconnected) 22.0 mA
Idle state
EGSM900 DRX=5 (USB connected) 34.0 mA
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WCDMA PF=64 (USB disconnected) 22.0 mA
WCDMA PF=64 (USB connected) 33.0 mA
LTE-FDD PF=64 (USB disconnected) 24.0 mA
LTE-FDD PF=64 (USB connected) 35.0 mA
GSM850 1UL/4DL @32.53dBm 232.0 mA
GSM850 2UL/3DL @32.34dBm 384.0 mA
GSM850 3UL/2DL @30.28dBm 441.0 mA
GSM850 4UL/1DL @29.09dBm 511.0 mA
EGSM900 1UL/4DL @32.34dBm 241.0 mA
GPRS data
transfer
(GNSS OFF)
EGSM900 2UL/3DL @32.19dBm 397.0 mA
EGSM900 3UL/2DL @30.17dBm 459.0 mA
EGSM900 4UL/1DL @28.96dBm 533.0 mA
DCS1800 1UL/4DL @29.71dBm 183.0 mA
DCS1800 2UL/3DL @29.62dBm 289.0 mA
DCS1800 3UL/2DL @29.49dBm 392.0 mA
DCS1800 4UL/1DL @29.32dBm 495.0 mA
PCS1900 1UL/4DL @29.61dBm 174.0 mA
PCS1900 1UL/4DL @29.48dBm 273.0 mA
PCS1900 1UL/4DL @29.32dBm 367.0 mA
PCS1900 1UL/4DL @29.19dBm 465.0 mA
GSM850 1UL/4DL @27.09dBm 154.0 mA
GSM850 2UL/3DL @26.94dBm 245.0 mA
EDGE data
transfer
GSM850 3UL/2DL @26.64dBm 328.0 mA
(GNSS OFF)
GSM850 4UL/1DL @26.53dBm 416.0 mA
EGSM900 1UL/4DL @26.64dBm 157.0 mA
EC25_Hardware_Design 89 / 112
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EGSM900 2UL/3DL @26.95dBm 251.0 mA
EGSM900 3UL/2DL @26.57dBm 340.0 mA
EGSM900 4UL/1DL @26.39dBm 431.0 mA
DCS18001 UL/4DL @26.03dBm 152.0 mA
DCS1800 2UL/3DL @25.62dBm 240.0 mA
DCS1800 3UL/2DL @25.42dBm 325.0 mA
DCS1800 4UL/1DL @25.21dBm 415.0 mA
PCS1900 1UL/4DL @25.65dBm 148.0 mA
PCS1900 1UL/4DL @25.63dBm 232.0 mA
WCDMA data
transfer
(GNSS OFF)
PCS1900 1UL/4DL @25.54dBm 313.0 mA
PCS1900 1UL/4DL @25.26dBm 401.0 mA
WCDMA B1 HSDPA @22.34dBm 625.0 mA
WCDMA B1 HSUPA @21.75dBm 617.0 mA
WCDMA B2 HSDPA @22.51dBm 610.0 mA
WCDMA B2 HSUPA @22. 14dBm 594.0 mA
WCDMA B5 HSDPA @22.98dBm 576.0 mA
WCDMA B5 HSUPA @22.89dBm 589.0 mA
WCDMA B8 HSDPA @22.31dBm 556.0 mA
WCDMA B8 HSUPA @22.11dBm 572.0 mA
LTE-FDD B1 @23.28dBm 817.0 mA
LTE-FDD B2 @23.34dBm 803.0 mA
LTE data
LTE-FDD B3 @23.2dBm 785.0 mA
transfer
(GNSS OFF)
LTE-FDD B4 @22.9dBm 774.0 mA
LTE-FDD B5 @23.45dBm 687.0 mA
LTE-FDD B7 @22.84dBm 843.0 mA
EC25_Hardware_Design 90 / 112
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LTE-FDD B8 @22.92dBm 689.0 mA
LTE-FDD B28 @23.23dBm 804.0 mA
LTE-TDD B40 @23.3dBm 429.0 mA
GSM850 PCL5 @32.66dBm 228.0 mA
GSM voice
call
EGSM900 PCL5 @32.59dBm 235.0 mA
DCS1800 PCL0 @29.72dBm 178.0 mA
PCS1900 PCL0 @29.82dBm 170.0 mA
WCDMA B1 @23.27dBm 687.0 mA
WCDMA
voice call
WCDMA B2 @23.38dBm 668.0 mA
WCDMA B5 @23.38dBm 592.0 mA
WCDMA B8 @23.32dBm 595.0 mA
Table 39: EC25-AUT Current Consumption
Parameter Description Conditions Typ. Unit
OFF state Power down 10 uA
AT+CFUN=0 (USB disconnected)
WCDMA PF=64 (USB disconnected) 1.9 mA
1.0 mA
I
VBAT
Sleep state
WCDMA PF=128 (USB disconnected) 1.5 mA
LTE-FDD PF=64 (USB disconnected) 2.3 mA
LTE-FDD PF=128 (USB disconnected) 1.9 mA
WCDMA PF=64 (USB disconnected) 23.0 mA
WCDMA PF=64 (USB connected) 33.0 mA
Idle state
LTE-FDD PF=64 (USB disconnected) 17.0 mA
LTE-FDD PF=64 (USB connected) 29.0 mA
LTE-TDD PF=64 (USB disconnected) 21.0 mA
LTE-TDD PF=64 (USB connected) 32.0 mA
EC25_Hardware_Design 91 / 112
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I
VBAT
WCDMA data
transfer
(GNSS OFF)
LTE data
transfer
(GNSS OFF)
WCDMA voice
call
WCDMA B1 HSDPA @22.24dBm 500.0 mA
WCDMA B1 HSUPA @22.05dBm 499.0 mA
WCDMA B5 HSDPA @22.39dBm 418.0 mA
WCDMA B5 HSUPA @22dBm 486.0 mA
LTE-FDD B1 @23.28dBm 707.0 mA
LTE-FDD B3 @23.36dBm 782.0 mA
LTE-FDD B5 @23.32dBm 588.0 mA
LTE-FDD B7 @23.08dBm 692.0 mA
LTE-FDD B28-A @23.37dBm 752.0 mA
LTE-FDD B28-B @23.48dBm 770.0 mA
WCDMA B1 @23.22dBm 546.0 mA
WCDMA B5 @23.01dBm 511.0 mA
Table 40: EC25-AF Current Consumption
Parameter Description Conditions Typ. Unit
OFF state Power down 10 uA
I
VBAT
Sleep state
AT+CFUN=0 (USB disconnected)
WCDMA PF=64 (USB disconnected) 1.8 mA
WCDMA PF=128 (USB disconnected) 1.4 mA
1.0 mA
LTE-FDD PF=64 (USB disconnected) 2.2 mA
LTE-FDD PF=128 (USB disconnected) 1.8 mA
Idle state
WCDMA PF=64 (USB disconnected) 23.3 mA
WCDMA PF=64 (USB connected) 33.4 mA
LTE-FDD PF=64 (USB disconnected) 17.6 mA
LTE-FDD PF=64 (USB connected) 29.4 mA
EC25_Hardware_Design 92 / 112
EC25 Hardware Design
I
VBAT
WCDMA data
transfer
(GNSS OFF)
LTE data
transfer
(GNSS OFF)
WCDMA B2 HSDPA @22.63dBm 560.0 mA
WCDMA B2 HSUPA @22.49dBm 564.0 mA
WCDMA B4 HSDPA @22.45dBm 601.0 mA
WCDMA B4 HSUPA @22.57dBm 610.0 mA
WCDMA B5 HSDPA @22.49dBm 603.0 mA
WCDMA B5 HSUPA @22.43dBm 617.0 mA
LTE-FDD B2 @22.92dBm 698.0 mA
LTE-FDD B4 @23.12dBm 710.0 mA
LTE-FDD B5 @22.98dBm 650.0 mA
LTE-FDD B12 @23.42dBm 648.0 mA
LTE-FDD B13 @22.92dBm 690.0 mA
LTE-FDD B14 @23.42dBm 685.0 mA
LTE-FDD B66 @23.35dBm 715.0 mA
LTE-FDD B71 @23.39dBm 689.0 mA
WCDMA B2 @23.59dBm 585.0 mA
WCDMA
voice call
WCDMA B4 @23.47dBm 610.0 mA
WCDMA B5 @23.46dBm 605.0 mA
Table 41: EC25-EU Current Consumption
Parameter Description Conditions Typ. Unit
OFF state Power down 11 uA
AT+CFUN=0 (USB disconnected)
1.16 mA
I
VBAT
GSM DRX=2 (USB disconnected) 2.74 mA
Sleep state
GSM DRX=9 (USB disconnected) 2.0 mA
WCDMA PF=64 (USB disconnected) 2.15 mA
EC25_Hardware_Design 93 / 112
Idle state
EC25 Hardware Design
WCDMA PF=128 (USB disconnected) 1.67 mA
LTE-FDD PF=64 (USB disconnected) 2.60 mA
LTE-FDD PF=128 (USB disconnected) 1.90 mA
LTE-TDD PF=64 (USB disconnected) 2.79 mA
LTE-TDD PF=128 (USB disconnected) 2.00 mA
GSM DRX=5 (USB disconnected) 19.5 mA
GSM DRX=5 (USB connected) 29.5 mA
WCDMA PF=64 (USB disconnected) 21.0 mA
WCDMA PF=64 (USB connected) 31.0 mA
LTE-FDD PF=64 (USB disconnected) 20.7 mA
GPRS data
transfer
(GNSS OFF)
LTE-FDD PF=64 (USB connected) 30.8 mA
LTE-TDD PF=64 (USB disconnected) 20.8 mA
LTE-TDD PF=64 (USB connected) 32.0 mA
EGSM900 4DL/1UL @33.23dBm 243.0 mA
EGSM900 3DL/2UL @31.96dBm 388.0 mA
EGSM900 2DL/3UL @29.73dBm 453.0 mA
EGSM900 1DL/4UL @28.5dBm 522 mA
DCS1800 4DL/1UL @30.49dBm 172.0 mA
DCS1800 3DL/2UL @29.24dBm 274.0 mA
DCS1800 2DL/3UL @27.15dBm 337.0 mA
DCS1800 1DL/4UL @25.88dBm 406.0 mA
EGSM900 4DL/1UL PCL=8 @26.60dBm 142.0 mA
EDGE data
EGSM900 3DL/2UL PCL=8 @25.43dBm 229.0 mA
transfer
(GNSS OFF)
EGSM900 2DL/3UL PCL=8 @23.4dBm 286.0 mA
EGSM900 1DL/4UL PCL=8 @22.36dBm 348.0 mA
EC25_Hardware_Design 94 / 112
EC25 Hardware Design
DCS1800 4DL/1UL PCL=2 @25.59dBm 136.0 mA
DCS1800 3DL/2UL PCL=2 @24.54dBm 225.0 mA
DCS1800 2DL/3UL PCL=2 @22.38dBm 300.0 mA
DCS1800 1DL/4UL PCL=2 @21.24dBm 379.0 mA
WCDMA B1 HSDPA @22.93dBm 504.0 mA
WCDMA data
transfer
(GNSS OFF)
LTE data
transfer
(GNSS OFF)
WCDMA B1 HSUPA @22.62dBm 512.0 mA
WCDMA B8 HSDPA @22.88dBm 562.0 mA
WCDMA B8 HSUPA @22.14dBm 535.0 mA
LTE-FDD B1 @23.6dBm 664.0 mA
LTE-FDD B3 @23.67dBm 728.0 mA
LTE-FDD B7 @23.83dBm 821.0 mA
LTE-FDD B8 @23.82dBm 695.0 mA
LTE-FDD B20 @23.88dBm 649.0 mA
LTE-FDD B28A @23.43dBm 689.0 mA
LTE-TDD B38 @22.82dBm 438.0 mA
LTE-TDD B40 @23.43dBm 355 mA
LTE-TDD B41 @23.46dBm 451.0 mA
GSM
voice call
WCDMA voice
call
EGSM900 PCL=5 @33.25dBm 258.0 mA
DCS1800 PCL=0 @30.23dBm 178.0 mA
WCDMA B1 @23.88dBm 548.0 mA
WCDMA B8 @23.8dBm 615.0 mA
Table 42: EC25-EC Current Consumption
Parameter Description Conditions Typ. Unit
I
VBAT
OFF state Power down 11 uA
EC25_Hardware_Design 95 / 112
EC25 Hardware Design
Sleep state
Idle state
AT+CFUN=0 (USB disconnected)
1.02 mA
GSM DRX=2 (USB disconnected) 2.01 mA
GSM DRX=9 (USB disconnected) 2.1 mA
WCDMA PF=64 (USB disconnected) 2.02 mA
WCDMA PF=128 (USB disconnected) 1.39 mA
LTE-FDD PF=64 (USB disconnected) 2.20 mA
LTE-FDD PF=128 (USB disconnected) 1.81 mA
GSM DRX=5 (USB disconnected) 18.7 mA
GSM DRX=5 (USB connected) 27.6 mA
WCDMA PF=64 (USB disconnected) 21.0 mA
WCDMA PF=64 (USB connected) 31.0 mA
GPRS data
transfer
(GNSS OFF)
LTE-FDD PF=64 (USB disconnected) 20.7 mA
LTE-FDD PF=64 (USB connected) 30.8 mA
EGSM900 4DL/1UL @33.23dBm 265.0 mA
EGSM900 3DL/2UL @31.96dBm 388.0 mA
EGSM900 2DL/3UL @29.73dBm 461.0 mA
EGSM900 1DL/4UL @28.5dBm 606 mA
DCS1800 4DL/1UL @30.49dBm 156.0 mA
DCS1800 3DL/2UL @29.24dBm 250.0 mA
DCS1800 2DL/3UL @27.15dBm 344.0 mA
DCS1800 1DL/4UL @25.88dBm 441.0 mA
EGSM900 4DL/1UL PCL=8 @26.60dBm 160.0 mA
EDGE data
EGSM900 3DL/2UL PCL=8 @25.43dBm 259.0 mA
transfer
(GNSS OFF)
EGSM900 2DL/3UL PCL=8 @23.4dBm 381.0 mA
EGSM900 1DL/4UL PCL=8 @22.36dBm 488.0 mA
EC25_Hardware_Design 96 / 112
EC25 Hardware Design
DCS1800 4DL/1UL PCL=2 @25.59dBm 132.0 mA
DCS1800 3DL/2UL PCL=2 @24.54dBm 205.0 mA
DCS1800 2DL/3UL PCL=2 @22.38dBm 300.0 mA
DCS1800 1DL/4UL PCL=2 @21.24dBm 359.0 mA
WCDMA B1 HSDPA @22.43dBm 504.0 mA
WCDMA data
transfer
(GNSS OFF)
LTE data
transfer
(GNSS OFF)
GSM voice call
WCDMA B1 HSUPA @21.92dBm 497.0 mA
WCDMA B8 HSDPA @22.88dBm 562.0 mA
WCDMA B8 HSUPA @22.14dBm 535.0 mA
LTE-FDD B1 @23.6dBm 659.0 mA
LTE-FDD B3 @23.67dBm 693.0 mA
LTE-FDD B7 @23.83dBm 821.0 mA
LTE-FDD B8 @23.82dBm 695.0 mA
LTE-FDD B20 @23.88dBm 690.0 mA
LTE-FDD B28A @23.43dBm 689.0 mA
EGSM900 PCL=5 @33.25dBm 258.0 mA
DCS1800 PCL=0 @30.23dBm 188.0 mA
WCDMA voice
call
WCDMA B1 @23.88dBm 548.0 mA
WCDMA B8 @23.8dBm 615.0 mA
Table 43: EC25-EUX Current Consumption
Parameter Description Conditions Typ. Unit
OFF state Power down 11 uA
0.96 mA
I
VBAT
Sleep state
AT+CFUN=0 (USB disconnected)
GSM DRX=2 (USB disconnected) 2.14 mA
GSM DRX=9 (USB disconnected) 1.49 mA
EC25_Hardware_Design 97 / 112
EC25 Hardware Design
WCDMA PF=64 (USB disconnected) 1.99 mA
WCDMA PF=128 (USB disconnected) 1.39 mA
LTE-FDD PF=64 (USB disconnected) 2.48 mA
LTE-FDD PF=128 (USB disconnected) 1.81 mA
LTE-TDD PF=64 (USB disconnected) 2.79 mA
LTE-TDD PF=128 (USB disconnected) 2.00 mA
GSM DRX=5 (USB disconnected) 19.5 mA
GSM DRX=5 (USB connected) 29.5 mA
WCDMA PF=64 (USB disconnected) 21.0 mA
Idle state
GPRS data
transfer
(GNSS OFF)
WCDMA PF=64 (USB connected) 31.0 mA
LTE-FDD PF=64 (USB disconnected) 20.7 mA
LTE-FDD PF=64 (USB connected) 30.8 mA
LTE-TDD PF=64 (USB disconnected) 20.8 mA
LTE-TDD PF=64 (USB connected) 32.0 mA
EGSM900 4DL/1UL @33.23dBm 265.0 mA
EGSM900 3DL/2UL @31.96dBm 388.0 mA
EGSM900 2DL/3UL @29.73dBm 461.0 mA
EGSM900 1DL/4UL @28.5dBm 593 mA
DCS1800 4DL/1UL @30.49dBm 156.0 mA
DCS1800 3DL/2UL @29.24dBm 245.0 mA
DCS1800 2DL/3UL @27.15dBm 337.0 mA
DCS1800 1DL/4UL @25.88dBm 427.0 mA
EGSM900 4DL/1UL PCL=8 @26.60dBm 170.0 mA
EDGE data
transfer
EGSM900 3DL/2UL PCL=8 @25.43dBm 205.0 mA
(GNSS OFF)
EGSM900 2DL/3UL PCL=8 @23.4dBm 280.0 mA
EC25_Hardware_Design 98 / 112
EC25 Hardware Design
EGSM900 1DL/4UL PCL=8 @22.36dBm 348.0 mA
DCS1800 4DL/1UL PCL=2 @25.59dBm 136.0 mA
DCS1800 3DL/2UL PCL=2 @24.54dBm 225.0 mA
DCS1800 2DL/3UL PCL=2 @22.38dBm 300.0 mA
DCS1800 1DL/4UL PCL=2 @21.24dBm 379.0 mA
WCDMA B1 HSDPA @22.93dBm 504.0 mA
WCDMA data
transfer
(GNSS OFF)
LTE data
transfer
(GNSS OFF)
WCDMA B1 HSUPA @22.62dBm 512.0 mA
WCDMA B8 HSDPA @22.88dBm 562.0 mA
WCDMA B8 HSUPA @22.14dBm 535.0 mA
LTE-FDD B1 @23.6dBm 664.0 mA
LTE-FDD B3 @23.67dBm 693.0 mA
LTE-FDD B7 @23.83dBm 800.0 mA
LTE-FDD B8 @23.82dBm 695.0 mA
LTE-FDD B20 @23.88dBm 690.0 mA
LTE-FDD B28A @23.43dBm 669.0 mA
LTE-TDD B38 @22.82dBm 438.0 mA
LTE-TDD B40 @23.43dBm 355 mA
LTE-TDD B41 @23.46dBm 451.0 mA
GSM
voice call
WCDMA voice
call
EGSM900 PCL=5 @33.25dBm 258.0 mA
DCS1800 PCL=0 @30.23dBm 178.0 mA
WCDMA B1 @23.88dBm 533.0 mA
WCDMA B8 @23.8dBm 506.0 mA
EC25_Hardware_Design 99 / 112
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