EC20 Hardware Design
LTE Module Series
Rev. EC20_Hardware_Design
Date: 2015-10-23
www.quectel.com
LTE Module
EC20 Hardware Design
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assistance, please contact our company headquarters:
Quectel Wireless Solutions Co., Ltd.
Office 501, Building 13, No.99, Tianzhou Road, Shanghai, China, 200233
Tel: +86 21 5108 6236
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OR DESIGN.
Copyright © Quectel Wireless Solutions Co., Ltd. 2015. All rights reserved.
EC20_Hardware_Design Confidential / Released 1 / 83
LTE Module
Revision
Date
Author
Description
1.0
2015-02-13
Mountain ZHOU/
Mike ZHANG
Initial
1.1
2015-08-14
Mountain ZHOU
1. Added UART interface pins
2. Added FOTA upgrade mode
3. Updated module dimension information
4. Updated functional diagram
5. Updated power supply reference circuit
6. Updated description of UART interface
7. Updated current consumption
8. Updated GNSS sensitivity
1.2
2015-10-23
Mountain ZHOU
1. Updated internet protocol
2. Updated UART interface feature
3. Updated functional diagram
4. Updated turning on timing
5. Updated GNSS performance
6. Released USIM_PRESENCE function
EC20 Hardware Design
About the Document
History
EC20_Hardware_Design Confidential / Released 2 / 83
LTE Module
EC20 Hardware Design
Contents
About the Document ................................................................................................................................... 2
Contents ....................................................................................................................................................... 3
Table Index ................................................................................................................................................... 5
Figure Index ................................................................................................................................................. 6
1 Introduction .......................................................................................................................................... 7
1.1. Safety Information...................................................................................................................... 8
2 Product Concept .................................................................................................................................. 9
2.1. General Description ................................................................................................................... 9
2.2. Directives and Standards ......................................................................................................... 10
2.2.1. FCC Statement ............................................................................................................... 10
2.2.2. FCC Radiation Exposure Statement .............................................................................. 10
2.3. Key Features ........................................................................................................................... 11
2.4. Functional Diagram ................................................................................................................. 13
2.5. Evaluation Board ..................................................................................................................... 14
3 Application Interface ......................................................................................................................... 15
3.1. General Description ................................................................................................................. 15
3.2. Pin Assignment ........................................................................................................................ 16
3.3. Pin Description ......................................................................................................................... 17
3.4. Operating Modes ..................................................................................................................... 22
3.5. Power Saving ........................................................................................................................... 23
3.5.1. Sleep Mode .................................................................................................................... 23
3.5.1.1. UART Application ................................................................................................. 23
3.5.1.2. USB Application with USB Remote Wakeup Function ........................................ 24
3.5.1.3. USB Application with USB Suspend/Resume and RI Function .......................... 25
3.5.1.4. USB Application without USB Suspend Function ................................................ 25
3.5.2. Airplane Mode ................................................................................................................ 26
3.6. Power Supply ........................................................................................................................... 27
3.6.1. Power Supply Pins ......................................................................................................... 27
3.6.2. Decrease Voltage Drop .................................................................................................. 27
3.6.3. Reference Design for Power Supply .............................................................................. 28
3.6.4. Monitor the Power Supply .............................................................................................. 29
3.7. Turn on and off Scenarios ....................................................................................................... 29
3.7.1. Turn on Module Using the PWRKEY ............................................................................. 29
3.7.2. Turn off Module .............................................................................................................. 31
3.7.2.1. Turn off Module Using the PWRKEY Pin ............................................................. 31
3.7.2.2. Turn off Module Using AT Command ................................................................... 32
3.8. Reset the Module..................................................................................................................... 32
3.9. USIM Card Interface ................................................................................................................ 34
3.10. USB Interface .......................................................................................................................... 36
3.11. UART Interface ........................................................................................................................ 37
3.12. PCM and I2C Interface ............................................................................................................ 40
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EC20 Hardware Design
3.13. ADC Function .......................................................................................................................... 42
3.14. Network Status Indication ........................................................................................................ 43
3.15. Operating Status Indication ..................................................................................................... 44
3.16. Behavior of the RI .................................................................................................................... 45
4 GNSS Receiver ................................................................................................................................... 46
4.1. General Description ................................................................................................................. 46
4.2. GNSS Performance ................................................................................................................. 47
4.3. Layout Guideline ...................................................................................................................... 48
5 Antenna Interface ............................................................................................................................... 49
5.1. Main/Rx-diversity Antenna Interface ........................................................................................ 49
5.1.1. Pin Definition .................................................................................................................. 49
5.1.2. Operating Frequency ..................................................................................................... 49
5.1.3. Reference Design .......................................................................................................... 50
5.2. GNSS Antenna Interface ......................................................................................................... 50
5.3. Antenna Installation ................................................................................................................. 51
5.3.1. Antenna Requirement .................................................................................................... 51
5.3.2. Install the Antenna with RF Connector .......................................................................... 52
6 Electrical, Reliability and Radio Characteristics ............................................................................ 55
6.1. Absolute Maximum Ratings ..................................................................................................... 55
6.2. Power Supply Ratings ............................................................................................................. 56
6.3. Operating Temperature ............................................................................................................ 56
6.4. Current Consumption .............................................................................................................. 57
6.5. RF Output Power ..................................................................................................................... 58
6.6. RF Receiving Sensitivity .......................................................................................................... 58
6.7. Electrostatic Discharge ............................................................................................................ 59
7 Mechanical Dimensions .................................................................................................................... 60
7.1. Mechanical Dimensions of the Module.................................................................................... 60
7.2. Footprint of Recommendation ................................................................................................. 62
7.3. Top View of the Module ........................................................................................................... 65
7.4. Bottom View of the Module ...................................................................................................... 65
8 Storage and Manufacturing .............................................................................................................. 66
8.1. Storage..................................................................................................................................... 66
8.2. Manufacturing and Welding ..................................................................................................... 66
8.3. Packaging ................................................................................................................................ 68
9 Appendix A Reference ....................................................................................................................... 69
10 Appendix B GPRS Coding Scheme ................................................................................................. 73
11 Appendix C GPRS Multi-slot Class .................................................................................................. 74
12 Appendix D EDGE Modulation and Coding Scheme ..................................................................... 75
EC20_Hardware_Design Confidential / Released 4 / 83
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EC20 Hardware Design
Table Index
TABLE 1: EC20 FREQUENCY BANDS .............................................................................................................. 9
TABLE 2: EC20 KEY FEATURES ...................................................................................................................... 11
TABLE 3: IO PARAMETERS DEFINITION ........................................................................................................ 17
TABLE 4: PIN DESCRIPTION ........................................................................................................................... 17
TABLE 5: OVERVIEW OF OPERATING MODES ............................................................................................. 22
TABLE 6: VBAT AND GND PINS ....................................................................................................................... 27
TABLE 7: PWRKEY PIN DESCRIPTION .......................................................................................................... 29
TABLE 8: RESET_N PIN DESCRIPTION ......................................................................................................... 32
TABLE 9: PIN DEFINITION OF THE USIM INTERFACE ................................................................................. 34
TABLE 10: USB PIN DESCRIPTION ................................................................................................................ 36
TABLE 11: PIN DEFINITION OF THE UART INTERFACE ............................................................................... 37
TABLE 12: PIN DEFINITION OF THE DEBUG UART INTERFACE ................................................................. 38
TABLE 13: LOGIC LEVELS OF DIGITAL I/O .................................................................................................... 38
TABLE 14: PIN DEFINITION OF PCM AND I2C INTERFACE .......................................................................... 41
TABLE 15: PIN DEFINITION OF THE ADC ...................................................................................................... 42
TABLE 16: CHARACTERISTIC OF THE ADC .................................................................................................. 43
TABLE 17: PIN DEFINITION OF NETWORK INDICATOR ............................................................................... 43
TABLE 18: WORKING STATE OF THE NETWORK INDICATOR..................................................................... 43
TABLE 19: PIN DEFINITION OF STATUS ........................................................................................................ 44
TABLE 20: BEHAVIOR OF THE RI ................................................................................................................... 45
TABLE 21: GNSS PERFORMANCE ................................................................................................................. 47
TABLE 22: PIN DEFINITION OF THE RF ANTENNA ....................................................................................... 49
TABLE 23: THE MODULE OPERATING FREQUENCIES ................................................................................ 49
TABLE 24: PIN DEFINITION OF GNSS ANTENNA .......................................................................................... 50
TABLE 25: GNSS FREQUENCY ....................................................................................................................... 51
TABLE 26: ANTENNA REQUIREMENTS .......................................................................................................... 51
TABLE 27: ABSOLUTE MAXIMUM RATINGS .................................................................................................. 55
TABLE 28: THE MODULE POWER SUPPLY RATINGS .................................................................................. 56
TABLE 29: OPERATING TEMPERATURE ........................................................................................................ 56
TABLE 30: EC20 CURRENT CONSUMPTION ................................................................................................. 57
TABLE 34: CONDUCTED RF OUTPUT POWER ................................................................... 错误!未定义书签。
TABLE 35: EC20 CONDUCTED RF RECEIVING SENSITIVITY ...................................................................... 59
TABLE 39: ELECTROSTATICS DISCHARGE CHARACTERISTICS ............................................................... 59
TABLE 40: RELATED DOCUMENTS ................................................................................................................ 69
TABLE 41: TERMS AND ABBREVIATIONS ...................................................................................................... 69
TABLE 42: DESCRIPTION OF DIFFERENT CODING SCHEMES .................................................................. 73
TABLE 43: GPRS MULTI-SLOT CLASSES ...................................................................................................... 74
TABLE 44: EDGE MODULATION AND CODING SCHEME ............................................................................. 75
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LTE Module
EC20 Hardware Design
Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 14
FIGURE 2: PIN ASSIGNMENT (TOP VIEW)..................................................................................................... 16
FIGURE 3: UART SLEEP APPLICATION ......................................................................................................... 23
FIGURE 4: SLEEP APPLICATION WITH USB REMOTE WAKEUP ................................................................ 24
FIGURE 5: SLEEP APPLICATION WITH RI ..................................................................................................... 25
FIGURE 6: SLEEP APPLICATION WITHOUT SUSPEND FUNCTION ............................................................ 26
FIGURE 7: POWER SUPPLY LIMITS DURING TRANSMIT BURST ............................................................... 28
FIGURE 8: STAR STRUCTURE OF THE POWER SUPPLY............................................................................ 28
FIGURE 9: REFERENCE CIRCUIT OF POWER SUPPLY .............................................................................. 29
FIGURE 10: TURN ON THE MODULE USING DRIVING CIRCUIT ................................................................. 30
FIGURE 11: TURN ON THE MODULE USING KEYSTROKE .......................................................................... 30
FIGURE 12: TIMING OF TURNING ON MODULE ........................................................................................... 31
FIGURE 13: TIMING OF TURNING OFF MODULE ......................................................................................... 32
FIGURE 14: REFERENCE CIRCUIT OF RESET_N BY USING DRIVING CIRCUIT ...................................... 33
FIGURE 15: REFERENCE CIRCUIT OF RESET_N BY USING BUTTON ...................................................... 33
FIGURE 16: TIMING OF RESETTING MODULE ............................................................................................. 33
FIGURE 17: REFERENCE CIRCUIT OF 8-PIN USIM CONNECTOR .............................................................. 34
FIGURE 18: REFERENCE CIRCUIT OF 6-PIN USIM CONNECTOR .............................................................. 35
FIGURE 19: TEST POINTS FOR FIRMWARE UPGRADE .............................................................................. 36
FIGURE 20: REFERENCE CIRCUIT WITH TRANSLATOR CHIP ................................................................... 39
FIGURE 21: REFERENCE CIRCUIT WITH TRANSISTOR CIRCUIT .............................................................. 39
FIGURE 22: PRIMARY MODE TIMING ............................................................................................................ 40
FIGURE 23: AUXILIARY MODE TIMING .......................................................................................................... 41
FIGURE 24: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC .................................... 42
FIGURE 25: REFERENCE CIRCUIT OF THE NETWORK INDICATOR .......................................................... 44
FIGURE 26: REFERENCE CIRCUIT OF THE STATUS ................................................................................... 44
FIGURE 27: REFERENCE CIRCUIT OF ANTENNA INTERFACE ................................................................... 50
FIGURE 28: REFERENCE CIRCUIT OF GNSS ANTENNA ............................................................................. 51
FIGURE 29: DIMENSIONS OF THE UF.L-R-SMT CONNECTOR (UNIT: MM) ................................................ 53
FIGURE 30: MECHANICALS OF UF.L-LP CONNECTORS ............................................................................. 53
FIGURE 31: SPACE FACTOR OF MATED CONNECTOR (UNIT: MM) ........................................................... 54
FIGURE 32: MODULE TOP AND SIDE DIMENSIONS ..................................................................................... 60
FIGURE 33: MODULE BOTTOM DIMENSIONS (BOTTOM VIEW) ................................................................. 61
FIGURE 34: BOTTOM PADS DIMENSIONS (BOTTOM VIEW) ....................................................................... 61
FIGURE 35: RECOMMENDED FOOTPRINT (TOP VIEW) .............................................................................. 62
FIGURE 36: RECOMMENDED STENCIL ......................................................................................................... 63
FIGURE 37: RECOMMENDED FOOTPRINT WITH PINS 117~140 ................................................................ 64
FIGURE 38: TOP VIEW OF THE MODULE ...................................................................................................... 65
FIGURE 39: BOTTOM VIEW OF THE MODULE .............................................................................................. 65
FIGURE 40: LIQUIDS TEMPERATURE ............................................................................................................ 67
FIGURE 41: CARRIER TAPE ............................................................................................................................ 68
EC20_Hardware_Design Confidential / Released 6 / 83
LTE Module
EC20 Hardware Design
1 Introduction
This document defines the EC20 module and describes its air interface and hardware interface which are
connected with your application.
This document can help you quickly understand module interface specifications, electrical, mechanical
details and related product information of EC20 module. Associated with application notes and user guide,
you can use EC20 module to design and set up mobile applications easily.
EC20_Hardware_Design Confidential / Released 7 / 83
LTE Module
Full attention must be given to driving at all times in order to reduce the risk of an
accident. Using a mobile while driving (even with a handsfree kit) cause distraction
and can lead to an accident. You must comply with laws and regulations restricting
the use of wireless devices while driving.
Switch off the cellular terminal or mobile before boarding an aircraft. Make sure it
switched off. The operation of wireless appliances in an aircraft is forbidden to
prevent interference with communication systems. Consult the airline staff about
the use of wireless devices on boarding the aircraft, if your device offers a Airplane
Mode which must be enabled prior to boarding an aircraft.
Switch off your wireless device when in hospitals or clinics or other health care
facilities. These requests are desinged to prevent possible interference with
sentitive medical equipment.
Cellular terminals or mobiles operate over radio frequency signal and cellular
network and cannot be guaranteed to connect in all conditions, for example no
mobile fee or an invalid SIM card. While you are in this condition and need
emergent help, please remember using emergency call. In order to make or
receive call, the cellular terminal or mobile must be switched on and in a service
area with adequate cellular signal strength.
Your cellular terminal or mobile contains a transmitter and receiver. When it is ON ,
it receives and transmits radio frequency energy. RF interference can occur if it is
used close to TV set, radio, computer or other electric equipment.
In locations with potencially explosive atmospheres, obey all posted signs to turn
off wireless devices such as your phone or other cellular terminals. Areas with
potencially exposive atmospheres including fuelling areas, below decks on boats,
fuel or chemical transfer or storage facilities, areas where the air contains
chemicals or particles such as grain, dust or metal powders.
EC20 Hardware Design
1.1. Safety Information
The following safety precautions must be observed during all phases of the operation, such as usage,
service or repair of any cellular terminal or mobile incorporating EC20 module. Manufacturers of the cellular
terminal should send the following safety information to users and operating personnel and to incorporate
these guidelines into all manuals supplied with the product. If not so, Quectel does not take on any liability
for customer failure to comply with these precautions.
EC20_Hardware_Design Confidential / Released 8 / 83
LTE Module
1.
1)
GPS and GLONASS function is optional.
EC20
FDD-LTE
(with Rx-diversity)
B2/B4/B5/B12/B17
TDD-LTE
(with Rx-diversity)
Not supported
WCDMA
(with Rx-diversity)
B2/B4/B5
TD-SCDMA
(with Rx-diversity)
Not supported
CDMA
(with Rx-diversity)
Not supported
GSM
850/1900
GNSS
GPS+GLONASS
NOTES
EC20 Hardware Design
2 Product Concept
2.1. General Description
EC20 is a series of LTE-FDD/WCDMA/GSM wireless communication module with receive diversity, which
provides data connectivity on FDD-LTE, DC-HSPA+, HSPA+, HSDPA, HSUPA, WCDMA, EDGE and
GPRS networks. It can also provide GPS/GLONASS1) and voice functionality for your specific application.
Table 1: EC20 Frequency Bands
With a tiny profile of 32.0mm × 29.0mm × 2.4mm, EC20 can meet almost all requirements for M2M
application such as automotive, metering, tracking system, security solutions, routers, wireless POS,
mobile computing devices, PDA phone and tablet PC, etc..
EC20 is an SMD type module, which can be embedded in application through its 140-pin pads including
EC20_Hardware_Design Confidential / Released 9 / 83
LTE Module
Part
Number
Frequency Range (MHz)
Peak Gain
(XZ-V)
Average
Gain(XZ-V)
VS
WR
Impedanc
e
GSM850:824～894MHz
3R007
PCS1900: 1850～1990MHz
UMTS B2: 1850～1990MHz
UMTS B4: 1710～2155MHz
UMTS B5: 824～894MHz
1 dBi typ.
1 dBi typ.
2 max
50Ω
FDD B2: 1850～1990MHz
FDD B4: 1710～2155MHz
FDD B5: 824～894MHz
FDD B12: 699～746MHz
FDD B17: 704～746MHz
EC20 Hardware Design
76 LCC signal pads and 64 other pads.
2.2. Directives and Standards
The EC20 module is designed to comply with the FCC statements. FCC ID: XMR201603EC20
The Host system using EC20 should have label “contains modular’s FCC ID: XMR201603EC20”.
2.2.1. FCC Statement
Changes or modifications not expressly approved by the party responsible for compliance could void the
user’s authority to operate the equipment.
2.2.2. FCC Radiation Exposure Statement
This equipment complies with FCC radiation exposure limits set forth for an uncontrolled environment.
This equipment should be installed and operated with minimum distance 20cm between the radiator and
your body as well as kept minimum 20cm from radio antenna depending on the Mobile status of this
module usage. This module should NOT be installed and operating simultaneously with other radio. The
manual of the host system, which uses EC20, must include RF exposure warning statement to advice
user should keep minimum 20cm from the radio antenna of EC20 module depending on the Mobile status.
Note: If a portable device (such as PDA) uses EC20 module, the device needs to do permissive change
and SAR testing.
The following list indicates the performance of antenna gain in certificate testing.
EC20_Hardware_Design Confidential / Released 10 / 83
LTE Module
Feature
Details
Power Supply
Supply voltage: 3.3V~4.3V Typical supply voltage: 3.8V
Transmitting Power
Class 4 (33dBm±2dB) for GSM850
Class E2 (27dBm±3dB) for GSM850 8-PSK
Class E2 (26dBm±3dB) for PCS1900 8-PSK
Class 3 (24dBm+1/-3dB) for WCDMA bands
Class 3 (23dBm±2dB) for LTE FDD bands
LTE Features
Support 3GPP R9 CAT3 FDD
Support 1.4 to 20MHz RF bandwidth
Support 2 × 2 MIMO in DL direction
FDD: Max 100Mbps (DL), 50Mbps (UL)
WCDMA Features
Support 3GPP R8 DC-HSPA+
Support 16-QAM, 64-QAM and QPSK modulation
3GPP R6 HSUPA: Max 5.76Mbps (UL)
3GPP R8 DC-HSPA+: Max 42Mbps (DL)
GSM Features
R99: CSD: 9.6kbps, 14.4kbps
GPRS:
Support GPRS multi-slot class 12 (12 by default)
Coding scheme: CS-1, CS-2, CS-3 and CS-4
Maximum of four Rx time slots per frame
EDGE:
Support EDGE multi-slot class 12 (12 by default)
Support GMSK and 8-PSK for different MCS (Modulation and Coding
scheme)
Downlink coding schemes: CS 1-4 and MCS 1-9
Uplink coding schemes: CS 1-4 and MCS 1-9
Internet Protocol Features
Support TCP/UDP/PPP/FTP/HTTP/SMTP/MMS/NTP/PING/QMI protocols
Support the protocols PAP (Password Authentication Protocol) and CHAP
(Challenge Handshake Authentication Protocol) usually used for PPP
connections
SMS
Text and PDU mode
Point to point MO and MT
SMS cell broadcast
SMS storage: ME by default
EC20 Hardware Design
2.3. Key Features
The following table describes the detailed features of EC20 module.
Table 2: EC20 Key Features
EC20_Hardware_Design Confidential / Released 11 / 83
LTE Module
USIM Interface
Support USIM/SIM card: 1.8V, 3.0V
Audio Features 1)
Support one digital audio interface: PCM interface
GSM: HR/FR/EFR/AMR/AMR-WB
WCDMA: AMR/AMR-WB
LTE: AMR/AMR-WB
Support echo cancellation and noise suppression
PCM Interface 1)
Used for audio function with external codec
Support 8-bit A-law 2), μ-law 2) and 16-bit linear data formats
Support long frame sync and short frame sync
Support master and slave mode, but must be the master in long frame sync
USB Interface
Compliant with USB 2.0 specification (slave only), the data transfer rate
can reach up to 480Mbps
Used for AT command communication, data transmission, GNSS NMEA
output, software debug and firmware upgrade
USB Driver: Windows XP, Windows Vista, Windows 7, Windows 8/8.1,
Window CE 5.0/6.0/7.0, Linux 2.6 or later, Android 2.3/4.0/4.2/4.4/5.0
UART Interface
Main UART:
Used for AT command and data transmission
Baud rate reach up to 921600bps, 115200bps by default
Support RTS and CTS hardware flow control
Support multiplexing function
Debug UART:
Used for Linux console, log and GNSS NMEA output
115200bps baud rate
Rx-diversity
Support LTE/WCDMA/TD-SCDMA/CDMA Rx-diversity
GNSS Features
gpsOne Gen8A of Qualcomm (GPS and GLONASS)
Protocol: NMEA 0183
AT Commands
Compliant with 3GPP TS 27.007, 27.005 and Quectel enhanced AT
commands
Network Indication
Two pins including NET_MODE and NET_STATUS to indicate network
connectivity status
Antenna Interface
Including main antenna (ANT_MAIN), Rx-diversity antenna (ANT_DIV) and
GNSS antenna (ANT_GNSS)
Physical Characteristics
Size: 32.0±0.15 × 29.0±0.15 × 2.4±0.2mm
Weight: approx. 4.9g
Temperature Range
Normal operation: -35°C ~ +75°C
Restricted operation: -40°C ~ -35°C and +75°C ~ +85°C 3)
Storage temperature: -45°C ~ +90°C
Firmware Upgrade
USB interface and DFOTA
RoHS
All hardware components are fully compliant with EU RoHS directive
EC20 Hardware Design
EC20_Hardware_Design Confidential / Released 12 / 83
LTE Module
1.
1)
Audio (PCM) function is only supported on Telematics version.
2. 2) This function is under development.
3. 3) When the module works within this restricted temperature range, RF performance might degrade.
For example, the frequency error or the phase error would increase.
Baseband
PMIC
Transceiver
2G NAND
1G SDRAM
PA
Switch
LNA
Switch
ANT_MAIN ANT_DIVANT_GNSS
VBAT_BB
VBAT_RF
APT
PWRKEY
ADCs
VDD_EXT USB USIM PCM
UARTI2C
RESET_N
19.2M
XO
STATUS
GPIOs
SAW
SAW
Control
IQ Control
Duplex
SAW
Tx
PRx DRx
NOTES
EC20 Hardware Design
2.4. Functional Diagram
The following figure shows a block diagram of EC20 and illustrates the major functional parts.
Power management
Baseband
DDR+NAND flash
Radio frequency
Peripheral interface
EC20_Hardware_Design Confidential / Released 13 / 83
LTE Module
EC20 Hardware Design
Figure 1: Functional Diagram
2.5. Evaluation Board
In order to help you to develop applications with EC20, Quectel supplies an evaluation board (EVB), USB
data cable, earphone, antenna and other peripherals to control or test the module.
EC20_Hardware_Design Confidential / Released 14 / 83
LTE Module
EC20 Hardware Design
3 Application Interface
3.1. General Description
EC20 is equipped with a 76-pin 1.3mm pitch SMT pads plus 64-pin ground pads and reserved pads that
connect to cellular application platform. Sub-interfaces included in these pads are described in detail in
the following chapters:
Power supply
USIM interface
USB interface
UART interface
PCM interface
ADC interface
Status indication
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LTE Module
35
36
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
1
3
4
5
6
7
2
WAKEUP_IN
AP_READY
RESERVED
W_DISABLE#
NET_MODE
NET_STATUS
VDD_EXT
GND
GND
DBG_RXD
DBG_TXD
USIM_PRESENCE
USIM_VDD
USIM_DATA
USIM_CLK
USIM_RST
RESERVED
8
9
10
11
12
13
14
15
16
17
18
19
54
53
52
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
USIM_GND
GND
RESET_N
PWRKEY
GND
RESERVED
PCM_IN※PCM_OUT※PCM_SYNC※PCM_CLK
※
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
RESERVED
ANT_DIV
GND
GND
USB_VBUS
USB_DM
USB_DP
RXD
TXD
DTR
RTS
CTS
DCD
RI
STATUS
VBAT_BB
VBAT_BB
VBAT_RF
VBAT_RF
GND
RESERVED
GND
GND
ANT_MAIN
GND
ANT_GNSS
GND
ADC1
RESERVED
I2C_SDA
I2C_SCL
RESERVED
ADC0
GND
GND
GND
73
74
75
76
77
78
79
80
81
82
83
84
100
101
102
106
107
111
112
103
104
109
105
110
89
94
98
88
93
97
86
91
96
85
90
95
99
87
92
108
113
RESERVED
RESERVED
117
126
125
124
123
122
121
120
119
118
127
128
115
RESERVED
RESERVED
116
139
140
138
137
136
135
134
133
132
131
130
129
114
RESERVED
Power Pins
RESERVED
RESERVED
RESERVED
Signal Pins RESERVED PinsGND Pins
1. Keep all RESERVED pins and unused pins unconnected.
2. GND pads 85~112 should be connected to ground in the design, and RESERVED pads 73~84
should not be designed in schematic and PCB decal.
3. “※” means these interface functions are only supported on Telematics version.
NOTES
EC20 Hardware Design
3.2. Pin Assignment
The following figure shows the pin assignment of the EC20 module.
Figure 2: Pin Assignment (Top View)
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LTE Module
Type
Description
IO
Bidirectional input/output
DI
Digital input
DO
Digital output
PI
Power input
PO
Power output
AI
Analog input
AO
Analog output
OD
Open drain
Power Supply
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
VBAT_BB
59, 60
PI
Power supply for
module baseband
part.
Vmax=4.3V
Vmin=3.3V
Vnorm=3.8V
It must be able to
provide sufficient
current up to 0.8A.
VBAT_RF
57, 58
PI
Power supply for
module RF part.
Vmax=4.3V
Vmin=3.3V
Vnorm=3.8V
It must be able to
provide sufficient
current in a transmitting
burst which typically
rises to 1.8A.
VDD_EXT
7
PO
Provide 1.8V for
external circuit.
Vnorm=1.8V
IOmax=50mA
Power supply for
external GPIO’s pull up
circuits.
GND
8, 9, 19,
22, 36, 46,
48, 50~54,
Ground.
EC20 Hardware Design
3.3. Pin Description
The following tables show the EC20’s pin definition.
Table 3: IO Parameters Definition
Table 4: Pin Description
EC20_Hardware_Design Confidential / Released 17 / 83
LTE Module
56, 72,
85~112
Turn On/Off
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
PWRKEY
21
DI
Turn on/off the
module.
VIHmax=2.1V
VIHmin=1.3V
VILmax=0.5V
Pull-up to 1.8V
internally.
RESET_N
20
DI
Reset the module.
VIHmax=2.1V
VIHmin=1.3V
VILmax=0.5V
Pull-up to 1.8V
internally. Active low.
Status Indication
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
STATUS
61
OD
Indicate the module
operating status.
The drive current
should be less than
0.9mA.
Require external
pull-up. If unused,
keep it open.
NET_MODE
5
DO
Indicate the module
network registration
mode.
VOHmin=1.35V
VOLmax=0.45V
1.8V power domain.
If unused, keep it
open.
NET_
STATUS
6
DO
Indicate the module
network activity
status.
VOHmin=1.35V
VOLmax=0.45V
1.8V power domain.
If unused, keep it
open.
USB Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
USB_VBUS
71
PI
USB detection.
Vmax=5.25V
Vmin=3.0V
Vnorm=5.0V
USB_DP
69
IO
USB differential data
bus.
Compliant with USB
2.0 standard
specification.
Require differential
impedance of 90ohm.
USB_DM
70
IO
USB differential data
bus.
Compliant with USB
2.0 standard
specification.
Require differential
impedance of 90ohm.
USIM Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
USIM_GND
10
Specified ground for
USIM card.
USIM_VDD
14
PO
Power supply for
For 1.8V USIM:
Either 1.8V or 3V is
EC20 Hardware Design
EC20_Hardware_Design Confidential / Released 18 / 83
LTE Module
USIM card.
Vmax=1.9V
Vmin=1.7V
For 3.0V USIM:
Vmax=3.05V
Vmin=2.7V
IOmax=50mA
supported by the
module automatically.
USIM_DATA
15
IO
Data signal of USIM
card.
For 1.8V USIM:
VILmax=0.6V
VIHmin=1.2V
VOLmax=0.45V
VOHmin=1.35V
For 3.0V USIM:
VILmax=1.0V
VIHmin=1.95V
VOLmax=0.45V
VOHmin=2.55V
USIM_CLK
16
DO
Clock signal of USIM
card.
For 1.8V USIM:
VOLmax=0.45V
VOHmin=1.35V
For 3.0V USIM:
VOLmax=0.45V
VOHmin=2.55V
USIM_RST
17
DO
Reset signal of
USIM card.
For 1.8V USIM:
VOLmax=0.45V
VOHmin=1.35V
For 3.0V USIM:
VOLmax=0.45V
VOHmin=2.55V
USIM_PRE
SENCE
13
DI
USIM card insertion
detection.
VILmin=-0.3V
VILmax=0.6V
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
If unused, keep it
open.
UART Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
RI
62
DO
Ring indicator
VOLmax=0.45V
VOHmin=1.35V
1.8V power domain.
If unused, keep it
open.
EC20 Hardware Design
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LTE Module
DCD
63
DO
Data carrier
detection.
VOLmax=0.45V
VOHmin=1.35V
1.8V power domain.
If unused, keep it
open.
CTS
64
DO
Clear to send.
VOLmax=0.45V
VOHmin=1.35V
1.8V power domain.
If unused, keep it
open.
RTS
65
DI
Request to send.
VILmin=-0.3V
VILmax=0.6V
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
If unused, keep it
open.
DTR
66
DI
Data terminal ready,
sleep mode control.
VILmin=-0.3V
VILmax=0.6V
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
Pull-up by default.
Low level wakes up
the module.
If unused, keep it
open.
TXD
67
DO
Transmit data.
VOLmax=0.45V
VOHmin=1.35V
1.8V power domain.
If unused, keep it
open.
RXD
68
DI
Receive data.
VILmin=-0.3V
VILmax=0.6V
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
If unused, keep it
open.
Debug UART Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
DBG_TXD
12
DO
Transmit data.
VOLmax=0.45V
VOHmin=1.35V
1.8V power domain.
If unused, keep it
open.
DBG_RXD
11
DI
Receive data.
VILmin=-0.3V
VILmax=0.6V
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
If unused, keep it
open.
ADC Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
ADC0
45
AI
General purpose
analog to digital
converter.
Voltage range:
0.3V to VBAT_BB
If unused, keep it
open.
ADC1
44
AI
General purpose
analog to digital
converter.
Voltage range:
0.3V to VBAT_BB
If unused, keep it
open.
EC20 Hardware Design
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LTE Module
PCM Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
PCM_IN
24
DI
PCM data input.
VILmin=-0.3V
VILmax=0.6V
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
If unused, keep it
open.
PCM_OUT
25
DO
PCM data output.
VOLmax=0.45V
VOHmin=1.35V
1.8V power domain.
If unused, keep it
open.
PCM_SYNC
26
IO
PCM data frame
sync signal.
VOLmax=0.45V
VOHmin=1.35V
VILmin=-0.3V
VILmax=0.6V
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
In master mode, it is
an output signal. In
slave mode, it is an
input signal.
If unused, keep it
open.
PCM_CLK
27
IO
PCM clock.
VOLmax=0.45V
VOHmin=1.35V
VILmin=-0.3V
VILmax=0.6V
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
In master mode, it’s
an output signal. In
slave mode, it is an
input signal.
If unused, keep it
open.
I2C Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
I2C_SCL
41
OD
I2C serial clock.
External pull-up
resistor is required.
1.8V only. If unused,
keep it open.
I2C_SDA
42
OD
I2C serial data.
External pull-up
resistor is required.
1.8V only. If unused,
keep it open.
RF Interface
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
ANT_DIV
35
AI
Diversity antenna.
50ohm impedance.
If unused, keep it
open.
ANT_MAIN
49
IO
Main antenna.
50ohm impedance.
ANT_GNSS
47
AI
GNSS antenna.
50ohm impedance.
If unused, keep it
open.
EC20 Hardware Design
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LTE Module
GPIO Pins
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
WAKEUP_IN
1
DI
Sleep mode control.
VILmin=-0.3V
VILmax=0.6V
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
Pull-up by default.
Low level wakes up
the module. If
unused, keep it open.
W_DISABLE#
4
DI
Airplane mode
control.
VILmin=-0.3V
VILmax=0.6V
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
Pull-up by default.
In low voltage level,
module can enter into
airplane mode. If
unused, keep it open.
AP_READY
2
DI
Application
processor sleep
state detection.
VILmin=-0.3V
VILmax=0.6V
VIHmin=1.2V
VIHmax=2.0V
1.8V power domain.
If unused, keep it
open.
RESERVED Pins
Pin Name
Pin No.
I/O
Description
DC Characteristics
Comment
RESERVED
3, 18, 23,
28~34,
37~40, 43,
55, 73~84,
113~140
Reserved.
Keep these pins
unconnected.
Mode
Details
Normal
Operation
Idle
Software is active. The module has registered to the network, and the
module is ready to send and receive data.
Talk/Data
Network connection is ongoing. In this mode, the power consumption is
decided by network setting and data transfer rate.
Minimum
AT+CFUN command can set the module entering into a minimum functionality mode
EC20 Hardware Design
3.4. Operating Modes
The table below briefly summarizes the various operating modes referred in the following chapters.
Table 5: Overview of Operating Modes
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LTE Module
Functionality
Mode
without removing the power supply. In this case, both RF function and USIM card will be
invalid.
Airplane
Mode
AT+CFUN command and W_DISABLE# pin can set the module entering into airplane
mode. In this case, RF function will be invalid.
Sleep Mode
In this mode, the current consumption of the module will be reduced to the minimal level.
During this mode, the module can still receive paging message, SMS, voice call and
TCP/UDP data from the network normally.
Power Down
Mode
In this mode, the power management unit shuts down the power supply. Software is not
active. The serial interface is not accessible. Operating voltage (connected to VBAT_RF
and VBAT_BB) remains applied.
RXD
TXD
RI
DTR
AP_READY
TXD
RXD
EINT
GPIO
GPIO
Module
Host
GND
GND
EC20 Hardware Design
3.5. Power Saving
3.5.1. Sleep Mode
EC20 is able to reduce its current consumption to a minimum value during the sleep mode. The following
section describes EC20’s power saving procedure.
3.5.1.1. UART Application
If host communicates with module via UART interface, the following preconditions can let the module
enter into the sleep mode.
Execute AT command AT+QSCLK=1 to enable the sleep mode.
Drive DTR to high level.
The following figure shows the connection between the module and host.
EC20_Hardware_Design Confidential / Released 23 / 83
Figure 3: UART Sleep Application
LTE Module
USB_VBUS
USB_DP
USB_DM
AP_READY
VDD
USB_DP
USB_DM
GPIO
Module
Host
GND
GND
EC20 Hardware Design
Driving host DTR to low level will wake up the module.
When EC20 has URC to report, RI signal will wake up the host. Refer to Chapter 3.16 for details
about RI behavior.
AP_READY will detect the sleep state of host (can be configured to high level or low level detection).
Refer to AT command AT+QCFG=“apready” for details.
3.5.1.2. USB Application with USB Remote Wakeup Function
If host supports USB suspend/resume and remote wakeup function, the following part will show the sleep
application.
There are three preconditions to let the module enter into the sleep mode.
Execute AT command AT+QSCLK=1 to enable the sleep mode.
Ensure the DTR is held in high level or keep it open.
The host’s USB bus which is connected with the module USB interface enters into suspended state.
The following figure shows the connection between the module and host.
Figure 4: Sleep Application with USB Remote Wakeup
Sending data to EC20 through USB will wake up the module.
When EC20 has URC to report, module will send remote wake-up signals on USB BUS to wake up
the host.
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LTE Module
USB_VBUS
USB_DP
USB_DM
AP_READY
VDD
USB_DP
USB_DM
GPIO
Module Host
GND
GND
RI
EINT
EC20 Hardware Design
3.5.1.3. USB Application with USB Suspend/Resume and RI Function
If host supports USB suspend/resume, but does not support remote wake-up function, the RI signal is
needed to wake up the host. The following part will show the sleep application.
There are three preconditions to let the module enter into the sleep mode.
Execute AT command AT+QSCLK=1 to enable the sleep mode.
Ensure the DTR is held in high level or keep it open.
The host’s USB bus which is connected with the module USB interface enters into suspended state.
The following figure shows the connection between the module and host.
Figure 5: Sleep Application with RI
Sending data to EC20 through USB will wake up the module.
When EC20 has URC to report, RI signal will wake up the host.
3.5.1.4. USB Application without USB Suspend Function
If host does not support USB suspend function, you should disconnect USB_VBUS with additional control
circuit to let the module enter into sleep mode.
Execute AT command AT+QSCLK=1 to enable the sleep mode.
Ensure the DTR is held in high level or keep it open.
Disconnect USB_VBUS.
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LTE Module
USB_VBUS
USB_DP
USB_DM
AP_READY
VDD
USB_DP
USB_DM
GPIO
Module Host
RI
EINT
Power
Switch
GPIO
GND
GND
You should pay attention to the level match shown in dotted line between module and host. Refer to
document [1] for more details about EC20 power management application.
NOTE
EC20 Hardware Design
The following figure shows the connection between the module and host.
Figure 6: Sleep Application without Suspend Function
Opening power switch to supply power to USB_VBUS will wake up the module.
3.5.2. Airplane Mode
When module enters into the airplane mode, the RF function does not work, and all AT commands
correlative with RF function will not be accessible. This mode can be set with the following ways.
Hardware:
The W_DISABLE# pin is pulled up by default, driving it to low level will let the module enter into airplane
mode.
Software:
Command AT+CFUN provides the choice of the functionality level <fun>=0, 1, 4.
AT+CFUN=0: Minimum functionality mode, both USIM and RF function are disabled.
AT+CFUN=1: Full functionality mode (by default).
AT+CFUN=4: Airplane mode. RF function is disabled.
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LTE Module
1. The W_DISABLE# control function is disabled in firmware by default. It can be enabled by AT
command AT+QCFG=“airplanecontrol”. Refer to document [2].
2. The execution of AT+CFUN command will not affect GNSS function.
Pin Name
Pin No.
Description
Min.
Typ.
Max.
Unit
VBAT_RF
57, 58
Power supply for module RF
part.
3.3
3.8
4.3 V VBAT_BB
59, 60
Power supply for module
baseband part.
3.3
3.8
4.3
V
GND
8, 9, 19, 22, 36,
46, 48, 50~54,
56, 72, 85~112
Ground.
- 0 -
V
NOTES
EC20 Hardware Design
3.6. Power Supply
3.6.1. Power Supply Pins
EC20 provides four VBAT pins dedicated to connect with the external power supply. There are two
separate voltage domains for VBAT.
VBAT_RF with two pins for module RF part.
VBAT_BB with two pins for module baseband part.
The following table shows the VBAT pins and ground pins.
Table 6: VBAT and GND Pins
3.6.2. Decrease Voltage Drop
The power supply range of the module is 3.3V ~ 4.3V. Make sure the input voltage will never drop below
3.3V. The following figure shows the voltage drop during transmitting burst in 2G network, the voltage
drop will be less in 3G and 4G network.
EC20_Hardware_Design Confidential / Released 27 / 83
LTE Module
VBAT
Transmit
burst
Transmit
burst
Min.3.3V
Ripple
Drop
Module
VBAT_RF
VBAT_BB
VBAT
C1
100uF
C6
100nFC733pFC810pF
+
+
C2
100nF
C5
100uF
C3
33pF
C4
10pF
D1
5.1V
EC20 Hardware Design
Figure 7: Power Supply Limits during Transmit Burst
To decrease voltage drop, a bypass capacitor of about 100µF with low ESR should be used. Multi-layer
ceramic chip (MLCC) capacitor can provide the best combination of low ESR. The main power supply
from an external application has to be a single voltage source and expanded to two sub paths with star
structure. The width of VBAT_BB trace should be no less than 1mm, and the width of VBAT_RF trace
should be no less than 2mm, and the principle of the VBAT trace is the longer, the wider.
Three ceramic capacitors (100nF, 33pF, 10pF) are recommended to be applied to the VBAT pins. The
capacitors should be placed close to the VBAT pins. In addition, in order to get a stable power source, it is
suggested that you should use a zener diode of which reverse zener voltage is 5.1V and dissipation
power is more than 0.5W. The following figure shows star structure of the power supply.
Figure 8: Star Structure of the Power Supply
3.6.3. Reference Design for Power Supply
The power design for the module is very important, since the performance of power supply for the module
largely depends on the power source. The power supply is capable of providing the sufficient current up to
2A at least. If the voltage drop between the input and output is not too high, it is suggested that you should
EC20_Hardware_Design Confidential / Released 28 / 83
LTE Module
DC_IN
MIC29302WU
IN OUT
EN
GND
ADJ
2 4
1
3
5
VBAT
100nF
470uF
100nF
100K
47K
470uF
470R
51K
1%
1%
4.7K
47K
VBAT_EN
Pin Name
Pin No.
Description
DC Characteristics
Comment
PWRKEY
21
Turn on/off the module.
VIHmax=2.1V
VIHmin=1.3V
VILmax=0.5V
Pull-up to 1.8V internally.
EC20 Hardware Design
use a LDO to supply power for module. If there is a big voltage difference between the input source and
the desired output (VBAT), a buck converter is preferred to be used as a power supply.
The following figure shows a reference design for +5V input power source. The designed output for the
power supply is about 3.8V and the maximum load current is 3A.
Figure 9: Reference Circuit of Power Supply
3.6.4. Monitor the Power Supply
You can use the AT+CBC command to monitor the VBAT_BB voltage value. For more details, please
refer to document [2].
3.7. Turn on and off Scenarios
3.7.1. Turn on Module Using the PWRKEY
The following table shows the pin definition of PWRKEY.
Table 7: PWRKEY Pin Description
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LTE Module
Turn on pulse
PWRKEY
4.7K
47K
≥ 100ms
PWRKEY
S1
Close to S1
TVS
EC20 Hardware Design
When EC20 is in power down mode, it can be turned on to normal mode by driving the PWRKEY pin to a
low level for at least 100ms. It is recommended to use an open drain/collector driver to control the
PWRKEY. After STATUS pin (require external pull-up) outputting a low level, PWRKEY pin can be
released. A simple reference circuit is illustrated in the following figure.
Figure 10: Turn on the Module Using Driving Circuit
The other way to control the PWRKEY is using a button directly. A TVS component is indispensable to be
placed nearby the button for ESD protection. When pressing the key, electrostatic strike may generate
from finger. A reference circuit is shown in the following figure.
Figure 11: Turn on the Module Using Keystroke
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LTE Module
V
IL
≤ 0.5V
V
IH
≥ 1.3V
VBAT
PWRKEY
≥ 100ms
RESET_N
STATUS
(OD)
≤ 0.5s
≥ 7.5s
Inactive
Active
UART
NOTE
Inactive
Active
USB
≥ 9s
Make sure that VBAT is stable before pulling down PWRKEY pin. The time between them is no less than
30ms.
NOTE
EC20 Hardware Design
The turn on scenarios is illustrated as the following figure.
Figure 12: Timing of Turning on Module
3.7.2. Turn off Module
The following procedures can be used to turn off the module:
Normal power down procedure: Turn off the module using the PWRKEY pin.
Normal power down procedure: Turn off the module using command AT+QPOWD.
3.7.2.1. Turn off Module Using the PWRKEY Pin
Driving the PWRKEY to a low level voltage for at least 0.6s, the module will execute power-down
procedure after PWRKEY is released. The power-down scenario is illustrated as the following figure.
EC20_Hardware_Design Confidential / Released 31 / 83
LTE Module
VBAT
PWRKEY
Log off network about 1s to 60s
≥ 0.6s
RUNNING
Power-down procedure
OFF
Module
Status
STATUS
(OD)
Pin Name
Pin No.
Description
DC Characteristics
Comment
RESET_N
20
Reset the module.
VIHmax=2.1V
VIHmin=1.3V
VILmax=0.5V
Pull-up to 1.8V internally.
Active low.
EC20 Hardware Design
Figure 13: Timing of Turning off Module
3.7.2.2. Turn off Module Using AT Command
It is also a safe way to use AT command AT+QPOWD to turn off the module, which is similar to turning off
the module via PWRKEY Pin.
Please refer to document [2] for details about the AT command of AT+QPOWD.
3.8. Reset the Module
The RESET_N can be used to reset the module. You can reset the module by driving the RESET_N to a
low level voltage for more than 150ms and then releasing it.
Table 8: RESET_N Pin Description
The recommended circuit is similar to the PWRKEY control circuit. You can use open drain/collector
driver or button to control the RESET_N.
EC20_Hardware_Design Confidential / Released 32 / 83
LTE Module
Reset pulse
RESET_N
4.7K
47K
≥ 150ms
RESET_N
S2
Close to S2
TVS
VIL ≤ 0.5V
VIH ≥ 1.3V
VBAT
≥150ms
RESETTING
Module
Status
RUNNING
RESET_N
RUNNING
≥ 9s
1. Use the RESET_N only when turning off the module by the command AT+QPOWD and the
PWRKEY pin failed.
2. Ensure that there is no large capacitance on the PWRKEY and RESET_N pins.
NOTES
EC20 Hardware Design
Figure 14: Reference Circuit of RESET_N by Using Driving Circuit
Figure 15: Reference Circuit of RESET_N by Using Button
The reset scenario is illustrated as the following figure.
Figure 16: Timing of Resetting Module
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LTE Module
Pin Name
Pin No.
I/O
Description
Comment
USIM_VDD
14
PO
Power supply for USIM card.
Either 1.8V or 3.0V is supported
by the module automatically.
USIM_DATA
15
IO
Data signal of USIM card.
USIM_CLK
16
DO
Clock signal of USIM card.
USIM_RST
17
DO
Reset signal of USIM card.
USIM_PRE
SENCE
13
DI
USIM card insertion detection.
USIM_GND
10 Specified ground for USIM card.
Module
USIM_VDD
USIM_GND
USIM_RST
USIM_CLK
USIM_DATA
USIM_PRESENCE
22R
22R
22R
VDD_EXT
51K
100nF USIM Connector
GND
GND
33pF
33pF 33pF
VCC
RST
CLK
IO
VPP
GND
GND
USIM_VDD
15K
EC20 Hardware Design
3.9. USIM Card Interface
The USIM card interface circuitry meets ETSI and IMT-2000 SIM interface requirements. Both 1.8V and
3.0V USIM cards are supported.
Table 9: Pin Definition of the USIM Interface
EC20 supports USIM card hot-plug via the USIM_PRESENCE pin. It supports low level and high level
detection, which is disabled by default. For details, refer to document [2] about the command
AT+QSIMDET.
The following figure shows the reference design of the 8-pin USIM connector.
Figure 17: Reference Circuit of 8-Pin USIM Connector
EC20_Hardware_Design Confidential / Released 34 / 83
LTE Module
Module
USIM_VDD
USIM_GND
USIM_RST
USIM_CLK
USIM_DATA
22R
22R
22R
100nF
USIM Connector
GND
33pF 33pF 33pF
VCC
RST
CLK IO
VPP
GND
GND
15K
USIM_VDD
EC20 Hardware Design
If you do not need the USIM card detection function, keep USIM_PRESENCE unconnected. The
reference circuit for using a 6-pin USIM card connector is illustrated as the following figure.
Figure 18: Reference Circuit of 6-Pin USIM Connector
In order to enhance the reliability and availability of the USIM card in your application, please follow the
criteria below in the USIM circuit design:
Keep layout of USIM card as close as possible to the module. Assure the length of the trace is less
than 200mm.
Keep USIM card signal away from RF and VBAT alignment.
Assure the ground between module and USIM connector short and wide. Keep the width of ground
and USIM_VDD no less than 0.5mm to maintain the same electric potential.
To avoid cross-talk between USIM_DATA and USIM_CLK, keep them away with each other and
shield them with surrounded ground.
In order to offer good ESD protection, it is recommended to add TVS. The 22ohm resistors should be
added in series between the module and the USIM card so as to suppress the EMI spurious
transmission and enhance the ESD protection. The 33pF capacitors are used for filtering interference
of EGSM900. Please note that the USIM peripheral circuit should be close to the USIM connector.
The pull-up resistor on USIM_DATA line can improve anti-jamming capability when long layout trace
and sensitive occasion is applied, and should be placed close to the USIM connector.
EC20_Hardware_Design Confidential / Released 35 / 83
LTE Module
Pin Name
Pin No.
I/O
Description
Comment
USB_DP
69
IO
USB differential data bus (positive).
Require differential
impedance of 90Ω.
USB_DM
70
IO
USB differential data bus (minus).
Require differential
impedance of 90Ω.
USB_VBUS
71
PI
Used for detecting the USB
connection.
3.0~5.25V
Typical 5.0V
GND
72 Ground
Module
USB_DM
USB_DP
VBAT_BB
USB_VBUS
PWRKEY
GND
VBAT_RF
USB_DM
USB_DP
VBAT
USB_VBUS
PWRKEY
GND
Connector
ESD Array
GND
EC20 Hardware Design
3.10. USB Interface
EC20 contains one integrated Universal Serial Bus (USB) transceiver which complies with the USB 2.0
specification and supports high-speed (480Mbps) and full-speed (12Mbps) mode. The USB interface is
used for AT command, data transmission, GNSS NMEA sentences output, software debug and firmware
upgrade. The following table shows the pin definition of USB interface.
Table 10: USB Pin Description
More details about the USB 2.0 specifications, please visit http://www.usb.org/home.
The USB interface is recommended to be reserved for firmware upgrade in your design. The following
figure shows the recommended test points.
Figure 19: Test Points for Firmware Upgrade
EC20_Hardware_Design Confidential / Released 36 / 83
LTE Module
EC20 module can only be used as a slave device.
Pin Name
Pin No.
I/O
Description
Comment
RI
62
DO
Ring indicator
1.8V power domain
DCD
63
DO
Data carrier detection
1.8V power domain
CTS
64
DO
Clear to send
1.8V power domain
NOTE
EC20 Hardware Design
In order to ensure the USB interface design corresponding with the USB 2.0 specification, please comply
with the following principles.
It is important to route the USB signal traces as differential pairs with total grounding. The impedance
of USB differential trace is 90ohm.
Do not route signal traces under crystals, oscillators, magnetic devices and RF signal traces. It is
important to route the USB differential traces in inner-layer with ground shielding not only upper and
lower layer but also right and left side.
Pay attention to the influence of junction capacitance of ESD component on USB data lines. Typically,
the capacitance value should be less than 2pF.
Keep the ESD components as close as possible to the connector.
Keep USB data test points traces short to avoid noise coupled on USB data lines. If possible, reserve
0R resistor on these two lines.
3.11. UART Interface
The module provides two UART interfaces: main UART interface and debug UART interface. The
following shows the different features.
Main UART interface supports 9600, 19200, 38400, 57600, 115200, 230400, 460800, 921600bps
baud rate, the default is 115200bps. This interface can be used for data transmission and AT
communication.
Debug UART interface supports 115200bps. It can be used for Linux console, log and GNSS NMEA
output.
The following tables show the pin definition.
Table 11: Pin Definition of the UART Interface
EC20_Hardware_Design Confidential / Released 37 / 83
LTE Module
RTS
65
DI
Request to send
1.8V power domain
DTR
66
DI
Sleep mode control
1.8V power domain
TXD
67
DO
Transmit data
1.8V power domain
RXD
68
DI
Receive data
1.8V power domain
Pin Name
Pin No.
I/O
Description
Comment
DBG_TXD
12
DO
Transmit data
1.8V power domain
DBG_RXD
11
DI
Receive data
1.8V power domain
Parameter
Min.
Max.
Unit
VIL
-0.3
0.6
V
VIH
1.2
2.0
V
VOL 0 0.45
V
VOH
1.35
1.8
V
EC20 Hardware Design
Table 12: Pin Definition of the Debug UART Interface
The logic levels are described in the following table.
Table 13: Logic Levels of Digital I/O
Module provides 1.8V UART interface. A level translator should be used if your application is equipped
with a 3.3V UART interface. A level translator TXS0108EPWR provided by Texas Instrument is
recommended. The following figure shows the reference design.
EC20_Hardware_Design Confidential / Released 38 / 83
LTE Module
VCCA VCCB
OE
A1
A2
A3
A4
A5
A6
A7
A8
GND
B1
B2
B3
B4
B5
B6
B7
B8
VDD_EXT
RI
DCD
RTS
RXD
DTR
CTS
TXD
51K
51K
0.1uF
0.1uF
RI_MCU
DCD_MCU
RTS_MCU
RXD_MCU
DTR_MCU
CTS_MCU
TXD_MCU
VDD_MCU
Translator
MCU/ARM
/TXD
/RXD
VDD_EXT
10K
VCC_MCU
4.7K
10K
VDD_EXT
TXD
RXD
RTS
CTS
DTR
RI
/RTS
/CTS
GND
GPIO DCD
Module
GPIO
EINT
VDD_EXT
4.7K
GND
1nF
1nF
Transistor circuit solution is not suitable for high baud rate which is more than 460Kbps.
NOTE
EC20 Hardware Design
Figure 20: Reference Circuit with Translator Chip
Please visit http://www.ti.com for more information.
Another example with transistor translation circuit is shown as below. The circuit of dotted line can refer to
the circuit of solid line. Please pay attention to direction of connection. Input dotted line of module should
refer to input solid line of the module. Output dotted line of module should refer to output solid line of the
module.
EC20_Hardware_Design Confidential / Released 39 / 83
Figure 21: Reference Circuit with Transistor Circuit
LTE Module
PCM_CLK
PCM_SYNC
PCM_OUT
MSB
LSB
MSB
MSB
LSB
MSB
PCM_IN
125us
1 2 256255
EC20 Hardware Design
3.12. PCM and I2C Interface
EC20 provides one Pulse Code Modulation (PCM) digital interface for audio design, which supports the
following modes:
Primary mode (short sync, works as both master and slave)
Auxiliary mode (long sync, works as master only)
In primary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge; the PCM_SYNC falling edge represents the MSB. In this mode, PCM_CLK supports 128, 256, 512,
1024, 2048 and 4096kHz for different speech codec.
In auxiliary mode, the data is sampled on the falling edge of the PCM_CLK and transmitted on the rising
edge; while the PCM_SYNC rising edge represents the MSB. In this mode, PCM interface operates with a
128kHz PCM_CLK and an 8kHz, 50% duty cycle PCM_SYNC only.
EC20 supports 8-bit A-law and μ-law, and also 16-bit linear data formats. The following figures show the
primary mode’s timing relationship with 8kHz PCM_SYNC and 2048kHz PCM_CLK and auxiliary mode’s
timing relationship with 8kHz PCM_SYNC and 128kHz PCM_CLK.
EC20_Hardware_Design Confidential / Released 40 / 83
Figure 22: Primary Mode Timing
LTE Module
PCM_CLK
PCM_SYNC
PCM_OUT
MSB
LSB
PCM_IN
125us
MSB
1 2 1615
LSB
Pin Name
Pin No.
I/O
Description
Comment
PCM_IN
24
DI
PCM data input
1.8V power domain
PCM_OUT
25
DO
PCM data output
1.8V power domain
PCM_SYNC
26
IO
PCM data frame sync signal
1.8V power domain
PCM_CLK
27
IO
PCM data bit clock
1.8V power domain
I2C_SCL
41
OD
I2C serial clock
Require external pull-up to 1.8V
I2C_SDA
42
OD
I2C serial data
Require external pull-up to 1.8V
EC20 Hardware Design
Figure 23: Auxiliary Mode Timing
The following table shows the pin definition of PCM and I2C interface which can be applied on audio
codec design.
Table 14: Pin Definition of PCM and I2C Interface
Clock and mode can be configured by AT command, and the default configuration is master mode using
short sync data format with 2048kHz PCM_CLK and 8kHz PCM_SYNC. In addition, EC20’s firmware has
integrated the configuration on ALC5616 application with I2C interface. Refer to document [2] about the
command AT+QDAI for details.
EC20_Hardware_Design Confidential / Released 41 / 83
LTE Module
PCM_IN
PCM_OUT
PCM_SYNC
PCM_CLK
I2C_SCL
I2C_SDA
Module
1.8V
4.7K
4.7K
BCLK
LRCK
DAC
ADC
SCL
SDA
BIAS
MICBIAS
INP
INN
LOUTP
LOUTN
ALC5616
1. It is recommended to reserved RC (R=22ohm, C=22pF) circuit on the PCM lines, especially for
PCM_CLK.
2. EC20 works as a master device pertaining to I2C interface.
Pin Name
Pin No.
Description
ADC0
45
General purpose analog to digital converter
ADC1
44
General purpose analog to digital converter
NOTES
EC20 Hardware Design
The following figure shows the reference design of PCM interface with external codec IC.
Figure 24: Reference Circuit of PCM Application with Audio Codec
3.13. ADC Function
The module provides two analog-to-digital converters (ADC) to digitize the analog signal to 15-bit digital
data such as battery voltage, temperature and so on. Using AT command AT+QADC=0 can read the
voltage value on ADC0 pin. Using AT command AT+QADC=1 can read the voltage value on ADC1 pin.
For more details of these AT commands, please refer to document [2].
In order to improve the accuracy of ADC, the trace of ADC should be surrounded by ground.
Table 15: Pin Definition of the ADC
EC20_Hardware_Design Confidential / Released 42 / 83
LTE Module
Parameter
Min.
Typ.
Max.
Unit
ADC0 Voltage Range
0.3 VBAT_BB
V
ADC1 Voltage Range
0.3 VBAT_BB
V
ADC Resolution
15 bits
Pin Name
Pin No.
I/O
Description
Comment
NET_MODE
5
DO
Indicate the module network registration
mode.
1.8V power domain
NET_STATUS
6
DO
Indicate the module network activity
status.
1.8V power domain
Pin Name
Status
Description
NET_MODE
Always High
Registered in LTE network
Always Low
Others
NET_STATUS
Flicker slowly (200ms High/1800ms Low)
Network searching
Flicker slowly (1800ms High/200ms Low)
Idle
Flicker quickly (125ms High/125ms Low)
Data transfer is ongoing
Always High
Voice calling
EC20 Hardware Design
The following table describes the characteristic of the ADC function.
Table 16: Characteristic of the ADC
3.14. Network Status Indication
The network indication pins can be used to drive a network status indicator LED. The module provides
two pins which are NET_MODE and NET_STATUS. The following tables describe pin definition and logic
level changes in different network status.
Table 17: Pin Definition of Network Indicator
Table 18: Working State of the Network Indicator
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LTE Module
4.7K
47K
VBAT
2.2K
Module
Network
Indicator
Pin Name
Pin No.
I/O
Description
Comment
STATUS
61
OD
Indicate the module operation status
Require external pull-up
VDD_MCU
10K
Module
STATUS MCU_GPIO
Module
STATUS
VBAT
2.2K
EC20 Hardware Design
A reference circuit is shown in the following figure.
Figure 25: Reference Circuit of the Network Indicator
3.15. Operating Status Indication
The STATUS pin is an open drain output for indicating the module operation status. You can connect it to
a GPIO of DTE with pulled up, or as LED indication circuit as below. When the module is turned on
normally, the STATUS will present the low state. Otherwise, the STATUS will present high-impedance
state.
Table 19: Pin Definition of STATUS
The following figure shows different design circuit of STATUS, you can choose either one according to
your application demands.
EC20_Hardware_Design Confidential / Released 44 / 83
Figure 26: Reference Circuit of the STATUS
LTE Module
URC can be output from UART port, USB AT port and USB modem port by command AT+QURCCFG.
The default port is USB AT port.
State
Response
Idle
RI keeps high level
URC
RI outputs 120ms low pulse when new URC returns
NOTE
EC20 Hardware Design
3.16. Behavior of the RI
You can use command AT+QCFG=“risignaltype”,“physical” to configure RI behavior:
No matter which port URC is presented on, URC will trigger the behavior on RI pin.
In addition, RI behavior can be configured flexible. The default behavior of the RI is shown as below.
Table 20: Behavior of the RI
The RI behavior can be changed by command AT+QCFG=“urc/ri/ring”, refer to document [2] for
details.
EC20_Hardware_Design Confidential / Released 45 / 83
LTE Module
EC20 Hardware Design
4 GNSS Receiver
4.1. General Description
EC20 includes a fully integrated global navigation satellite system solution that supports gpsOne Gen8A
of Qualcomm (GPS and GLONASS). Compared with GPS only, dual systems increase usable
constellation, reduce coverage gaps and TTFF, and increase positioning accuracy, especially in rough
urban environments.
EC20 works in standalone mode, allows device to demodulate GNSS assistance data, calculate position
without any assistance from the network, and suitable for various application needing lowest-cost,
accurate position determination. EC20 supports Qualcomm gpsOneXTRA technology (one kind of
A-GNSS), which can download XTRA file from the internet server to enhance the TTFF. XTRA file
contains predicted GPS and GLONASS satellites coordinates and clock biases valid for up to 7days. It is
the best if XTRA file is downloaded every 1-2 days. And EC20 also supports SBAS (including WAAS,
EGNOS and MSAS), which will improve fix accuracy.
EC20 provides power-saving solution named DPO (Dynamic Power Optimization), which attempts to turn
off GNSS RF parts, reduces current consumption by 50% at most without impact on TTFF, thus extends
battery life, and maximizes talk and standby time as well.
EC20 supports standard NMEA-0183 protocol, and outputs NMEA sentences with 1Hz via USB interface
by default.
By default, EC20 GNSS engine is switched off, it has to be switched on with AT command. For more
details about GNSS engine technology and configurations, please refer to document [3].
EC20_Hardware_Design Confidential / Released 46 / 83
LTE Module
Parameter
Description
Conditions
Typ.
Unit
Sensitivity
(GNSS)
Cold start
Autonomous
-146
dBm
Reacquisition
Autonomous
-156
dBm
Tracking
Autonomous
-157
dBm
TTFF
(GNSS)
Cold start
@open sky
Autonomous
35 s XTRA enabled
22
s
Warm start
@open sky
Autonomous
30
s
XTRA enabled
3.5
s
Hot start
@open sky
Autonomous
2
s
XTRA enabled
1.5
s
Accuracy
(GNSS)
CEP-50
Autonomous
@open sky
<1.5
m
1. Tracking sensitivity: the lowest GPS signal value at the antenna port for which the module can keep
on positioning for 3 minutes.
2. Reacquisition sensitivity: the lowest GPS signal value at the antenna port for which the module can
fix position again within 3 minutes after loss of lock.
3. Cold start sensitivity: the lowest GPS signal value at the antenna port for which the module fixes
position within 3 minutes after executing cold start command.
NOTES
EC20 Hardware Design
4.2. GNSS Performance
The following table shows EC20 GNSS performance.
Table 21: GNSS Performance
EC20_Hardware_Design Confidential / Released 47 / 83
LTE Module
EC20 Hardware Design
4.3. Layout Guideline
The following layout guideline should be taken into account in your design.
Maximize the distance between the GNSS antenna, the main antenna and Rx-diversity antenna.
Noisy digital circuits such as the USIM card, USB interface, Camera module, Display connector and
SD card should be away from the antenna.
Use ground vias around the GNSS trace and sensitive analog signal traces to provide coplanar
isolation and protection.
Keep 50ohm characteristic impedance of the ANT_GNSS trace.
Refer to Chapter 5 for GNSS reference design and antenna consideration.
EC20_Hardware_Design Confidential / Released 48 / 83
LTE Module
Pin Name
Pin No.
I/O
Description
Comment
ANT_MAIN
49
IO
Main antenna
50ohm impedance
ANT_DIV
35
AI
Receive diversity antenna
50ohm impedance
3GPP Band
Transmit
Receive
Unit
B2 (1900)
1850 ~ 1910
1930 ~ 1990
MHz
B4
1710 ~ 1755
2110 ~ 2155
MHz
B5 (850/BC0)
824 ~ 849
869 ~ 894
MHz
B12
699 ~ 716
728 ~ 746
MHz
B17
704 ~ 716
734 ~ 746
MHz
EC20 Hardware Design
5 Antenna Interface
EC20 antenna interface includes a main antenna, an Rx-diversity antenna, which is used to resist the fall
of signals caused by high speed movement and multipath effect, and a GNSS antenna. The antenna
interface has an impedance of 50ohm.
5.1. Main/Rx-diversity Antenna Interface
5.1.1. Pin Definition
The main antenna and Rx-diversity antenna pins definition are shown below.
Table 22: Pin Definition of the RF Antenna
5.1.2. Operating Frequency
Table 23: The Module Operating Frequencies
EC20_Hardware_Design Confidential / Released 49 / 83
LTE Module
ANT_MAIN
R1 0R
C1
Module
Main
antenna
NM
C2
NM
R2 0R
C3
Diversity
antenna
NM
C4
NM
ANT_DIV
Keep a proper distance between main antenna and Rx-diversity antenna to improve the receiving
sensitivity.
Pin Name
Pin No.
I/O
Description
Comment
ANT_GNSS
47
AI
GNSS antenna
50ohm impedance
NOTE
EC20 Hardware Design
5.1.3. Reference Design
The reference design of ANT_MAIN and ANT_DIV antenna is shown as below. It should reserve a π-type
matching circuit for better RF performance. The capacitors are not mounted by default.
Figure 27: Reference Circuit of Antenna Interface
5.2. GNSS Antenna Interface
The following tables show the GNSS antenna pin definition and frequency specification.
Table 24: Pin Definition of GNSS Antenna
EC20_Hardware_Design Confidential / Released 50 / 83
LTE Module
Type
Frequency
Unit
GPS
1575.42 ± 1.023
MHz
GLONASS
1597.5 ~ 1605.8
MHz
GNSS
Antenna
VDD
Module
ANT_GNSS
47nH
10R
0.1uF
100pF
NMNM
1. You can choose an external LDO to supply power according to the active antenna.
2. If you design it with passive antenna, the VDD circuit is not needed.
Type
Requirements
NOTES
EC20 Hardware Design
Table 25: GNSS Frequency
The reference design of GNSS antenna is shown as below.
Figure 28: Reference Circuit of GNSS Antenna
5.3. Antenna Installation
5.3.1. Antenna Requirement
The following table shows the requirement on main antenna, Rx-diversity antenna and GNSS antenna.
Table 26: Antenna Requirements
EC20_Hardware_Design Confidential / Released 51 / 83
LTE Module
GNSS
Frequency range: 1565 - 1607MHz
Polarization: RHCP or linear
VSWR: < 2 (Typ.)
Passive antenna gain: > 0dBi
Active antenna noise figure: < 1.5dB
Active antenna gain: > -2dBi
Active antenna embedded LNA gain: 20dB (Typ.)
Active antenna total gain: > 18dBi (Typ.)
GSM/WCDMA/ LTE
VSWR: ≤ 2
Gain (dBi): 1
Max Input Power (W): 50
Input Impedance (ohm): 50
Polarization Type: Vertical
Cable Insertion Loss: < 1dB
(GSM850/900, WCDMA B5, LTE B5/B12/B17)
Cable Insertion Loss: < 1.5dB
(GSM1900, WCDMA B2/B4, LTE B2/B4)
EC20 Hardware Design
5.3.2. Install the Antenna with RF Connector
The following figure is the antenna installation with RF connector provided by HIROSE. The
recommended RF connector is UF.L-R-SMT.
EC20_Hardware_Design Confidential / Released 52 / 83
LTE Module
EC20 Hardware Design
Figure 29: Dimensions of the UF.L-R-SMT Connector (Unit: mm)
You can use U.FL-LP serial connector listed in the following figure to match the UF.L-R-SMT.
Figure 30: Mechanicals of UF.L-LP Connectors
The following figure describes the space factor of mated connector.
EC20_Hardware_Design Confidential / Released 53 / 83
LTE Module
EC20 Hardware Design
Figure 31: Space Factor of Mated Connector (Unit: mm)
For more details, please visit http://www.hirose.com.
EC20_Hardware_Design Confidential / Released 54 / 83
LTE Module
Parameter
Min.
Max.
Unit
VBAT_RF/VBAT_BB
-0.3
4.7 V USB_VBUS
-0.3
5.5 V Peak Current of VBAT_BB
0
0.8 A Peak Current of VBAT_RF
0
1.8 A Voltage at Digital Pins
-0.3
2.3
V
Voltage at ADC0
0
VBAT_BB
V
Voltage at ADC1
0
VBAT_BB
V
EC20 Hardware Design
6 Electrical, Reliability and Radio
Characteristics
6.1. Absolute Maximum Ratings
Absolute maximum ratings for power supply and voltage on digital and analog pins of module are listed in
the following table.
Table 27: Absolute Maximum Ratings
EC20_Hardware_Design Confidential / Released 55 / 83
LTE Module
Parameter
Description
Conditions
Min.
Typ.
Max.
Unit
VBAT
VBAT_BB and
VBAT_RF
Voltage must stay within the
min/max values, including
voltage drop, ripple and
spikes.
3.3
3.8
4.3
V
Voltage drop during
transmitting burst
Maximum power control
level on GSM850 and
EGSM900.
400
mV
I
VBAT
Peak supply current
(during transmission
slot)
Maximum power control
level on GSM850 and
EGSM900.
1.8
2.0
A
USB_VBUS
USB detection
3.0
5.0
5.25
V
Parameter
Min.
Typ.
Max.
Unit
Normal Temperature
-35
25
75
ºC
Restricted Operation
-40 ~ -35
75 ~ 85
ºC
Storage Temperature
-45 90
ºC
The maximum surface temperature may be up to 100ºC when module works at 85ºC ambient
temperature.
NOTE
EC20 Hardware Design
6.2. Power Supply Ratings
Table 28: The Module Power Supply Ratings
6.3. Operating Temperature
The operating temperature is listed in the following table.
Table 29: Operating Temperature
EC20_Hardware_Design Confidential / Released 56 / 83
LTE Module
Parameter
Description
Conditions
Typ.
Unit
I
VBAT
OFF state
Power down
20
uA
Sleep state
AT+CFUN=0 (USB disconnected)
1.05
mA
GSM DRX=2 (USB disconnected)
3.7
mA
GSM DRX=9 (USB disconnected)
1.8
mA
WCDMA DRX=6 (USB disconnected)
2.8
mA
WCDMA DRX=9 (USB disconnected)
1.5
mA
GPRS data transfer
(GNSS off)
GSM850 4DL/1UL PCL=5
233
mA
GSM850 3DL/2UL PCL=5
382
mA
GSM850 2DL/3UL PCL=5
426
mA
GSM850 1DL/4UL PCL=5
510
mA
PCS1900 4DL/1UL PCL=0
198
mA
PCS1900 3DL/2UL PCL=0
333
mA
PCS1900 2DL/3UL PCL=0
385
mA
PCS1900 1DL/4UL PCL=0
443
mA
EDGE data transfer
(GNSS off)
GSM850 4DL/1UL PCL=8
160
mA
GSM850 3DL/2UL PCL=8
261
mA
GSM850 2DL/3UL PCL=8
351
mA
GSM850 1DL/4UL PCL=8
442
mA
PCS1900 4DL/1UL PCL=2
154
mA
PCS1900 3DL/2UL PCL=2
249
mA
PCS1900 2DL/3UL PCL=2
333
mA
EC20 Hardware Design
6.4. Current Consumption
The values of current consumption are shown below.
Table 30: EC20 Current Consumption
EC20_Hardware_Design Confidential / Released 57 / 83
LTE Module
PCS1900 1DL/4UL PCL=2
413
mA
WCDMA data transfer
(GNSS off)
WCDMA B2 HSDPA @max power
496
mA
WCDMA B2 HSUPA @max power
498
mA
WCDMA B4 HSDPA @max power
442
mA
WCDMA B4 HSUPA @max power
465
mA
WCDMA B5 HSDPA @max power
464
mA
WCDMA B5 HSUPA @max power
445
mA
LTE data transfer
(GNSS off)
LTE-FDD B2 @max power
584
mA
LTE-FDD B4 @max power
564
mA
LTE-TDD B5 @max power
521
mA
LTE-TDD B12 @max power
432
mA
LTE-TDD B17 @max power
431
mA
GSM voice call
GSM850 @PCL=5
247
mA
PCS1900 @PCL=0
207
mA
WCDMA voice call
WCDMA B2 @max power
470
mA
WCDMA B4 @max power
429
mA
WCDMA B5 @max power
450
mA
EC20 Hardware Design
6.5. RF Output Power
Please refer to TUNE UP document.
6.6. RF Receiving Sensitivity
The following table shows the conducted RF receiving sensitivity of EC20 module.
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LTE Module
Frequency
Receive Sensitivity (Typ.)
GSM850
-111dBm
PCS1900
-109dBm
WCDMA B2
-111dBm
WCDMA B4
-111dBm
WCDMA B5
-112dBm
LTE FDD B2 (20M)
-96dBm
LTE FDD B4 (20M)
-96dBm
LTE FDD B5 (10M)
-98dBm
LTE FDD B12 (10M)
-99dBm
LTE FDD B17 (10M)
-99dBm
Tested Points
Contact Discharge
Air Discharge
Unit
VBAT, GND
±5
±10
kV
All Antenna Interfaces
±4
±8
kV
Other Interfaces
±0.5
±1
kV
EC20 Hardware Design
Table 31: EC20 Conducted RF Receiving Sensitivity
6.7. Electrostatic Discharge
The module is not protected against electrostatics discharge (ESD) in general. Consequently, it is subject
to ESD handling precautions that typically apply to ESD sensitive components. Proper ESD handling and
packaging procedures must be applied throughout the processing, handling and operation of any
application that incorporates the module.
The following table shows the module electrostatics discharge characteristics.
Table 32: Electrostatics Discharge Characteristics
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LTE Module
(32+/-0.15)
(29+/-0.15)
0.8
2.4+/-0.2
EC20 Hardware Design
7 Mechanical Dimensions
This chapter describes the mechanical dimensions of the module. All dimensions are measured in mm.
7.1. Mechanical Dimensions of the Module
Figure 32: Module Top and Side Dimensions
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LTE Module
29.0
32.0
EC20 Hardware Design
Figure 33: Module Bottom Dimensions (Bottom View)
Figure 34: Bottom Pads Dimensions (Bottom View)
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LTE Module
29
32
Keepout area
Keepout area
In order to maintain the module, keep about 3mm between the module and other components in the host
PCB.
NOTE
EC20 Hardware Design
7.2. Footprint of Recommendation
Figure 35: Recommended Footprint (Top View)
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LTE Module
1. The thickness of stencil for the pads at the bottom of module is recommended as 0.18mm, and the
thickness of LCC pins is recommended as 0.2mm.
2. For better SMT solder, the GND pad at the bottom of the module is divided into four small pads.
3. The red areas are recommended footprint shown in Figure 35.
NOTES
EC20 Hardware Design
Figure 36: Recommended Stencil
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LTE Module
29.0
32.0
Keepout area
EC20 Hardware Design
If you design with pins 117~140, the following footprint is recommended.
Figure 37: Recommended Footprint with Pins 117~140
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LTE Module
EC20 Hardware Design
7.3. Top View of the Module
Figure 38: Top View of the Module
7.4. Bottom View of the Module
Figure 39: Bottom View of the Module
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LTE Module
As plastic container cannot be subjected to high temperature, module needs to be taken out from
container to high temperature (125ºC) bake. If shorter bake times are desired, please refer to
IPC/JEDECJ-STD-033 for bake procedure.
NOTE
EC20 Hardware Design
8 Storage and Manufacturing
8.1. Storage
EC20 is stored in the vacuum-sealed bag. The restriction of storage condition is shown as below.
Shelf life in sealed bag is 12 months at < 40ºC/90%RH.
After this bag is opened, devices that will be subjected to reflow solder or other high temperature process
must be:
Mounted within 72 hours at factory conditions of ≤ 30ºC/60%RH.
Stored at <10% RH.
Devices require bake before mounting, if:
Humidity indicator card is >10% when read 23ºC±5ºC.
Mounted for more than 72 hours at factory conditions of ≤ 30ºC/60% RH.
If baking is required, devices may be baked for 48 hours at 125ºC±5ºC.
8.2. Manufacturing and Welding
The squeegee should push the paste on the surface of the stencil that makes the paste fill the stencil
openings and penetrate to the PCB. The force on the squeegee should be adjusted so as to produce a
clean stencil surface on a single pass. To ensure the module soldering quality, the thickness of stencil at
the hole of the module pads should be 0.18mm. For details, please refer to document [4].
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LTE Module
Time
50
100
150 200
250 300
50
100
150
200
250
160 ºC
200 ºC
217
0
70s~120s
40s~60s
Between 1~3 ºC/s
Preheat Heating Cooling
ºC
s
Liquids Temperature
Temperature
EC20 Hardware Design
It is suggested that peak reflow temperature is 235 ~ 245ºC (for SnAg3.0Cu0.5 alloy). Absolute max
reflow temperature is 260ºC. To avoid damage to the module when it was repeatedly heated, it is
suggested that the module should be mounted after the first panel has been reflowed. The following
picture is the actual diagram which we have operated.
Figure 40: Liquids Temperature
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LTE Module
30.3
±0.15
29.3
±0.15
30.3
±0.15
32.5
±0.15
33.5
±0.15
0.35±0.05
4.2
±0.15
3.1
±0.15
32.5±0.15
33.5±0.15
4.00
±0.1
2.00
±0.1
1.75
±0.1
20.20
±0.15
44.00
±0.3
44.00
±0.1
1.50
±
0.1
Direction of feed
Cover tape
13
100
44.5
+0.20
-0.00
48.5
EC20 Hardware Design
8.3. Packaging
EC20 is packaged in the tap and reel carriers. One reel is 11.53m length and contains 250pcs modules.
The figure below shows the package details, measured in mm.
Figure 41: Carrier Tape
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LTE Module
SN
Document Name
Remark
[1]
Quectel_EC20_Power_Management_Application_
Note
EC20 Power Management Application
Note
[2]
Quectel_EC20_AT_Commands_Manual
EC20 AT Commands Manual
[3]
Quectel_EC20_GNSS_AT_Commands_Manual
EC20 GNSS AT Commands Manual
[4]
Quectel_Module_Secondary_SMT_User_Guide
Module Secondary SMT User Guide
Abbreviation
Description
AMR
Adaptive Multi-rate
bps
Bits Per Second
CHAP
Challenge Handshake Authentication Protocol
CS
Coding Scheme
CSD
Circuit Switched Data
CTS
Clear To Send
DC-HSPA+
Dual-carrier High Speed Packet Access
DFOTA
Delta Firmware Upgrade Over The Air
DL
Downlink
DTR
Data Terminal Ready
DTX
Discontinuous Transmission
EC20 Hardware Design
9 Appendix A Reference
Table 33: Related Documents
Table 34: Terms and Abbreviations
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LTE Module
EFR
Enhanced Full Rate
EGSM
Extended GSM900 band (includes standard GSM900 band)
ESD
Electrostatic Discharge
FDD
Frequency Division Duplex
FR
Full Rate
GLONASS
GLObalnaya NAvigatsionnaya Sputnikovaya Sistema, the Russian Global
Navigation Satellite System
GMSK
Gaussian Minimum Shift Keying
GNSS
Global Navigation Satellite System
GPS
Global Positioning System
GSM
Global System for Mobile Communications
HR
Half Rate
HSPA
High Speed Packet Access
HSDPA
High Speed Downlink Packet Access
HSUPA
High Speed Uplink Packet Access
I/O
Input/Output
Inorm
Normal Current
LED
Light Emitting Diode
LNA
Low Noise Amplifier
LTE
Long Term Evolution
MIMO
Multiple Input Multiple Output
MO
Mobile Originated
MS
Mobile Station (GSM engine)
MT
Mobile Terminated
PAP
Password Authentication Protocol
PCB
Printed Circuit Board
EC20 Hardware Design
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LTE Module
PDU
Protocol Data Unit
PPP
Point-to-Point Protocol
QAM
Quadrature Amplitude Modulation
QPSK
Quadrature Phase Shift Keying
RF
Radio Frequency
RHCP
Right Hand Circularly Polarized
Rx
Receive
SIM
Subscriber Identification Module
SMS
Short Message Service
TDD
Time Division Duplexing
TDMA
Time Division Multiple Access
TD-SCDMA
Time Division-Synchronous Code Division Multiple Access
TX
Transmitting Direction
UL
Uplink
UMTS
Universal Mobile Telecommunications System
URC
Unsolicited Result Code
USIM
Universal Subscriber Identity Module
Vmax
Maximum Voltage Value
Vnorm
Normal Voltage Value
Vmin
Minimum Voltage Value
VIHmax
Maximum Input High Level Voltage Value
VIHmin
Minimum Input High Level Voltage Value
VILmax
Maximum Input Low Level Voltage Value
VILmin
Minimum Input Low Level Voltage Value
VImax
Absolute Maximum Input Voltage Value
EC20 Hardware Design
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LTE Module
VImin
Absolute Minimum Input Voltage Value
VOHmax
Maximum Output High Level Voltage Value
VOHmin
Minimum Output High Level Voltage Value
VOLmax
Maximum Output Low Level Voltage Value
VOLmin
Minimum Output Low Level Voltage Value
VSWR
Voltage Standing Wave Ratio
WCDMA
Wideband Code Division Multiple Access
EC20 Hardware Design
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LTE Module
Scheme
CS-1
CS-2
CS-3
CS-4
Code Rate
1/2
2/3
3/4
1
USF
3 3 3
3
Pre-coded USF
3 6 6
12
Radio Block excl.USF and BCS
181
268
312
428
BCS
40
16
16
16
Tail
4 4 4 - Coded Bits
456
588
676
456
Punctured Bits
0
132
220
-
Data Rate Kb/s
9.05
13.4
15.6
21.4
EC20 Hardware Design
10 Appendix B GPRS Coding Scheme
Table 35: Description of Different Coding Schemes
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LTE Module
Multislot Class
Downlink Slots
Uplink Slots
Active Slots
1 1 1 2 2 2 1 3 3 2 2
3
4 3 1 4 5 2 2
4
6 3 2 4 7 3 3 4 8 4 1 5 9 3 2
5
10 4 2 5 11 4 3
5
12 4 4
5
EC20 Hardware Design
11 Appendix C GPRS Multi-slot Class
Twenty-nine classes of GPRS multi-slot modes are defined for MS in GPRS specification. Multi-slot
classes are product dependant, and determine the maximum achievable data rates in both the uplink and
downlink directions. Written as 3+1 or 2+2, the first number indicates the amount of downlink timeslots,
while the second number indicates the amount of uplink timeslots. The active slots determine the total
number of slots the GPRS device can use simultaneously for both uplink and downlink communications.
The description of different multi-slot classes is shown in the following table.
Table 36: GPRS Multi-slot Classes
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UMTS/HSPA Module
Coding Scheme
Modulation
Coding Family
1 Timeslot
2 Timeslot
4 Timeslot
CS-1:
GMSK
/
9.05kbps
18.1kbps
36.2kbps
CS-2:
GMSK
/
13.4kbps
26.8kbps
53.6kbps
CS-3:
GMSK
/
15.6kbps
31.2kbps
62.4kbps
CS-4:
GMSK
/
21.4kbps
42.8kbps
85.6kbps
MCS-1
GMSK
C
8.80kbps
17.60kbps
35.20kbps
MCS-2
GMSK
B
11.2kbps
22.4kbps
44.8kbps
MCS-3
GMSK
A
14.8kbps
29.6kbps
59.2kbps
MCS-4
GMSK
C
17.6kbps
35.2kbps
70.4kbps
MCS-5
8-PSK
B
22.4kbps
44.8kbps
89.6kbps
MCS-6
8-PSK
A
29.6kbps
59.2kbps
118.4kbps
MCS-7
8-PSK
B
44.8kbps
89.6kbps
179.2kbps
MCS-8
8-PSK
A
54.4kbps
108.8kbps
217.6kbps
MCS-9
8-PSK
A
59.2kbps
118.4kbps
236.8kbps
EC20 Hardware Design
12 Appendix D EDGE Modulation and
Coding Scheme
Table 37: EDGE Modulation and Coding Scheme
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