LOW PROFILE 5 x 7mm MINIATURE SMD CRYSTAL OSCILLATORS
Description
Q-Tech’s surface-mount QCC570 LVPECL and LVDS oscillators
consist of a 2.5Vdc and 3.3Vdc differential PECL or LVDS output
oscillator IC and a miniature strip AT quartz crystal built in a low
profile ceramic package with gold plated contact pads.
Rise and Fall times
(measured between 20% to 80% Vcc)
Output Load
Start-up time (Tstup)10ms max.
QCC570LWQCC570NW
(LVDS Output)(LVPECL Output)
38.880MHz — 350.00MHz
± 100ppm max. (see options)
65mA max.60mA max.100mA max.80mA max.
40/60% max. (45/55% optional)
600ps max.1.5ns max. (600ps typ.)
100Ω
(Connected between Out and Comp. Out)
QCC570LP
50Ω to Vcc -2Vdc (or Thevenin equivalent)
(Connected between each Output and Vcc -2Vdc)
QCC570NP
Output voltage (Voh/Vol)
Enable/Disable Tristate function
Jitter (integrated 12kHz to 20MHz)1ps typ. RMS; 20ps max. peak to peak
Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: 310-836-7900 - Fax: 310-836-2157 - www.q-te ch.com
QCC570 LVPECL and LVDS (Revision E, August 2010) (ECO# 9913)
VOH = 1.45V typ., 1.65V max.
VOL = 1.10V typ., 0.90V min.
Pin 1: Open or VIH ≥ 0.7Vcc Oscillation
VIL ≤ 0.3Vcc High Z
VOH = 2.275V min.
VOL = 1.68V max.
VOH = 1.365V min.
VOL = 0.94 max.
2
Q-TECH
0 20 40 60 80 100 120 140 160
180
200 220 240 260
280
300 320 340 360 380 400 420 Time (s)
25
50
75
100
125
150
175
200
225
250
TEMP(*C)
0
60s min.
120s max.
60s min.
120s max.
225º min.
240º max.
60s min.
150s max.
240º
Ramp down (6ºC/s Max)
Ramp up (3ºC/s Max)
TYPICAL REFLOW PROFILE FOR Sn-Pb ASSEMBLY
FEEDING (PULL) DIRECTION
ø13.0±0.5
2.5
2.2±0.1
5º MAX
ø1.5
2.0
1.75±0.1
0.3±.005
ø1.5
2.0±0.1
7.5±0.1
5.4±0.1
4.0±0.1
ø80±1
ø178±1
17.5
16.0±0.3
8±0.1
7.4
±0.1
120º
DUT LVDS
Vcc
100
Q
Q
VOL
VOH
LVDS TERMINATION
654
13
OE
VOD
DUT LVPECL
3
654
50
50
Vcc-2V
Vcc-2V
Q
Q
STANDARD TERMINATION LVPECL
1
OE
Vcc
82
130
Vcc
Vcc
Vcc
130
82
DUT LVPECL
Q
Q
THEVENIN EQUIVALENT 3.3V LVPECL
6 54
31
OE
LOW PROFILE 5 x 7mm MINIATURE SMD CRYSTAL OSCILLATORS
COR PORATI ON
Output Waveform (Typical)Test Circuit
Complimentary output of an LVPECL 3.3Vdc 127MHz
QCC570 LVPECL and LVDS
2.5 to 3.3Vdc - 38.88MHz to 350MHz
Reflow Profile
Environmental and Mechanical Specifications
Environmental TestTest Conditions
Temperature cyclingMIL-STD-883, Method 1010, Cond. B
Constant accelerationMIL-STD-883, Method 2001, Cond. A, Y1
Seal: Fine and Gross Leak MIL-STD-883, Method 1014, Cond. A and C
Vibration sinusoidalMIL-STD-202, Method 204, Cond. D
Shock, non operatingMIL-STD-202, Method 213, Cond. I
Resistance to solder heatMIL-STD-202, Method 210, Cond. B
Resistance to solventsMIL-STD-202, Method 215
SolderabilityMIL-STD-202, Method 208
ESD Classification
Moisture Sensitivity Level J-STD-020, MSL=1
Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: 310-836-7900 - Fax: 310-836-2157 - www.q-t ech.c om
QCC570 LVPECL and LVDS (Revision E, August 2010) (ECO# 9913)
Complimentary output of an LVPECL 3.3Vdc 64MHz
MIL-STD-883, Method 3015,
Class 1 HBM 0 to 1,999V
The Tristate function on pin 1 has a built-in pull-up resistor so it can be left
floating or tied to Vcc without deteriorating the electrical performance.
Embossed Tape and Reel Information
Dimensions are in mm. Tape is compliant to EIA-481-A.
Reel size (Diameter in mm)
178
Qty per reel (pcs)
1,000
3
QCC570 LVPECL and LVDS
Q-TECH
COR PORATI ON
Phase Noise and Phase Jitter Integration
Phase noise is measured in the frequency domain, and is expressed as a ratio of signal power to noise power measured in a 1Hz
bandwidth at an offset frequency from the carrier, e.g. 10Hz, 100Hz, 1kHz, 10kHz, 100kHz, etc. Phase noise measurement is made
with an Agilent E5052A Signal Source Analyzer (SSA) with built-in outstanding low-noise DC power supply source. The DC source
is floated from the ground and isolated from external noise to ensure accuracy and repeatability.
In order to determine the total noise power over a certain frequency range (bandwidth), the time domain must be analyzed in the
frequency domain, and then reconstructed in the time domain into an rms value with the unwanted frequencies excluded. This may be
done by converting L(f) back to Sφ(f) over the bandwidth of interest, integrating and performing some calculations.
LOW PROFILE 5 x 7mm MINIATURE SMD CRYSTAL OSCILLATORS
2.5 to 3.3Vdc - 38.88MHz to 350MHz
Symbol
∫L(f)
Sφ (f)=(180/Π)x√2 ∫L(f)df
RMS jitter = Sφ (f)/(fosc.360°)Jitter(in seconds) due to phase noise. Note Sφ (f) in degrees.
Integrated single side band phase noise (dBc)
Spectral density of phase modulation, also known as RMS phase error (in degrees)
Definition
The value of RMS jitter over the bandwidth of interest, e.g. 10kHz to 20MHz, 10Hz to 20MHz, represents 1 standard deviation of
phase jitter contributed by the noise in that defined bandwidth.
Figure below shows a typical Phase Noise/Phase jitter of a QCC570LW, 3.3Vdc, 125MHz clock at offset frequencies 10Hz to 1MHz,
and phase jitter integrated over the bandwidth of 12kHz to 1MHz.
Q-TECH Corporation - 10150 W. Jefferson Boulevard, Culver City 90232 - Tel: 310-836-7900 - Fax: 310-836-2157 - www.q-t ech.c om
QCC570 LVPECL and LVDS (Revision E, August 2010) (ECO# 9913)
44
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