MN35103UB and MN35104UB are 1-chip LSI for DVD-Player. The connection of this LSI to the Driver IC,
SDRAM, Flash-ROM, Audio-DAC, etc. can configure the DVD-Player System.
This LSI contains Front End (SODC/FE) that performs RF signal /Servo /Decode processings, Back End
(AV decoder/BE) that performs the video decode processing such as MPEG1/MPEG2/JPEG and audio decode
processing such as DVD-Audio/AC-3/DTS/MP3, and the system controller (Siscon) for controlling the system.
Front End part realizes the arithmetic processing of optical head signal and RF signal processing,
the digital signal processing for DVD-ROM reproduction that conforms to DVD standards (16-8 Demodulation,
Error correction), the digital signal processing for CD-DA/CD-ROM (Error correction), AV decoder transmission,
servo control, spindle motor control and seek control.
Please take note that, since (FEP) and (SODC) with DVD mecha-module (MS3) of CX-3016 are integrated into
one chip at MN35103UB and MN35104UB, the waveforms of servo system on the front end which had
previously appeared at MS3, i.e., the waveforms of FE, TE and AS, cannot be seen anymore.
1.1 Analog Block (MN35103UB, MN35104UB:IC1501)
1 Front End Part (MN35103UB, MN35104UB:IC1501)
The analog block for IC1501 generates the servo signals including focus and tracking, processes addition of
RF signals, and controls the laser power of pickup.
The servo system contains focus operation amp, focus offset adjustment circuit, 3-beam tracking operation amp,
phase difference tracking detection circuit, tracking offset adjustment circuit, TE2 value-making circuit.
Also, RF signal processing system contains the functions of AGC and equalizer.
1.1.1 APC Circuit
The optical output for the laser diode (LD) has large minus temperature characteristics. Therefore, the constant
C
optical output cannot be obtained when LD is driven by the constant current. APC circuit controls the electric
current so as to provide constant output at the monitor diode (MD). MN35103UB and MN35104UB contain two
types of APC circuits, one for DVD and another for CD. The LD electric current for DVD (CD) can be obtained by
dividing the voltage measurements between DVDLD1 (CDLD1) and 5V by 15.6 (3.9 4=15.6 ). For DVD (CD),
the results are approx. 26mA (44mA).
+5V
+
+
–
D
LDONCD
LDPOWER
Reg.
LDONDVD
0.17V
–
0.25V0.18V
+
+
–
–
LPCO2
LPC2
+5V
+
LPCO1
E
LPC1
0.59V0.18V
0.5V
0.25V
0.22V
3.9Ω 3.9Ω 3.9Ω 3.9Ω
+
3.9Ω 3.9Ω 3.9Ω 3.9Ω
+
CDLD1
CDLD0
DVDLD1
DVDLD0
CN1101
24
5
26
7
78LD
78MD
65LD
65MD
CDLDDVD
LD
PU unit
+5V
MD
F
CX-31502
1234
5 678
1.1.2 FE Generation Circuit
Focus Error (FE) Generation Circuit
Each of input signals from B1 to B4 which had been quartered by PU within the analog block is input to IC 1501
passing through the resistance and becomes a signal of FE
offset adjustment value. Then, the signal is AD-converted within the servo block and adds an offset cancel value
to become FE, generating a signal of FE=(FE+)
CN1101
VIN5
B1
B2
B3
B4
16
91
VIN6
15
92
VIN7
13
93
VIN8
11
94
–
+
–
+
OFFSET ADJ
–
+
–
+
OFFSET ADJ
-
(FE-).
Analog block
–
+
x1 or x4
–
+
+=
-
(B1+B3) and FE
1+(Pfbal/0x10000)
1+(Pfbal/0x10000)
+
FE
FE
Pfepofs
1-(Pfbal/0x10000)
-
Pfenofs
+
+
Servo block
-=-
(B2+B4) after adding a focus
FE
–
Dfesv
A
B
1.1.3 TE Generation Circuit
Trackings Error (TE) Generation Circuit
For DVD, TE is generated, with the application of a phase contrast method, from the phase difference of (B2+B4)
and (B1+B3). For CD, TE is generated, with the application of a 3-beam method, by sending the signal to the
variable amp set for the tracking offset adjustment via outer-attached resistance and then by AD-converting it to
–
+
–
+
–
+
–
+
–
+
–
+
-
C.
VHALF
VHALF
+
EQ
–
+
EQ
–
+
EQ
–
+
EQ
–
Analog block
-
6dB 15dB(3dB STEP)
0dB/12dB
–
+
OFFSET DAC
-
6dB 15dB(3dB STEP)
0dB/12dB
–
+
OFFSET DAC
PC
PC
G
G
Analog block
OFFSET ADJ
OFFSET ADJ
30kHz
30kHz
–
+
x1 or x4
–
+
1+(Pfbal/0x10000)
+
TE
-
TE
TE
TE
Servo block
+
Pfepofs
1-(Pfbal/0x10000)
+
Pfenofs
1+(Pfbal/0x10000)
+
+
Pfepofs
1-(Pfbal/0x10000)
+
Pfenofs
–
Dfesv
Servo block
TE
–
TE
Dfesv
make the formula of TE=A
DVD (TE from phase difference)
CN1101
VIN1
16
B1
B2
B3
B4
95
VIN2
15
96
VIN3
13
97
VIN4
11
98
CD (3-beam TE)
CN1101
17
A
VIN9
20kΩ
VREFH
10
C
VIN10
VREFH
20kΩ
C
D
E
56
CX-3150
F
7
8
3
1234
1.2 Servo Block (MN35103UB, MN35104UB:IC1501)
Servo block performs focus, tracking, servo control for traverse, spindle motor control and seek control.
A
1.2.1 Focus Close
FODRV
Far from disc
Lens
B
C
Close to disc
FE
RFENV
AS
1
2
5
4
7
6
3
VHALF
Focal point
After issuing the focus close command, the following processes are taken for both DVD and CD.
1. Measure and optimize signal levels
First drive PU lens far from the disc and then drive closer to the disc. At the focal point met in the process of
this move, measure signal levels of FE, AS and RFENV respectively, and optimize their levels for FE and AS
(1 & 2 in the above figure).
2. Focus closing
D
Next, drive the lens far from the disc again to detect the closing levels of FE and AS.
Then activate focus loop filter for closing focus (3 6).
3. Check closing
Check the closing with signal levels of AS and RFENV (6 & 7).
Focus search in test mode can check the signal levels and focus drive voltages for FE, AS and RFEV.
1.2.2 Tracking Close
After issuing the tracking close command, the following processes are taken for both DVD and CD.
1. Tracking brake
Measure one half cycle of the tracking cross and if the cycle is within the range of designation, output the brake
E
F
pals.
Output direction of brake pals is determined by the phase relations of OFTR and TKC (TE's binarization) signals.
After confirming that the swing of lens against disc is controlled, the brake stops and the closing begins. If the
closing condition is not met within 10msec. after outputting brake, the brake stops and the closing begins.
2. Tracking closing
Process the tracking drive hold with OFTR signal.
3. Check closing
Check whether or not the track jump does not exceed the designated number within the designated term.
Closing check will be time-out at 20msec. Retry using a command from the microcomputer.
1234
CX-31504
1.2.3 Track Jump
The system selects from three types of methods; i.e. interval jump, multi jump and traverse seek,
according to the target number of moving tracks.
1. Interval Jump
The detailed seek is capable due to the execution of repetitive one-track jumps.
It is used when approaching to the target track or seek-operating to an adjacent track.
2. Multi Jump
It counts both edges of the track cross signal TKC and moves for designated number of track counts.
3. Traverse Seek
It controls the movement speed by measuring the time of the track cross signal TKC and manages the
vibration of pickup generated upon movement to the minimum.
Types of target number of moving jumps illustrating the jump switch setting for both DVD and CD.
DVD
1-10 Interval Jump
11-100 Multi Jump
101-500 Combination of Multi Jump and Interval Jump
Over 501 Traverse Seek
The waveforms of track jumps are shown in the next page.
CD
1-10 Interval Jump
11-32 Multi Jump
33-500 Combination of Multi Jump and Interval Jump
Over 501 Traverse Seek
5 678
A
B
C
D
56
CX-3150
E
F
7
8
5
1234
Interval Jump (1 Track)
Outer JumpInner Jump
A
TE
TD
B
Multi Jump (32 Track)
Outer JumpInner Jump
TE
TD
C
Traverse Seek (501 Track)
Outer JumpInner Jump
TE
TD
D
CO
Traverse Seek (5000 Track)
Outer JumpInner Jump
E
TE
TD
CO
F
CX-31506
1234
(1 Layer)
(0 Layer)
object lens
L1
L0
L1
L0L1
L0
L1L0
AD
BC
A
D
B
C
1.2.4 Focus Jump
Focus jump is a function corresponding to the single-sided or both-sided two-layers.
Seen from the object lens, a forward layer is called 0 Layer (L0) and a farther one is called 1 Layer (L1).
The flow of focus jump is shown below.
1. Open tracking at the layer during play.
2. Issue a command to execute jump to the target layer.
3. At the jumped layer, replay by closing the tracking.
Also, the processes when issuing a jump command are as follows.
1. Accelerate the lens to the target layer until FE signal detects the acceleration completion level for focus jump.
However, if the time of acceleration time-out reaches before detecting the acceleration completion level,
the acceleration will compulsively stop.
2. Move lens with inertia instead of outputting the drive voltage until FE signal detects the deceleration initiation
level.
3. Decelerate lens for the duration from detection of the deceleration initiation level to the deceleration
completion level.
However, if the time of deceleration time-out reaches before detecting the deceleration completion level,
the deceleration will compulsively stop.
The waveforms of focus jump are shown below.
The waveforms of focus jump
FE
FD
L0 L1
L1 L0
5 678
A
B
C
D
E
F
56
CX-3150
7
8
7
1234
1.3 Automatic Adjustment Function
This system totally automates the circuit adjustments.
A
The details of automatic adjustments are explained respectively as follows:
1.3.1 FE, TE, AS and Offset Cancel
Each of analog signals for FE, TE and AS generated at FEP is converted into a digital signal by A/D converter
inside servo block. Offset cancel is a function to cancel the input offset of A/D converter when the power is on.
1.3.2 VCO Gain Adjustment (VARI Adjustment)
It has a function to absorb dispersion of VCO gains among LSI solid by learning and to automatically adjust
VCO gains for the constant allocation. Lock VCO to 186- multiplied frequency against the input clock of crystal
criteria, read Frequency Control Value (FCNT), and then adjust VARI register so that the value becomes
equivalent to the target FCNT value.
B
1.3.3 FE Normalization Adjustment
After A/D-converting FE signal level at servo block which was measured at focus close, adjust it to 190LSB at
the digital equalizer input stage.
1.3.4 Spindle Gain Learning
Measure the duration from the halting state of spindle motor to the point reaching the fixed rotation speed for
Gain adjustment. Then adjust in the way of absorbing torque dispersion on spindle motor.
1.3.5 Tracking Balance (TBAL) Adjustment
By applying Newton-Raphson method, search for a balanced point at which DC offset becomes 0 by vibrating
C
lens toward track direction at the time of the focus close and the tracking open.
1.3.6 Tracking Error Amplitude Learning
After vibrating lens toward track direction at the time of the focus close and the tracking open to A/D-convert
the amplitude level to ADSC, adjust it to 190LSB at the digital equalizer input stage.
1.3.7 Focus Balance (FBAL) Adjustment
Adjust the focus position so that RFENV becomes maximum at the tracking close.
1.3.8 Focus Gain Adjustment and Tracking Gain Adjustment
D
Insert disturbance to servo loop at the tracking close and adjust to a target gain intersection.
1.3.9 AS Normalization Adjustment
After measuring AS signal levels for the designated number of samplings at the tracking close to A/D-convert
by ADSC, the precise adjustment is made to set 64LSB at the digital equalizer input stage.
E
F
1234
CX-31508
5 678
All automatic adjustments can be confirmed by indicating their results at test mode.
List of Automatic Adjustment Coefficients
States
Power On
F Close
F Close (after TBAL)
T Close
Coefficients
FE Offset
TE Offset
AS Offset
Spindle Gain
FE MAX
FE MIN
AS MAX
FE Normalization
TE MAX
TE MIN
TE Normalization
F Gain
T Gain
AS Normalization
Note: Coefficients are indicated in hexadecimal numbers.
All figures describe specifications at the production line.
Disc applies DVD
-
REF-A1 for DVD and TCD-782 for CD.
CD
A
B
1.4 CIRC Block (MN35103UB, MN35104UB:IC1501)
CIRC block contains digital signal processing function for CD-DA and CD-ROM (EFM demodulation and error
correction), digital servo processing for spindle motor and 1-bit DA converter with digital filter (Differential OP
amp output with secondary lowpass filter).
1.5 DRC Block (MN35103UB, MN35104UB:IC1501)
Digital Read Channel (DRC) provides A/D converter, adaptive equalization, bit-a-bit detector, digital PLL circuit,
CPU interface and peripheral circuits for reading signals of optical disks.
C
D
E
56
CX-3150
F
7
8
9
1234
2 Back End Part
2.1 States of Power Supply
A
B
C
VD8V
VD8V
VD5PU
BVC33
SRVDD33
VD5
F.E. Driver System
DISC Detection LED
IC1001
AVCC, for 5V
REG IC
IC1002
VCC, for 5V
REG IC
IC2001
Changer CPU Power Supply
IC1651
SRAM Power Supply
IC1901
VCC33, for 3.3V
REG IC
AVCC5(= 5.0V)
VCC5(= 5.0V)
VCC33(= 3.3V)
IC1851
DAC
Q1551
Peripherals
F.E. System
IC 1201
P.U Peripherals
IC 1501
AV CHIP etc.
VD5
2.2 States of Clock
D
E
Using 27MHz primary crystal (X1801), 27MHz buffer-out (VCLK & BECLK) audio clock (EXTCK & DACCLK
[with 24M/33M/36M switches]) and F.E. part clock (MCK33) are produced with IC1801.
27MHz
Crystal
IC1003
1.5V output
DCDC converter
IC1801
Clock Generator
VCC15(= 1.5V)
States of Power Supply
BECLK
SO1 [24M]
AO1 [33M/36M]
EXTCK
MCK33
IC 1501
AV CHIP
IC1501
AVLSI170Pin
IC 1802 selector
IC1501
AVLSI172Pin
IC1501 92Pin
F.E. Part Clock
DACCLK
IC1851
AUDIO DAC
VCC33
States of Clock
F
1234
CX-315010
5 678
2.3 Audio Circuit
The serial three lines of audio output from AVLSI is input to IC 1851 (Audio DAC) and the signal that had
become analog audio is output from HOST I/F. For mute circuit, only AMUTE can be output at present,
and Mute Tr is located at the product side.
Composite Video Signal is output from DAC circuit part in AVLSI.
Output from HOST I/F via Buffer circuit.
IC1501
AVLSI
Video DAC
circuit part
COMP
AVCC5
Q1551 peripheral
Video buffer circuit
MCKENA
LD
RO
MCKENA
GNDAU
COMPO
B
CN1881
CN1551
C
CN1901
HOST I/F
D
Video circuit
CX-3150
56
E
F
7
8
11
1234
2.5 SDRAM I/F
A
Communication I/F between AVLSI and memory to allocate MPEG stream data as a buffer.
Capacity of SDRAM is 128Mbit.
Note that XCSM, XWE, XCAS, XRAS, XCSM for IC1570 are renamed respectively to NCSM, NWE, NCAS, NRAS,
NCSM for IC1501.
MA0 11
MDQ0 31
MCK
XWE (NWE)
XCAS (NCAS)
B
IC1570
SDRAM
XRAS (NRAS)
XCSM (NCSM)
IC1501
AVLSI
DQM0
DQM1
DQM2
DQM3
SDRAM I/F
C
D
E
F
1234
CX-315012
5 678
3 MECHANISM CONTROL
- Overview
The combination of load/eject operation, camgear motor
(operation mode) operation, elevation operation and
clamp operation enables the operation as changer
mechanism module.
3.1 Loading system
Disc position is detected with 3 switches attached to mechanism unit, photo,
and LED, and load/eject is performed by driving an E/L motor. *E/L is
abbreviation of Elevation/Loading. (MG4 mechanism shares a motor like G3
mechanism, unlike G2 or MG3 mechanism.)
A
3.1.1 Detect system
The 3 switches, photo and LED operate load start/load end, disc form detection
and watching disc eject.
3.1.2 Drive system
Controlling an E/L motor by the control unit enables the following function:
Loading of disc
Ejecting of disc
a) Drive system
It controls drive direction by output E/LFWD, E/LREV from
the microcomputer (IC2001), and 3 values of drive voltage
by Hi-Z/H/L of E/LVOL2.
LOADPHT
LOADSWR
LOADSWL
IN/SW
IC2001
98
58
57
87
E/LVOL1
(no use)
MECHANISM
CONTROLLER
730
At the time of loading E/L+<E/L- ; (E/LFWD; L, E/LREV; H)
At the time of ejecting E/L+>E/L- ; (E/LFWD; H, E/LREV; L)
Drive voltage (E/LVOL2=Hi-Z) ; 7.9V
Drive voltage (E/LVOL2=H) ; 7V
Drive voltage (E/LVOL2=L) ; 4.8V
41
42
E/LFWD
E/LREV
E/LVOL2
VD5PU
IC1240
4
3+3ch
DRIVER
5
8
B
C
E/L+
3
D
E/L
MOTOR
2
E/L-
56
CX-3150
E
F
7
8
13
1234
b) Drive sequence
At the time of loading:
A
1 One of LOADPHT, LOADSWR, LOADSWL starts driving with H. 2 All of LOADPHT, LOADSWR, LOADSWL detect
H at the same time. 3 Detecting H of INISW. 4 Detecting L of LOADSWR. 5 Detecting L of LOADSWL and stopping
E/L motor.
1
LOADPHT
LOADSWR
1
2
4
15
LOADSWL
3
B
At the time of ejecting:
1 Starting driving H of LOADSWR. 2 Detecting L of INISW.
3 Detecting L of LOADSWL and after reverse brake (16ms), stopping E/L monitor.
INISW
LOADPHT
1
LOADSWR
C
LOADSWL
3
2
INISW
3.2 Elevation system
3.2.1 Detect system
It uses a linear position sensor (VR1), converts stage chassis level to voltage value and captures it by a microcomputer
A/D to detect absolute position.
Detect circuit
D
E
Linear position sensor
VR1
ELVSNS
SWDVDD
VR11
ELVREF
GND
3.2.2 Drive system
Controlling an E/L motor by the control unit enables the following function.
Elevation function
F
1234
CX-315014
5 678
a) Drive circuit
t controls drive direction by output E/LFWD, E/LREV from
the microcomputer (IC2001), and 3 values of drive voltage
by Hi-Z/H/L of E/LVOL2.
Driving upper direction E/L+>E/L- , (E/LFWD; H, E/LREV; L)
Driving lower direction E/L+<E/L- , (E/LFWD; L, E/LREV; H)
Drive voltage ( E/LVOL2=Hi-Z) ; 7.9V
( E/LVOL2=H) ; 7V ( E/LVOL2=L) ; 4.8V
A
LOADPHT
LOADSWR
LOADSWL
IN/SW
IC2001
98
58
MECHANISM
CONTROLLER
57
41
42
87
730
E/LVOL1E/LVOL2
(no use)
E/LFWD
E/LREV
VD5PU
IC1240
4
3+3ch
DRIVER
5
8
E/L+
3
E/L
MOTOR
B
2
E/L-
C
b) Drive sequence
1 Driving continuously to the position of brake start.
2 Detecting of passing the position of brake start and starting short brake.
3 Starting of driving pulse to reach OK range. After confirmation of entering OK range, it is completed.
D
E
56
CX-3150
F
7
8
15
1234
3.3 Camgear motor system
3.3.1 Detect system
A
B
It uses a rotary position sensor (VR2), converts a
camgear rotation angle to voltage value and captures
it by a microcomputer A/D to detect absolute position.
Detect circuit
SWDVDD
VR21
CAMREF
Rotary position sensor
VR2
GND
CAMSNS
C
3.3.2 Drive system
Controlling a cam gear motor by the control unit
enables the following function:
Open/close of shutter
Open /close of tray tab
Division of tray
Rotation operation of CRG chassis
(moving to the play position)
Release of mechanism lock
Drive of eject arm
D
E
F
CX-315016
1234
5 678
a) Drive circuit
It controls drive direction by output CAMFWD and CAMREV
from the microcomputer (IC2001), and two values of drive
voltage by Hi-Z/H of CAMVOL.
Driving CRG chassis to the outer direction
(direction of EJECT position)
AM+>CAM-; (CAMFWD; H, CAMREV; L)
Driving CRG chassis to the inner direction
(direction of PLAY position)
CAM+<CAM-; (CAMFWD; L, CAMREV; H)
Drive voltage CAMVOL=Hi-Z; 8V
CAMVOL=H; 7V
A
VR2
VR21
CAMSNS
CAMREF
IC2001
94
95
MECHANISM
CONTROLLER
6
90
89
CAMFWD
CAMREV
IC1240
7
3+3ch
DRIVER
6
CAM+
34
35
9
CAM-
CAMVOL
VD5PU
b) Drive sequence
1 Driving continuously to the position of brake start.
2 Detecting of passing the position of brake start and starting short brake or reverse brake.
3 Starting of driving pulse to reach OK range. After confirmation of entering OK range, it is completed.
B
CAMGEAR
MOTOR
C
D
56
CX-3150
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8
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