Philips (Now NXP) TDA6108JF Schematic [ru]

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TDA6108JF

Triple video output amplifier

Product specification
Supersedes data of 1998 Jun 22
File under Integrated Circuits, IC02

1999 Oct 29

Philips Semiconductors Product specification

Triple video output amplifier TDA6108JF

FEATURES

• Typical bandwidth of 9.0 MHz for an output signal of

• Black-Current Stabilization (BCS) circuit

• Thermal protection.

60 V (p-p)

• High slew rate of 1850 V/µs

• No external components required

• Very simple application

• Single supply voltage of 200 V

• Internal reference voltage of 2.5 V

• Fixed gain of 51

GENERAL DESCRIPTION

The TDA6108JF includes three video output amplifiers in
oneplasticDIL-bent-SIL9-pinmediumpower(DBS9MPF)
package (SOT111-1), using high-voltage DMOS
technology, and is intended to drive the three cathodes of
a colour CRT directly. To obtain maximum performance,
the amplifier should be used with black-current control.

ORDERING INFORMATION

TYPE

NUMBER

NAME DESCRIPTION VERSION

PACKAGE

TDA6108JF DBS9MPF plastic DIL-bent-SIL medium power package with fin; 9 leads SOT111-1

BLOCK DIAGRAM

handbook, full pagewidth

V

DD

6

f

3×

MIRROR 5

CASCODE 1

CASCODE 2

V

1×

9, 8, 7

4

MGL318

oc(3),

V

oc(2),

V

oc(1)

5

I

o(m)

MIRROR 1

TDA6108JF

MIRROR 4

CURRENT

SOURCE

1×

THERMAL

PROTECTION

CIRCUIT

V

,

i(1)

1, 2, 3

V

,

i(2)

V

i(3)

R

i
R

a

VIP

REFERENCE

MIRROR 3

DIFFERENTIAL

STAGE

R

3×

MIRROR 2

Fig.1 Block diagram (one amplifier shown).

1999 Oct 29 2

Philips Semiconductors Product specification

Triple video output amplifier TDA6108JF

PINNING

SYMBOL PIN DESCRIPTION

V

i(1)

V

i(2)

V

i(3)

GND 4 ground (fin)
I

om

V

DD

V

oc(3)

V

oc(2)

V

oc(1)

1 inverting input 1
2 inverting input 2
3 inverting input 3

5 black current measurement output
6 supply voltage
7 cathode output 3
8 cathode output 2
9 cathode output 1

handbook, halfpage

V
V
V

V

i(1)

V

i(2)

V

i(3)

GND

I

om

V

DD
oc(3)
oc(2)
oc(1)

1
2
3
4
5

TDA6108JF

6
7
8
9

MGL319

Fig.2 Pin configuration.

LIMITING VALUES

In accordance with the Absolute Maximum Rating System (IEC 134); voltages measured with respect to pin 4 (ground);
currents as specified in Fig.1; unless otherwise specified.

SYMBOL PARAMETER MIN. MAX. UNIT

V

DD

V

i

V

om

V

oc

T

stg

T

j

V

es

supply voltage 0 250 V
input voltage 0 12 V
measurement output voltage 0 6V
cathode output voltage 0 V

DD

V
storage temperature −55 +150 °C
junction temperature −20 +150 °C
electrostatic handling

human body model (HBM) − 2000 V
machine model (MM) − 300 V

HANDLING

Inputs and outputs are protected against electrostatic discharge in normal handling. However, to be totally safe, it is
desirable to take normal precautions appropriate to handling MOS devices (see

“Handling MOS Devices”

).

QUALITY SPECIFICATION

Quality specification

“SNW-FQ-611 part D”

is applicable.

1999 Oct 29 3

Philips Semiconductors Product specification

Triple video output amplifier TDA6108JF

THERMAL CHARACTERISTICS

SYMBOL PARAMETER CONDITIONS VALUE UNIT

R

th(j-a)

R

th(j-fin)

R

th(h-a)

Note

1. An external heatsink is necessary.

thermal resistance from junction to ambient 56 K/W
thermal resistance from junction to fin note 1 11 K/W
thermal resistance from heatsink to ambient 10 K/W

Thermal protection

handbook, halfpage

8

P

tot

(W)

6

4

2

0

−20 20

(1) Infinite heatsink.
(2) No heatsink.

(1)

(2)

60 100 140

T

Fig.3 Power derating curves.

MGL322

amb

180

(°C)

The internal thermal protection circuit gives a decrease of
the slew rate at high temperatures: 10% decrease at
130 °C and 30% decrease at 145 °C (typical values on the
spot of the thermal protection circuit).

handbook, halfpage

outputs

5 K/W

thermal protection circuit

6 K/W

fin

MGK279

Fig.4 Equivalent thermal resistance network.

1999 Oct 29 4

Philips Semiconductors Product specification

Triple video output amplifier TDA6108JF

CHARACTERISTICS

Operating range: Tj= −20 to +150 °C; VDD= 180 to 210 V. Test conditions: T
V

o(c1)=Vo(c2)=Vo(c3)

=1⁄2VDD; CL= 10 pF (CL consists of parasitic and cathode capacitance); R

(measured in test circuit of Fig.8); unless otherwise specified.

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

I

q

V

ref(int)

quiescent supply current 8.8 10.3 11.7 mA
internal reference voltage

(input stage)

R

i

input resistance − 3.2 − kΩ
G gain of amplifier 47.5 51.0 55.0
∆G gain difference −2.5 0 +2.5
V

O(c)

nominal output voltage at

Ii=0µA 116 129 142 V

pins 7, 8 and 9 (DC value)
∆V

O(c)(offset)

differential nominal output

Ii=0µA − 05V
offset voltage between
pins 7 and 8, 8 and 9 and
9 and 7 (DC value)

∆V

o(c)(T)

output voltage temperature
drift at pins 7, 8 and 9

∆V

o(c)(T)(offset)

differential output offset
voltage temperature drift
between pins 7 and 8,
8 and 9 and 7 and 9

I

o(m)(offset)

∆I

/∆I

o(m)

offsetcurrentofmeasurement
output (for 3 channels)

linearity of current transfer −100µA<I

o(c)

I

=0µA;

o(c)

1.5 V < Vi< 5.5 V;

3V<V

o(m)

<6V

< 100 µA;

o(c)

1.5 V < Vi< 5.5 V;

I

o(c)(max)

maximum peak output current

3V<V

50V<V

<6V

o(m)

o(c)<VDD

− 50 V − 28 − mA

(pins 7, 8 and 9)

V

o(c)(min)

minimum output voltage

Vi= 7.0 V; note 1 −−10 V
(pins 7, 8 and 9)

V

o(c)(max)

maximum output voltage

Vi= 1.0 V; note 1 VDD− 15 −−V
(pins 7, 8 and 9)

B

S

small signal bandwidth

V

= 60 V (p-p) − 9.0 − MHz

o(c)

(pins 7, 8 and 9)

B

L

large signal bandwidth

V

= 100 V (p-p) − 8.0 − MHz

o(c)

(pins 7, 8 and 9)

t

Pco

cathode output propagation
time 50% input to 50% output
(pins 7, 8 and 9)

V

= 100 V (p-p)

o(c)

square wave; f <1 MHz;

tr=tf=40ns

(pins 1, 2 and 3);

see Figs 6 and 7

=25°C; VDD= 200 V;

amb

= 18 K/W

th(h-a)

− 2.5 − V

−−10 − mV/K

− 0 − mV/K

−50 − +50 µA

0.9 1.0 1.1

− 32 − ns

1999 Oct 29 5

Philips Semiconductors Product specification

Triple video output amplifier TDA6108JF

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT

∆t

Pco

t

o(r)

t

o(f)

t

st

SR slew rate between

O

v

PSRR power supply rejection ratio f < 50 kHz; note 2 − 65 − dB

α

ct(DC)

difference in cathode output
propagationtime50% inputto
50% output (pins 7 and 8,
7 and 9 and 8 and 9)

cathode output rise time
10% output to 90% output
(pins 7, 8 and 9)

cathode output fall time
90% output to 10% output
(pins 7, 8 and 9)

settling time 50% input to
99% < output < 101%
(pins 7, 8 and 9)

50Vto(VDD− 50 V)
(pins 7, 8 and 9)

cathode output voltage
overshoot (pins 7, 8 and 9)

DC crosstalk between
channels

V

= 100 V (p-p)

o(c)

square wave; f < 1 MHz;

tr=tf=40ns

(pins 1, 2 and 3)

V

= 50 to 150 V square

o(c)

wave; f < 1 MHz; tf=40ns

(pins 1, 2 and 3); see Fig.6

V

= 150 to 50 V square

o(c)

wave; f < 1 MHz; tr=40ns

(pins 1, 2 and 3); see Fig.7

V

= 100 V (p-p)

o(c)

square wave; f < 1 MHz;

tr=tf=40ns

(pins 1, 2 and 3);

see Figs 6 and 7

Vi= 4 V (p-p) square wave;

f < 1 MHz; tr=tf=40ns

(pins 1, 2 and 3)

V

= 100 V (p-p)

o(c)

square wave; f < 1 MHz;

tr=tf=40ns

(pins 1, 2 and 3);

see Figs 6 and 7

−10 0 +10 ns

35 50 65 ns

35 50 65 ns

−−350 ns

− 1850 − V/µs

− 10 − %

− 50 − dB

Notes

1. See also Fig.5 for the typical DC-to-DC transfer of Vito V

o(c)

.

2. The ratio of the change in supply voltage to the change in input voltage when there is no change in output voltage.

1999 Oct 29 6